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* [PATCH v3 0/4] hw/arm/raspi: Fix SYS_timer to unbrick Linux kernels v3.7+
@ 2020-10-02 16:42 Philippe Mathieu-Daudé
  2020-10-02 16:42 ` [PATCH v3 1/4] hw/timer/bcm2835: Introduce BCM2835_SYSTIMER_COUNT definition Philippe Mathieu-Daudé
                   ` (3 more replies)
  0 siblings, 4 replies; 10+ messages in thread
From: Philippe Mathieu-Daudé @ 2020-10-02 16:42 UTC (permalink / raw)
  To: qemu-devel
  Cc: Peter Maydell, Luc Michel, Philippe Mathieu-Daudé,
	Andrew Baumann, Paul Zimmerman, Niek Linnenbank, qemu-arm

In this series we implement the COMPARE registers of the
SYS_timer, since they are used by Linux.

This fixes the hang reported by Niek here:
https://www.mail-archive.com/qemu-devel@nongnu.org/msg682090.html

Since v2:
- Fixed issue in COMPARE register reported by Luc

Since v1:
- Extracted unrelated patches to previous series
  (which happened to be mis-rebased)

Philippe Mathieu-Daudé (4):
  hw/timer/bcm2835: Introduce BCM2835_SYSTIMER_COUNT definition
  hw/timer/bcm2835: Rename variable holding CTRL_STATUS register
  hw/timer/bcm2835: Support the timer COMPARE registers
  hw/arm/bcm2835_peripherals: Correctly wire the SYS_timer IRQs

 include/hw/timer/bcm2835_systmr.h | 17 +++++++---
 hw/arm/bcm2835_peripherals.c      | 13 ++++++--
 hw/timer/bcm2835_systmr.c         | 54 +++++++++++++++++++------------
 hw/timer/trace-events             |  4 ++-
 4 files changed, 61 insertions(+), 27 deletions(-)

-- 
2.26.2



^ permalink raw reply	[flat|nested] 10+ messages in thread

* [PATCH v3 1/4] hw/timer/bcm2835: Introduce BCM2835_SYSTIMER_COUNT definition
  2020-10-02 16:42 [PATCH v3 0/4] hw/arm/raspi: Fix SYS_timer to unbrick Linux kernels v3.7+ Philippe Mathieu-Daudé
@ 2020-10-02 16:42 ` Philippe Mathieu-Daudé
  2020-10-03 16:42   ` Richard Henderson
  2020-10-02 16:42 ` [PATCH v3 2/4] hw/timer/bcm2835: Rename variable holding CTRL_STATUS register Philippe Mathieu-Daudé
                   ` (2 subsequent siblings)
  3 siblings, 1 reply; 10+ messages in thread
From: Philippe Mathieu-Daudé @ 2020-10-02 16:42 UTC (permalink / raw)
  To: qemu-devel
  Cc: Peter Maydell, Luc Michel, Philippe Mathieu-Daudé,
	Andrew Baumann, Paul Zimmerman, Niek Linnenbank, qemu-arm,
	Luc Michel

Use the BCM2835_SYSTIMER_COUNT definition instead of the
magic '4' value.

Reviewed-by: Luc Michel <luc.michel@greensocs.com>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
 include/hw/timer/bcm2835_systmr.h | 4 +++-
 hw/timer/bcm2835_systmr.c         | 3 ++-
 2 files changed, 5 insertions(+), 2 deletions(-)

diff --git a/include/hw/timer/bcm2835_systmr.h b/include/hw/timer/bcm2835_systmr.h
index 7ce8f6ef4d..43df7ee488 100644
--- a/include/hw/timer/bcm2835_systmr.h
+++ b/include/hw/timer/bcm2835_systmr.h
@@ -16,6 +16,8 @@
 #define TYPE_BCM2835_SYSTIMER "bcm2835-sys-timer"
 OBJECT_DECLARE_SIMPLE_TYPE(BCM2835SystemTimerState, BCM2835_SYSTIMER)
 
+#define BCM2835_SYSTIMER_COUNT 4
+
 struct BCM2835SystemTimerState {
     /*< private >*/
     SysBusDevice parent_obj;
@@ -26,7 +28,7 @@ struct BCM2835SystemTimerState {
 
     struct {
         uint32_t status;
-        uint32_t compare[4];
+        uint32_t compare[BCM2835_SYSTIMER_COUNT];
     } reg;
 };
 
diff --git a/hw/timer/bcm2835_systmr.c b/hw/timer/bcm2835_systmr.c
index 3387a6214a..ff8c553661 100644
--- a/hw/timer/bcm2835_systmr.c
+++ b/hw/timer/bcm2835_systmr.c
@@ -134,7 +134,8 @@ static const VMStateDescription bcm2835_systmr_vmstate = {
     .minimum_version_id = 1,
     .fields = (VMStateField[]) {
         VMSTATE_UINT32(reg.status, BCM2835SystemTimerState),
-        VMSTATE_UINT32_ARRAY(reg.compare, BCM2835SystemTimerState, 4),
+        VMSTATE_UINT32_ARRAY(reg.compare, BCM2835SystemTimerState,
+                             BCM2835_SYSTIMER_COUNT),
         VMSTATE_END_OF_LIST()
     }
 };
-- 
2.26.2



^ permalink raw reply related	[flat|nested] 10+ messages in thread

* [PATCH v3 2/4] hw/timer/bcm2835: Rename variable holding CTRL_STATUS register
  2020-10-02 16:42 [PATCH v3 0/4] hw/arm/raspi: Fix SYS_timer to unbrick Linux kernels v3.7+ Philippe Mathieu-Daudé
  2020-10-02 16:42 ` [PATCH v3 1/4] hw/timer/bcm2835: Introduce BCM2835_SYSTIMER_COUNT definition Philippe Mathieu-Daudé
@ 2020-10-02 16:42 ` Philippe Mathieu-Daudé
  2020-10-03 16:42   ` Richard Henderson
  2020-10-02 16:42 ` [PATCH v3 3/4] hw/timer/bcm2835: Support the timer COMPARE registers Philippe Mathieu-Daudé
  2020-10-02 16:42 ` [PATCH v3 4/4] hw/arm/bcm2835_peripherals: Correctly wire the SYS_timer IRQs Philippe Mathieu-Daudé
  3 siblings, 1 reply; 10+ messages in thread
From: Philippe Mathieu-Daudé @ 2020-10-02 16:42 UTC (permalink / raw)
  To: qemu-devel
  Cc: Peter Maydell, Luc Michel, Philippe Mathieu-Daudé,
	Andrew Baumann, Paul Zimmerman, Niek Linnenbank, qemu-arm,
	Luc Michel

The variable holding the CTRL_STATUS register is misnamed
'status'. Rename it 'ctrl_status' to make it more obvious
this register is also used to control the peripheral.

Reviewed-by: Luc Michel <luc.michel@greensocs.com>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
 include/hw/timer/bcm2835_systmr.h | 2 +-
 hw/timer/bcm2835_systmr.c         | 8 ++++----
 2 files changed, 5 insertions(+), 5 deletions(-)

diff --git a/include/hw/timer/bcm2835_systmr.h b/include/hw/timer/bcm2835_systmr.h
index 43df7ee488..f15788a78d 100644
--- a/include/hw/timer/bcm2835_systmr.h
+++ b/include/hw/timer/bcm2835_systmr.h
@@ -27,7 +27,7 @@ struct BCM2835SystemTimerState {
     qemu_irq irq;
 
     struct {
-        uint32_t status;
+        uint32_t ctrl_status;
         uint32_t compare[BCM2835_SYSTIMER_COUNT];
     } reg;
 };
diff --git a/hw/timer/bcm2835_systmr.c b/hw/timer/bcm2835_systmr.c
index ff8c553661..b234e83824 100644
--- a/hw/timer/bcm2835_systmr.c
+++ b/hw/timer/bcm2835_systmr.c
@@ -30,7 +30,7 @@ REG32(COMPARE3,     0x18)
 
 static void bcm2835_systmr_update_irq(BCM2835SystemTimerState *s)
 {
-    bool enable = !!s->reg.status;
+    bool enable = !!s->reg.ctrl_status;
 
     trace_bcm2835_systmr_irq(enable);
     qemu_set_irq(s->irq, enable);
@@ -52,7 +52,7 @@ static uint64_t bcm2835_systmr_read(void *opaque, hwaddr offset,
 
     switch (offset) {
     case A_CTRL_STATUS:
-        r = s->reg.status;
+        r = s->reg.ctrl_status;
         break;
     case A_COMPARE0 ... A_COMPARE3:
         r = s->reg.compare[(offset - A_COMPARE0) >> 2];
@@ -82,7 +82,7 @@ static void bcm2835_systmr_write(void *opaque, hwaddr offset,
     trace_bcm2835_systmr_write(offset, value);
     switch (offset) {
     case A_CTRL_STATUS:
-        s->reg.status &= ~value; /* Ack */
+        s->reg.ctrl_status &= ~value; /* Ack */
         bcm2835_systmr_update_irq(s);
         break;
     case A_COMPARE0 ... A_COMPARE3:
@@ -133,7 +133,7 @@ static const VMStateDescription bcm2835_systmr_vmstate = {
     .version_id = 1,
     .minimum_version_id = 1,
     .fields = (VMStateField[]) {
-        VMSTATE_UINT32(reg.status, BCM2835SystemTimerState),
+        VMSTATE_UINT32(reg.ctrl_status, BCM2835SystemTimerState),
         VMSTATE_UINT32_ARRAY(reg.compare, BCM2835SystemTimerState,
                              BCM2835_SYSTIMER_COUNT),
         VMSTATE_END_OF_LIST()
-- 
2.26.2



^ permalink raw reply related	[flat|nested] 10+ messages in thread

* [PATCH v3 3/4] hw/timer/bcm2835: Support the timer COMPARE registers
  2020-10-02 16:42 [PATCH v3 0/4] hw/arm/raspi: Fix SYS_timer to unbrick Linux kernels v3.7+ Philippe Mathieu-Daudé
  2020-10-02 16:42 ` [PATCH v3 1/4] hw/timer/bcm2835: Introduce BCM2835_SYSTIMER_COUNT definition Philippe Mathieu-Daudé
  2020-10-02 16:42 ` [PATCH v3 2/4] hw/timer/bcm2835: Rename variable holding CTRL_STATUS register Philippe Mathieu-Daudé
@ 2020-10-02 16:42 ` Philippe Mathieu-Daudé
  2020-10-03 17:17   ` Richard Henderson
  2020-10-02 16:42 ` [PATCH v3 4/4] hw/arm/bcm2835_peripherals: Correctly wire the SYS_timer IRQs Philippe Mathieu-Daudé
  3 siblings, 1 reply; 10+ messages in thread
From: Philippe Mathieu-Daudé @ 2020-10-02 16:42 UTC (permalink / raw)
  To: qemu-devel
  Cc: Peter Maydell, Luc Michel, Philippe Mathieu-Daudé,
	Andrew Baumann, Paul Zimmerman, Niek Linnenbank, qemu-arm

This peripheral has 1 free-running timer and 4 compare registers.

Only the free-running timer is implemented. Add support the
COMPARE registers (each register is wired to an IRQ).

Reference: "BCM2835 ARM Peripherals" datasheet [*]
            chapter 12 "System Timer":

  The System Timer peripheral provides four 32-bit timer channels
  and a single 64-bit free running counter. Each channel has an
  output compare register, which is compared against the 32 least
  significant bits of the free running counter values. When the
  two values match, the system timer peripheral generates a signal
  to indicate a match for the appropriate channel. The match signal
  is then fed into the interrupt controller.

This peripheral is used since Linux 3.7, commit ee4af5696720
("ARM: bcm2835: add system timer").

[*] https://www.raspberrypi.org/app/uploads/2012/02/BCM2835-ARM-Peripherals.pdf

Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
v3:
- Only compare 32 least significant bits of the free running
  counter values (Luc)
---
 include/hw/timer/bcm2835_systmr.h | 11 ++++++--
 hw/timer/bcm2835_systmr.c         | 45 ++++++++++++++++++++-----------
 hw/timer/trace-events             |  4 ++-
 3 files changed, 41 insertions(+), 19 deletions(-)

diff --git a/include/hw/timer/bcm2835_systmr.h b/include/hw/timer/bcm2835_systmr.h
index f15788a78d..bd3097d746 100644
--- a/include/hw/timer/bcm2835_systmr.h
+++ b/include/hw/timer/bcm2835_systmr.h
@@ -11,6 +11,7 @@
 
 #include "hw/sysbus.h"
 #include "hw/irq.h"
+#include "qemu/timer.h"
 #include "qom/object.h"
 
 #define TYPE_BCM2835_SYSTIMER "bcm2835-sys-timer"
@@ -18,18 +19,24 @@ OBJECT_DECLARE_SIMPLE_TYPE(BCM2835SystemTimerState, BCM2835_SYSTIMER)
 
 #define BCM2835_SYSTIMER_COUNT 4
 
+typedef struct {
+    unsigned id;
+    QEMUTimer timer;
+    qemu_irq irq;
+    BCM2835SystemTimerState *state;
+} BCM2835SystemTimerCompare;
+
 struct BCM2835SystemTimerState {
     /*< private >*/
     SysBusDevice parent_obj;
 
     /*< public >*/
     MemoryRegion iomem;
-    qemu_irq irq;
-
     struct {
         uint32_t ctrl_status;
         uint32_t compare[BCM2835_SYSTIMER_COUNT];
     } reg;
+    BCM2835SystemTimerCompare tmr[BCM2835_SYSTIMER_COUNT];
 };
 
 #endif
diff --git a/hw/timer/bcm2835_systmr.c b/hw/timer/bcm2835_systmr.c
index b234e83824..66a1d4d6b8 100644
--- a/hw/timer/bcm2835_systmr.c
+++ b/hw/timer/bcm2835_systmr.c
@@ -28,20 +28,13 @@ REG32(COMPARE1,     0x10)
 REG32(COMPARE2,     0x14)
 REG32(COMPARE3,     0x18)
 
-static void bcm2835_systmr_update_irq(BCM2835SystemTimerState *s)
+static void bcm2835_systmr_timer_expire(void *opaque)
 {
-    bool enable = !!s->reg.ctrl_status;
+    BCM2835SystemTimerCompare *tmr = opaque;
 
-    trace_bcm2835_systmr_irq(enable);
-    qemu_set_irq(s->irq, enable);
-}
-
-static void bcm2835_systmr_update_compare(BCM2835SystemTimerState *s,
-                                          unsigned timer_index)
-{
-    /* TODO fow now, since neither Linux nor U-boot use these timers. */
-    qemu_log_mask(LOG_UNIMP, "COMPARE register %u not implemented\n",
-                  timer_index);
+    trace_bcm2835_systmr_timer_expired(tmr->id);
+    tmr->state->reg.ctrl_status |= 1 << tmr->id;
+    qemu_set_irq(tmr->irq, 1);
 }
 
 static uint64_t bcm2835_systmr_read(void *opaque, hwaddr offset,
@@ -78,16 +71,29 @@ static void bcm2835_systmr_write(void *opaque, hwaddr offset,
                                  uint64_t value, unsigned size)
 {
     BCM2835SystemTimerState *s = BCM2835_SYSTIMER(opaque);
+    int index;
+    uint64_t now;
+    uint64_t triggers_delay_us;
 
     trace_bcm2835_systmr_write(offset, value);
     switch (offset) {
     case A_CTRL_STATUS:
         s->reg.ctrl_status &= ~value; /* Ack */
-        bcm2835_systmr_update_irq(s);
+        for (index = 0; index < ARRAY_SIZE(s->tmr); index++) {
+            if (extract32(value, index, 1)) {
+                trace_bcm2835_systmr_irq_ack(index);
+                qemu_set_irq(s->tmr[index].irq, 0);
+            }
+        }
         break;
     case A_COMPARE0 ... A_COMPARE3:
-        s->reg.compare[(offset - A_COMPARE0) >> 2] = value;
-        bcm2835_systmr_update_compare(s, (offset - A_COMPARE0) >> 2);
+        index = (offset - A_COMPARE0) >> 2;
+        s->reg.compare[index] = value;
+        now = qemu_clock_get_us(QEMU_CLOCK_VIRTUAL);
+        /* Compare lower 32-bits of the free-running counter. */
+        triggers_delay_us = value - (now & UINT32_MAX);
+        trace_bcm2835_systmr_run(index, triggers_delay_us);
+        timer_mod(&s->tmr[index].timer, now + triggers_delay_us);
         break;
     case A_COUNTER_LOW:
     case A_COUNTER_HIGH:
@@ -125,7 +131,14 @@ static void bcm2835_systmr_realize(DeviceState *dev, Error **errp)
     memory_region_init_io(&s->iomem, OBJECT(dev), &bcm2835_systmr_ops,
                           s, "bcm2835-sys-timer", 0x20);
     sysbus_init_mmio(SYS_BUS_DEVICE(dev), &s->iomem);
-    sysbus_init_irq(SYS_BUS_DEVICE(dev), &s->irq);
+
+    for (size_t i = 0; i < ARRAY_SIZE(s->tmr); i++) {
+        s->tmr[i].id = i;
+        s->tmr[i].state = s;
+        sysbus_init_irq(SYS_BUS_DEVICE(dev), &s->tmr[i].irq);
+        timer_init_us(&s->tmr[i].timer, QEMU_CLOCK_VIRTUAL,
+                      bcm2835_systmr_timer_expire, &s->tmr[i]);
+    }
 }
 
 static const VMStateDescription bcm2835_systmr_vmstate = {
diff --git a/hw/timer/trace-events b/hw/timer/trace-events
index b996d99200..f4ca31d495 100644
--- a/hw/timer/trace-events
+++ b/hw/timer/trace-events
@@ -77,9 +77,11 @@ nrf51_timer_write(uint8_t timer_id, uint64_t addr, uint32_t value, unsigned size
 nrf51_timer_set_count(uint8_t timer_id, uint8_t counter_id, uint32_t value) "timer %u counter %u count 0x%" PRIx32
 
 # bcm2835_systmr.c
-bcm2835_systmr_irq(bool enable) "timer irq state %u"
+bcm2835_systmr_timer_expired(unsigned id) "timer #%u expired"
+bcm2835_systmr_irq_ack(unsigned id) "timer #%u acked"
 bcm2835_systmr_read(uint64_t offset, uint64_t data) "timer read: offset 0x%" PRIx64 " data 0x%" PRIx64
 bcm2835_systmr_write(uint64_t offset, uint64_t data) "timer write: offset 0x%" PRIx64 " data 0x%" PRIx64
+bcm2835_systmr_run(unsigned id, uint64_t delay_us) "timer #%u expiring in %"PRIu64" us"
 
 # avr_timer16.c
 avr_timer16_read(uint8_t addr, uint8_t value) "timer16 read addr:%u value:%u"
-- 
2.26.2



^ permalink raw reply related	[flat|nested] 10+ messages in thread

* [PATCH v3 4/4] hw/arm/bcm2835_peripherals: Correctly wire the SYS_timer IRQs
  2020-10-02 16:42 [PATCH v3 0/4] hw/arm/raspi: Fix SYS_timer to unbrick Linux kernels v3.7+ Philippe Mathieu-Daudé
                   ` (2 preceding siblings ...)
  2020-10-02 16:42 ` [PATCH v3 3/4] hw/timer/bcm2835: Support the timer COMPARE registers Philippe Mathieu-Daudé
@ 2020-10-02 16:42 ` Philippe Mathieu-Daudé
  2020-10-03 17:18   ` Richard Henderson
  3 siblings, 1 reply; 10+ messages in thread
From: Philippe Mathieu-Daudé @ 2020-10-02 16:42 UTC (permalink / raw)
  To: qemu-devel
  Cc: Peter Maydell, Luc Michel, Philippe Mathieu-Daudé,
	Andrew Baumann, Paul Zimmerman, Niek Linnenbank, qemu-arm,
	Luc Michel

The SYS_timer is not directly wired to the ARM core, but to the
SoC (peripheral) interrupt controller.

Fixes: 0e5bbd74064 ("hw/arm/bcm2835_peripherals: Use the SYS_timer")
Reviewed-by: Luc Michel <luc.michel@greensocs.com>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
 hw/arm/bcm2835_peripherals.c | 13 +++++++++++--
 1 file changed, 11 insertions(+), 2 deletions(-)

diff --git a/hw/arm/bcm2835_peripherals.c b/hw/arm/bcm2835_peripherals.c
index 15c5c72e46..48909a43c3 100644
--- a/hw/arm/bcm2835_peripherals.c
+++ b/hw/arm/bcm2835_peripherals.c
@@ -171,8 +171,17 @@ static void bcm2835_peripherals_realize(DeviceState *dev, Error **errp)
     memory_region_add_subregion(&s->peri_mr, ST_OFFSET,
                 sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->systmr), 0));
     sysbus_connect_irq(SYS_BUS_DEVICE(&s->systmr), 0,
-        qdev_get_gpio_in_named(DEVICE(&s->ic), BCM2835_IC_ARM_IRQ,
-                               INTERRUPT_ARM_TIMER));
+        qdev_get_gpio_in_named(DEVICE(&s->ic), BCM2835_IC_GPU_IRQ,
+                               INTERRUPT_TIMER0));
+    sysbus_connect_irq(SYS_BUS_DEVICE(&s->systmr), 1,
+        qdev_get_gpio_in_named(DEVICE(&s->ic), BCM2835_IC_GPU_IRQ,
+                               INTERRUPT_TIMER1));
+    sysbus_connect_irq(SYS_BUS_DEVICE(&s->systmr), 2,
+        qdev_get_gpio_in_named(DEVICE(&s->ic), BCM2835_IC_GPU_IRQ,
+                               INTERRUPT_TIMER2));
+    sysbus_connect_irq(SYS_BUS_DEVICE(&s->systmr), 3,
+        qdev_get_gpio_in_named(DEVICE(&s->ic), BCM2835_IC_GPU_IRQ,
+                               INTERRUPT_TIMER3));
 
     /* UART0 */
     qdev_prop_set_chr(DEVICE(&s->uart0), "chardev", serial_hd(0));
-- 
2.26.2



^ permalink raw reply related	[flat|nested] 10+ messages in thread

* Re: [PATCH v3 1/4] hw/timer/bcm2835: Introduce BCM2835_SYSTIMER_COUNT definition
  2020-10-02 16:42 ` [PATCH v3 1/4] hw/timer/bcm2835: Introduce BCM2835_SYSTIMER_COUNT definition Philippe Mathieu-Daudé
@ 2020-10-03 16:42   ` Richard Henderson
  0 siblings, 0 replies; 10+ messages in thread
From: Richard Henderson @ 2020-10-03 16:42 UTC (permalink / raw)
  To: Philippe Mathieu-Daudé, qemu-devel
  Cc: Peter Maydell, Luc Michel, Andrew Baumann, Paul Zimmerman,
	Niek Linnenbank, qemu-arm, Luc Michel

On 10/2/20 11:42 AM, Philippe Mathieu-Daudé wrote:
> Use the BCM2835_SYSTIMER_COUNT definition instead of the
> magic '4' value.
> 
> Reviewed-by: Luc Michel <luc.michel@greensocs.com>
> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
> ---
>  include/hw/timer/bcm2835_systmr.h | 4 +++-
>  hw/timer/bcm2835_systmr.c         | 3 ++-
>  2 files changed, 5 insertions(+), 2 deletions(-)

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>


r~


^ permalink raw reply	[flat|nested] 10+ messages in thread

* Re: [PATCH v3 2/4] hw/timer/bcm2835: Rename variable holding CTRL_STATUS register
  2020-10-02 16:42 ` [PATCH v3 2/4] hw/timer/bcm2835: Rename variable holding CTRL_STATUS register Philippe Mathieu-Daudé
@ 2020-10-03 16:42   ` Richard Henderson
  0 siblings, 0 replies; 10+ messages in thread
From: Richard Henderson @ 2020-10-03 16:42 UTC (permalink / raw)
  To: Philippe Mathieu-Daudé, qemu-devel
  Cc: Peter Maydell, Luc Michel, Andrew Baumann, Paul Zimmerman,
	Niek Linnenbank, qemu-arm, Luc Michel

On 10/2/20 11:42 AM, Philippe Mathieu-Daudé wrote:
> The variable holding the CTRL_STATUS register is misnamed
> 'status'. Rename it 'ctrl_status' to make it more obvious
> this register is also used to control the peripheral.
> 
> Reviewed-by: Luc Michel <luc.michel@greensocs.com>
> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
> ---
>  include/hw/timer/bcm2835_systmr.h | 2 +-
>  hw/timer/bcm2835_systmr.c         | 8 ++++----
>  2 files changed, 5 insertions(+), 5 deletions(-)

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>


r~



^ permalink raw reply	[flat|nested] 10+ messages in thread

* Re: [PATCH v3 3/4] hw/timer/bcm2835: Support the timer COMPARE registers
  2020-10-02 16:42 ` [PATCH v3 3/4] hw/timer/bcm2835: Support the timer COMPARE registers Philippe Mathieu-Daudé
@ 2020-10-03 17:17   ` Richard Henderson
  2020-10-10 20:15     ` Philippe Mathieu-Daudé
  0 siblings, 1 reply; 10+ messages in thread
From: Richard Henderson @ 2020-10-03 17:17 UTC (permalink / raw)
  To: Philippe Mathieu-Daudé, qemu-devel
  Cc: Peter Maydell, Luc Michel, Andrew Baumann, Paul Zimmerman,
	Niek Linnenbank, qemu-arm

On 10/2/20 11:42 AM, Philippe Mathieu-Daudé wrote:
> @@ -78,16 +71,29 @@ static void bcm2835_systmr_write(void *opaque, hwaddr offset,
>                                   uint64_t value, unsigned size)
>  {
>      BCM2835SystemTimerState *s = BCM2835_SYSTIMER(opaque);
> +    int index;
> +    uint64_t now;
> +    uint64_t triggers_delay_us;
>  
>      trace_bcm2835_systmr_write(offset, value);
>      switch (offset) {
>      case A_CTRL_STATUS:
>          s->reg.ctrl_status &= ~value; /* Ack */
> -        bcm2835_systmr_update_irq(s);
> +        for (index = 0; index < ARRAY_SIZE(s->tmr); index++) {
> +            if (extract32(value, index, 1)) {
> +                trace_bcm2835_systmr_irq_ack(index);
> +                qemu_set_irq(s->tmr[index].irq, 0);
> +            }

I think it might be instructive to have the parameter be uint64_t value64, and
the immediately do

    uint32_t value = value64;

That matches up better with extract32, the trace arguments...

> +        }
>          break;
>      case A_COMPARE0 ... A_COMPARE3:
> -        s->reg.compare[(offset - A_COMPARE0) >> 2] = value;
> -        bcm2835_systmr_update_compare(s, (offset - A_COMPARE0) >> 2);
> +        index = (offset - A_COMPARE0) >> 2;
> +        s->reg.compare[index] = value;
> +        now = qemu_clock_get_us(QEMU_CLOCK_VIRTUAL);
> +        /* Compare lower 32-bits of the free-running counter. */
> +        triggers_delay_us = value - (now & UINT32_MAX);
> +        trace_bcm2835_systmr_run(index, triggers_delay_us);
> +        timer_mod(&s->tmr[index].timer, now + triggers_delay_us);

... and here.

Also, the arithmetic looks off.

Consider when you want a long timeout, and pass in a value slightly below now.
 So, e.g.

  now   = 0xabcdffffffff;
  value = 0x0000fffffffe;

since triggers_delay_us is uint64_t, that comparison becomes

  triggers_delay_us = 0x0000fffffffe - 0xffffffff;
                    = 0xffffffffffffffff;

Then you add back in now, and do *not* get a value in the future:

    now + triggers_delay_us
  = 0xabcdffffffff + 0xffffffffffffffff
  = 0xabcdfffffffe

What I think you want is

  uint32_t triggers_delay_us = value - now
                             = 0xffffffff;

which then zero-extends when you add back to now to get

    now + triggers_delay_us
  = 0xabcdffffffff + 0xffffffff
  = 0xabcefffffffe

which is indeed in the future.


r~


^ permalink raw reply	[flat|nested] 10+ messages in thread

* Re: [PATCH v3 4/4] hw/arm/bcm2835_peripherals: Correctly wire the SYS_timer IRQs
  2020-10-02 16:42 ` [PATCH v3 4/4] hw/arm/bcm2835_peripherals: Correctly wire the SYS_timer IRQs Philippe Mathieu-Daudé
@ 2020-10-03 17:18   ` Richard Henderson
  0 siblings, 0 replies; 10+ messages in thread
From: Richard Henderson @ 2020-10-03 17:18 UTC (permalink / raw)
  To: Philippe Mathieu-Daudé, qemu-devel
  Cc: Peter Maydell, Luc Michel, Andrew Baumann, Paul Zimmerman,
	Niek Linnenbank, qemu-arm, Luc Michel

On 10/2/20 11:42 AM, Philippe Mathieu-Daudé wrote:
> The SYS_timer is not directly wired to the ARM core, but to the
> SoC (peripheral) interrupt controller.
> 
> Fixes: 0e5bbd74064 ("hw/arm/bcm2835_peripherals: Use the SYS_timer")
> Reviewed-by: Luc Michel <luc.michel@greensocs.com>
> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
> ---
>  hw/arm/bcm2835_peripherals.c | 13 +++++++++++--
>  1 file changed, 11 insertions(+), 2 deletions(-)

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>


r~


^ permalink raw reply	[flat|nested] 10+ messages in thread

* Re: [PATCH v3 3/4] hw/timer/bcm2835: Support the timer COMPARE registers
  2020-10-03 17:17   ` Richard Henderson
@ 2020-10-10 20:15     ` Philippe Mathieu-Daudé
  0 siblings, 0 replies; 10+ messages in thread
From: Philippe Mathieu-Daudé @ 2020-10-10 20:15 UTC (permalink / raw)
  To: Richard Henderson, qemu-devel
  Cc: Peter Maydell, Luc Michel, Andrew Baumann, Paul Zimmerman,
	Niek Linnenbank, qemu-arm

On 10/3/20 7:17 PM, Richard Henderson wrote:
> On 10/2/20 11:42 AM, Philippe Mathieu-Daudé wrote:
>> @@ -78,16 +71,29 @@ static void bcm2835_systmr_write(void *opaque, hwaddr offset,
>>                                    uint64_t value, unsigned size)
>>   {
>>       BCM2835SystemTimerState *s = BCM2835_SYSTIMER(opaque);
>> +    int index;
>> +    uint64_t now;
>> +    uint64_t triggers_delay_us;
>>   
>>       trace_bcm2835_systmr_write(offset, value);
>>       switch (offset) {
>>       case A_CTRL_STATUS:
>>           s->reg.ctrl_status &= ~value; /* Ack */
>> -        bcm2835_systmr_update_irq(s);
>> +        for (index = 0; index < ARRAY_SIZE(s->tmr); index++) {
>> +            if (extract32(value, index, 1)) {
>> +                trace_bcm2835_systmr_irq_ack(index);
>> +                qemu_set_irq(s->tmr[index].irq, 0);
>> +            }
> 
> I think it might be instructive to have the parameter be uint64_t value64, and
> the immediately do
> 
>      uint32_t value = value64;
> 
> That matches up better with extract32, the trace arguments...
> 
>> +        }
>>           break;
>>       case A_COMPARE0 ... A_COMPARE3:
>> -        s->reg.compare[(offset - A_COMPARE0) >> 2] = value;
>> -        bcm2835_systmr_update_compare(s, (offset - A_COMPARE0) >> 2);
>> +        index = (offset - A_COMPARE0) >> 2;
>> +        s->reg.compare[index] = value;
>> +        now = qemu_clock_get_us(QEMU_CLOCK_VIRTUAL);
>> +        /* Compare lower 32-bits of the free-running counter. */
>> +        triggers_delay_us = value - (now & UINT32_MAX);
>> +        trace_bcm2835_systmr_run(index, triggers_delay_us);
>> +        timer_mod(&s->tmr[index].timer, now + triggers_delay_us);
> 
> ... and here.
> 
> Also, the arithmetic looks off.
> 
> Consider when you want a long timeout, and pass in a value slightly below now.
>   So, e.g.
> 
>    now   = 0xabcdffffffff;
>    value = 0x0000fffffffe;
> 
> since triggers_delay_us is uint64_t, that comparison becomes
> 
>    triggers_delay_us = 0x0000fffffffe - 0xffffffff;
>                      = 0xffffffffffffffff;
> 
> Then you add back in now, and do *not* get a value in the future:
> 
>      now + triggers_delay_us
>    = 0xabcdffffffff + 0xffffffffffffffff
>    = 0xabcdfffffffe

Thanks for the example of wrong behavior...

> 
> What I think you want is
> 
>    uint32_t triggers_delay_us = value - now
>                               = 0xffffffff;
> 
> which then zero-extends when you add back to now to get
> 
>      now + triggers_delay_us
>    = 0xabcdffffffff + 0xffffffff
>    = 0xabcefffffffe
> 
> which is indeed in the future.

... and the correct one :)

I'll correct as suggested.

Thanks!

Phil.


^ permalink raw reply	[flat|nested] 10+ messages in thread

end of thread, other threads:[~2020-10-10 20:16 UTC | newest]

Thread overview: 10+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2020-10-02 16:42 [PATCH v3 0/4] hw/arm/raspi: Fix SYS_timer to unbrick Linux kernels v3.7+ Philippe Mathieu-Daudé
2020-10-02 16:42 ` [PATCH v3 1/4] hw/timer/bcm2835: Introduce BCM2835_SYSTIMER_COUNT definition Philippe Mathieu-Daudé
2020-10-03 16:42   ` Richard Henderson
2020-10-02 16:42 ` [PATCH v3 2/4] hw/timer/bcm2835: Rename variable holding CTRL_STATUS register Philippe Mathieu-Daudé
2020-10-03 16:42   ` Richard Henderson
2020-10-02 16:42 ` [PATCH v3 3/4] hw/timer/bcm2835: Support the timer COMPARE registers Philippe Mathieu-Daudé
2020-10-03 17:17   ` Richard Henderson
2020-10-10 20:15     ` Philippe Mathieu-Daudé
2020-10-02 16:42 ` [PATCH v3 4/4] hw/arm/bcm2835_peripherals: Correctly wire the SYS_timer IRQs Philippe Mathieu-Daudé
2020-10-03 17:18   ` Richard Henderson

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