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From: Andrew Cooper <andrew.cooper3@citrix.com>
To: Jan Beulich <JBeulich@suse.com>
Cc: George Dunlap <george.dunlap@eu.citrix.com>,
	Tim Deegan <tim@xen.org>, Xen-devel <xen-devel@lists.xen.org>
Subject: Re: [PATCH 3/7] x86/mm: Further restrict permissions on some virtual mappings
Date: Wed, 3 May 2017 14:38:14 +0100	[thread overview]
Message-ID: <6a3fddf8-03b8-0bf3-d866-1819644fe328@citrix.com> (raw)
In-Reply-To: <5909B5A50200007800156294@prv-mh.provo.novell.com>

On 03/05/17 09:49, Jan Beulich wrote:
>>>> On 02.05.17 at 20:05, <andrew.cooper3@citrix.com> wrote:
>> As originally reported, the Linear Pagetable slot maps 512GB of ram as RWX,
>> where the guest has full read access and a lot of direct or indirect control
>> over the written content.  It isn't hard for a PV guest to hide shellcode
>> here.
>>
>> Therefore, increase defence in depth by auditing our current pagetable
>> mappings.
>>
>>  * The regular linear, shadow linear, and per-domain slots have no business
>>    being executable (but need to be written), so are updated to be NX.
>>  * The Read Only mappings of the M2P (compat and regular) don't need to be
>>    writeable or executable.
>>  * The PV GDT mappings don't need to be executable.
>>
>> Reported-by: Jann Horn <jannh@google.com>
>> Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
> Reviewed-by: Jan Beulich <jbeulich@suse.com>
> with two remarks:
>
>> --- a/xen/arch/x86/mm.c
>> +++ b/xen/arch/x86/mm.c
>> @@ -384,7 +384,7 @@ void __init arch_init_memory(void)
>>                      for ( ; i < L3_PAGETABLE_ENTRIES; ++i )
>>                          l3tab[i] = l3e_empty();
>>                      split_l4e = l4e_from_pfn(virt_to_mfn(l3tab),
>> -                                             __PAGE_HYPERVISOR);
>> +                                             __PAGE_HYPERVISOR_RW);
> Would be nice if this change (affecting the direct map) was also
> mentioned in the commit message, even if it's only debugging
> code.
>
>> @@ -515,7 +515,7 @@ void __init paging_init(void)
>>              l3_ro_mpt = page_to_virt(l3_pg);
>>              clear_page(l3_ro_mpt);
>>              l4e_write(&idle_pg_table[l4_table_offset(va)],
>> -                      l4e_from_page(l3_pg, __PAGE_HYPERVISOR));
>> +                      l4e_from_page(l3_pg, __PAGE_HYPERVISOR_RW));
> Similarly here (again affecting the direct map).

Updated.  The text now reads

 * The PV GDT mappings and bits of the directmap don't need to be
executable.

My method of working out which areas to change were to consider all uses
of __PAGE_HYPERVISOR.  I have half a mind to submit a change renaming it
to __PAGE_PGTABLE, as it should only really be used to build
intermediate pagetable entries where we control X/NX, R/W or S/U at a
more fine grained level.

~Andrew

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  reply	other threads:[~2017-05-03 13:38 UTC|newest]

Thread overview: 48+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-05-02 18:05 [PATCH 0/7] XSAs 213-315 followups Andrew Cooper
2017-05-02 18:05 ` [PATCH 1/7] x86/traps: Drop 32bit fields out of tss_struct Andrew Cooper
2017-05-03  8:10   ` Jan Beulich
2017-05-03 12:33     ` Andrew Cooper
2017-05-03  9:48   ` Wei Liu
2017-05-02 18:05 ` [PATCH 2/7] x86/traps: Poison unused stack pointers in the TSS Andrew Cooper
2017-05-03  8:14   ` Jan Beulich
2017-05-03 12:47     ` Andrew Cooper
2017-05-03 13:29   ` [PATCH v2 " Andrew Cooper
2017-05-03 13:45     ` Jan Beulich
2017-05-02 18:05 ` [PATCH 3/7] x86/mm: Further restrict permissions on some virtual mappings Andrew Cooper
2017-05-03  8:49   ` Jan Beulich
2017-05-03 13:38     ` Andrew Cooper [this message]
2017-05-03 13:48       ` Jan Beulich
2017-05-03  9:48   ` Wei Liu
2017-05-03 10:11   ` Tim Deegan
2017-05-03 11:13   ` George Dunlap
2017-05-02 18:05 ` [PATCH 4/7] x86/traps: Rename compat_hypercall() to entry_int82() Andrew Cooper
2017-05-03  8:55   ` Jan Beulich
2017-05-03 13:41     ` Andrew Cooper
2017-05-02 18:05 ` [PATCH 5/7] x86/traps: Lift all non-entrypoint logic in entry_int82() up into C Andrew Cooper
2017-05-03  9:02   ` Jan Beulich
2017-05-03 11:26     ` Wei Liu
2017-05-03 11:38       ` Andrew Cooper
2017-05-03 11:43         ` Wei Liu
2017-05-03 12:02         ` Jan Beulich
2017-05-03 12:18           ` Andrew Cooper
2017-05-03 12:37             ` Jan Beulich
2017-05-03 18:29               ` Andrew Cooper
2017-05-04  7:27                 ` Jan Beulich
2017-05-04  9:27                   ` Andrew Cooper
2017-05-04  9:36                     ` Jan Beulich
2017-05-04  9:57                       ` Andrew Cooper
2017-05-03 12:00       ` Jan Beulich
2017-05-04 10:01     ` [PATCH v2 " Andrew Cooper
2017-05-04 10:16       ` Andrew Cooper
2017-05-04 10:28         ` Jan Beulich
2017-05-04 11:09           ` Andrew Cooper
2017-05-04 10:22       ` Jan Beulich
2017-05-02 18:05 ` [PATCH 6/7] x86/asm: Fold LOAD_C_CLOBBERED into RESTORE_ALL Andrew Cooper
2017-05-03  9:08   ` Jan Beulich
2017-05-03  9:48   ` Wei Liu
2017-05-02 18:05 ` [PATCH 7/7] x86/asm: Clobber %r{8..15} on exit to 32bit PV guests Andrew Cooper
2017-05-03  9:13   ` Jan Beulich
2017-05-03 17:51     ` [PATCH v2 " Andrew Cooper
2017-05-04  8:50       ` Jan Beulich
2017-05-04 11:11 ` [RFC for 4.9] [PATCH 0/7] XSAs 213-315 followups Andrew Cooper
2017-05-04 12:52   ` Julien Grall

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