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* [PATCH v6 0/4] Add Amlogic A311D2 and Khadas Vim4 Board Support
@ 2023-06-27  9:10 ` Lucas Tanure
  0 siblings, 0 replies; 36+ messages in thread
From: Lucas Tanure @ 2023-06-27  9:10 UTC (permalink / raw)
  To: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Neil Armstrong,
	Jerome Brunet, Kevin Hilman, Xianwei Zhao
  Cc: Nick, Artem, devicetree, linux-kernel, linux-amlogic,
	linux-arm-kernel, Lucas Tanure

The Khadas VIM4 uses the Amlogic A311D2 SoC, based on the Amlogic T7 family.
This chip is not the same as A311D used in Vim3 board.

Work based on Khadas 5.4 branch:
https://github.com/khadas/linux/tree/khadas-vims-5.4.y

The current status is Vim4 board booting to emergency shell via uart.

Board Features:
- 8GB LPDDR4X 2016MHz
- 32GB eMMC 5.1 storage
- 32MB SPI flash
- 10/100/1000 Base-T Ethernet
- AP6275S Wireless (802.11 a/b/g/n/ac/ax, BT5.1)
- HDMI 2.1 video
- HDMI Input
- 1x USB 2.0 + 1x USB 3.0 ports
- 1x USB-C (power) with USB 2.0 OTG
- 3x LED's (1x red, 1x blue, 1x white)
- 3x buttons (power, function, reset)
- M2 socket with PCIe, USB, ADC & I2C
- 40pin GPIO Header
- 1x micro SD card slot

Changes Since v5:
 - Remove meson as T7 its not a meson chip
 - Change Uart Document descript to S4 compatibles

Changes Since v4:
 - Use S4 instead of G12a for uart fallback
 - Add OF_EARLYCON_DECLARE for T7 uart

Changes Since v3:
 - Fix issues with "amlogic,meson-t7-uart" documentation

Changes Since v2:
 - Add "amlogic,meson-t7-uart" documentation

Changes Since v1:
 - Drop the T7 clock driver as it is not needed for serial boot. It will
 later use the S4 clock
 driver as S4 and  T7 seems to be similar chips.
 - Use "arm,gic-400" for interrupt controller to fix dtb_check
 - Remove CPU node properties not needed for serial boot
 - Move UART node to apb4 node
 - Drop T7 UART compatible line and use S4 uart
 - Use psci V1 instead of 0.2, it works, but I can't verify is correct
 as the datasheet I have
 doesn't contain that information.
 - Remove compatible from meson-t7.dtsi, move it to vim4 board dts
 - Add memory node with 8GB. Not sure about this one, works without,
 but doesn't detect 8GB
 - Use defines for GIC_CPU_MASK_SIMPLE, IRQ_TYPE_LEVEL_LOW,
 IRQ_TYPE_LEVEL_HIGH instead of hardcoded values


Lucas Tanure (4):
  dt-bindings: arm: amlogic: add Amlogic A311D2 bindings
  dt-bindings: serial: amlogic,meson-uart: Add compatible string for T7
  tty: serial: meson: Add a earlycon for the T7 SoC
  arm64: dts: amlogic-t7-a311d2-khadas-vim4: add initial device-tree

 .../devicetree/bindings/arm/amlogic.yaml      |   7 +
 .../bindings/serial/amlogic,meson-uart.yaml   |   4 +
 arch/arm64/boot/dts/amlogic/Makefile          |   1 +
 .../amlogic/amlogic-t7-a311d2-khadas-vim4.dts |  52 ++++++
 arch/arm64/boot/dts/amlogic/amlogic-t7.dtsi   | 158 ++++++++++++++++++
 drivers/tty/serial/meson_uart.c               |   2 +
 6 files changed, 224 insertions(+)
 create mode 100644 arch/arm64/boot/dts/amlogic/amlogic-t7-a311d2-khadas-vim4.dts
 create mode 100644 arch/arm64/boot/dts/amlogic/amlogic-t7.dtsi

--
2.41.0


^ permalink raw reply	[flat|nested] 36+ messages in thread

* [PATCH v6 0/4] Add Amlogic A311D2 and Khadas Vim4 Board Support
@ 2023-06-27  9:10 ` Lucas Tanure
  0 siblings, 0 replies; 36+ messages in thread
From: Lucas Tanure @ 2023-06-27  9:10 UTC (permalink / raw)
  To: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Neil Armstrong,
	Jerome Brunet, Kevin Hilman, Xianwei Zhao
  Cc: Nick, Artem, devicetree, linux-kernel, linux-amlogic,
	linux-arm-kernel, Lucas Tanure

The Khadas VIM4 uses the Amlogic A311D2 SoC, based on the Amlogic T7 family.
This chip is not the same as A311D used in Vim3 board.

Work based on Khadas 5.4 branch:
https://github.com/khadas/linux/tree/khadas-vims-5.4.y

The current status is Vim4 board booting to emergency shell via uart.

Board Features:
- 8GB LPDDR4X 2016MHz
- 32GB eMMC 5.1 storage
- 32MB SPI flash
- 10/100/1000 Base-T Ethernet
- AP6275S Wireless (802.11 a/b/g/n/ac/ax, BT5.1)
- HDMI 2.1 video
- HDMI Input
- 1x USB 2.0 + 1x USB 3.0 ports
- 1x USB-C (power) with USB 2.0 OTG
- 3x LED's (1x red, 1x blue, 1x white)
- 3x buttons (power, function, reset)
- M2 socket with PCIe, USB, ADC & I2C
- 40pin GPIO Header
- 1x micro SD card slot

Changes Since v5:
 - Remove meson as T7 its not a meson chip
 - Change Uart Document descript to S4 compatibles

Changes Since v4:
 - Use S4 instead of G12a for uart fallback
 - Add OF_EARLYCON_DECLARE for T7 uart

Changes Since v3:
 - Fix issues with "amlogic,meson-t7-uart" documentation

Changes Since v2:
 - Add "amlogic,meson-t7-uart" documentation

Changes Since v1:
 - Drop the T7 clock driver as it is not needed for serial boot. It will
 later use the S4 clock
 driver as S4 and  T7 seems to be similar chips.
 - Use "arm,gic-400" for interrupt controller to fix dtb_check
 - Remove CPU node properties not needed for serial boot
 - Move UART node to apb4 node
 - Drop T7 UART compatible line and use S4 uart
 - Use psci V1 instead of 0.2, it works, but I can't verify is correct
 as the datasheet I have
 doesn't contain that information.
 - Remove compatible from meson-t7.dtsi, move it to vim4 board dts
 - Add memory node with 8GB. Not sure about this one, works without,
 but doesn't detect 8GB
 - Use defines for GIC_CPU_MASK_SIMPLE, IRQ_TYPE_LEVEL_LOW,
 IRQ_TYPE_LEVEL_HIGH instead of hardcoded values


Lucas Tanure (4):
  dt-bindings: arm: amlogic: add Amlogic A311D2 bindings
  dt-bindings: serial: amlogic,meson-uart: Add compatible string for T7
  tty: serial: meson: Add a earlycon for the T7 SoC
  arm64: dts: amlogic-t7-a311d2-khadas-vim4: add initial device-tree

 .../devicetree/bindings/arm/amlogic.yaml      |   7 +
 .../bindings/serial/amlogic,meson-uart.yaml   |   4 +
 arch/arm64/boot/dts/amlogic/Makefile          |   1 +
 .../amlogic/amlogic-t7-a311d2-khadas-vim4.dts |  52 ++++++
 arch/arm64/boot/dts/amlogic/amlogic-t7.dtsi   | 158 ++++++++++++++++++
 drivers/tty/serial/meson_uart.c               |   2 +
 6 files changed, 224 insertions(+)
 create mode 100644 arch/arm64/boot/dts/amlogic/amlogic-t7-a311d2-khadas-vim4.dts
 create mode 100644 arch/arm64/boot/dts/amlogic/amlogic-t7.dtsi

--
2.41.0


_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

^ permalink raw reply	[flat|nested] 36+ messages in thread

* [PATCH v6 0/4] Add Amlogic A311D2 and Khadas Vim4 Board Support
@ 2023-06-27  9:10 ` Lucas Tanure
  0 siblings, 0 replies; 36+ messages in thread
From: Lucas Tanure @ 2023-06-27  9:10 UTC (permalink / raw)
  To: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Neil Armstrong,
	Jerome Brunet, Kevin Hilman, Xianwei Zhao
  Cc: Nick, Artem, devicetree, linux-kernel, linux-amlogic,
	linux-arm-kernel, Lucas Tanure

The Khadas VIM4 uses the Amlogic A311D2 SoC, based on the Amlogic T7 family.
This chip is not the same as A311D used in Vim3 board.

Work based on Khadas 5.4 branch:
https://github.com/khadas/linux/tree/khadas-vims-5.4.y

The current status is Vim4 board booting to emergency shell via uart.

Board Features:
- 8GB LPDDR4X 2016MHz
- 32GB eMMC 5.1 storage
- 32MB SPI flash
- 10/100/1000 Base-T Ethernet
- AP6275S Wireless (802.11 a/b/g/n/ac/ax, BT5.1)
- HDMI 2.1 video
- HDMI Input
- 1x USB 2.0 + 1x USB 3.0 ports
- 1x USB-C (power) with USB 2.0 OTG
- 3x LED's (1x red, 1x blue, 1x white)
- 3x buttons (power, function, reset)
- M2 socket with PCIe, USB, ADC & I2C
- 40pin GPIO Header
- 1x micro SD card slot

Changes Since v5:
 - Remove meson as T7 its not a meson chip
 - Change Uart Document descript to S4 compatibles

Changes Since v4:
 - Use S4 instead of G12a for uart fallback
 - Add OF_EARLYCON_DECLARE for T7 uart

Changes Since v3:
 - Fix issues with "amlogic,meson-t7-uart" documentation

Changes Since v2:
 - Add "amlogic,meson-t7-uart" documentation

Changes Since v1:
 - Drop the T7 clock driver as it is not needed for serial boot. It will
 later use the S4 clock
 driver as S4 and  T7 seems to be similar chips.
 - Use "arm,gic-400" for interrupt controller to fix dtb_check
 - Remove CPU node properties not needed for serial boot
 - Move UART node to apb4 node
 - Drop T7 UART compatible line and use S4 uart
 - Use psci V1 instead of 0.2, it works, but I can't verify is correct
 as the datasheet I have
 doesn't contain that information.
 - Remove compatible from meson-t7.dtsi, move it to vim4 board dts
 - Add memory node with 8GB. Not sure about this one, works without,
 but doesn't detect 8GB
 - Use defines for GIC_CPU_MASK_SIMPLE, IRQ_TYPE_LEVEL_LOW,
 IRQ_TYPE_LEVEL_HIGH instead of hardcoded values


Lucas Tanure (4):
  dt-bindings: arm: amlogic: add Amlogic A311D2 bindings
  dt-bindings: serial: amlogic,meson-uart: Add compatible string for T7
  tty: serial: meson: Add a earlycon for the T7 SoC
  arm64: dts: amlogic-t7-a311d2-khadas-vim4: add initial device-tree

 .../devicetree/bindings/arm/amlogic.yaml      |   7 +
 .../bindings/serial/amlogic,meson-uart.yaml   |   4 +
 arch/arm64/boot/dts/amlogic/Makefile          |   1 +
 .../amlogic/amlogic-t7-a311d2-khadas-vim4.dts |  52 ++++++
 arch/arm64/boot/dts/amlogic/amlogic-t7.dtsi   | 158 ++++++++++++++++++
 drivers/tty/serial/meson_uart.c               |   2 +
 6 files changed, 224 insertions(+)
 create mode 100644 arch/arm64/boot/dts/amlogic/amlogic-t7-a311d2-khadas-vim4.dts
 create mode 100644 arch/arm64/boot/dts/amlogic/amlogic-t7.dtsi

--
2.41.0


_______________________________________________
linux-amlogic mailing list
linux-amlogic@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-amlogic

^ permalink raw reply	[flat|nested] 36+ messages in thread

* [PATCH v6 1/4] dt-bindings: arm: amlogic: add Amlogic A311D2 bindings
  2023-06-27  9:10 ` Lucas Tanure
  (?)
@ 2023-06-27  9:10   ` Lucas Tanure
  -1 siblings, 0 replies; 36+ messages in thread
From: Lucas Tanure @ 2023-06-27  9:10 UTC (permalink / raw)
  To: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Neil Armstrong,
	Jerome Brunet, Kevin Hilman, Xianwei Zhao
  Cc: Nick, Artem, devicetree, linux-kernel, linux-amlogic,
	linux-arm-kernel, Lucas Tanure, Conor Dooley

Add bindings for the Khadas Vim4 board, using A311D2 Soc from Amlogic T7
family chip.

Signed-off-by: Lucas Tanure <tanure@linux.com>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
---
 Documentation/devicetree/bindings/arm/amlogic.yaml | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/Documentation/devicetree/bindings/arm/amlogic.yaml b/Documentation/devicetree/bindings/arm/amlogic.yaml
index 274ee0890312..f5c51dfe4281 100644
--- a/Documentation/devicetree/bindings/arm/amlogic.yaml
+++ b/Documentation/devicetree/bindings/arm/amlogic.yaml
@@ -211,6 +211,13 @@ properties:
               - amlogic,aq222
           - const: amlogic,s4
 
+      - description: Boards with the Amlogic T7 A311D2 SoC
+        items:
+          - enum:
+              - khadas,vim4
+          - const: amlogic,a311d2
+          - const: amlogic,t7
+
 additionalProperties: true
 
 ...
-- 
2.41.0


^ permalink raw reply related	[flat|nested] 36+ messages in thread

* [PATCH v6 1/4] dt-bindings: arm: amlogic: add Amlogic A311D2 bindings
@ 2023-06-27  9:10   ` Lucas Tanure
  0 siblings, 0 replies; 36+ messages in thread
From: Lucas Tanure @ 2023-06-27  9:10 UTC (permalink / raw)
  To: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Neil Armstrong,
	Jerome Brunet, Kevin Hilman, Xianwei Zhao
  Cc: Nick, Artem, devicetree, linux-kernel, linux-amlogic,
	linux-arm-kernel, Lucas Tanure, Conor Dooley

Add bindings for the Khadas Vim4 board, using A311D2 Soc from Amlogic T7
family chip.

Signed-off-by: Lucas Tanure <tanure@linux.com>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
---
 Documentation/devicetree/bindings/arm/amlogic.yaml | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/Documentation/devicetree/bindings/arm/amlogic.yaml b/Documentation/devicetree/bindings/arm/amlogic.yaml
index 274ee0890312..f5c51dfe4281 100644
--- a/Documentation/devicetree/bindings/arm/amlogic.yaml
+++ b/Documentation/devicetree/bindings/arm/amlogic.yaml
@@ -211,6 +211,13 @@ properties:
               - amlogic,aq222
           - const: amlogic,s4
 
+      - description: Boards with the Amlogic T7 A311D2 SoC
+        items:
+          - enum:
+              - khadas,vim4
+          - const: amlogic,a311d2
+          - const: amlogic,t7
+
 additionalProperties: true
 
 ...
-- 
2.41.0


_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

^ permalink raw reply related	[flat|nested] 36+ messages in thread

* [PATCH v6 1/4] dt-bindings: arm: amlogic: add Amlogic A311D2 bindings
@ 2023-06-27  9:10   ` Lucas Tanure
  0 siblings, 0 replies; 36+ messages in thread
From: Lucas Tanure @ 2023-06-27  9:10 UTC (permalink / raw)
  To: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Neil Armstrong,
	Jerome Brunet, Kevin Hilman, Xianwei Zhao
  Cc: Nick, Artem, devicetree, linux-kernel, linux-amlogic,
	linux-arm-kernel, Lucas Tanure, Conor Dooley

Add bindings for the Khadas Vim4 board, using A311D2 Soc from Amlogic T7
family chip.

Signed-off-by: Lucas Tanure <tanure@linux.com>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
---
 Documentation/devicetree/bindings/arm/amlogic.yaml | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/Documentation/devicetree/bindings/arm/amlogic.yaml b/Documentation/devicetree/bindings/arm/amlogic.yaml
index 274ee0890312..f5c51dfe4281 100644
--- a/Documentation/devicetree/bindings/arm/amlogic.yaml
+++ b/Documentation/devicetree/bindings/arm/amlogic.yaml
@@ -211,6 +211,13 @@ properties:
               - amlogic,aq222
           - const: amlogic,s4
 
+      - description: Boards with the Amlogic T7 A311D2 SoC
+        items:
+          - enum:
+              - khadas,vim4
+          - const: amlogic,a311d2
+          - const: amlogic,t7
+
 additionalProperties: true
 
 ...
-- 
2.41.0


_______________________________________________
linux-amlogic mailing list
linux-amlogic@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-amlogic

^ permalink raw reply related	[flat|nested] 36+ messages in thread

* [PATCH v6 2/4] dt-bindings: serial: amlogic,meson-uart: Add compatible string for T7
  2023-06-27  9:10 ` Lucas Tanure
  (?)
@ 2023-06-27  9:10   ` Lucas Tanure
  -1 siblings, 0 replies; 36+ messages in thread
From: Lucas Tanure @ 2023-06-27  9:10 UTC (permalink / raw)
  To: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Neil Armstrong,
	Jerome Brunet, Kevin Hilman, Xianwei Zhao
  Cc: Nick, Artem, devicetree, linux-kernel, linux-amlogic,
	linux-arm-kernel, Lucas Tanure

Amlogic T7 SoCs uses the same UART controller as S4 SoCs and G12A.
There is no need for an extra compatible line in the driver, but
add T7 compatible line for documentation.

Signed-off-by: Lucas Tanure <tanure@linux.com>
---
 .../devicetree/bindings/serial/amlogic,meson-uart.yaml        | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/Documentation/devicetree/bindings/serial/amlogic,meson-uart.yaml b/Documentation/devicetree/bindings/serial/amlogic,meson-uart.yaml
index 01ec45b3b406..591d1f8de191 100644
--- a/Documentation/devicetree/bindings/serial/amlogic,meson-uart.yaml
+++ b/Documentation/devicetree/bindings/serial/amlogic,meson-uart.yaml
@@ -50,6 +50,10 @@ properties:
         items:
           - const: amlogic,meson-g12a-uart
           - const: amlogic,meson-gx-uart
+      - description: UART controller on S4 compatible SoCs
+        items:
+          - const: amlogic,t7-uart
+          - const: amlogic,meson-s4-uart
 
   reg:
     maxItems: 1
-- 
2.41.0


^ permalink raw reply related	[flat|nested] 36+ messages in thread

* [PATCH v6 2/4] dt-bindings: serial: amlogic,meson-uart: Add compatible string for T7
@ 2023-06-27  9:10   ` Lucas Tanure
  0 siblings, 0 replies; 36+ messages in thread
From: Lucas Tanure @ 2023-06-27  9:10 UTC (permalink / raw)
  To: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Neil Armstrong,
	Jerome Brunet, Kevin Hilman, Xianwei Zhao
  Cc: Nick, Artem, devicetree, linux-kernel, linux-amlogic,
	linux-arm-kernel, Lucas Tanure

Amlogic T7 SoCs uses the same UART controller as S4 SoCs and G12A.
There is no need for an extra compatible line in the driver, but
add T7 compatible line for documentation.

Signed-off-by: Lucas Tanure <tanure@linux.com>
---
 .../devicetree/bindings/serial/amlogic,meson-uart.yaml        | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/Documentation/devicetree/bindings/serial/amlogic,meson-uart.yaml b/Documentation/devicetree/bindings/serial/amlogic,meson-uart.yaml
index 01ec45b3b406..591d1f8de191 100644
--- a/Documentation/devicetree/bindings/serial/amlogic,meson-uart.yaml
+++ b/Documentation/devicetree/bindings/serial/amlogic,meson-uart.yaml
@@ -50,6 +50,10 @@ properties:
         items:
           - const: amlogic,meson-g12a-uart
           - const: amlogic,meson-gx-uart
+      - description: UART controller on S4 compatible SoCs
+        items:
+          - const: amlogic,t7-uart
+          - const: amlogic,meson-s4-uart
 
   reg:
     maxItems: 1
-- 
2.41.0


_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

^ permalink raw reply related	[flat|nested] 36+ messages in thread

* [PATCH v6 2/4] dt-bindings: serial: amlogic,meson-uart: Add compatible string for T7
@ 2023-06-27  9:10   ` Lucas Tanure
  0 siblings, 0 replies; 36+ messages in thread
From: Lucas Tanure @ 2023-06-27  9:10 UTC (permalink / raw)
  To: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Neil Armstrong,
	Jerome Brunet, Kevin Hilman, Xianwei Zhao
  Cc: Nick, Artem, devicetree, linux-kernel, linux-amlogic,
	linux-arm-kernel, Lucas Tanure

Amlogic T7 SoCs uses the same UART controller as S4 SoCs and G12A.
There is no need for an extra compatible line in the driver, but
add T7 compatible line for documentation.

Signed-off-by: Lucas Tanure <tanure@linux.com>
---
 .../devicetree/bindings/serial/amlogic,meson-uart.yaml        | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/Documentation/devicetree/bindings/serial/amlogic,meson-uart.yaml b/Documentation/devicetree/bindings/serial/amlogic,meson-uart.yaml
index 01ec45b3b406..591d1f8de191 100644
--- a/Documentation/devicetree/bindings/serial/amlogic,meson-uart.yaml
+++ b/Documentation/devicetree/bindings/serial/amlogic,meson-uart.yaml
@@ -50,6 +50,10 @@ properties:
         items:
           - const: amlogic,meson-g12a-uart
           - const: amlogic,meson-gx-uart
+      - description: UART controller on S4 compatible SoCs
+        items:
+          - const: amlogic,t7-uart
+          - const: amlogic,meson-s4-uart
 
   reg:
     maxItems: 1
-- 
2.41.0


_______________________________________________
linux-amlogic mailing list
linux-amlogic@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-amlogic

^ permalink raw reply related	[flat|nested] 36+ messages in thread

* [PATCH v6 3/4] tty: serial: meson: Add a earlycon for the T7 SoC
  2023-06-27  9:10 ` Lucas Tanure
  (?)
@ 2023-06-27  9:10   ` Lucas Tanure
  -1 siblings, 0 replies; 36+ messages in thread
From: Lucas Tanure @ 2023-06-27  9:10 UTC (permalink / raw)
  To: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Neil Armstrong,
	Jerome Brunet, Kevin Hilman, Xianwei Zhao
  Cc: Nick, Artem, devicetree, linux-kernel, linux-amlogic,
	linux-arm-kernel, Lucas Tanure

The new Amlogic T7 SoC does not have a always-on uart,
so add OF_EARLYCON_DECLARE for it.

Signed-off-by: Lucas Tanure <tanure@linux.com>
---
 drivers/tty/serial/meson_uart.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/drivers/tty/serial/meson_uart.c b/drivers/tty/serial/meson_uart.c
index 2501db5a7aaf..c24e105a98c5 100644
--- a/drivers/tty/serial/meson_uart.c
+++ b/drivers/tty/serial/meson_uart.c
@@ -649,6 +649,8 @@ meson_serial_early_console_setup(struct earlycon_device *device, const char *opt
 
 OF_EARLYCON_DECLARE(meson, "amlogic,meson-ao-uart",
 		    meson_serial_early_console_setup);
+OF_EARLYCON_DECLARE(meson, "amlogic,t7-uart",
+		    meson_serial_early_console_setup);
 
 #define MESON_SERIAL_CONSOLE	(&meson_serial_console)
 #else
-- 
2.41.0


^ permalink raw reply related	[flat|nested] 36+ messages in thread

* [PATCH v6 3/4] tty: serial: meson: Add a earlycon for the T7 SoC
@ 2023-06-27  9:10   ` Lucas Tanure
  0 siblings, 0 replies; 36+ messages in thread
From: Lucas Tanure @ 2023-06-27  9:10 UTC (permalink / raw)
  To: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Neil Armstrong,
	Jerome Brunet, Kevin Hilman, Xianwei Zhao
  Cc: Nick, Artem, devicetree, linux-kernel, linux-amlogic,
	linux-arm-kernel, Lucas Tanure

The new Amlogic T7 SoC does not have a always-on uart,
so add OF_EARLYCON_DECLARE for it.

Signed-off-by: Lucas Tanure <tanure@linux.com>
---
 drivers/tty/serial/meson_uart.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/drivers/tty/serial/meson_uart.c b/drivers/tty/serial/meson_uart.c
index 2501db5a7aaf..c24e105a98c5 100644
--- a/drivers/tty/serial/meson_uart.c
+++ b/drivers/tty/serial/meson_uart.c
@@ -649,6 +649,8 @@ meson_serial_early_console_setup(struct earlycon_device *device, const char *opt
 
 OF_EARLYCON_DECLARE(meson, "amlogic,meson-ao-uart",
 		    meson_serial_early_console_setup);
+OF_EARLYCON_DECLARE(meson, "amlogic,t7-uart",
+		    meson_serial_early_console_setup);
 
 #define MESON_SERIAL_CONSOLE	(&meson_serial_console)
 #else
-- 
2.41.0


_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

^ permalink raw reply related	[flat|nested] 36+ messages in thread

* [PATCH v6 3/4] tty: serial: meson: Add a earlycon for the T7 SoC
@ 2023-06-27  9:10   ` Lucas Tanure
  0 siblings, 0 replies; 36+ messages in thread
From: Lucas Tanure @ 2023-06-27  9:10 UTC (permalink / raw)
  To: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Neil Armstrong,
	Jerome Brunet, Kevin Hilman, Xianwei Zhao
  Cc: Nick, Artem, devicetree, linux-kernel, linux-amlogic,
	linux-arm-kernel, Lucas Tanure

The new Amlogic T7 SoC does not have a always-on uart,
so add OF_EARLYCON_DECLARE for it.

Signed-off-by: Lucas Tanure <tanure@linux.com>
---
 drivers/tty/serial/meson_uart.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/drivers/tty/serial/meson_uart.c b/drivers/tty/serial/meson_uart.c
index 2501db5a7aaf..c24e105a98c5 100644
--- a/drivers/tty/serial/meson_uart.c
+++ b/drivers/tty/serial/meson_uart.c
@@ -649,6 +649,8 @@ meson_serial_early_console_setup(struct earlycon_device *device, const char *opt
 
 OF_EARLYCON_DECLARE(meson, "amlogic,meson-ao-uart",
 		    meson_serial_early_console_setup);
+OF_EARLYCON_DECLARE(meson, "amlogic,t7-uart",
+		    meson_serial_early_console_setup);
 
 #define MESON_SERIAL_CONSOLE	(&meson_serial_console)
 #else
-- 
2.41.0


_______________________________________________
linux-amlogic mailing list
linux-amlogic@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-amlogic

^ permalink raw reply related	[flat|nested] 36+ messages in thread

* [PATCH v6 4/4] arm64: dts: amlogic-t7-a311d2-khadas-vim4: add initial device-tree
  2023-06-27  9:10 ` Lucas Tanure
  (?)
@ 2023-06-27  9:10   ` Lucas Tanure
  -1 siblings, 0 replies; 36+ messages in thread
From: Lucas Tanure @ 2023-06-27  9:10 UTC (permalink / raw)
  To: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Neil Armstrong,
	Jerome Brunet, Kevin Hilman, Xianwei Zhao
  Cc: Nick, Artem, devicetree, linux-kernel, linux-amlogic,
	linux-arm-kernel, Lucas Tanure

The Khadas VIM4 uses the Amlogic A311D2 SoC, based on the Amlogic T7 SoC
family, on a board with the same form factor as the VIM3 models.

- 8GB LPDDR4X 2016MHz
- 32GB eMMC 5.1 storage
- 32MB SPI flash
- 10/100/1000 Base-T Ethernet
- AP6275S Wireless (802.11 a/b/g/n/ac/ax, BT5.1)
- HDMI 2.1 video
- HDMI Input
- 1x USB 2.0 + 1x USB 3.0 ports
- 1x USB-C (power) with USB 2.0 OTG
- 3x LED's (1x red, 1x blue, 1x white)
- 3x buttons (power, function, reset)
- M2 socket with PCIe, USB, ADC & I2C
- 40pin GPIO Header
- 1x micro SD card slot

Signed-off-by: Lucas Tanure <tanure@linux.com>
---
 arch/arm64/boot/dts/amlogic/Makefile          |   1 +
 .../amlogic/amlogic-t7-a311d2-khadas-vim4.dts |  52 ++++++
 arch/arm64/boot/dts/amlogic/amlogic-t7.dtsi   | 158 ++++++++++++++++++
 3 files changed, 211 insertions(+)
 create mode 100644 arch/arm64/boot/dts/amlogic/amlogic-t7-a311d2-khadas-vim4.dts
 create mode 100644 arch/arm64/boot/dts/amlogic/amlogic-t7.dtsi

diff --git a/arch/arm64/boot/dts/amlogic/Makefile b/arch/arm64/boot/dts/amlogic/Makefile
index cd1c5b04890a..166fec1e4229 100644
--- a/arch/arm64/boot/dts/amlogic/Makefile
+++ b/arch/arm64/boot/dts/amlogic/Makefile
@@ -1,4 +1,5 @@
 # SPDX-License-Identifier: GPL-2.0
+dtb-$(CONFIG_ARCH_MESON) += amlogic-t7-a311d2-khadas-vim4.dtb
 dtb-$(CONFIG_ARCH_MESON) += meson-a1-ad401.dtb
 dtb-$(CONFIG_ARCH_MESON) += meson-axg-jethome-jethub-j100.dtb
 dtb-$(CONFIG_ARCH_MESON) += meson-axg-jethome-jethub-j110-rev-2.dtb
diff --git a/arch/arm64/boot/dts/amlogic/amlogic-t7-a311d2-khadas-vim4.dts b/arch/arm64/boot/dts/amlogic/amlogic-t7-a311d2-khadas-vim4.dts
new file mode 100644
index 000000000000..5d7fb86a9738
--- /dev/null
+++ b/arch/arm64/boot/dts/amlogic/amlogic-t7-a311d2-khadas-vim4.dts
@@ -0,0 +1,52 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2022 Wesion, Inc. All rights reserved.
+ */
+
+/dts-v1/;
+
+#include "amlogic-t7.dtsi"
+
+/ {
+	model = "Khadas vim4";
+	compatible = "khadas,vim4", "amlogic,a311d2", "amlogic,t7";
+
+	aliases {
+		serial0 = &uart_A;
+	};
+
+	memory@0 {
+		device_type = "memory";
+		reg = <0x0 0x0 0x2 0x0>; /* 8 GB */
+	};
+
+	reserved-memory {
+		#address-cells = <2>;
+		#size-cells = <2>;
+		ranges;
+
+		/* 3 MiB reserved for ARM Trusted Firmware (BL31) */
+		secmon_reserved: secmon@5000000 {
+			reg = <0x0 0x05000000 0x0 0x300000>;
+			no-map;
+		};
+
+		/* 32 MiB reserved for ARM Trusted Firmware (BL32) */
+		secmon_reserved_bl32: secmon@5300000 {
+			reg = <0x0 0x05300000 0x0 0x2000000>;
+			no-map;
+		};
+	};
+
+	xtal: xtal-clk {
+		compatible = "fixed-clock";
+		clock-frequency = <24000000>;
+		clock-output-names = "xtal";
+		#clock-cells = <0>;
+	};
+
+};
+
+&uart_A {
+	status = "okay";
+};
diff --git a/arch/arm64/boot/dts/amlogic/amlogic-t7.dtsi b/arch/arm64/boot/dts/amlogic/amlogic-t7.dtsi
new file mode 100644
index 000000000000..6f3971b4df99
--- /dev/null
+++ b/arch/arm64/boot/dts/amlogic/amlogic-t7.dtsi
@@ -0,0 +1,158 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2019 Amlogic, Inc. All rights reserved.
+ */
+
+#include <dt-bindings/interrupt-controller/arm-gic.h>
+
+/ {
+	interrupt-parent = <&gic>;
+	#address-cells = <2>;
+	#size-cells = <2>;
+
+	cpus {
+		#address-cells = <0x2>;
+		#size-cells = <0x0>;
+
+		cpu-map {
+			cluster0 {
+				core0 {
+					cpu = <&cpu100>;
+				};
+				core1 {
+					cpu = <&cpu101>;
+				};
+				core2 {
+					cpu = <&cpu102>;
+				};
+				core3 {
+					cpu = <&cpu103>;
+				};
+			};
+
+			cluster1 {
+				core0 {
+					cpu = <&cpu0>;
+				};
+				core1 {
+					cpu = <&cpu1>;
+				};
+				core2 {
+					cpu = <&cpu2>;
+				};
+				core3 {
+					cpu = <&cpu3>;
+				};
+			};
+		};
+
+		cpu100: cpu@100 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a53";
+			reg = <0x0 0x100>;
+			enable-method = "psci";
+		};
+
+		cpu101: cpu@101{
+			device_type = "cpu";
+			compatible = "arm,cortex-a53";
+			reg = <0x0 0x101>;
+			enable-method = "psci";
+		};
+
+		cpu102: cpu@102 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a53";
+			reg = <0x0 0x102>;
+			enable-method = "psci";
+		};
+
+		cpu103: cpu@103 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a53";
+			reg = <0x0 0x103>;
+			enable-method = "psci";
+		};
+
+		cpu0: cpu@0 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a73";
+			reg = <0x0 0x0>;
+			enable-method = "psci";
+		};
+
+		cpu1: cpu@1 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a73";
+			reg = <0x0 0x1>;
+			enable-method = "psci";
+		};
+
+		cpu2: cpu@2 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a73";
+			reg = <0x0 0x2>;
+			enable-method = "psci";
+		};
+
+		cpu3: cpu@3 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a73";
+			reg = <0x0 0x3>;
+			enable-method = "psci";
+		};
+	};
+
+	timer {
+		compatible = "arm,armv8-timer";
+		interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
+			     <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
+			     <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
+			     <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
+	};
+
+	psci {
+		compatible = "arm,psci-1.0";
+		method = "smc";
+	};
+
+	sm: secure-monitor {
+		compatible = "amlogic,meson-gxbb-sm";
+	};
+
+	soc {
+		compatible = "simple-bus";
+		#address-cells = <2>;
+		#size-cells = <2>;
+		ranges;
+
+		gic: interrupt-controller@fff01000 {
+			compatible = "arm,gic-400";
+			#interrupt-cells = <3>;
+			#address-cells = <0>;
+			interrupt-controller;
+			reg = <0x0 0xfff01000 0 0x1000>,
+			      <0x0 0xfff02000 0 0x0100>;
+			interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
+		};
+
+		apb4: bus@fe000000 {
+			compatible = "simple-bus";
+			reg = <0x0 0xfe000000 0x0 0x480000>;
+			#address-cells = <2>;
+			#size-cells = <2>;
+			ranges = <0x0 0x0 0x0 0xfe000000 0x0 0x480000>;
+
+			uart_A: serial@78000 {
+				compatible = "amlogic,t7-uart",
+					     "amlogic,meson-s4-uart";
+				reg = <0x0 0x78000 0x0 0x18>;
+				interrupts = <GIC_SPI 168 IRQ_TYPE_EDGE_RISING>;
+				status = "disabled";
+				clocks = <&xtal>, <&xtal>, <&xtal>;
+				clock-names = "xtal", "pclk", "baud";
+			};
+		};
+
+	};
+};
-- 
2.41.0


^ permalink raw reply related	[flat|nested] 36+ messages in thread

* [PATCH v6 4/4] arm64: dts: amlogic-t7-a311d2-khadas-vim4: add initial device-tree
@ 2023-06-27  9:10   ` Lucas Tanure
  0 siblings, 0 replies; 36+ messages in thread
From: Lucas Tanure @ 2023-06-27  9:10 UTC (permalink / raw)
  To: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Neil Armstrong,
	Jerome Brunet, Kevin Hilman, Xianwei Zhao
  Cc: Nick, Artem, devicetree, linux-kernel, linux-amlogic,
	linux-arm-kernel, Lucas Tanure

The Khadas VIM4 uses the Amlogic A311D2 SoC, based on the Amlogic T7 SoC
family, on a board with the same form factor as the VIM3 models.

- 8GB LPDDR4X 2016MHz
- 32GB eMMC 5.1 storage
- 32MB SPI flash
- 10/100/1000 Base-T Ethernet
- AP6275S Wireless (802.11 a/b/g/n/ac/ax, BT5.1)
- HDMI 2.1 video
- HDMI Input
- 1x USB 2.0 + 1x USB 3.0 ports
- 1x USB-C (power) with USB 2.0 OTG
- 3x LED's (1x red, 1x blue, 1x white)
- 3x buttons (power, function, reset)
- M2 socket with PCIe, USB, ADC & I2C
- 40pin GPIO Header
- 1x micro SD card slot

Signed-off-by: Lucas Tanure <tanure@linux.com>
---
 arch/arm64/boot/dts/amlogic/Makefile          |   1 +
 .../amlogic/amlogic-t7-a311d2-khadas-vim4.dts |  52 ++++++
 arch/arm64/boot/dts/amlogic/amlogic-t7.dtsi   | 158 ++++++++++++++++++
 3 files changed, 211 insertions(+)
 create mode 100644 arch/arm64/boot/dts/amlogic/amlogic-t7-a311d2-khadas-vim4.dts
 create mode 100644 arch/arm64/boot/dts/amlogic/amlogic-t7.dtsi

diff --git a/arch/arm64/boot/dts/amlogic/Makefile b/arch/arm64/boot/dts/amlogic/Makefile
index cd1c5b04890a..166fec1e4229 100644
--- a/arch/arm64/boot/dts/amlogic/Makefile
+++ b/arch/arm64/boot/dts/amlogic/Makefile
@@ -1,4 +1,5 @@
 # SPDX-License-Identifier: GPL-2.0
+dtb-$(CONFIG_ARCH_MESON) += amlogic-t7-a311d2-khadas-vim4.dtb
 dtb-$(CONFIG_ARCH_MESON) += meson-a1-ad401.dtb
 dtb-$(CONFIG_ARCH_MESON) += meson-axg-jethome-jethub-j100.dtb
 dtb-$(CONFIG_ARCH_MESON) += meson-axg-jethome-jethub-j110-rev-2.dtb
diff --git a/arch/arm64/boot/dts/amlogic/amlogic-t7-a311d2-khadas-vim4.dts b/arch/arm64/boot/dts/amlogic/amlogic-t7-a311d2-khadas-vim4.dts
new file mode 100644
index 000000000000..5d7fb86a9738
--- /dev/null
+++ b/arch/arm64/boot/dts/amlogic/amlogic-t7-a311d2-khadas-vim4.dts
@@ -0,0 +1,52 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2022 Wesion, Inc. All rights reserved.
+ */
+
+/dts-v1/;
+
+#include "amlogic-t7.dtsi"
+
+/ {
+	model = "Khadas vim4";
+	compatible = "khadas,vim4", "amlogic,a311d2", "amlogic,t7";
+
+	aliases {
+		serial0 = &uart_A;
+	};
+
+	memory@0 {
+		device_type = "memory";
+		reg = <0x0 0x0 0x2 0x0>; /* 8 GB */
+	};
+
+	reserved-memory {
+		#address-cells = <2>;
+		#size-cells = <2>;
+		ranges;
+
+		/* 3 MiB reserved for ARM Trusted Firmware (BL31) */
+		secmon_reserved: secmon@5000000 {
+			reg = <0x0 0x05000000 0x0 0x300000>;
+			no-map;
+		};
+
+		/* 32 MiB reserved for ARM Trusted Firmware (BL32) */
+		secmon_reserved_bl32: secmon@5300000 {
+			reg = <0x0 0x05300000 0x0 0x2000000>;
+			no-map;
+		};
+	};
+
+	xtal: xtal-clk {
+		compatible = "fixed-clock";
+		clock-frequency = <24000000>;
+		clock-output-names = "xtal";
+		#clock-cells = <0>;
+	};
+
+};
+
+&uart_A {
+	status = "okay";
+};
diff --git a/arch/arm64/boot/dts/amlogic/amlogic-t7.dtsi b/arch/arm64/boot/dts/amlogic/amlogic-t7.dtsi
new file mode 100644
index 000000000000..6f3971b4df99
--- /dev/null
+++ b/arch/arm64/boot/dts/amlogic/amlogic-t7.dtsi
@@ -0,0 +1,158 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2019 Amlogic, Inc. All rights reserved.
+ */
+
+#include <dt-bindings/interrupt-controller/arm-gic.h>
+
+/ {
+	interrupt-parent = <&gic>;
+	#address-cells = <2>;
+	#size-cells = <2>;
+
+	cpus {
+		#address-cells = <0x2>;
+		#size-cells = <0x0>;
+
+		cpu-map {
+			cluster0 {
+				core0 {
+					cpu = <&cpu100>;
+				};
+				core1 {
+					cpu = <&cpu101>;
+				};
+				core2 {
+					cpu = <&cpu102>;
+				};
+				core3 {
+					cpu = <&cpu103>;
+				};
+			};
+
+			cluster1 {
+				core0 {
+					cpu = <&cpu0>;
+				};
+				core1 {
+					cpu = <&cpu1>;
+				};
+				core2 {
+					cpu = <&cpu2>;
+				};
+				core3 {
+					cpu = <&cpu3>;
+				};
+			};
+		};
+
+		cpu100: cpu@100 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a53";
+			reg = <0x0 0x100>;
+			enable-method = "psci";
+		};
+
+		cpu101: cpu@101{
+			device_type = "cpu";
+			compatible = "arm,cortex-a53";
+			reg = <0x0 0x101>;
+			enable-method = "psci";
+		};
+
+		cpu102: cpu@102 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a53";
+			reg = <0x0 0x102>;
+			enable-method = "psci";
+		};
+
+		cpu103: cpu@103 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a53";
+			reg = <0x0 0x103>;
+			enable-method = "psci";
+		};
+
+		cpu0: cpu@0 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a73";
+			reg = <0x0 0x0>;
+			enable-method = "psci";
+		};
+
+		cpu1: cpu@1 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a73";
+			reg = <0x0 0x1>;
+			enable-method = "psci";
+		};
+
+		cpu2: cpu@2 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a73";
+			reg = <0x0 0x2>;
+			enable-method = "psci";
+		};
+
+		cpu3: cpu@3 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a73";
+			reg = <0x0 0x3>;
+			enable-method = "psci";
+		};
+	};
+
+	timer {
+		compatible = "arm,armv8-timer";
+		interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
+			     <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
+			     <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
+			     <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
+	};
+
+	psci {
+		compatible = "arm,psci-1.0";
+		method = "smc";
+	};
+
+	sm: secure-monitor {
+		compatible = "amlogic,meson-gxbb-sm";
+	};
+
+	soc {
+		compatible = "simple-bus";
+		#address-cells = <2>;
+		#size-cells = <2>;
+		ranges;
+
+		gic: interrupt-controller@fff01000 {
+			compatible = "arm,gic-400";
+			#interrupt-cells = <3>;
+			#address-cells = <0>;
+			interrupt-controller;
+			reg = <0x0 0xfff01000 0 0x1000>,
+			      <0x0 0xfff02000 0 0x0100>;
+			interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
+		};
+
+		apb4: bus@fe000000 {
+			compatible = "simple-bus";
+			reg = <0x0 0xfe000000 0x0 0x480000>;
+			#address-cells = <2>;
+			#size-cells = <2>;
+			ranges = <0x0 0x0 0x0 0xfe000000 0x0 0x480000>;
+
+			uart_A: serial@78000 {
+				compatible = "amlogic,t7-uart",
+					     "amlogic,meson-s4-uart";
+				reg = <0x0 0x78000 0x0 0x18>;
+				interrupts = <GIC_SPI 168 IRQ_TYPE_EDGE_RISING>;
+				status = "disabled";
+				clocks = <&xtal>, <&xtal>, <&xtal>;
+				clock-names = "xtal", "pclk", "baud";
+			};
+		};
+
+	};
+};
-- 
2.41.0


_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

^ permalink raw reply related	[flat|nested] 36+ messages in thread

* [PATCH v6 4/4] arm64: dts: amlogic-t7-a311d2-khadas-vim4: add initial device-tree
@ 2023-06-27  9:10   ` Lucas Tanure
  0 siblings, 0 replies; 36+ messages in thread
From: Lucas Tanure @ 2023-06-27  9:10 UTC (permalink / raw)
  To: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Neil Armstrong,
	Jerome Brunet, Kevin Hilman, Xianwei Zhao
  Cc: Nick, Artem, devicetree, linux-kernel, linux-amlogic,
	linux-arm-kernel, Lucas Tanure

The Khadas VIM4 uses the Amlogic A311D2 SoC, based on the Amlogic T7 SoC
family, on a board with the same form factor as the VIM3 models.

- 8GB LPDDR4X 2016MHz
- 32GB eMMC 5.1 storage
- 32MB SPI flash
- 10/100/1000 Base-T Ethernet
- AP6275S Wireless (802.11 a/b/g/n/ac/ax, BT5.1)
- HDMI 2.1 video
- HDMI Input
- 1x USB 2.0 + 1x USB 3.0 ports
- 1x USB-C (power) with USB 2.0 OTG
- 3x LED's (1x red, 1x blue, 1x white)
- 3x buttons (power, function, reset)
- M2 socket with PCIe, USB, ADC & I2C
- 40pin GPIO Header
- 1x micro SD card slot

Signed-off-by: Lucas Tanure <tanure@linux.com>
---
 arch/arm64/boot/dts/amlogic/Makefile          |   1 +
 .../amlogic/amlogic-t7-a311d2-khadas-vim4.dts |  52 ++++++
 arch/arm64/boot/dts/amlogic/amlogic-t7.dtsi   | 158 ++++++++++++++++++
 3 files changed, 211 insertions(+)
 create mode 100644 arch/arm64/boot/dts/amlogic/amlogic-t7-a311d2-khadas-vim4.dts
 create mode 100644 arch/arm64/boot/dts/amlogic/amlogic-t7.dtsi

diff --git a/arch/arm64/boot/dts/amlogic/Makefile b/arch/arm64/boot/dts/amlogic/Makefile
index cd1c5b04890a..166fec1e4229 100644
--- a/arch/arm64/boot/dts/amlogic/Makefile
+++ b/arch/arm64/boot/dts/amlogic/Makefile
@@ -1,4 +1,5 @@
 # SPDX-License-Identifier: GPL-2.0
+dtb-$(CONFIG_ARCH_MESON) += amlogic-t7-a311d2-khadas-vim4.dtb
 dtb-$(CONFIG_ARCH_MESON) += meson-a1-ad401.dtb
 dtb-$(CONFIG_ARCH_MESON) += meson-axg-jethome-jethub-j100.dtb
 dtb-$(CONFIG_ARCH_MESON) += meson-axg-jethome-jethub-j110-rev-2.dtb
diff --git a/arch/arm64/boot/dts/amlogic/amlogic-t7-a311d2-khadas-vim4.dts b/arch/arm64/boot/dts/amlogic/amlogic-t7-a311d2-khadas-vim4.dts
new file mode 100644
index 000000000000..5d7fb86a9738
--- /dev/null
+++ b/arch/arm64/boot/dts/amlogic/amlogic-t7-a311d2-khadas-vim4.dts
@@ -0,0 +1,52 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2022 Wesion, Inc. All rights reserved.
+ */
+
+/dts-v1/;
+
+#include "amlogic-t7.dtsi"
+
+/ {
+	model = "Khadas vim4";
+	compatible = "khadas,vim4", "amlogic,a311d2", "amlogic,t7";
+
+	aliases {
+		serial0 = &uart_A;
+	};
+
+	memory@0 {
+		device_type = "memory";
+		reg = <0x0 0x0 0x2 0x0>; /* 8 GB */
+	};
+
+	reserved-memory {
+		#address-cells = <2>;
+		#size-cells = <2>;
+		ranges;
+
+		/* 3 MiB reserved for ARM Trusted Firmware (BL31) */
+		secmon_reserved: secmon@5000000 {
+			reg = <0x0 0x05000000 0x0 0x300000>;
+			no-map;
+		};
+
+		/* 32 MiB reserved for ARM Trusted Firmware (BL32) */
+		secmon_reserved_bl32: secmon@5300000 {
+			reg = <0x0 0x05300000 0x0 0x2000000>;
+			no-map;
+		};
+	};
+
+	xtal: xtal-clk {
+		compatible = "fixed-clock";
+		clock-frequency = <24000000>;
+		clock-output-names = "xtal";
+		#clock-cells = <0>;
+	};
+
+};
+
+&uart_A {
+	status = "okay";
+};
diff --git a/arch/arm64/boot/dts/amlogic/amlogic-t7.dtsi b/arch/arm64/boot/dts/amlogic/amlogic-t7.dtsi
new file mode 100644
index 000000000000..6f3971b4df99
--- /dev/null
+++ b/arch/arm64/boot/dts/amlogic/amlogic-t7.dtsi
@@ -0,0 +1,158 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2019 Amlogic, Inc. All rights reserved.
+ */
+
+#include <dt-bindings/interrupt-controller/arm-gic.h>
+
+/ {
+	interrupt-parent = <&gic>;
+	#address-cells = <2>;
+	#size-cells = <2>;
+
+	cpus {
+		#address-cells = <0x2>;
+		#size-cells = <0x0>;
+
+		cpu-map {
+			cluster0 {
+				core0 {
+					cpu = <&cpu100>;
+				};
+				core1 {
+					cpu = <&cpu101>;
+				};
+				core2 {
+					cpu = <&cpu102>;
+				};
+				core3 {
+					cpu = <&cpu103>;
+				};
+			};
+
+			cluster1 {
+				core0 {
+					cpu = <&cpu0>;
+				};
+				core1 {
+					cpu = <&cpu1>;
+				};
+				core2 {
+					cpu = <&cpu2>;
+				};
+				core3 {
+					cpu = <&cpu3>;
+				};
+			};
+		};
+
+		cpu100: cpu@100 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a53";
+			reg = <0x0 0x100>;
+			enable-method = "psci";
+		};
+
+		cpu101: cpu@101{
+			device_type = "cpu";
+			compatible = "arm,cortex-a53";
+			reg = <0x0 0x101>;
+			enable-method = "psci";
+		};
+
+		cpu102: cpu@102 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a53";
+			reg = <0x0 0x102>;
+			enable-method = "psci";
+		};
+
+		cpu103: cpu@103 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a53";
+			reg = <0x0 0x103>;
+			enable-method = "psci";
+		};
+
+		cpu0: cpu@0 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a73";
+			reg = <0x0 0x0>;
+			enable-method = "psci";
+		};
+
+		cpu1: cpu@1 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a73";
+			reg = <0x0 0x1>;
+			enable-method = "psci";
+		};
+
+		cpu2: cpu@2 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a73";
+			reg = <0x0 0x2>;
+			enable-method = "psci";
+		};
+
+		cpu3: cpu@3 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a73";
+			reg = <0x0 0x3>;
+			enable-method = "psci";
+		};
+	};
+
+	timer {
+		compatible = "arm,armv8-timer";
+		interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
+			     <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
+			     <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
+			     <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
+	};
+
+	psci {
+		compatible = "arm,psci-1.0";
+		method = "smc";
+	};
+
+	sm: secure-monitor {
+		compatible = "amlogic,meson-gxbb-sm";
+	};
+
+	soc {
+		compatible = "simple-bus";
+		#address-cells = <2>;
+		#size-cells = <2>;
+		ranges;
+
+		gic: interrupt-controller@fff01000 {
+			compatible = "arm,gic-400";
+			#interrupt-cells = <3>;
+			#address-cells = <0>;
+			interrupt-controller;
+			reg = <0x0 0xfff01000 0 0x1000>,
+			      <0x0 0xfff02000 0 0x0100>;
+			interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
+		};
+
+		apb4: bus@fe000000 {
+			compatible = "simple-bus";
+			reg = <0x0 0xfe000000 0x0 0x480000>;
+			#address-cells = <2>;
+			#size-cells = <2>;
+			ranges = <0x0 0x0 0x0 0xfe000000 0x0 0x480000>;
+
+			uart_A: serial@78000 {
+				compatible = "amlogic,t7-uart",
+					     "amlogic,meson-s4-uart";
+				reg = <0x0 0x78000 0x0 0x18>;
+				interrupts = <GIC_SPI 168 IRQ_TYPE_EDGE_RISING>;
+				status = "disabled";
+				clocks = <&xtal>, <&xtal>, <&xtal>;
+				clock-names = "xtal", "pclk", "baud";
+			};
+		};
+
+	};
+};
-- 
2.41.0


_______________________________________________
linux-amlogic mailing list
linux-amlogic@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-amlogic

^ permalink raw reply related	[flat|nested] 36+ messages in thread

* Re: [PATCH v6 3/4] tty: serial: meson: Add a earlycon for the T7 SoC
  2023-06-27  9:10   ` Lucas Tanure
  (?)
@ 2023-06-27  9:12     ` Neil Armstrong
  -1 siblings, 0 replies; 36+ messages in thread
From: Neil Armstrong @ 2023-06-27  9:12 UTC (permalink / raw)
  To: Lucas Tanure, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
	Jerome Brunet, Kevin Hilman, Xianwei Zhao
  Cc: Nick, Artem, devicetree, linux-kernel, linux-amlogic, linux-arm-kernel

Hi Lucas,

On 27/06/2023 11:10, Lucas Tanure wrote:
> The new Amlogic T7 SoC does not have a always-on uart,
> so add OF_EARLYCON_DECLARE for it.
> 
> Signed-off-by: Lucas Tanure <tanure@linux.com>
> ---
>   drivers/tty/serial/meson_uart.c | 2 ++
>   1 file changed, 2 insertions(+)
> 
> diff --git a/drivers/tty/serial/meson_uart.c b/drivers/tty/serial/meson_uart.c
> index 2501db5a7aaf..c24e105a98c5 100644
> --- a/drivers/tty/serial/meson_uart.c
> +++ b/drivers/tty/serial/meson_uart.c
> @@ -649,6 +649,8 @@ meson_serial_early_console_setup(struct earlycon_device *device, const char *opt
>   
>   OF_EARLYCON_DECLARE(meson, "amlogic,meson-ao-uart",
>   		    meson_serial_early_console_setup);
> +OF_EARLYCON_DECLARE(meson, "amlogic,t7-uart",
> +		    meson_serial_early_console_setup);
>   
>   #define MESON_SERIAL_CONSOLE	(&meson_serial_console)
>   #else

I've reviewed last version of this patch, please keep tags for minor changes,
or explicitely explain why you didn't keep the tag.

Acked-by: Neil Armstrong <neil.armstrong@linaro.org>

Thanks,
Neil

^ permalink raw reply	[flat|nested] 36+ messages in thread

* Re: [PATCH v6 3/4] tty: serial: meson: Add a earlycon for the T7 SoC
@ 2023-06-27  9:12     ` Neil Armstrong
  0 siblings, 0 replies; 36+ messages in thread
From: Neil Armstrong @ 2023-06-27  9:12 UTC (permalink / raw)
  To: Lucas Tanure, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
	Jerome Brunet, Kevin Hilman, Xianwei Zhao
  Cc: Nick, Artem, devicetree, linux-kernel, linux-amlogic, linux-arm-kernel

Hi Lucas,

On 27/06/2023 11:10, Lucas Tanure wrote:
> The new Amlogic T7 SoC does not have a always-on uart,
> so add OF_EARLYCON_DECLARE for it.
> 
> Signed-off-by: Lucas Tanure <tanure@linux.com>
> ---
>   drivers/tty/serial/meson_uart.c | 2 ++
>   1 file changed, 2 insertions(+)
> 
> diff --git a/drivers/tty/serial/meson_uart.c b/drivers/tty/serial/meson_uart.c
> index 2501db5a7aaf..c24e105a98c5 100644
> --- a/drivers/tty/serial/meson_uart.c
> +++ b/drivers/tty/serial/meson_uart.c
> @@ -649,6 +649,8 @@ meson_serial_early_console_setup(struct earlycon_device *device, const char *opt
>   
>   OF_EARLYCON_DECLARE(meson, "amlogic,meson-ao-uart",
>   		    meson_serial_early_console_setup);
> +OF_EARLYCON_DECLARE(meson, "amlogic,t7-uart",
> +		    meson_serial_early_console_setup);
>   
>   #define MESON_SERIAL_CONSOLE	(&meson_serial_console)
>   #else

I've reviewed last version of this patch, please keep tags for minor changes,
or explicitely explain why you didn't keep the tag.

Acked-by: Neil Armstrong <neil.armstrong@linaro.org>

Thanks,
Neil

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

^ permalink raw reply	[flat|nested] 36+ messages in thread

* Re: [PATCH v6 3/4] tty: serial: meson: Add a earlycon for the T7 SoC
@ 2023-06-27  9:12     ` Neil Armstrong
  0 siblings, 0 replies; 36+ messages in thread
From: Neil Armstrong @ 2023-06-27  9:12 UTC (permalink / raw)
  To: Lucas Tanure, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
	Jerome Brunet, Kevin Hilman, Xianwei Zhao
  Cc: Nick, Artem, devicetree, linux-kernel, linux-amlogic, linux-arm-kernel

Hi Lucas,

On 27/06/2023 11:10, Lucas Tanure wrote:
> The new Amlogic T7 SoC does not have a always-on uart,
> so add OF_EARLYCON_DECLARE for it.
> 
> Signed-off-by: Lucas Tanure <tanure@linux.com>
> ---
>   drivers/tty/serial/meson_uart.c | 2 ++
>   1 file changed, 2 insertions(+)
> 
> diff --git a/drivers/tty/serial/meson_uart.c b/drivers/tty/serial/meson_uart.c
> index 2501db5a7aaf..c24e105a98c5 100644
> --- a/drivers/tty/serial/meson_uart.c
> +++ b/drivers/tty/serial/meson_uart.c
> @@ -649,6 +649,8 @@ meson_serial_early_console_setup(struct earlycon_device *device, const char *opt
>   
>   OF_EARLYCON_DECLARE(meson, "amlogic,meson-ao-uart",
>   		    meson_serial_early_console_setup);
> +OF_EARLYCON_DECLARE(meson, "amlogic,t7-uart",
> +		    meson_serial_early_console_setup);
>   
>   #define MESON_SERIAL_CONSOLE	(&meson_serial_console)
>   #else

I've reviewed last version of this patch, please keep tags for minor changes,
or explicitely explain why you didn't keep the tag.

Acked-by: Neil Armstrong <neil.armstrong@linaro.org>

Thanks,
Neil

_______________________________________________
linux-amlogic mailing list
linux-amlogic@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-amlogic

^ permalink raw reply	[flat|nested] 36+ messages in thread

* Re: [PATCH v6 3/4] tty: serial: meson: Add a earlycon for the T7 SoC
  2023-06-27  9:12     ` Neil Armstrong
  (?)
@ 2023-06-27  9:16       ` Lucas Tanure
  -1 siblings, 0 replies; 36+ messages in thread
From: Lucas Tanure @ 2023-06-27  9:16 UTC (permalink / raw)
  To: neil.armstrong
  Cc: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Jerome Brunet,
	Kevin Hilman, Xianwei Zhao, Nick, Artem, devicetree,
	linux-kernel, linux-amlogic, linux-arm-kernel

On Tue, Jun 27, 2023 at 10:12 AM Neil Armstrong
<neil.armstrong@linaro.org> wrote:
>
> Hi Lucas,
>
> On 27/06/2023 11:10, Lucas Tanure wrote:
> > The new Amlogic T7 SoC does not have a always-on uart,
> > so add OF_EARLYCON_DECLARE for it.
> >
> > Signed-off-by: Lucas Tanure <tanure@linux.com>
> > ---
> >   drivers/tty/serial/meson_uart.c | 2 ++
> >   1 file changed, 2 insertions(+)
> >
> > diff --git a/drivers/tty/serial/meson_uart.c b/drivers/tty/serial/meson_uart.c
> > index 2501db5a7aaf..c24e105a98c5 100644
> > --- a/drivers/tty/serial/meson_uart.c
> > +++ b/drivers/tty/serial/meson_uart.c
> > @@ -649,6 +649,8 @@ meson_serial_early_console_setup(struct earlycon_device *device, const char *opt
> >
> >   OF_EARLYCON_DECLARE(meson, "amlogic,meson-ao-uart",
> >                   meson_serial_early_console_setup);
> > +OF_EARLYCON_DECLARE(meson, "amlogic,t7-uart",
> > +                 meson_serial_early_console_setup);
> >
> >   #define MESON_SERIAL_CONSOLE        (&meson_serial_console)
> >   #else
>
> I've reviewed last version of this patch, please keep tags for minor changes,
> or explicitely explain why you didn't keep the tag.
>
> Acked-by: Neil Armstrong <neil.armstrong@linaro.org>
Sure, I didn't keep it because the change from "amlogic,meson-t7-uart"
to "amlogic,t7-uart" seem a relevant one.

>
> Thanks,
> Neil

^ permalink raw reply	[flat|nested] 36+ messages in thread

* Re: [PATCH v6 3/4] tty: serial: meson: Add a earlycon for the T7 SoC
@ 2023-06-27  9:16       ` Lucas Tanure
  0 siblings, 0 replies; 36+ messages in thread
From: Lucas Tanure @ 2023-06-27  9:16 UTC (permalink / raw)
  To: neil.armstrong
  Cc: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Jerome Brunet,
	Kevin Hilman, Xianwei Zhao, Nick, Artem, devicetree,
	linux-kernel, linux-amlogic, linux-arm-kernel

On Tue, Jun 27, 2023 at 10:12 AM Neil Armstrong
<neil.armstrong@linaro.org> wrote:
>
> Hi Lucas,
>
> On 27/06/2023 11:10, Lucas Tanure wrote:
> > The new Amlogic T7 SoC does not have a always-on uart,
> > so add OF_EARLYCON_DECLARE for it.
> >
> > Signed-off-by: Lucas Tanure <tanure@linux.com>
> > ---
> >   drivers/tty/serial/meson_uart.c | 2 ++
> >   1 file changed, 2 insertions(+)
> >
> > diff --git a/drivers/tty/serial/meson_uart.c b/drivers/tty/serial/meson_uart.c
> > index 2501db5a7aaf..c24e105a98c5 100644
> > --- a/drivers/tty/serial/meson_uart.c
> > +++ b/drivers/tty/serial/meson_uart.c
> > @@ -649,6 +649,8 @@ meson_serial_early_console_setup(struct earlycon_device *device, const char *opt
> >
> >   OF_EARLYCON_DECLARE(meson, "amlogic,meson-ao-uart",
> >                   meson_serial_early_console_setup);
> > +OF_EARLYCON_DECLARE(meson, "amlogic,t7-uart",
> > +                 meson_serial_early_console_setup);
> >
> >   #define MESON_SERIAL_CONSOLE        (&meson_serial_console)
> >   #else
>
> I've reviewed last version of this patch, please keep tags for minor changes,
> or explicitely explain why you didn't keep the tag.
>
> Acked-by: Neil Armstrong <neil.armstrong@linaro.org>
Sure, I didn't keep it because the change from "amlogic,meson-t7-uart"
to "amlogic,t7-uart" seem a relevant one.

>
> Thanks,
> Neil

_______________________________________________
linux-amlogic mailing list
linux-amlogic@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-amlogic

^ permalink raw reply	[flat|nested] 36+ messages in thread

* Re: [PATCH v6 3/4] tty: serial: meson: Add a earlycon for the T7 SoC
@ 2023-06-27  9:16       ` Lucas Tanure
  0 siblings, 0 replies; 36+ messages in thread
From: Lucas Tanure @ 2023-06-27  9:16 UTC (permalink / raw)
  To: neil.armstrong
  Cc: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Jerome Brunet,
	Kevin Hilman, Xianwei Zhao, Nick, Artem, devicetree,
	linux-kernel, linux-amlogic, linux-arm-kernel

On Tue, Jun 27, 2023 at 10:12 AM Neil Armstrong
<neil.armstrong@linaro.org> wrote:
>
> Hi Lucas,
>
> On 27/06/2023 11:10, Lucas Tanure wrote:
> > The new Amlogic T7 SoC does not have a always-on uart,
> > so add OF_EARLYCON_DECLARE for it.
> >
> > Signed-off-by: Lucas Tanure <tanure@linux.com>
> > ---
> >   drivers/tty/serial/meson_uart.c | 2 ++
> >   1 file changed, 2 insertions(+)
> >
> > diff --git a/drivers/tty/serial/meson_uart.c b/drivers/tty/serial/meson_uart.c
> > index 2501db5a7aaf..c24e105a98c5 100644
> > --- a/drivers/tty/serial/meson_uart.c
> > +++ b/drivers/tty/serial/meson_uart.c
> > @@ -649,6 +649,8 @@ meson_serial_early_console_setup(struct earlycon_device *device, const char *opt
> >
> >   OF_EARLYCON_DECLARE(meson, "amlogic,meson-ao-uart",
> >                   meson_serial_early_console_setup);
> > +OF_EARLYCON_DECLARE(meson, "amlogic,t7-uart",
> > +                 meson_serial_early_console_setup);
> >
> >   #define MESON_SERIAL_CONSOLE        (&meson_serial_console)
> >   #else
>
> I've reviewed last version of this patch, please keep tags for minor changes,
> or explicitely explain why you didn't keep the tag.
>
> Acked-by: Neil Armstrong <neil.armstrong@linaro.org>
Sure, I didn't keep it because the change from "amlogic,meson-t7-uart"
to "amlogic,t7-uart" seem a relevant one.

>
> Thanks,
> Neil

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

^ permalink raw reply	[flat|nested] 36+ messages in thread

* Re: [PATCH v6 4/4] arm64: dts: amlogic-t7-a311d2-khadas-vim4: add initial device-tree
  2023-06-27  9:10   ` Lucas Tanure
  (?)
@ 2023-06-27  9:21     ` Xianwei Zhao
  -1 siblings, 0 replies; 36+ messages in thread
From: Xianwei Zhao @ 2023-06-27  9:21 UTC (permalink / raw)
  To: Lucas Tanure, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
	Neil Armstrong, Jerome Brunet, Kevin Hilman
  Cc: Nick, Artem, devicetree, linux-kernel, linux-amlogic, linux-arm-kernel



On 2023/6/27 17:10, Lucas Tanure wrote:
> [ EXTERNAL EMAIL ]
> 
> The Khadas VIM4 uses the Amlogic A311D2 SoC, based on the Amlogic T7 SoC
> family, on a board with the same form factor as the VIM3 models.
> 
> - 8GB LPDDR4X 2016MHz
> - 32GB eMMC 5.1 storage
> - 32MB SPI flash
> - 10/100/1000 Base-T Ethernet
> - AP6275S Wireless (802.11 a/b/g/n/ac/ax, BT5.1)
> - HDMI 2.1 video
> - HDMI Input
> - 1x USB 2.0 + 1x USB 3.0 ports
> - 1x USB-C (power) with USB 2.0 OTG
> - 3x LED's (1x red, 1x blue, 1x white)
> - 3x buttons (power, function, reset)
> - M2 socket with PCIe, USB, ADC & I2C
> - 40pin GPIO Header
> - 1x micro SD card slot
> 
> Signed-off-by: Lucas Tanure <tanure@linux.com>
> ---
>   arch/arm64/boot/dts/amlogic/Makefile          |   1 +
>   .../amlogic/amlogic-t7-a311d2-khadas-vim4.dts |  52 ++++++
>   arch/arm64/boot/dts/amlogic/amlogic-t7.dtsi   | 158 ++++++++++++++++++
>   3 files changed, 211 insertions(+)
>   create mode 100644 arch/arm64/boot/dts/amlogic/amlogic-t7-a311d2-khadas-vim4.dts
>   create mode 100644 arch/arm64/boot/dts/amlogic/amlogic-t7.dtsi
> 
> diff --git a/arch/arm64/boot/dts/amlogic/Makefile b/arch/arm64/boot/dts/amlogic/Makefile
> index cd1c5b04890a..166fec1e4229 100644
> --- a/arch/arm64/boot/dts/amlogic/Makefile
> +++ b/arch/arm64/boot/dts/amlogic/Makefile
> @@ -1,4 +1,5 @@
>   # SPDX-License-Identifier: GPL-2.0
> +dtb-$(CONFIG_ARCH_MESON) += amlogic-t7-a311d2-khadas-vim4.dtb
>   dtb-$(CONFIG_ARCH_MESON) += meson-a1-ad401.dtb
>   dtb-$(CONFIG_ARCH_MESON) += meson-axg-jethome-jethub-j100.dtb
>   dtb-$(CONFIG_ARCH_MESON) += meson-axg-jethome-jethub-j110-rev-2.dtb
> diff --git a/arch/arm64/boot/dts/amlogic/amlogic-t7-a311d2-khadas-vim4.dts b/arch/arm64/boot/dts/amlogic/amlogic-t7-a311d2-khadas-vim4.dts
> new file mode 100644
> index 000000000000..5d7fb86a9738
> --- /dev/null
> +++ b/arch/arm64/boot/dts/amlogic/amlogic-t7-a311d2-khadas-vim4.dts
> @@ -0,0 +1,52 @@
> +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
> +/*
> + * Copyright (c) 2022 Wesion, Inc. All rights reserved.
> + */
> +
> +/dts-v1/;
> +
> +#include "amlogic-t7.dtsi"
> +
> +/ {
> +       model = "Khadas vim4";
> +       compatible = "khadas,vim4", "amlogic,a311d2", "amlogic,t7";
> +
> +       aliases {
> +               serial0 = &uart_A;
> +       };
> +
> +       memory@0 {
> +               device_type = "memory";
> +               reg = <0x0 0x0 0x2 0x0>; /* 8 GB */
> +       };
> +
> +       reserved-memory {
> +               #address-cells = <2>;
> +               #size-cells = <2>;
> +               ranges;
> +
> +               /* 3 MiB reserved for ARM Trusted Firmware (BL31) */
> +               secmon_reserved: secmon@5000000 {
> +                       reg = <0x0 0x05000000 0x0 0x300000>;
> +                       no-map;
> +               };
> +
> +               /* 32 MiB reserved for ARM Trusted Firmware (BL32) */
> +               secmon_reserved_bl32: secmon@5300000 {
> +                       reg = <0x0 0x05300000 0x0 0x2000000>;
> +                       no-map;
> +               };
> +       };
> +
> +       xtal: xtal-clk {
> +               compatible = "fixed-clock";
> +               clock-frequency = <24000000>;
> +               clock-output-names = "xtal";
> +               #clock-cells = <0>;
> +       };
> +
> +};
> +
> +&uart_A {
> +       status = "okay";
> +};
> diff --git a/arch/arm64/boot/dts/amlogic/amlogic-t7.dtsi b/arch/arm64/boot/dts/amlogic/amlogic-t7.dtsi
> new file mode 100644
> index 000000000000..6f3971b4df99
> --- /dev/null
> +++ b/arch/arm64/boot/dts/amlogic/amlogic-t7.dtsi
> @@ -0,0 +1,158 @@
> +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
> +/*
> + * Copyright (c) 2019 Amlogic, Inc. All rights reserved.
> + */
> +
> +#include <dt-bindings/interrupt-controller/arm-gic.h>
> +
> +/ {
> +       interrupt-parent = <&gic>;
> +       #address-cells = <2>;
> +       #size-cells = <2>;
> +
> +       cpus {
> +               #address-cells = <0x2>;
> +               #size-cells = <0x0>;
> +
> +               cpu-map {
> +                       cluster0 {
> +                               core0 {
> +                                       cpu = <&cpu100>;
> +                               };
> +                               core1 {
> +                                       cpu = <&cpu101>;
> +                               };
> +                               core2 {
> +                                       cpu = <&cpu102>;
> +                               };
> +                               core3 {
> +                                       cpu = <&cpu103>;
> +                               };
> +                       };
> +
> +                       cluster1 {
> +                               core0 {
> +                                       cpu = <&cpu0>;
> +                               };
> +                               core1 {
> +                                       cpu = <&cpu1>;
> +                               };
> +                               core2 {
> +                                       cpu = <&cpu2>;
> +                               };
> +                               core3 {
> +                                       cpu = <&cpu3>;
> +                               };
> +                       };
> +               };
> +
> +               cpu100: cpu@100 {
> +                       device_type = "cpu";
> +                       compatible = "arm,cortex-a53";
> +                       reg = <0x0 0x100>;
> +                       enable-method = "psci";
> +               };
> +
> +               cpu101: cpu@101{
> +                       device_type = "cpu";
> +                       compatible = "arm,cortex-a53";
> +                       reg = <0x0 0x101>;
> +                       enable-method = "psci";
> +               };
> +
> +               cpu102: cpu@102 {
> +                       device_type = "cpu";
> +                       compatible = "arm,cortex-a53";
> +                       reg = <0x0 0x102>;
> +                       enable-method = "psci";
> +               };
> +
> +               cpu103: cpu@103 {
> +                       device_type = "cpu";
> +                       compatible = "arm,cortex-a53";
> +                       reg = <0x0 0x103>;
> +                       enable-method = "psci";
> +               };
> +
> +               cpu0: cpu@0 {
> +                       device_type = "cpu";
> +                       compatible = "arm,cortex-a73";
> +                       reg = <0x0 0x0>;
> +                       enable-method = "psci";
> +               };
> +
> +               cpu1: cpu@1 {
> +                       device_type = "cpu";
> +                       compatible = "arm,cortex-a73";
> +                       reg = <0x0 0x1>;
> +                       enable-method = "psci";
> +               };
> +
> +               cpu2: cpu@2 {
> +                       device_type = "cpu";
> +                       compatible = "arm,cortex-a73";
> +                       reg = <0x0 0x2>;
> +                       enable-method = "psci";
> +               };
> +
> +               cpu3: cpu@3 {
> +                       device_type = "cpu";
> +                       compatible = "arm,cortex-a73";
> +                       reg = <0x0 0x3>;
> +                       enable-method = "psci";
> +               };
> +       };
> +
> +       timer {
> +               compatible = "arm,armv8-timer";
> +               interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
> +                            <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
> +                            <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
> +                            <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
> +       };
cpu number is 8, not 4, need use GIC_CPU_MASK_SIMPLE(8)
> +
> +       psci {
> +               compatible = "arm,psci-1.0";
> +               method = "smc";
> +       };
> +
> +       sm: secure-monitor {
> +               compatible = "amlogic,meson-gxbb-sm";
> +       };
> +
> +       soc {
> +               compatible = "simple-bus";
> +               #address-cells = <2>;
> +               #size-cells = <2>;
> +               ranges;
> +
> +               gic: interrupt-controller@fff01000 {
> +                       compatible = "arm,gic-400";
> +                       #interrupt-cells = <3>;
> +                       #address-cells = <0>;
> +                       interrupt-controller;
> +                       reg = <0x0 0xfff01000 0 0x1000>,
> +                             <0x0 0xfff02000 0 0x0100>;
> +                       interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
cpu number is 8, not 4, need use GIC_CPU_MASK_SIMPLE(8)
> +               };
> +
> +               apb4: bus@fe000000 {
> +                       compatible = "simple-bus";
> +                       reg = <0x0 0xfe000000 0x0 0x480000>;
> +                       #address-cells = <2>;
> +                       #size-cells = <2>;
> +                       ranges = <0x0 0x0 0x0 0xfe000000 0x0 0x480000>;
> +
> +                       uart_A: serial@78000 {
use lowercase, "uart_a"
> +                               compatible = "amlogic,t7-uart",
> +                                            "amlogic,meson-s4-uart";
> +                               reg = <0x0 0x78000 0x0 0x18>;
> +                               interrupts = <GIC_SPI 168 IRQ_TYPE_EDGE_RISING>;
> +                               status = "disabled";
> +                               clocks = <&xtal>, <&xtal>, <&xtal>
"xtal" why defined in  amlogic-t7-a311d2-khadas-vim4.dts files
> +                               clock-names = "xtal", "pclk", "baud";
> +                       };
> +               };
> +
> +       };
> +};
> --
> 2.41.0
> 

^ permalink raw reply	[flat|nested] 36+ messages in thread

* Re: [PATCH v6 4/4] arm64: dts: amlogic-t7-a311d2-khadas-vim4: add initial device-tree
@ 2023-06-27  9:21     ` Xianwei Zhao
  0 siblings, 0 replies; 36+ messages in thread
From: Xianwei Zhao @ 2023-06-27  9:21 UTC (permalink / raw)
  To: Lucas Tanure, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
	Neil Armstrong, Jerome Brunet, Kevin Hilman
  Cc: Nick, Artem, devicetree, linux-kernel, linux-amlogic, linux-arm-kernel



On 2023/6/27 17:10, Lucas Tanure wrote:
> [ EXTERNAL EMAIL ]
> 
> The Khadas VIM4 uses the Amlogic A311D2 SoC, based on the Amlogic T7 SoC
> family, on a board with the same form factor as the VIM3 models.
> 
> - 8GB LPDDR4X 2016MHz
> - 32GB eMMC 5.1 storage
> - 32MB SPI flash
> - 10/100/1000 Base-T Ethernet
> - AP6275S Wireless (802.11 a/b/g/n/ac/ax, BT5.1)
> - HDMI 2.1 video
> - HDMI Input
> - 1x USB 2.0 + 1x USB 3.0 ports
> - 1x USB-C (power) with USB 2.0 OTG
> - 3x LED's (1x red, 1x blue, 1x white)
> - 3x buttons (power, function, reset)
> - M2 socket with PCIe, USB, ADC & I2C
> - 40pin GPIO Header
> - 1x micro SD card slot
> 
> Signed-off-by: Lucas Tanure <tanure@linux.com>
> ---
>   arch/arm64/boot/dts/amlogic/Makefile          |   1 +
>   .../amlogic/amlogic-t7-a311d2-khadas-vim4.dts |  52 ++++++
>   arch/arm64/boot/dts/amlogic/amlogic-t7.dtsi   | 158 ++++++++++++++++++
>   3 files changed, 211 insertions(+)
>   create mode 100644 arch/arm64/boot/dts/amlogic/amlogic-t7-a311d2-khadas-vim4.dts
>   create mode 100644 arch/arm64/boot/dts/amlogic/amlogic-t7.dtsi
> 
> diff --git a/arch/arm64/boot/dts/amlogic/Makefile b/arch/arm64/boot/dts/amlogic/Makefile
> index cd1c5b04890a..166fec1e4229 100644
> --- a/arch/arm64/boot/dts/amlogic/Makefile
> +++ b/arch/arm64/boot/dts/amlogic/Makefile
> @@ -1,4 +1,5 @@
>   # SPDX-License-Identifier: GPL-2.0
> +dtb-$(CONFIG_ARCH_MESON) += amlogic-t7-a311d2-khadas-vim4.dtb
>   dtb-$(CONFIG_ARCH_MESON) += meson-a1-ad401.dtb
>   dtb-$(CONFIG_ARCH_MESON) += meson-axg-jethome-jethub-j100.dtb
>   dtb-$(CONFIG_ARCH_MESON) += meson-axg-jethome-jethub-j110-rev-2.dtb
> diff --git a/arch/arm64/boot/dts/amlogic/amlogic-t7-a311d2-khadas-vim4.dts b/arch/arm64/boot/dts/amlogic/amlogic-t7-a311d2-khadas-vim4.dts
> new file mode 100644
> index 000000000000..5d7fb86a9738
> --- /dev/null
> +++ b/arch/arm64/boot/dts/amlogic/amlogic-t7-a311d2-khadas-vim4.dts
> @@ -0,0 +1,52 @@
> +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
> +/*
> + * Copyright (c) 2022 Wesion, Inc. All rights reserved.
> + */
> +
> +/dts-v1/;
> +
> +#include "amlogic-t7.dtsi"
> +
> +/ {
> +       model = "Khadas vim4";
> +       compatible = "khadas,vim4", "amlogic,a311d2", "amlogic,t7";
> +
> +       aliases {
> +               serial0 = &uart_A;
> +       };
> +
> +       memory@0 {
> +               device_type = "memory";
> +               reg = <0x0 0x0 0x2 0x0>; /* 8 GB */
> +       };
> +
> +       reserved-memory {
> +               #address-cells = <2>;
> +               #size-cells = <2>;
> +               ranges;
> +
> +               /* 3 MiB reserved for ARM Trusted Firmware (BL31) */
> +               secmon_reserved: secmon@5000000 {
> +                       reg = <0x0 0x05000000 0x0 0x300000>;
> +                       no-map;
> +               };
> +
> +               /* 32 MiB reserved for ARM Trusted Firmware (BL32) */
> +               secmon_reserved_bl32: secmon@5300000 {
> +                       reg = <0x0 0x05300000 0x0 0x2000000>;
> +                       no-map;
> +               };
> +       };
> +
> +       xtal: xtal-clk {
> +               compatible = "fixed-clock";
> +               clock-frequency = <24000000>;
> +               clock-output-names = "xtal";
> +               #clock-cells = <0>;
> +       };
> +
> +};
> +
> +&uart_A {
> +       status = "okay";
> +};
> diff --git a/arch/arm64/boot/dts/amlogic/amlogic-t7.dtsi b/arch/arm64/boot/dts/amlogic/amlogic-t7.dtsi
> new file mode 100644
> index 000000000000..6f3971b4df99
> --- /dev/null
> +++ b/arch/arm64/boot/dts/amlogic/amlogic-t7.dtsi
> @@ -0,0 +1,158 @@
> +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
> +/*
> + * Copyright (c) 2019 Amlogic, Inc. All rights reserved.
> + */
> +
> +#include <dt-bindings/interrupt-controller/arm-gic.h>
> +
> +/ {
> +       interrupt-parent = <&gic>;
> +       #address-cells = <2>;
> +       #size-cells = <2>;
> +
> +       cpus {
> +               #address-cells = <0x2>;
> +               #size-cells = <0x0>;
> +
> +               cpu-map {
> +                       cluster0 {
> +                               core0 {
> +                                       cpu = <&cpu100>;
> +                               };
> +                               core1 {
> +                                       cpu = <&cpu101>;
> +                               };
> +                               core2 {
> +                                       cpu = <&cpu102>;
> +                               };
> +                               core3 {
> +                                       cpu = <&cpu103>;
> +                               };
> +                       };
> +
> +                       cluster1 {
> +                               core0 {
> +                                       cpu = <&cpu0>;
> +                               };
> +                               core1 {
> +                                       cpu = <&cpu1>;
> +                               };
> +                               core2 {
> +                                       cpu = <&cpu2>;
> +                               };
> +                               core3 {
> +                                       cpu = <&cpu3>;
> +                               };
> +                       };
> +               };
> +
> +               cpu100: cpu@100 {
> +                       device_type = "cpu";
> +                       compatible = "arm,cortex-a53";
> +                       reg = <0x0 0x100>;
> +                       enable-method = "psci";
> +               };
> +
> +               cpu101: cpu@101{
> +                       device_type = "cpu";
> +                       compatible = "arm,cortex-a53";
> +                       reg = <0x0 0x101>;
> +                       enable-method = "psci";
> +               };
> +
> +               cpu102: cpu@102 {
> +                       device_type = "cpu";
> +                       compatible = "arm,cortex-a53";
> +                       reg = <0x0 0x102>;
> +                       enable-method = "psci";
> +               };
> +
> +               cpu103: cpu@103 {
> +                       device_type = "cpu";
> +                       compatible = "arm,cortex-a53";
> +                       reg = <0x0 0x103>;
> +                       enable-method = "psci";
> +               };
> +
> +               cpu0: cpu@0 {
> +                       device_type = "cpu";
> +                       compatible = "arm,cortex-a73";
> +                       reg = <0x0 0x0>;
> +                       enable-method = "psci";
> +               };
> +
> +               cpu1: cpu@1 {
> +                       device_type = "cpu";
> +                       compatible = "arm,cortex-a73";
> +                       reg = <0x0 0x1>;
> +                       enable-method = "psci";
> +               };
> +
> +               cpu2: cpu@2 {
> +                       device_type = "cpu";
> +                       compatible = "arm,cortex-a73";
> +                       reg = <0x0 0x2>;
> +                       enable-method = "psci";
> +               };
> +
> +               cpu3: cpu@3 {
> +                       device_type = "cpu";
> +                       compatible = "arm,cortex-a73";
> +                       reg = <0x0 0x3>;
> +                       enable-method = "psci";
> +               };
> +       };
> +
> +       timer {
> +               compatible = "arm,armv8-timer";
> +               interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
> +                            <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
> +                            <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
> +                            <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
> +       };
cpu number is 8, not 4, need use GIC_CPU_MASK_SIMPLE(8)
> +
> +       psci {
> +               compatible = "arm,psci-1.0";
> +               method = "smc";
> +       };
> +
> +       sm: secure-monitor {
> +               compatible = "amlogic,meson-gxbb-sm";
> +       };
> +
> +       soc {
> +               compatible = "simple-bus";
> +               #address-cells = <2>;
> +               #size-cells = <2>;
> +               ranges;
> +
> +               gic: interrupt-controller@fff01000 {
> +                       compatible = "arm,gic-400";
> +                       #interrupt-cells = <3>;
> +                       #address-cells = <0>;
> +                       interrupt-controller;
> +                       reg = <0x0 0xfff01000 0 0x1000>,
> +                             <0x0 0xfff02000 0 0x0100>;
> +                       interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
cpu number is 8, not 4, need use GIC_CPU_MASK_SIMPLE(8)
> +               };
> +
> +               apb4: bus@fe000000 {
> +                       compatible = "simple-bus";
> +                       reg = <0x0 0xfe000000 0x0 0x480000>;
> +                       #address-cells = <2>;
> +                       #size-cells = <2>;
> +                       ranges = <0x0 0x0 0x0 0xfe000000 0x0 0x480000>;
> +
> +                       uart_A: serial@78000 {
use lowercase, "uart_a"
> +                               compatible = "amlogic,t7-uart",
> +                                            "amlogic,meson-s4-uart";
> +                               reg = <0x0 0x78000 0x0 0x18>;
> +                               interrupts = <GIC_SPI 168 IRQ_TYPE_EDGE_RISING>;
> +                               status = "disabled";
> +                               clocks = <&xtal>, <&xtal>, <&xtal>
"xtal" why defined in  amlogic-t7-a311d2-khadas-vim4.dts files
> +                               clock-names = "xtal", "pclk", "baud";
> +                       };
> +               };
> +
> +       };
> +};
> --
> 2.41.0
> 

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

^ permalink raw reply	[flat|nested] 36+ messages in thread

* Re: [PATCH v6 4/4] arm64: dts: amlogic-t7-a311d2-khadas-vim4: add initial device-tree
@ 2023-06-27  9:21     ` Xianwei Zhao
  0 siblings, 0 replies; 36+ messages in thread
From: Xianwei Zhao @ 2023-06-27  9:21 UTC (permalink / raw)
  To: Lucas Tanure, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
	Neil Armstrong, Jerome Brunet, Kevin Hilman
  Cc: Nick, Artem, devicetree, linux-kernel, linux-amlogic, linux-arm-kernel



On 2023/6/27 17:10, Lucas Tanure wrote:
> [ EXTERNAL EMAIL ]
> 
> The Khadas VIM4 uses the Amlogic A311D2 SoC, based on the Amlogic T7 SoC
> family, on a board with the same form factor as the VIM3 models.
> 
> - 8GB LPDDR4X 2016MHz
> - 32GB eMMC 5.1 storage
> - 32MB SPI flash
> - 10/100/1000 Base-T Ethernet
> - AP6275S Wireless (802.11 a/b/g/n/ac/ax, BT5.1)
> - HDMI 2.1 video
> - HDMI Input
> - 1x USB 2.0 + 1x USB 3.0 ports
> - 1x USB-C (power) with USB 2.0 OTG
> - 3x LED's (1x red, 1x blue, 1x white)
> - 3x buttons (power, function, reset)
> - M2 socket with PCIe, USB, ADC & I2C
> - 40pin GPIO Header
> - 1x micro SD card slot
> 
> Signed-off-by: Lucas Tanure <tanure@linux.com>
> ---
>   arch/arm64/boot/dts/amlogic/Makefile          |   1 +
>   .../amlogic/amlogic-t7-a311d2-khadas-vim4.dts |  52 ++++++
>   arch/arm64/boot/dts/amlogic/amlogic-t7.dtsi   | 158 ++++++++++++++++++
>   3 files changed, 211 insertions(+)
>   create mode 100644 arch/arm64/boot/dts/amlogic/amlogic-t7-a311d2-khadas-vim4.dts
>   create mode 100644 arch/arm64/boot/dts/amlogic/amlogic-t7.dtsi
> 
> diff --git a/arch/arm64/boot/dts/amlogic/Makefile b/arch/arm64/boot/dts/amlogic/Makefile
> index cd1c5b04890a..166fec1e4229 100644
> --- a/arch/arm64/boot/dts/amlogic/Makefile
> +++ b/arch/arm64/boot/dts/amlogic/Makefile
> @@ -1,4 +1,5 @@
>   # SPDX-License-Identifier: GPL-2.0
> +dtb-$(CONFIG_ARCH_MESON) += amlogic-t7-a311d2-khadas-vim4.dtb
>   dtb-$(CONFIG_ARCH_MESON) += meson-a1-ad401.dtb
>   dtb-$(CONFIG_ARCH_MESON) += meson-axg-jethome-jethub-j100.dtb
>   dtb-$(CONFIG_ARCH_MESON) += meson-axg-jethome-jethub-j110-rev-2.dtb
> diff --git a/arch/arm64/boot/dts/amlogic/amlogic-t7-a311d2-khadas-vim4.dts b/arch/arm64/boot/dts/amlogic/amlogic-t7-a311d2-khadas-vim4.dts
> new file mode 100644
> index 000000000000..5d7fb86a9738
> --- /dev/null
> +++ b/arch/arm64/boot/dts/amlogic/amlogic-t7-a311d2-khadas-vim4.dts
> @@ -0,0 +1,52 @@
> +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
> +/*
> + * Copyright (c) 2022 Wesion, Inc. All rights reserved.
> + */
> +
> +/dts-v1/;
> +
> +#include "amlogic-t7.dtsi"
> +
> +/ {
> +       model = "Khadas vim4";
> +       compatible = "khadas,vim4", "amlogic,a311d2", "amlogic,t7";
> +
> +       aliases {
> +               serial0 = &uart_A;
> +       };
> +
> +       memory@0 {
> +               device_type = "memory";
> +               reg = <0x0 0x0 0x2 0x0>; /* 8 GB */
> +       };
> +
> +       reserved-memory {
> +               #address-cells = <2>;
> +               #size-cells = <2>;
> +               ranges;
> +
> +               /* 3 MiB reserved for ARM Trusted Firmware (BL31) */
> +               secmon_reserved: secmon@5000000 {
> +                       reg = <0x0 0x05000000 0x0 0x300000>;
> +                       no-map;
> +               };
> +
> +               /* 32 MiB reserved for ARM Trusted Firmware (BL32) */
> +               secmon_reserved_bl32: secmon@5300000 {
> +                       reg = <0x0 0x05300000 0x0 0x2000000>;
> +                       no-map;
> +               };
> +       };
> +
> +       xtal: xtal-clk {
> +               compatible = "fixed-clock";
> +               clock-frequency = <24000000>;
> +               clock-output-names = "xtal";
> +               #clock-cells = <0>;
> +       };
> +
> +};
> +
> +&uart_A {
> +       status = "okay";
> +};
> diff --git a/arch/arm64/boot/dts/amlogic/amlogic-t7.dtsi b/arch/arm64/boot/dts/amlogic/amlogic-t7.dtsi
> new file mode 100644
> index 000000000000..6f3971b4df99
> --- /dev/null
> +++ b/arch/arm64/boot/dts/amlogic/amlogic-t7.dtsi
> @@ -0,0 +1,158 @@
> +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
> +/*
> + * Copyright (c) 2019 Amlogic, Inc. All rights reserved.
> + */
> +
> +#include <dt-bindings/interrupt-controller/arm-gic.h>
> +
> +/ {
> +       interrupt-parent = <&gic>;
> +       #address-cells = <2>;
> +       #size-cells = <2>;
> +
> +       cpus {
> +               #address-cells = <0x2>;
> +               #size-cells = <0x0>;
> +
> +               cpu-map {
> +                       cluster0 {
> +                               core0 {
> +                                       cpu = <&cpu100>;
> +                               };
> +                               core1 {
> +                                       cpu = <&cpu101>;
> +                               };
> +                               core2 {
> +                                       cpu = <&cpu102>;
> +                               };
> +                               core3 {
> +                                       cpu = <&cpu103>;
> +                               };
> +                       };
> +
> +                       cluster1 {
> +                               core0 {
> +                                       cpu = <&cpu0>;
> +                               };
> +                               core1 {
> +                                       cpu = <&cpu1>;
> +                               };
> +                               core2 {
> +                                       cpu = <&cpu2>;
> +                               };
> +                               core3 {
> +                                       cpu = <&cpu3>;
> +                               };
> +                       };
> +               };
> +
> +               cpu100: cpu@100 {
> +                       device_type = "cpu";
> +                       compatible = "arm,cortex-a53";
> +                       reg = <0x0 0x100>;
> +                       enable-method = "psci";
> +               };
> +
> +               cpu101: cpu@101{
> +                       device_type = "cpu";
> +                       compatible = "arm,cortex-a53";
> +                       reg = <0x0 0x101>;
> +                       enable-method = "psci";
> +               };
> +
> +               cpu102: cpu@102 {
> +                       device_type = "cpu";
> +                       compatible = "arm,cortex-a53";
> +                       reg = <0x0 0x102>;
> +                       enable-method = "psci";
> +               };
> +
> +               cpu103: cpu@103 {
> +                       device_type = "cpu";
> +                       compatible = "arm,cortex-a53";
> +                       reg = <0x0 0x103>;
> +                       enable-method = "psci";
> +               };
> +
> +               cpu0: cpu@0 {
> +                       device_type = "cpu";
> +                       compatible = "arm,cortex-a73";
> +                       reg = <0x0 0x0>;
> +                       enable-method = "psci";
> +               };
> +
> +               cpu1: cpu@1 {
> +                       device_type = "cpu";
> +                       compatible = "arm,cortex-a73";
> +                       reg = <0x0 0x1>;
> +                       enable-method = "psci";
> +               };
> +
> +               cpu2: cpu@2 {
> +                       device_type = "cpu";
> +                       compatible = "arm,cortex-a73";
> +                       reg = <0x0 0x2>;
> +                       enable-method = "psci";
> +               };
> +
> +               cpu3: cpu@3 {
> +                       device_type = "cpu";
> +                       compatible = "arm,cortex-a73";
> +                       reg = <0x0 0x3>;
> +                       enable-method = "psci";
> +               };
> +       };
> +
> +       timer {
> +               compatible = "arm,armv8-timer";
> +               interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
> +                            <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
> +                            <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
> +                            <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
> +       };
cpu number is 8, not 4, need use GIC_CPU_MASK_SIMPLE(8)
> +
> +       psci {
> +               compatible = "arm,psci-1.0";
> +               method = "smc";
> +       };
> +
> +       sm: secure-monitor {
> +               compatible = "amlogic,meson-gxbb-sm";
> +       };
> +
> +       soc {
> +               compatible = "simple-bus";
> +               #address-cells = <2>;
> +               #size-cells = <2>;
> +               ranges;
> +
> +               gic: interrupt-controller@fff01000 {
> +                       compatible = "arm,gic-400";
> +                       #interrupt-cells = <3>;
> +                       #address-cells = <0>;
> +                       interrupt-controller;
> +                       reg = <0x0 0xfff01000 0 0x1000>,
> +                             <0x0 0xfff02000 0 0x0100>;
> +                       interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
cpu number is 8, not 4, need use GIC_CPU_MASK_SIMPLE(8)
> +               };
> +
> +               apb4: bus@fe000000 {
> +                       compatible = "simple-bus";
> +                       reg = <0x0 0xfe000000 0x0 0x480000>;
> +                       #address-cells = <2>;
> +                       #size-cells = <2>;
> +                       ranges = <0x0 0x0 0x0 0xfe000000 0x0 0x480000>;
> +
> +                       uart_A: serial@78000 {
use lowercase, "uart_a"
> +                               compatible = "amlogic,t7-uart",
> +                                            "amlogic,meson-s4-uart";
> +                               reg = <0x0 0x78000 0x0 0x18>;
> +                               interrupts = <GIC_SPI 168 IRQ_TYPE_EDGE_RISING>;
> +                               status = "disabled";
> +                               clocks = <&xtal>, <&xtal>, <&xtal>
"xtal" why defined in  amlogic-t7-a311d2-khadas-vim4.dts files
> +                               clock-names = "xtal", "pclk", "baud";
> +                       };
> +               };
> +
> +       };
> +};
> --
> 2.41.0
> 

_______________________________________________
linux-amlogic mailing list
linux-amlogic@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-amlogic

^ permalink raw reply	[flat|nested] 36+ messages in thread

* Re: [PATCH v6 2/4] dt-bindings: serial: amlogic,meson-uart: Add compatible string for T7
  2023-06-27  9:10   ` Lucas Tanure
  (?)
@ 2023-06-27 10:38     ` Krzysztof Kozlowski
  -1 siblings, 0 replies; 36+ messages in thread
From: Krzysztof Kozlowski @ 2023-06-27 10:38 UTC (permalink / raw)
  To: Lucas Tanure, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
	Neil Armstrong, Jerome Brunet, Kevin Hilman, Xianwei Zhao
  Cc: Nick, Artem, devicetree, linux-kernel, linux-amlogic, linux-arm-kernel

On 27/06/2023 11:10, Lucas Tanure wrote:
> Amlogic T7 SoCs uses the same UART controller as S4 SoCs and G12A.
> There is no need for an extra compatible line in the driver, but
> add T7 compatible line for documentation.
> 
> Signed-off-by: Lucas Tanure <tanure@linux.com>


Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>


This is a friendly reminder during the review process.

It looks like you received a tag and forgot to add it.

If you do not know the process, here is a short explanation:
Please add Acked-by/Reviewed-by/Tested-by tags when posting new
versions. However, there's no need to repost patches *only* to add the
tags. The upstream maintainer will do that for acks received on the
version they apply.

https://elixir.bootlin.com/linux/v6.4/source/Documentation/process/submitting-patches.rst#L552

If a tag was not added on purpose, please state why and what changed.

Best regards,
Krzysztof


^ permalink raw reply	[flat|nested] 36+ messages in thread

* Re: [PATCH v6 2/4] dt-bindings: serial: amlogic,meson-uart: Add compatible string for T7
@ 2023-06-27 10:38     ` Krzysztof Kozlowski
  0 siblings, 0 replies; 36+ messages in thread
From: Krzysztof Kozlowski @ 2023-06-27 10:38 UTC (permalink / raw)
  To: Lucas Tanure, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
	Neil Armstrong, Jerome Brunet, Kevin Hilman, Xianwei Zhao
  Cc: Nick, Artem, devicetree, linux-kernel, linux-amlogic, linux-arm-kernel

On 27/06/2023 11:10, Lucas Tanure wrote:
> Amlogic T7 SoCs uses the same UART controller as S4 SoCs and G12A.
> There is no need for an extra compatible line in the driver, but
> add T7 compatible line for documentation.
> 
> Signed-off-by: Lucas Tanure <tanure@linux.com>


Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>


This is a friendly reminder during the review process.

It looks like you received a tag and forgot to add it.

If you do not know the process, here is a short explanation:
Please add Acked-by/Reviewed-by/Tested-by tags when posting new
versions. However, there's no need to repost patches *only* to add the
tags. The upstream maintainer will do that for acks received on the
version they apply.

https://elixir.bootlin.com/linux/v6.4/source/Documentation/process/submitting-patches.rst#L552

If a tag was not added on purpose, please state why and what changed.

Best regards,
Krzysztof


_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

^ permalink raw reply	[flat|nested] 36+ messages in thread

* Re: [PATCH v6 2/4] dt-bindings: serial: amlogic,meson-uart: Add compatible string for T7
@ 2023-06-27 10:38     ` Krzysztof Kozlowski
  0 siblings, 0 replies; 36+ messages in thread
From: Krzysztof Kozlowski @ 2023-06-27 10:38 UTC (permalink / raw)
  To: Lucas Tanure, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
	Neil Armstrong, Jerome Brunet, Kevin Hilman, Xianwei Zhao
  Cc: Nick, Artem, devicetree, linux-kernel, linux-amlogic, linux-arm-kernel

On 27/06/2023 11:10, Lucas Tanure wrote:
> Amlogic T7 SoCs uses the same UART controller as S4 SoCs and G12A.
> There is no need for an extra compatible line in the driver, but
> add T7 compatible line for documentation.
> 
> Signed-off-by: Lucas Tanure <tanure@linux.com>


Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>


This is a friendly reminder during the review process.

It looks like you received a tag and forgot to add it.

If you do not know the process, here is a short explanation:
Please add Acked-by/Reviewed-by/Tested-by tags when posting new
versions. However, there's no need to repost patches *only* to add the
tags. The upstream maintainer will do that for acks received on the
version they apply.

https://elixir.bootlin.com/linux/v6.4/source/Documentation/process/submitting-patches.rst#L552

If a tag was not added on purpose, please state why and what changed.

Best regards,
Krzysztof


_______________________________________________
linux-amlogic mailing list
linux-amlogic@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-amlogic

^ permalink raw reply	[flat|nested] 36+ messages in thread

* Re: [PATCH v6 4/4] arm64: dts: amlogic-t7-a311d2-khadas-vim4: add initial device-tree
  2023-06-27  9:21     ` Xianwei Zhao
  (?)
@ 2023-06-29  7:10       ` Lucas Tanure
  -1 siblings, 0 replies; 36+ messages in thread
From: Lucas Tanure @ 2023-06-29  7:10 UTC (permalink / raw)
  To: Xianwei Zhao
  Cc: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Neil Armstrong,
	Jerome Brunet, Kevin Hilman, Nick, Artem, devicetree,
	linux-kernel, linux-amlogic, linux-arm-kernel

On Tue, Jun 27, 2023 at 10:21 AM Xianwei Zhao <xianwei.zhao@amlogic.com> wrote:
>
>
>
> On 2023/6/27 17:10, Lucas Tanure wrote:
> > [ EXTERNAL EMAIL ]
> >
> > The Khadas VIM4 uses the Amlogic A311D2 SoC, based on the Amlogic T7 SoC
> > family, on a board with the same form factor as the VIM3 models.
> >
> > - 8GB LPDDR4X 2016MHz
> > - 32GB eMMC 5.1 storage
> > - 32MB SPI flash
> > - 10/100/1000 Base-T Ethernet
> > - AP6275S Wireless (802.11 a/b/g/n/ac/ax, BT5.1)
> > - HDMI 2.1 video
> > - HDMI Input
> > - 1x USB 2.0 + 1x USB 3.0 ports
> > - 1x USB-C (power) with USB 2.0 OTG
> > - 3x LED's (1x red, 1x blue, 1x white)
> > - 3x buttons (power, function, reset)
> > - M2 socket with PCIe, USB, ADC & I2C
> > - 40pin GPIO Header
> > - 1x micro SD card slot
> >
> > Signed-off-by: Lucas Tanure <tanure@linux.com>
> > ---
> >   arch/arm64/boot/dts/amlogic/Makefile          |   1 +
> >   .../amlogic/amlogic-t7-a311d2-khadas-vim4.dts |  52 ++++++
> >   arch/arm64/boot/dts/amlogic/amlogic-t7.dtsi   | 158 ++++++++++++++++++
> >   3 files changed, 211 insertions(+)
> >   create mode 100644 arch/arm64/boot/dts/amlogic/amlogic-t7-a311d2-khadas-vim4.dts
> >   create mode 100644 arch/arm64/boot/dts/amlogic/amlogic-t7.dtsi
> >
> > diff --git a/arch/arm64/boot/dts/amlogic/Makefile b/arch/arm64/boot/dts/amlogic/Makefile
> > index cd1c5b04890a..166fec1e4229 100644
> > --- a/arch/arm64/boot/dts/amlogic/Makefile
> > +++ b/arch/arm64/boot/dts/amlogic/Makefile
> > @@ -1,4 +1,5 @@
> >   # SPDX-License-Identifier: GPL-2.0
> > +dtb-$(CONFIG_ARCH_MESON) += amlogic-t7-a311d2-khadas-vim4.dtb
> >   dtb-$(CONFIG_ARCH_MESON) += meson-a1-ad401.dtb
> >   dtb-$(CONFIG_ARCH_MESON) += meson-axg-jethome-jethub-j100.dtb
> >   dtb-$(CONFIG_ARCH_MESON) += meson-axg-jethome-jethub-j110-rev-2.dtb
> > diff --git a/arch/arm64/boot/dts/amlogic/amlogic-t7-a311d2-khadas-vim4.dts b/arch/arm64/boot/dts/amlogic/amlogic-t7-a311d2-khadas-vim4.dts
> > new file mode 100644
> > index 000000000000..5d7fb86a9738
> > --- /dev/null
> > +++ b/arch/arm64/boot/dts/amlogic/amlogic-t7-a311d2-khadas-vim4.dts
> > @@ -0,0 +1,52 @@
> > +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
> > +/*
> > + * Copyright (c) 2022 Wesion, Inc. All rights reserved.
> > + */
> > +
> > +/dts-v1/;
> > +
> > +#include "amlogic-t7.dtsi"
> > +
> > +/ {
> > +       model = "Khadas vim4";
> > +       compatible = "khadas,vim4", "amlogic,a311d2", "amlogic,t7";
> > +
> > +       aliases {
> > +               serial0 = &uart_A;
> > +       };
> > +
> > +       memory@0 {
> > +               device_type = "memory";
> > +               reg = <0x0 0x0 0x2 0x0>; /* 8 GB */
> > +       };
> > +
> > +       reserved-memory {
> > +               #address-cells = <2>;
> > +               #size-cells = <2>;
> > +               ranges;
> > +
> > +               /* 3 MiB reserved for ARM Trusted Firmware (BL31) */
> > +               secmon_reserved: secmon@5000000 {
> > +                       reg = <0x0 0x05000000 0x0 0x300000>;
> > +                       no-map;
> > +               };
> > +
> > +               /* 32 MiB reserved for ARM Trusted Firmware (BL32) */
> > +               secmon_reserved_bl32: secmon@5300000 {
> > +                       reg = <0x0 0x05300000 0x0 0x2000000>;
> > +                       no-map;
> > +               };
> > +       };
> > +
> > +       xtal: xtal-clk {
> > +               compatible = "fixed-clock";
> > +               clock-frequency = <24000000>;
> > +               clock-output-names = "xtal";
> > +               #clock-cells = <0>;
> > +       };
> > +
> > +};
> > +
> > +&uart_A {
> > +       status = "okay";
> > +};
> > diff --git a/arch/arm64/boot/dts/amlogic/amlogic-t7.dtsi b/arch/arm64/boot/dts/amlogic/amlogic-t7.dtsi
> > new file mode 100644
> > index 000000000000..6f3971b4df99
> > --- /dev/null
> > +++ b/arch/arm64/boot/dts/amlogic/amlogic-t7.dtsi
> > @@ -0,0 +1,158 @@
> > +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
> > +/*
> > + * Copyright (c) 2019 Amlogic, Inc. All rights reserved.
> > + */
> > +
> > +#include <dt-bindings/interrupt-controller/arm-gic.h>
> > +
> > +/ {
> > +       interrupt-parent = <&gic>;
> > +       #address-cells = <2>;
> > +       #size-cells = <2>;
> > +
> > +       cpus {
> > +               #address-cells = <0x2>;
> > +               #size-cells = <0x0>;
> > +
> > +               cpu-map {
> > +                       cluster0 {
> > +                               core0 {
> > +                                       cpu = <&cpu100>;
> > +                               };
> > +                               core1 {
> > +                                       cpu = <&cpu101>;
> > +                               };
> > +                               core2 {
> > +                                       cpu = <&cpu102>;
> > +                               };
> > +                               core3 {
> > +                                       cpu = <&cpu103>;
> > +                               };
> > +                       };
> > +
> > +                       cluster1 {
> > +                               core0 {
> > +                                       cpu = <&cpu0>;
> > +                               };
> > +                               core1 {
> > +                                       cpu = <&cpu1>;
> > +                               };
> > +                               core2 {
> > +                                       cpu = <&cpu2>;
> > +                               };
> > +                               core3 {
> > +                                       cpu = <&cpu3>;
> > +                               };
> > +                       };
> > +               };
> > +
> > +               cpu100: cpu@100 {
> > +                       device_type = "cpu";
> > +                       compatible = "arm,cortex-a53";
> > +                       reg = <0x0 0x100>;
> > +                       enable-method = "psci";
> > +               };
> > +
> > +               cpu101: cpu@101{
> > +                       device_type = "cpu";
> > +                       compatible = "arm,cortex-a53";
> > +                       reg = <0x0 0x101>;
> > +                       enable-method = "psci";
> > +               };
> > +
> > +               cpu102: cpu@102 {
> > +                       device_type = "cpu";
> > +                       compatible = "arm,cortex-a53";
> > +                       reg = <0x0 0x102>;
> > +                       enable-method = "psci";
> > +               };
> > +
> > +               cpu103: cpu@103 {
> > +                       device_type = "cpu";
> > +                       compatible = "arm,cortex-a53";
> > +                       reg = <0x0 0x103>;
> > +                       enable-method = "psci";
> > +               };
> > +
> > +               cpu0: cpu@0 {
> > +                       device_type = "cpu";
> > +                       compatible = "arm,cortex-a73";
> > +                       reg = <0x0 0x0>;
> > +                       enable-method = "psci";
> > +               };
> > +
> > +               cpu1: cpu@1 {
> > +                       device_type = "cpu";
> > +                       compatible = "arm,cortex-a73";
> > +                       reg = <0x0 0x1>;
> > +                       enable-method = "psci";
> > +               };
> > +
> > +               cpu2: cpu@2 {
> > +                       device_type = "cpu";
> > +                       compatible = "arm,cortex-a73";
> > +                       reg = <0x0 0x2>;
> > +                       enable-method = "psci";
> > +               };
> > +
> > +               cpu3: cpu@3 {
> > +                       device_type = "cpu";
> > +                       compatible = "arm,cortex-a73";
> > +                       reg = <0x0 0x3>;
> > +                       enable-method = "psci";
> > +               };
> > +       };
> > +
> > +       timer {
> > +               compatible = "arm,armv8-timer";
> > +               interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
> > +                            <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
> > +                            <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
> > +                            <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
> > +       };
> cpu number is 8, not 4, need use GIC_CPU_MASK_SIMPLE(8)
> > +
> > +       psci {
> > +               compatible = "arm,psci-1.0";
> > +               method = "smc";
> > +       };
> > +
> > +       sm: secure-monitor {
> > +               compatible = "amlogic,meson-gxbb-sm";
> > +       };
> > +
> > +       soc {
> > +               compatible = "simple-bus";
> > +               #address-cells = <2>;
> > +               #size-cells = <2>;
> > +               ranges;
> > +
> > +               gic: interrupt-controller@fff01000 {
> > +                       compatible = "arm,gic-400";
> > +                       #interrupt-cells = <3>;
> > +                       #address-cells = <0>;
> > +                       interrupt-controller;
> > +                       reg = <0x0 0xfff01000 0 0x1000>,
> > +                             <0x0 0xfff02000 0 0x0100>;
> > +                       interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
> cpu number is 8, not 4, need use GIC_CPU_MASK_SIMPLE(8)
OK

> > +               };
> > +
> > +               apb4: bus@fe000000 {
> > +                       compatible = "simple-bus";
> > +                       reg = <0x0 0xfe000000 0x0 0x480000>;
> > +                       #address-cells = <2>;
> > +                       #size-cells = <2>;
> > +                       ranges = <0x0 0x0 0x0 0xfe000000 0x0 0x480000>;
> > +
> > +                       uart_A: serial@78000 {
> use lowercase, "uart_a"

OK
> > +                               compatible = "amlogic,t7-uart",
> > +                                            "amlogic,meson-s4-uart";
> > +                               reg = <0x0 0x78000 0x0 0x18>;
> > +                               interrupts = <GIC_SPI 168 IRQ_TYPE_EDGE_RISING>;
> > +                               status = "disabled";
> > +                               clocks = <&xtal>, <&xtal>, <&xtal>
> "xtal" why defined in  amlogic-t7-a311d2-khadas-vim4.dts files

The 24MHz clock is a crystal in VIm4 schematic, so its something the
board did to provide that clock.
Other boards using a311d2 could provide that clock in a different way.
Or are you saying that this clock is mandatory at boot time, and all
boards using this chip will have the same crystal?

> > +                               clock-names = "xtal", "pclk", "baud";
> > +                       };
> > +               };
> > +
> > +       };
> > +};
> > --
> > 2.41.0
> >

^ permalink raw reply	[flat|nested] 36+ messages in thread

* Re: [PATCH v6 4/4] arm64: dts: amlogic-t7-a311d2-khadas-vim4: add initial device-tree
@ 2023-06-29  7:10       ` Lucas Tanure
  0 siblings, 0 replies; 36+ messages in thread
From: Lucas Tanure @ 2023-06-29  7:10 UTC (permalink / raw)
  To: Xianwei Zhao
  Cc: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Neil Armstrong,
	Jerome Brunet, Kevin Hilman, Nick, Artem, devicetree,
	linux-kernel, linux-amlogic, linux-arm-kernel

On Tue, Jun 27, 2023 at 10:21 AM Xianwei Zhao <xianwei.zhao@amlogic.com> wrote:
>
>
>
> On 2023/6/27 17:10, Lucas Tanure wrote:
> > [ EXTERNAL EMAIL ]
> >
> > The Khadas VIM4 uses the Amlogic A311D2 SoC, based on the Amlogic T7 SoC
> > family, on a board with the same form factor as the VIM3 models.
> >
> > - 8GB LPDDR4X 2016MHz
> > - 32GB eMMC 5.1 storage
> > - 32MB SPI flash
> > - 10/100/1000 Base-T Ethernet
> > - AP6275S Wireless (802.11 a/b/g/n/ac/ax, BT5.1)
> > - HDMI 2.1 video
> > - HDMI Input
> > - 1x USB 2.0 + 1x USB 3.0 ports
> > - 1x USB-C (power) with USB 2.0 OTG
> > - 3x LED's (1x red, 1x blue, 1x white)
> > - 3x buttons (power, function, reset)
> > - M2 socket with PCIe, USB, ADC & I2C
> > - 40pin GPIO Header
> > - 1x micro SD card slot
> >
> > Signed-off-by: Lucas Tanure <tanure@linux.com>
> > ---
> >   arch/arm64/boot/dts/amlogic/Makefile          |   1 +
> >   .../amlogic/amlogic-t7-a311d2-khadas-vim4.dts |  52 ++++++
> >   arch/arm64/boot/dts/amlogic/amlogic-t7.dtsi   | 158 ++++++++++++++++++
> >   3 files changed, 211 insertions(+)
> >   create mode 100644 arch/arm64/boot/dts/amlogic/amlogic-t7-a311d2-khadas-vim4.dts
> >   create mode 100644 arch/arm64/boot/dts/amlogic/amlogic-t7.dtsi
> >
> > diff --git a/arch/arm64/boot/dts/amlogic/Makefile b/arch/arm64/boot/dts/amlogic/Makefile
> > index cd1c5b04890a..166fec1e4229 100644
> > --- a/arch/arm64/boot/dts/amlogic/Makefile
> > +++ b/arch/arm64/boot/dts/amlogic/Makefile
> > @@ -1,4 +1,5 @@
> >   # SPDX-License-Identifier: GPL-2.0
> > +dtb-$(CONFIG_ARCH_MESON) += amlogic-t7-a311d2-khadas-vim4.dtb
> >   dtb-$(CONFIG_ARCH_MESON) += meson-a1-ad401.dtb
> >   dtb-$(CONFIG_ARCH_MESON) += meson-axg-jethome-jethub-j100.dtb
> >   dtb-$(CONFIG_ARCH_MESON) += meson-axg-jethome-jethub-j110-rev-2.dtb
> > diff --git a/arch/arm64/boot/dts/amlogic/amlogic-t7-a311d2-khadas-vim4.dts b/arch/arm64/boot/dts/amlogic/amlogic-t7-a311d2-khadas-vim4.dts
> > new file mode 100644
> > index 000000000000..5d7fb86a9738
> > --- /dev/null
> > +++ b/arch/arm64/boot/dts/amlogic/amlogic-t7-a311d2-khadas-vim4.dts
> > @@ -0,0 +1,52 @@
> > +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
> > +/*
> > + * Copyright (c) 2022 Wesion, Inc. All rights reserved.
> > + */
> > +
> > +/dts-v1/;
> > +
> > +#include "amlogic-t7.dtsi"
> > +
> > +/ {
> > +       model = "Khadas vim4";
> > +       compatible = "khadas,vim4", "amlogic,a311d2", "amlogic,t7";
> > +
> > +       aliases {
> > +               serial0 = &uart_A;
> > +       };
> > +
> > +       memory@0 {
> > +               device_type = "memory";
> > +               reg = <0x0 0x0 0x2 0x0>; /* 8 GB */
> > +       };
> > +
> > +       reserved-memory {
> > +               #address-cells = <2>;
> > +               #size-cells = <2>;
> > +               ranges;
> > +
> > +               /* 3 MiB reserved for ARM Trusted Firmware (BL31) */
> > +               secmon_reserved: secmon@5000000 {
> > +                       reg = <0x0 0x05000000 0x0 0x300000>;
> > +                       no-map;
> > +               };
> > +
> > +               /* 32 MiB reserved for ARM Trusted Firmware (BL32) */
> > +               secmon_reserved_bl32: secmon@5300000 {
> > +                       reg = <0x0 0x05300000 0x0 0x2000000>;
> > +                       no-map;
> > +               };
> > +       };
> > +
> > +       xtal: xtal-clk {
> > +               compatible = "fixed-clock";
> > +               clock-frequency = <24000000>;
> > +               clock-output-names = "xtal";
> > +               #clock-cells = <0>;
> > +       };
> > +
> > +};
> > +
> > +&uart_A {
> > +       status = "okay";
> > +};
> > diff --git a/arch/arm64/boot/dts/amlogic/amlogic-t7.dtsi b/arch/arm64/boot/dts/amlogic/amlogic-t7.dtsi
> > new file mode 100644
> > index 000000000000..6f3971b4df99
> > --- /dev/null
> > +++ b/arch/arm64/boot/dts/amlogic/amlogic-t7.dtsi
> > @@ -0,0 +1,158 @@
> > +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
> > +/*
> > + * Copyright (c) 2019 Amlogic, Inc. All rights reserved.
> > + */
> > +
> > +#include <dt-bindings/interrupt-controller/arm-gic.h>
> > +
> > +/ {
> > +       interrupt-parent = <&gic>;
> > +       #address-cells = <2>;
> > +       #size-cells = <2>;
> > +
> > +       cpus {
> > +               #address-cells = <0x2>;
> > +               #size-cells = <0x0>;
> > +
> > +               cpu-map {
> > +                       cluster0 {
> > +                               core0 {
> > +                                       cpu = <&cpu100>;
> > +                               };
> > +                               core1 {
> > +                                       cpu = <&cpu101>;
> > +                               };
> > +                               core2 {
> > +                                       cpu = <&cpu102>;
> > +                               };
> > +                               core3 {
> > +                                       cpu = <&cpu103>;
> > +                               };
> > +                       };
> > +
> > +                       cluster1 {
> > +                               core0 {
> > +                                       cpu = <&cpu0>;
> > +                               };
> > +                               core1 {
> > +                                       cpu = <&cpu1>;
> > +                               };
> > +                               core2 {
> > +                                       cpu = <&cpu2>;
> > +                               };
> > +                               core3 {
> > +                                       cpu = <&cpu3>;
> > +                               };
> > +                       };
> > +               };
> > +
> > +               cpu100: cpu@100 {
> > +                       device_type = "cpu";
> > +                       compatible = "arm,cortex-a53";
> > +                       reg = <0x0 0x100>;
> > +                       enable-method = "psci";
> > +               };
> > +
> > +               cpu101: cpu@101{
> > +                       device_type = "cpu";
> > +                       compatible = "arm,cortex-a53";
> > +                       reg = <0x0 0x101>;
> > +                       enable-method = "psci";
> > +               };
> > +
> > +               cpu102: cpu@102 {
> > +                       device_type = "cpu";
> > +                       compatible = "arm,cortex-a53";
> > +                       reg = <0x0 0x102>;
> > +                       enable-method = "psci";
> > +               };
> > +
> > +               cpu103: cpu@103 {
> > +                       device_type = "cpu";
> > +                       compatible = "arm,cortex-a53";
> > +                       reg = <0x0 0x103>;
> > +                       enable-method = "psci";
> > +               };
> > +
> > +               cpu0: cpu@0 {
> > +                       device_type = "cpu";
> > +                       compatible = "arm,cortex-a73";
> > +                       reg = <0x0 0x0>;
> > +                       enable-method = "psci";
> > +               };
> > +
> > +               cpu1: cpu@1 {
> > +                       device_type = "cpu";
> > +                       compatible = "arm,cortex-a73";
> > +                       reg = <0x0 0x1>;
> > +                       enable-method = "psci";
> > +               };
> > +
> > +               cpu2: cpu@2 {
> > +                       device_type = "cpu";
> > +                       compatible = "arm,cortex-a73";
> > +                       reg = <0x0 0x2>;
> > +                       enable-method = "psci";
> > +               };
> > +
> > +               cpu3: cpu@3 {
> > +                       device_type = "cpu";
> > +                       compatible = "arm,cortex-a73";
> > +                       reg = <0x0 0x3>;
> > +                       enable-method = "psci";
> > +               };
> > +       };
> > +
> > +       timer {
> > +               compatible = "arm,armv8-timer";
> > +               interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
> > +                            <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
> > +                            <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
> > +                            <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
> > +       };
> cpu number is 8, not 4, need use GIC_CPU_MASK_SIMPLE(8)
> > +
> > +       psci {
> > +               compatible = "arm,psci-1.0";
> > +               method = "smc";
> > +       };
> > +
> > +       sm: secure-monitor {
> > +               compatible = "amlogic,meson-gxbb-sm";
> > +       };
> > +
> > +       soc {
> > +               compatible = "simple-bus";
> > +               #address-cells = <2>;
> > +               #size-cells = <2>;
> > +               ranges;
> > +
> > +               gic: interrupt-controller@fff01000 {
> > +                       compatible = "arm,gic-400";
> > +                       #interrupt-cells = <3>;
> > +                       #address-cells = <0>;
> > +                       interrupt-controller;
> > +                       reg = <0x0 0xfff01000 0 0x1000>,
> > +                             <0x0 0xfff02000 0 0x0100>;
> > +                       interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
> cpu number is 8, not 4, need use GIC_CPU_MASK_SIMPLE(8)
OK

> > +               };
> > +
> > +               apb4: bus@fe000000 {
> > +                       compatible = "simple-bus";
> > +                       reg = <0x0 0xfe000000 0x0 0x480000>;
> > +                       #address-cells = <2>;
> > +                       #size-cells = <2>;
> > +                       ranges = <0x0 0x0 0x0 0xfe000000 0x0 0x480000>;
> > +
> > +                       uart_A: serial@78000 {
> use lowercase, "uart_a"

OK
> > +                               compatible = "amlogic,t7-uart",
> > +                                            "amlogic,meson-s4-uart";
> > +                               reg = <0x0 0x78000 0x0 0x18>;
> > +                               interrupts = <GIC_SPI 168 IRQ_TYPE_EDGE_RISING>;
> > +                               status = "disabled";
> > +                               clocks = <&xtal>, <&xtal>, <&xtal>
> "xtal" why defined in  amlogic-t7-a311d2-khadas-vim4.dts files

The 24MHz clock is a crystal in VIm4 schematic, so its something the
board did to provide that clock.
Other boards using a311d2 could provide that clock in a different way.
Or are you saying that this clock is mandatory at boot time, and all
boards using this chip will have the same crystal?

> > +                               clock-names = "xtal", "pclk", "baud";
> > +                       };
> > +               };
> > +
> > +       };
> > +};
> > --
> > 2.41.0
> >

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

^ permalink raw reply	[flat|nested] 36+ messages in thread

* Re: [PATCH v6 4/4] arm64: dts: amlogic-t7-a311d2-khadas-vim4: add initial device-tree
@ 2023-06-29  7:10       ` Lucas Tanure
  0 siblings, 0 replies; 36+ messages in thread
From: Lucas Tanure @ 2023-06-29  7:10 UTC (permalink / raw)
  To: Xianwei Zhao
  Cc: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Neil Armstrong,
	Jerome Brunet, Kevin Hilman, Nick, Artem, devicetree,
	linux-kernel, linux-amlogic, linux-arm-kernel

On Tue, Jun 27, 2023 at 10:21 AM Xianwei Zhao <xianwei.zhao@amlogic.com> wrote:
>
>
>
> On 2023/6/27 17:10, Lucas Tanure wrote:
> > [ EXTERNAL EMAIL ]
> >
> > The Khadas VIM4 uses the Amlogic A311D2 SoC, based on the Amlogic T7 SoC
> > family, on a board with the same form factor as the VIM3 models.
> >
> > - 8GB LPDDR4X 2016MHz
> > - 32GB eMMC 5.1 storage
> > - 32MB SPI flash
> > - 10/100/1000 Base-T Ethernet
> > - AP6275S Wireless (802.11 a/b/g/n/ac/ax, BT5.1)
> > - HDMI 2.1 video
> > - HDMI Input
> > - 1x USB 2.0 + 1x USB 3.0 ports
> > - 1x USB-C (power) with USB 2.0 OTG
> > - 3x LED's (1x red, 1x blue, 1x white)
> > - 3x buttons (power, function, reset)
> > - M2 socket with PCIe, USB, ADC & I2C
> > - 40pin GPIO Header
> > - 1x micro SD card slot
> >
> > Signed-off-by: Lucas Tanure <tanure@linux.com>
> > ---
> >   arch/arm64/boot/dts/amlogic/Makefile          |   1 +
> >   .../amlogic/amlogic-t7-a311d2-khadas-vim4.dts |  52 ++++++
> >   arch/arm64/boot/dts/amlogic/amlogic-t7.dtsi   | 158 ++++++++++++++++++
> >   3 files changed, 211 insertions(+)
> >   create mode 100644 arch/arm64/boot/dts/amlogic/amlogic-t7-a311d2-khadas-vim4.dts
> >   create mode 100644 arch/arm64/boot/dts/amlogic/amlogic-t7.dtsi
> >
> > diff --git a/arch/arm64/boot/dts/amlogic/Makefile b/arch/arm64/boot/dts/amlogic/Makefile
> > index cd1c5b04890a..166fec1e4229 100644
> > --- a/arch/arm64/boot/dts/amlogic/Makefile
> > +++ b/arch/arm64/boot/dts/amlogic/Makefile
> > @@ -1,4 +1,5 @@
> >   # SPDX-License-Identifier: GPL-2.0
> > +dtb-$(CONFIG_ARCH_MESON) += amlogic-t7-a311d2-khadas-vim4.dtb
> >   dtb-$(CONFIG_ARCH_MESON) += meson-a1-ad401.dtb
> >   dtb-$(CONFIG_ARCH_MESON) += meson-axg-jethome-jethub-j100.dtb
> >   dtb-$(CONFIG_ARCH_MESON) += meson-axg-jethome-jethub-j110-rev-2.dtb
> > diff --git a/arch/arm64/boot/dts/amlogic/amlogic-t7-a311d2-khadas-vim4.dts b/arch/arm64/boot/dts/amlogic/amlogic-t7-a311d2-khadas-vim4.dts
> > new file mode 100644
> > index 000000000000..5d7fb86a9738
> > --- /dev/null
> > +++ b/arch/arm64/boot/dts/amlogic/amlogic-t7-a311d2-khadas-vim4.dts
> > @@ -0,0 +1,52 @@
> > +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
> > +/*
> > + * Copyright (c) 2022 Wesion, Inc. All rights reserved.
> > + */
> > +
> > +/dts-v1/;
> > +
> > +#include "amlogic-t7.dtsi"
> > +
> > +/ {
> > +       model = "Khadas vim4";
> > +       compatible = "khadas,vim4", "amlogic,a311d2", "amlogic,t7";
> > +
> > +       aliases {
> > +               serial0 = &uart_A;
> > +       };
> > +
> > +       memory@0 {
> > +               device_type = "memory";
> > +               reg = <0x0 0x0 0x2 0x0>; /* 8 GB */
> > +       };
> > +
> > +       reserved-memory {
> > +               #address-cells = <2>;
> > +               #size-cells = <2>;
> > +               ranges;
> > +
> > +               /* 3 MiB reserved for ARM Trusted Firmware (BL31) */
> > +               secmon_reserved: secmon@5000000 {
> > +                       reg = <0x0 0x05000000 0x0 0x300000>;
> > +                       no-map;
> > +               };
> > +
> > +               /* 32 MiB reserved for ARM Trusted Firmware (BL32) */
> > +               secmon_reserved_bl32: secmon@5300000 {
> > +                       reg = <0x0 0x05300000 0x0 0x2000000>;
> > +                       no-map;
> > +               };
> > +       };
> > +
> > +       xtal: xtal-clk {
> > +               compatible = "fixed-clock";
> > +               clock-frequency = <24000000>;
> > +               clock-output-names = "xtal";
> > +               #clock-cells = <0>;
> > +       };
> > +
> > +};
> > +
> > +&uart_A {
> > +       status = "okay";
> > +};
> > diff --git a/arch/arm64/boot/dts/amlogic/amlogic-t7.dtsi b/arch/arm64/boot/dts/amlogic/amlogic-t7.dtsi
> > new file mode 100644
> > index 000000000000..6f3971b4df99
> > --- /dev/null
> > +++ b/arch/arm64/boot/dts/amlogic/amlogic-t7.dtsi
> > @@ -0,0 +1,158 @@
> > +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
> > +/*
> > + * Copyright (c) 2019 Amlogic, Inc. All rights reserved.
> > + */
> > +
> > +#include <dt-bindings/interrupt-controller/arm-gic.h>
> > +
> > +/ {
> > +       interrupt-parent = <&gic>;
> > +       #address-cells = <2>;
> > +       #size-cells = <2>;
> > +
> > +       cpus {
> > +               #address-cells = <0x2>;
> > +               #size-cells = <0x0>;
> > +
> > +               cpu-map {
> > +                       cluster0 {
> > +                               core0 {
> > +                                       cpu = <&cpu100>;
> > +                               };
> > +                               core1 {
> > +                                       cpu = <&cpu101>;
> > +                               };
> > +                               core2 {
> > +                                       cpu = <&cpu102>;
> > +                               };
> > +                               core3 {
> > +                                       cpu = <&cpu103>;
> > +                               };
> > +                       };
> > +
> > +                       cluster1 {
> > +                               core0 {
> > +                                       cpu = <&cpu0>;
> > +                               };
> > +                               core1 {
> > +                                       cpu = <&cpu1>;
> > +                               };
> > +                               core2 {
> > +                                       cpu = <&cpu2>;
> > +                               };
> > +                               core3 {
> > +                                       cpu = <&cpu3>;
> > +                               };
> > +                       };
> > +               };
> > +
> > +               cpu100: cpu@100 {
> > +                       device_type = "cpu";
> > +                       compatible = "arm,cortex-a53";
> > +                       reg = <0x0 0x100>;
> > +                       enable-method = "psci";
> > +               };
> > +
> > +               cpu101: cpu@101{
> > +                       device_type = "cpu";
> > +                       compatible = "arm,cortex-a53";
> > +                       reg = <0x0 0x101>;
> > +                       enable-method = "psci";
> > +               };
> > +
> > +               cpu102: cpu@102 {
> > +                       device_type = "cpu";
> > +                       compatible = "arm,cortex-a53";
> > +                       reg = <0x0 0x102>;
> > +                       enable-method = "psci";
> > +               };
> > +
> > +               cpu103: cpu@103 {
> > +                       device_type = "cpu";
> > +                       compatible = "arm,cortex-a53";
> > +                       reg = <0x0 0x103>;
> > +                       enable-method = "psci";
> > +               };
> > +
> > +               cpu0: cpu@0 {
> > +                       device_type = "cpu";
> > +                       compatible = "arm,cortex-a73";
> > +                       reg = <0x0 0x0>;
> > +                       enable-method = "psci";
> > +               };
> > +
> > +               cpu1: cpu@1 {
> > +                       device_type = "cpu";
> > +                       compatible = "arm,cortex-a73";
> > +                       reg = <0x0 0x1>;
> > +                       enable-method = "psci";
> > +               };
> > +
> > +               cpu2: cpu@2 {
> > +                       device_type = "cpu";
> > +                       compatible = "arm,cortex-a73";
> > +                       reg = <0x0 0x2>;
> > +                       enable-method = "psci";
> > +               };
> > +
> > +               cpu3: cpu@3 {
> > +                       device_type = "cpu";
> > +                       compatible = "arm,cortex-a73";
> > +                       reg = <0x0 0x3>;
> > +                       enable-method = "psci";
> > +               };
> > +       };
> > +
> > +       timer {
> > +               compatible = "arm,armv8-timer";
> > +               interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
> > +                            <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
> > +                            <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
> > +                            <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
> > +       };
> cpu number is 8, not 4, need use GIC_CPU_MASK_SIMPLE(8)
> > +
> > +       psci {
> > +               compatible = "arm,psci-1.0";
> > +               method = "smc";
> > +       };
> > +
> > +       sm: secure-monitor {
> > +               compatible = "amlogic,meson-gxbb-sm";
> > +       };
> > +
> > +       soc {
> > +               compatible = "simple-bus";
> > +               #address-cells = <2>;
> > +               #size-cells = <2>;
> > +               ranges;
> > +
> > +               gic: interrupt-controller@fff01000 {
> > +                       compatible = "arm,gic-400";
> > +                       #interrupt-cells = <3>;
> > +                       #address-cells = <0>;
> > +                       interrupt-controller;
> > +                       reg = <0x0 0xfff01000 0 0x1000>,
> > +                             <0x0 0xfff02000 0 0x0100>;
> > +                       interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
> cpu number is 8, not 4, need use GIC_CPU_MASK_SIMPLE(8)
OK

> > +               };
> > +
> > +               apb4: bus@fe000000 {
> > +                       compatible = "simple-bus";
> > +                       reg = <0x0 0xfe000000 0x0 0x480000>;
> > +                       #address-cells = <2>;
> > +                       #size-cells = <2>;
> > +                       ranges = <0x0 0x0 0x0 0xfe000000 0x0 0x480000>;
> > +
> > +                       uart_A: serial@78000 {
> use lowercase, "uart_a"

OK
> > +                               compatible = "amlogic,t7-uart",
> > +                                            "amlogic,meson-s4-uart";
> > +                               reg = <0x0 0x78000 0x0 0x18>;
> > +                               interrupts = <GIC_SPI 168 IRQ_TYPE_EDGE_RISING>;
> > +                               status = "disabled";
> > +                               clocks = <&xtal>, <&xtal>, <&xtal>
> "xtal" why defined in  amlogic-t7-a311d2-khadas-vim4.dts files

The 24MHz clock is a crystal in VIm4 schematic, so its something the
board did to provide that clock.
Other boards using a311d2 could provide that clock in a different way.
Or are you saying that this clock is mandatory at boot time, and all
boards using this chip will have the same crystal?

> > +                               clock-names = "xtal", "pclk", "baud";
> > +                       };
> > +               };
> > +
> > +       };
> > +};
> > --
> > 2.41.0
> >

_______________________________________________
linux-amlogic mailing list
linux-amlogic@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-amlogic

^ permalink raw reply	[flat|nested] 36+ messages in thread

* Re: [PATCH v6 4/4] arm64: dts: amlogic-t7-a311d2-khadas-vim4: add initial device-tree
  2023-06-29  7:10       ` Lucas Tanure
  (?)
@ 2023-06-29  7:36         ` Xianwei Zhao
  -1 siblings, 0 replies; 36+ messages in thread
From: Xianwei Zhao @ 2023-06-29  7:36 UTC (permalink / raw)
  To: tanure
  Cc: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Neil Armstrong,
	Jerome Brunet, Kevin Hilman, Nick, Artem, devicetree,
	linux-kernel, linux-amlogic, linux-arm-kernel



On 2023/6/29 15:10, Lucas Tanure wrote:
> [ EXTERNAL EMAIL ]
> 
> On Tue, Jun 27, 2023 at 10:21 AM Xianwei Zhao <xianwei.zhao@amlogic.com> wrote:
>>
>>
>>
>> On 2023/6/27 17:10, Lucas Tanure wrote:
>>> [ EXTERNAL EMAIL ]
>>>
>>> The Khadas VIM4 uses the Amlogic A311D2 SoC, based on the Amlogic T7 SoC
>>> family, on a board with the same form factor as the VIM3 models.
>>>
>>> - 8GB LPDDR4X 2016MHz
>>> - 32GB eMMC 5.1 storage
>>> - 32MB SPI flash
>>> - 10/100/1000 Base-T Ethernet
>>> - AP6275S Wireless (802.11 a/b/g/n/ac/ax, BT5.1)
>>> - HDMI 2.1 video
>>> - HDMI Input
>>> - 1x USB 2.0 + 1x USB 3.0 ports
>>> - 1x USB-C (power) with USB 2.0 OTG
>>> - 3x LED's (1x red, 1x blue, 1x white)
>>> - 3x buttons (power, function, reset)
>>> - M2 socket with PCIe, USB, ADC & I2C
>>> - 40pin GPIO Header
>>> - 1x micro SD card slot
>>>
>>> Signed-off-by: Lucas Tanure <tanure@linux.com>
>>> ---
>>>    arch/arm64/boot/dts/amlogic/Makefile          |   1 +
>>>    .../amlogic/amlogic-t7-a311d2-khadas-vim4.dts |  52 ++++++
>>>    arch/arm64/boot/dts/amlogic/amlogic-t7.dtsi   | 158 ++++++++++++++++++
>>>    3 files changed, 211 insertions(+)
>>>    create mode 100644 arch/arm64/boot/dts/amlogic/amlogic-t7-a311d2-khadas-vim4.dts
>>>    create mode 100644 arch/arm64/boot/dts/amlogic/amlogic-t7.dtsi
>>>
>>> diff --git a/arch/arm64/boot/dts/amlogic/Makefile b/arch/arm64/boot/dts/amlogic/Makefile
>>> index cd1c5b04890a..166fec1e4229 100644
>>> --- a/arch/arm64/boot/dts/amlogic/Makefile
>>> +++ b/arch/arm64/boot/dts/amlogic/Makefile
>>> @@ -1,4 +1,5 @@
>>>    # SPDX-License-Identifier: GPL-2.0
>>> +dtb-$(CONFIG_ARCH_MESON) += amlogic-t7-a311d2-khadas-vim4.dtb
>>>    dtb-$(CONFIG_ARCH_MESON) += meson-a1-ad401.dtb
>>>    dtb-$(CONFIG_ARCH_MESON) += meson-axg-jethome-jethub-j100.dtb
>>>    dtb-$(CONFIG_ARCH_MESON) += meson-axg-jethome-jethub-j110-rev-2.dtb
>>> diff --git a/arch/arm64/boot/dts/amlogic/amlogic-t7-a311d2-khadas-vim4.dts b/arch/arm64/boot/dts/amlogic/amlogic-t7-a311d2-khadas-vim4.dts
>>> new file mode 100644
>>> index 000000000000..5d7fb86a9738
>>> --- /dev/null
>>> +++ b/arch/arm64/boot/dts/amlogic/amlogic-t7-a311d2-khadas-vim4.dts
>>> @@ -0,0 +1,52 @@
>>> +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
>>> +/*
>>> + * Copyright (c) 2022 Wesion, Inc. All rights reserved.
>>> + */
>>> +
>>> +/dts-v1/;
>>> +
>>> +#include "amlogic-t7.dtsi"
>>> +
>>> +/ {
>>> +       model = "Khadas vim4";
>>> +       compatible = "khadas,vim4", "amlogic,a311d2", "amlogic,t7";
>>> +
>>> +       aliases {
>>> +               serial0 = &uart_A;
>>> +       };
>>> +
>>> +       memory@0 {
>>> +               device_type = "memory";
>>> +               reg = <0x0 0x0 0x2 0x0>; /* 8 GB */
>>> +       };
>>> +
>>> +       reserved-memory {
>>> +               #address-cells = <2>;
>>> +               #size-cells = <2>;
>>> +               ranges;
>>> +
>>> +               /* 3 MiB reserved for ARM Trusted Firmware (BL31) */
>>> +               secmon_reserved: secmon@5000000 {
>>> +                       reg = <0x0 0x05000000 0x0 0x300000>;
>>> +                       no-map;
>>> +               };
>>> +
>>> +               /* 32 MiB reserved for ARM Trusted Firmware (BL32) */
>>> +               secmon_reserved_bl32: secmon@5300000 {
>>> +                       reg = <0x0 0x05300000 0x0 0x2000000>;
>>> +                       no-map;
>>> +               };
>>> +       };
>>> +
>>> +       xtal: xtal-clk {
>>> +               compatible = "fixed-clock";
>>> +               clock-frequency = <24000000>;
>>> +               clock-output-names = "xtal";
>>> +               #clock-cells = <0>;
>>> +       };
>>> +
>>> +};
>>> +
>>> +&uart_A {
>>> +       status = "okay";
>>> +};
>>> diff --git a/arch/arm64/boot/dts/amlogic/amlogic-t7.dtsi b/arch/arm64/boot/dts/amlogic/amlogic-t7.dtsi
>>> new file mode 100644
>>> index 000000000000..6f3971b4df99
>>> --- /dev/null
>>> +++ b/arch/arm64/boot/dts/amlogic/amlogic-t7.dtsi
>>> @@ -0,0 +1,158 @@
>>> +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
>>> +/*
>>> + * Copyright (c) 2019 Amlogic, Inc. All rights reserved.
>>> + */
>>> +
>>> +#include <dt-bindings/interrupt-controller/arm-gic.h>
>>> +
>>> +/ {
>>> +       interrupt-parent = <&gic>;
>>> +       #address-cells = <2>;
>>> +       #size-cells = <2>;
>>> +
>>> +       cpus {
>>> +               #address-cells = <0x2>;
>>> +               #size-cells = <0x0>;
>>> +
>>> +               cpu-map {
>>> +                       cluster0 {
>>> +                               core0 {
>>> +                                       cpu = <&cpu100>;
>>> +                               };
>>> +                               core1 {
>>> +                                       cpu = <&cpu101>;
>>> +                               };
>>> +                               core2 {
>>> +                                       cpu = <&cpu102>;
>>> +                               };
>>> +                               core3 {
>>> +                                       cpu = <&cpu103>;
>>> +                               };
>>> +                       };
>>> +
>>> +                       cluster1 {
>>> +                               core0 {
>>> +                                       cpu = <&cpu0>;
>>> +                               };
>>> +                               core1 {
>>> +                                       cpu = <&cpu1>;
>>> +                               };
>>> +                               core2 {
>>> +                                       cpu = <&cpu2>;
>>> +                               };
>>> +                               core3 {
>>> +                                       cpu = <&cpu3>;
>>> +                               };
>>> +                       };
>>> +               };
>>> +
>>> +               cpu100: cpu@100 {
>>> +                       device_type = "cpu";
>>> +                       compatible = "arm,cortex-a53";
>>> +                       reg = <0x0 0x100>;
>>> +                       enable-method = "psci";
>>> +               };
>>> +
>>> +               cpu101: cpu@101{
>>> +                       device_type = "cpu";
>>> +                       compatible = "arm,cortex-a53";
>>> +                       reg = <0x0 0x101>;
>>> +                       enable-method = "psci";
>>> +               };
>>> +
>>> +               cpu102: cpu@102 {
>>> +                       device_type = "cpu";
>>> +                       compatible = "arm,cortex-a53";
>>> +                       reg = <0x0 0x102>;
>>> +                       enable-method = "psci";
>>> +               };
>>> +
>>> +               cpu103: cpu@103 {
>>> +                       device_type = "cpu";
>>> +                       compatible = "arm,cortex-a53";
>>> +                       reg = <0x0 0x103>;
>>> +                       enable-method = "psci";
>>> +               };
>>> +
>>> +               cpu0: cpu@0 {
>>> +                       device_type = "cpu";
>>> +                       compatible = "arm,cortex-a73";
>>> +                       reg = <0x0 0x0>;
>>> +                       enable-method = "psci";
>>> +               };
>>> +
>>> +               cpu1: cpu@1 {
>>> +                       device_type = "cpu";
>>> +                       compatible = "arm,cortex-a73";
>>> +                       reg = <0x0 0x1>;
>>> +                       enable-method = "psci";
>>> +               };
>>> +
>>> +               cpu2: cpu@2 {
>>> +                       device_type = "cpu";
>>> +                       compatible = "arm,cortex-a73";
>>> +                       reg = <0x0 0x2>;
>>> +                       enable-method = "psci";
>>> +               };
>>> +
>>> +               cpu3: cpu@3 {
>>> +                       device_type = "cpu";
>>> +                       compatible = "arm,cortex-a73";
>>> +                       reg = <0x0 0x3>;
>>> +                       enable-method = "psci";
>>> +               };
>>> +       };
>>> +
>>> +       timer {
>>> +               compatible = "arm,armv8-timer";
>>> +               interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
>>> +                            <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
>>> +                            <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
>>> +                            <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
>>> +       };
>> cpu number is 8, not 4, need use GIC_CPU_MASK_SIMPLE(8)
>>> +
>>> +       psci {
>>> +               compatible = "arm,psci-1.0";
>>> +               method = "smc";
>>> +       };
>>> +
>>> +       sm: secure-monitor {
>>> +               compatible = "amlogic,meson-gxbb-sm";
>>> +       };
>>> +
>>> +       soc {
>>> +               compatible = "simple-bus";
>>> +               #address-cells = <2>;
>>> +               #size-cells = <2>;
>>> +               ranges;
>>> +
>>> +               gic: interrupt-controller@fff01000 {
>>> +                       compatible = "arm,gic-400";
>>> +                       #interrupt-cells = <3>;
>>> +                       #address-cells = <0>;
>>> +                       interrupt-controller;
>>> +                       reg = <0x0 0xfff01000 0 0x1000>,
>>> +                             <0x0 0xfff02000 0 0x0100>;
>>> +                       interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
>> cpu number is 8, not 4, need use GIC_CPU_MASK_SIMPLE(8)
> OK
> 
>>> +               };
>>> +
>>> +               apb4: bus@fe000000 {
>>> +                       compatible = "simple-bus";
>>> +                       reg = <0x0 0xfe000000 0x0 0x480000>;
>>> +                       #address-cells = <2>;
>>> +                       #size-cells = <2>;
>>> +                       ranges = <0x0 0x0 0x0 0xfe000000 0x0 0x480000>;
>>> +
>>> +                       uart_A: serial@78000 {
>> use lowercase, "uart_a"
> 
> OK
>>> +                               compatible = "amlogic,t7-uart",
>>> +                                            "amlogic,meson-s4-uart";
>>> +                               reg = <0x0 0x78000 0x0 0x18>;
>>> +                               interrupts = <GIC_SPI 168 IRQ_TYPE_EDGE_RISING>;
>>> +                               status = "disabled";
>>> +                               clocks = <&xtal>, <&xtal>, <&xtal>
>> "xtal" why defined in  amlogic-t7-a311d2-khadas-vim4.dts files
> 
> The 24MHz clock is a crystal in VIm4 schematic, so its something the
> board did to provide that clock.
> Other boards using a311d2 could provide that clock in a different way.
> Or are you saying that this clock is mandatory at boot time, and all
> boards using this chip will have the same crystal?The board must use crystal, different boards maybe use different 
frequency. DTSI file be included by other DTS or DTSI files.
It is strange that DTSI file reference DTS file's  property .
The property "xtal" can  be defined in DTSI file, DTS file can Change 
the "frequency" if necessary, like other property.
> 
>>> +                               clock-names = "xtal", "pclk", "baud";
>>> +                       };
>>> +               };
>>> +
>>> +       };
>>> +};
>>> --
>>> 2.41.0
>>>

_______________________________________________
linux-amlogic mailing list
linux-amlogic@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-amlogic

^ permalink raw reply	[flat|nested] 36+ messages in thread

* Re: [PATCH v6 4/4] arm64: dts: amlogic-t7-a311d2-khadas-vim4: add initial device-tree
@ 2023-06-29  7:36         ` Xianwei Zhao
  0 siblings, 0 replies; 36+ messages in thread
From: Xianwei Zhao @ 2023-06-29  7:36 UTC (permalink / raw)
  To: tanure
  Cc: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Neil Armstrong,
	Jerome Brunet, Kevin Hilman, Nick, Artem, devicetree,
	linux-kernel, linux-amlogic, linux-arm-kernel



On 2023/6/29 15:10, Lucas Tanure wrote:
> [ EXTERNAL EMAIL ]
> 
> On Tue, Jun 27, 2023 at 10:21 AM Xianwei Zhao <xianwei.zhao@amlogic.com> wrote:
>>
>>
>>
>> On 2023/6/27 17:10, Lucas Tanure wrote:
>>> [ EXTERNAL EMAIL ]
>>>
>>> The Khadas VIM4 uses the Amlogic A311D2 SoC, based on the Amlogic T7 SoC
>>> family, on a board with the same form factor as the VIM3 models.
>>>
>>> - 8GB LPDDR4X 2016MHz
>>> - 32GB eMMC 5.1 storage
>>> - 32MB SPI flash
>>> - 10/100/1000 Base-T Ethernet
>>> - AP6275S Wireless (802.11 a/b/g/n/ac/ax, BT5.1)
>>> - HDMI 2.1 video
>>> - HDMI Input
>>> - 1x USB 2.0 + 1x USB 3.0 ports
>>> - 1x USB-C (power) with USB 2.0 OTG
>>> - 3x LED's (1x red, 1x blue, 1x white)
>>> - 3x buttons (power, function, reset)
>>> - M2 socket with PCIe, USB, ADC & I2C
>>> - 40pin GPIO Header
>>> - 1x micro SD card slot
>>>
>>> Signed-off-by: Lucas Tanure <tanure@linux.com>
>>> ---
>>>    arch/arm64/boot/dts/amlogic/Makefile          |   1 +
>>>    .../amlogic/amlogic-t7-a311d2-khadas-vim4.dts |  52 ++++++
>>>    arch/arm64/boot/dts/amlogic/amlogic-t7.dtsi   | 158 ++++++++++++++++++
>>>    3 files changed, 211 insertions(+)
>>>    create mode 100644 arch/arm64/boot/dts/amlogic/amlogic-t7-a311d2-khadas-vim4.dts
>>>    create mode 100644 arch/arm64/boot/dts/amlogic/amlogic-t7.dtsi
>>>
>>> diff --git a/arch/arm64/boot/dts/amlogic/Makefile b/arch/arm64/boot/dts/amlogic/Makefile
>>> index cd1c5b04890a..166fec1e4229 100644
>>> --- a/arch/arm64/boot/dts/amlogic/Makefile
>>> +++ b/arch/arm64/boot/dts/amlogic/Makefile
>>> @@ -1,4 +1,5 @@
>>>    # SPDX-License-Identifier: GPL-2.0
>>> +dtb-$(CONFIG_ARCH_MESON) += amlogic-t7-a311d2-khadas-vim4.dtb
>>>    dtb-$(CONFIG_ARCH_MESON) += meson-a1-ad401.dtb
>>>    dtb-$(CONFIG_ARCH_MESON) += meson-axg-jethome-jethub-j100.dtb
>>>    dtb-$(CONFIG_ARCH_MESON) += meson-axg-jethome-jethub-j110-rev-2.dtb
>>> diff --git a/arch/arm64/boot/dts/amlogic/amlogic-t7-a311d2-khadas-vim4.dts b/arch/arm64/boot/dts/amlogic/amlogic-t7-a311d2-khadas-vim4.dts
>>> new file mode 100644
>>> index 000000000000..5d7fb86a9738
>>> --- /dev/null
>>> +++ b/arch/arm64/boot/dts/amlogic/amlogic-t7-a311d2-khadas-vim4.dts
>>> @@ -0,0 +1,52 @@
>>> +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
>>> +/*
>>> + * Copyright (c) 2022 Wesion, Inc. All rights reserved.
>>> + */
>>> +
>>> +/dts-v1/;
>>> +
>>> +#include "amlogic-t7.dtsi"
>>> +
>>> +/ {
>>> +       model = "Khadas vim4";
>>> +       compatible = "khadas,vim4", "amlogic,a311d2", "amlogic,t7";
>>> +
>>> +       aliases {
>>> +               serial0 = &uart_A;
>>> +       };
>>> +
>>> +       memory@0 {
>>> +               device_type = "memory";
>>> +               reg = <0x0 0x0 0x2 0x0>; /* 8 GB */
>>> +       };
>>> +
>>> +       reserved-memory {
>>> +               #address-cells = <2>;
>>> +               #size-cells = <2>;
>>> +               ranges;
>>> +
>>> +               /* 3 MiB reserved for ARM Trusted Firmware (BL31) */
>>> +               secmon_reserved: secmon@5000000 {
>>> +                       reg = <0x0 0x05000000 0x0 0x300000>;
>>> +                       no-map;
>>> +               };
>>> +
>>> +               /* 32 MiB reserved for ARM Trusted Firmware (BL32) */
>>> +               secmon_reserved_bl32: secmon@5300000 {
>>> +                       reg = <0x0 0x05300000 0x0 0x2000000>;
>>> +                       no-map;
>>> +               };
>>> +       };
>>> +
>>> +       xtal: xtal-clk {
>>> +               compatible = "fixed-clock";
>>> +               clock-frequency = <24000000>;
>>> +               clock-output-names = "xtal";
>>> +               #clock-cells = <0>;
>>> +       };
>>> +
>>> +};
>>> +
>>> +&uart_A {
>>> +       status = "okay";
>>> +};
>>> diff --git a/arch/arm64/boot/dts/amlogic/amlogic-t7.dtsi b/arch/arm64/boot/dts/amlogic/amlogic-t7.dtsi
>>> new file mode 100644
>>> index 000000000000..6f3971b4df99
>>> --- /dev/null
>>> +++ b/arch/arm64/boot/dts/amlogic/amlogic-t7.dtsi
>>> @@ -0,0 +1,158 @@
>>> +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
>>> +/*
>>> + * Copyright (c) 2019 Amlogic, Inc. All rights reserved.
>>> + */
>>> +
>>> +#include <dt-bindings/interrupt-controller/arm-gic.h>
>>> +
>>> +/ {
>>> +       interrupt-parent = <&gic>;
>>> +       #address-cells = <2>;
>>> +       #size-cells = <2>;
>>> +
>>> +       cpus {
>>> +               #address-cells = <0x2>;
>>> +               #size-cells = <0x0>;
>>> +
>>> +               cpu-map {
>>> +                       cluster0 {
>>> +                               core0 {
>>> +                                       cpu = <&cpu100>;
>>> +                               };
>>> +                               core1 {
>>> +                                       cpu = <&cpu101>;
>>> +                               };
>>> +                               core2 {
>>> +                                       cpu = <&cpu102>;
>>> +                               };
>>> +                               core3 {
>>> +                                       cpu = <&cpu103>;
>>> +                               };
>>> +                       };
>>> +
>>> +                       cluster1 {
>>> +                               core0 {
>>> +                                       cpu = <&cpu0>;
>>> +                               };
>>> +                               core1 {
>>> +                                       cpu = <&cpu1>;
>>> +                               };
>>> +                               core2 {
>>> +                                       cpu = <&cpu2>;
>>> +                               };
>>> +                               core3 {
>>> +                                       cpu = <&cpu3>;
>>> +                               };
>>> +                       };
>>> +               };
>>> +
>>> +               cpu100: cpu@100 {
>>> +                       device_type = "cpu";
>>> +                       compatible = "arm,cortex-a53";
>>> +                       reg = <0x0 0x100>;
>>> +                       enable-method = "psci";
>>> +               };
>>> +
>>> +               cpu101: cpu@101{
>>> +                       device_type = "cpu";
>>> +                       compatible = "arm,cortex-a53";
>>> +                       reg = <0x0 0x101>;
>>> +                       enable-method = "psci";
>>> +               };
>>> +
>>> +               cpu102: cpu@102 {
>>> +                       device_type = "cpu";
>>> +                       compatible = "arm,cortex-a53";
>>> +                       reg = <0x0 0x102>;
>>> +                       enable-method = "psci";
>>> +               };
>>> +
>>> +               cpu103: cpu@103 {
>>> +                       device_type = "cpu";
>>> +                       compatible = "arm,cortex-a53";
>>> +                       reg = <0x0 0x103>;
>>> +                       enable-method = "psci";
>>> +               };
>>> +
>>> +               cpu0: cpu@0 {
>>> +                       device_type = "cpu";
>>> +                       compatible = "arm,cortex-a73";
>>> +                       reg = <0x0 0x0>;
>>> +                       enable-method = "psci";
>>> +               };
>>> +
>>> +               cpu1: cpu@1 {
>>> +                       device_type = "cpu";
>>> +                       compatible = "arm,cortex-a73";
>>> +                       reg = <0x0 0x1>;
>>> +                       enable-method = "psci";
>>> +               };
>>> +
>>> +               cpu2: cpu@2 {
>>> +                       device_type = "cpu";
>>> +                       compatible = "arm,cortex-a73";
>>> +                       reg = <0x0 0x2>;
>>> +                       enable-method = "psci";
>>> +               };
>>> +
>>> +               cpu3: cpu@3 {
>>> +                       device_type = "cpu";
>>> +                       compatible = "arm,cortex-a73";
>>> +                       reg = <0x0 0x3>;
>>> +                       enable-method = "psci";
>>> +               };
>>> +       };
>>> +
>>> +       timer {
>>> +               compatible = "arm,armv8-timer";
>>> +               interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
>>> +                            <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
>>> +                            <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
>>> +                            <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
>>> +       };
>> cpu number is 8, not 4, need use GIC_CPU_MASK_SIMPLE(8)
>>> +
>>> +       psci {
>>> +               compatible = "arm,psci-1.0";
>>> +               method = "smc";
>>> +       };
>>> +
>>> +       sm: secure-monitor {
>>> +               compatible = "amlogic,meson-gxbb-sm";
>>> +       };
>>> +
>>> +       soc {
>>> +               compatible = "simple-bus";
>>> +               #address-cells = <2>;
>>> +               #size-cells = <2>;
>>> +               ranges;
>>> +
>>> +               gic: interrupt-controller@fff01000 {
>>> +                       compatible = "arm,gic-400";
>>> +                       #interrupt-cells = <3>;
>>> +                       #address-cells = <0>;
>>> +                       interrupt-controller;
>>> +                       reg = <0x0 0xfff01000 0 0x1000>,
>>> +                             <0x0 0xfff02000 0 0x0100>;
>>> +                       interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
>> cpu number is 8, not 4, need use GIC_CPU_MASK_SIMPLE(8)
> OK
> 
>>> +               };
>>> +
>>> +               apb4: bus@fe000000 {
>>> +                       compatible = "simple-bus";
>>> +                       reg = <0x0 0xfe000000 0x0 0x480000>;
>>> +                       #address-cells = <2>;
>>> +                       #size-cells = <2>;
>>> +                       ranges = <0x0 0x0 0x0 0xfe000000 0x0 0x480000>;
>>> +
>>> +                       uart_A: serial@78000 {
>> use lowercase, "uart_a"
> 
> OK
>>> +                               compatible = "amlogic,t7-uart",
>>> +                                            "amlogic,meson-s4-uart";
>>> +                               reg = <0x0 0x78000 0x0 0x18>;
>>> +                               interrupts = <GIC_SPI 168 IRQ_TYPE_EDGE_RISING>;
>>> +                               status = "disabled";
>>> +                               clocks = <&xtal>, <&xtal>, <&xtal>
>> "xtal" why defined in  amlogic-t7-a311d2-khadas-vim4.dts files
> 
> The 24MHz clock is a crystal in VIm4 schematic, so its something the
> board did to provide that clock.
> Other boards using a311d2 could provide that clock in a different way.
> Or are you saying that this clock is mandatory at boot time, and all
> boards using this chip will have the same crystal?The board must use crystal, different boards maybe use different 
frequency. DTSI file be included by other DTS or DTSI files.
It is strange that DTSI file reference DTS file's  property .
The property "xtal" can  be defined in DTSI file, DTS file can Change 
the "frequency" if necessary, like other property.
> 
>>> +                               clock-names = "xtal", "pclk", "baud";
>>> +                       };
>>> +               };
>>> +
>>> +       };
>>> +};
>>> --
>>> 2.41.0
>>>

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

^ permalink raw reply	[flat|nested] 36+ messages in thread

* Re: [PATCH v6 4/4] arm64: dts: amlogic-t7-a311d2-khadas-vim4: add initial device-tree
@ 2023-06-29  7:36         ` Xianwei Zhao
  0 siblings, 0 replies; 36+ messages in thread
From: Xianwei Zhao @ 2023-06-29  7:36 UTC (permalink / raw)
  To: tanure
  Cc: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Neil Armstrong,
	Jerome Brunet, Kevin Hilman, Nick, Artem, devicetree,
	linux-kernel, linux-amlogic, linux-arm-kernel



On 2023/6/29 15:10, Lucas Tanure wrote:
> [ EXTERNAL EMAIL ]
> 
> On Tue, Jun 27, 2023 at 10:21 AM Xianwei Zhao <xianwei.zhao@amlogic.com> wrote:
>>
>>
>>
>> On 2023/6/27 17:10, Lucas Tanure wrote:
>>> [ EXTERNAL EMAIL ]
>>>
>>> The Khadas VIM4 uses the Amlogic A311D2 SoC, based on the Amlogic T7 SoC
>>> family, on a board with the same form factor as the VIM3 models.
>>>
>>> - 8GB LPDDR4X 2016MHz
>>> - 32GB eMMC 5.1 storage
>>> - 32MB SPI flash
>>> - 10/100/1000 Base-T Ethernet
>>> - AP6275S Wireless (802.11 a/b/g/n/ac/ax, BT5.1)
>>> - HDMI 2.1 video
>>> - HDMI Input
>>> - 1x USB 2.0 + 1x USB 3.0 ports
>>> - 1x USB-C (power) with USB 2.0 OTG
>>> - 3x LED's (1x red, 1x blue, 1x white)
>>> - 3x buttons (power, function, reset)
>>> - M2 socket with PCIe, USB, ADC & I2C
>>> - 40pin GPIO Header
>>> - 1x micro SD card slot
>>>
>>> Signed-off-by: Lucas Tanure <tanure@linux.com>
>>> ---
>>>    arch/arm64/boot/dts/amlogic/Makefile          |   1 +
>>>    .../amlogic/amlogic-t7-a311d2-khadas-vim4.dts |  52 ++++++
>>>    arch/arm64/boot/dts/amlogic/amlogic-t7.dtsi   | 158 ++++++++++++++++++
>>>    3 files changed, 211 insertions(+)
>>>    create mode 100644 arch/arm64/boot/dts/amlogic/amlogic-t7-a311d2-khadas-vim4.dts
>>>    create mode 100644 arch/arm64/boot/dts/amlogic/amlogic-t7.dtsi
>>>
>>> diff --git a/arch/arm64/boot/dts/amlogic/Makefile b/arch/arm64/boot/dts/amlogic/Makefile
>>> index cd1c5b04890a..166fec1e4229 100644
>>> --- a/arch/arm64/boot/dts/amlogic/Makefile
>>> +++ b/arch/arm64/boot/dts/amlogic/Makefile
>>> @@ -1,4 +1,5 @@
>>>    # SPDX-License-Identifier: GPL-2.0
>>> +dtb-$(CONFIG_ARCH_MESON) += amlogic-t7-a311d2-khadas-vim4.dtb
>>>    dtb-$(CONFIG_ARCH_MESON) += meson-a1-ad401.dtb
>>>    dtb-$(CONFIG_ARCH_MESON) += meson-axg-jethome-jethub-j100.dtb
>>>    dtb-$(CONFIG_ARCH_MESON) += meson-axg-jethome-jethub-j110-rev-2.dtb
>>> diff --git a/arch/arm64/boot/dts/amlogic/amlogic-t7-a311d2-khadas-vim4.dts b/arch/arm64/boot/dts/amlogic/amlogic-t7-a311d2-khadas-vim4.dts
>>> new file mode 100644
>>> index 000000000000..5d7fb86a9738
>>> --- /dev/null
>>> +++ b/arch/arm64/boot/dts/amlogic/amlogic-t7-a311d2-khadas-vim4.dts
>>> @@ -0,0 +1,52 @@
>>> +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
>>> +/*
>>> + * Copyright (c) 2022 Wesion, Inc. All rights reserved.
>>> + */
>>> +
>>> +/dts-v1/;
>>> +
>>> +#include "amlogic-t7.dtsi"
>>> +
>>> +/ {
>>> +       model = "Khadas vim4";
>>> +       compatible = "khadas,vim4", "amlogic,a311d2", "amlogic,t7";
>>> +
>>> +       aliases {
>>> +               serial0 = &uart_A;
>>> +       };
>>> +
>>> +       memory@0 {
>>> +               device_type = "memory";
>>> +               reg = <0x0 0x0 0x2 0x0>; /* 8 GB */
>>> +       };
>>> +
>>> +       reserved-memory {
>>> +               #address-cells = <2>;
>>> +               #size-cells = <2>;
>>> +               ranges;
>>> +
>>> +               /* 3 MiB reserved for ARM Trusted Firmware (BL31) */
>>> +               secmon_reserved: secmon@5000000 {
>>> +                       reg = <0x0 0x05000000 0x0 0x300000>;
>>> +                       no-map;
>>> +               };
>>> +
>>> +               /* 32 MiB reserved for ARM Trusted Firmware (BL32) */
>>> +               secmon_reserved_bl32: secmon@5300000 {
>>> +                       reg = <0x0 0x05300000 0x0 0x2000000>;
>>> +                       no-map;
>>> +               };
>>> +       };
>>> +
>>> +       xtal: xtal-clk {
>>> +               compatible = "fixed-clock";
>>> +               clock-frequency = <24000000>;
>>> +               clock-output-names = "xtal";
>>> +               #clock-cells = <0>;
>>> +       };
>>> +
>>> +};
>>> +
>>> +&uart_A {
>>> +       status = "okay";
>>> +};
>>> diff --git a/arch/arm64/boot/dts/amlogic/amlogic-t7.dtsi b/arch/arm64/boot/dts/amlogic/amlogic-t7.dtsi
>>> new file mode 100644
>>> index 000000000000..6f3971b4df99
>>> --- /dev/null
>>> +++ b/arch/arm64/boot/dts/amlogic/amlogic-t7.dtsi
>>> @@ -0,0 +1,158 @@
>>> +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
>>> +/*
>>> + * Copyright (c) 2019 Amlogic, Inc. All rights reserved.
>>> + */
>>> +
>>> +#include <dt-bindings/interrupt-controller/arm-gic.h>
>>> +
>>> +/ {
>>> +       interrupt-parent = <&gic>;
>>> +       #address-cells = <2>;
>>> +       #size-cells = <2>;
>>> +
>>> +       cpus {
>>> +               #address-cells = <0x2>;
>>> +               #size-cells = <0x0>;
>>> +
>>> +               cpu-map {
>>> +                       cluster0 {
>>> +                               core0 {
>>> +                                       cpu = <&cpu100>;
>>> +                               };
>>> +                               core1 {
>>> +                                       cpu = <&cpu101>;
>>> +                               };
>>> +                               core2 {
>>> +                                       cpu = <&cpu102>;
>>> +                               };
>>> +                               core3 {
>>> +                                       cpu = <&cpu103>;
>>> +                               };
>>> +                       };
>>> +
>>> +                       cluster1 {
>>> +                               core0 {
>>> +                                       cpu = <&cpu0>;
>>> +                               };
>>> +                               core1 {
>>> +                                       cpu = <&cpu1>;
>>> +                               };
>>> +                               core2 {
>>> +                                       cpu = <&cpu2>;
>>> +                               };
>>> +                               core3 {
>>> +                                       cpu = <&cpu3>;
>>> +                               };
>>> +                       };
>>> +               };
>>> +
>>> +               cpu100: cpu@100 {
>>> +                       device_type = "cpu";
>>> +                       compatible = "arm,cortex-a53";
>>> +                       reg = <0x0 0x100>;
>>> +                       enable-method = "psci";
>>> +               };
>>> +
>>> +               cpu101: cpu@101{
>>> +                       device_type = "cpu";
>>> +                       compatible = "arm,cortex-a53";
>>> +                       reg = <0x0 0x101>;
>>> +                       enable-method = "psci";
>>> +               };
>>> +
>>> +               cpu102: cpu@102 {
>>> +                       device_type = "cpu";
>>> +                       compatible = "arm,cortex-a53";
>>> +                       reg = <0x0 0x102>;
>>> +                       enable-method = "psci";
>>> +               };
>>> +
>>> +               cpu103: cpu@103 {
>>> +                       device_type = "cpu";
>>> +                       compatible = "arm,cortex-a53";
>>> +                       reg = <0x0 0x103>;
>>> +                       enable-method = "psci";
>>> +               };
>>> +
>>> +               cpu0: cpu@0 {
>>> +                       device_type = "cpu";
>>> +                       compatible = "arm,cortex-a73";
>>> +                       reg = <0x0 0x0>;
>>> +                       enable-method = "psci";
>>> +               };
>>> +
>>> +               cpu1: cpu@1 {
>>> +                       device_type = "cpu";
>>> +                       compatible = "arm,cortex-a73";
>>> +                       reg = <0x0 0x1>;
>>> +                       enable-method = "psci";
>>> +               };
>>> +
>>> +               cpu2: cpu@2 {
>>> +                       device_type = "cpu";
>>> +                       compatible = "arm,cortex-a73";
>>> +                       reg = <0x0 0x2>;
>>> +                       enable-method = "psci";
>>> +               };
>>> +
>>> +               cpu3: cpu@3 {
>>> +                       device_type = "cpu";
>>> +                       compatible = "arm,cortex-a73";
>>> +                       reg = <0x0 0x3>;
>>> +                       enable-method = "psci";
>>> +               };
>>> +       };
>>> +
>>> +       timer {
>>> +               compatible = "arm,armv8-timer";
>>> +               interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
>>> +                            <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
>>> +                            <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
>>> +                            <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
>>> +       };
>> cpu number is 8, not 4, need use GIC_CPU_MASK_SIMPLE(8)
>>> +
>>> +       psci {
>>> +               compatible = "arm,psci-1.0";
>>> +               method = "smc";
>>> +       };
>>> +
>>> +       sm: secure-monitor {
>>> +               compatible = "amlogic,meson-gxbb-sm";
>>> +       };
>>> +
>>> +       soc {
>>> +               compatible = "simple-bus";
>>> +               #address-cells = <2>;
>>> +               #size-cells = <2>;
>>> +               ranges;
>>> +
>>> +               gic: interrupt-controller@fff01000 {
>>> +                       compatible = "arm,gic-400";
>>> +                       #interrupt-cells = <3>;
>>> +                       #address-cells = <0>;
>>> +                       interrupt-controller;
>>> +                       reg = <0x0 0xfff01000 0 0x1000>,
>>> +                             <0x0 0xfff02000 0 0x0100>;
>>> +                       interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
>> cpu number is 8, not 4, need use GIC_CPU_MASK_SIMPLE(8)
> OK
> 
>>> +               };
>>> +
>>> +               apb4: bus@fe000000 {
>>> +                       compatible = "simple-bus";
>>> +                       reg = <0x0 0xfe000000 0x0 0x480000>;
>>> +                       #address-cells = <2>;
>>> +                       #size-cells = <2>;
>>> +                       ranges = <0x0 0x0 0x0 0xfe000000 0x0 0x480000>;
>>> +
>>> +                       uart_A: serial@78000 {
>> use lowercase, "uart_a"
> 
> OK
>>> +                               compatible = "amlogic,t7-uart",
>>> +                                            "amlogic,meson-s4-uart";
>>> +                               reg = <0x0 0x78000 0x0 0x18>;
>>> +                               interrupts = <GIC_SPI 168 IRQ_TYPE_EDGE_RISING>;
>>> +                               status = "disabled";
>>> +                               clocks = <&xtal>, <&xtal>, <&xtal>
>> "xtal" why defined in  amlogic-t7-a311d2-khadas-vim4.dts files
> 
> The 24MHz clock is a crystal in VIm4 schematic, so its something the
> board did to provide that clock.
> Other boards using a311d2 could provide that clock in a different way.
> Or are you saying that this clock is mandatory at boot time, and all
> boards using this chip will have the same crystal?The board must use crystal, different boards maybe use different 
frequency. DTSI file be included by other DTS or DTSI files.
It is strange that DTSI file reference DTS file's  property .
The property "xtal" can  be defined in DTSI file, DTS file can Change 
the "frequency" if necessary, like other property.
> 
>>> +                               clock-names = "xtal", "pclk", "baud";
>>> +                       };
>>> +               };
>>> +
>>> +       };
>>> +};
>>> --
>>> 2.41.0
>>>

^ permalink raw reply	[flat|nested] 36+ messages in thread

* Re: [PATCH v6 4/4] arm64: dts: amlogic-t7-a311d2-khadas-vim4: add initial device-tree
  2023-06-29  7:10       ` Lucas Tanure
  (?)
@ 2023-06-29  7:48         ` Xianwei Zhao
  -1 siblings, 0 replies; 36+ messages in thread
From: Xianwei Zhao @ 2023-06-29  7:48 UTC (permalink / raw)
  To: tanure
  Cc: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Neil Armstrong,
	Jerome Brunet, Kevin Hilman, Nick, Artem, devicetree,
	linux-kernel, linux-amlogic, linux-arm-kernel



On 2023/6/29 15:10, Lucas Tanure wrote:
> [ EXTERNAL EMAIL ]
> 
> On Tue, Jun 27, 2023 at 10:21 AM Xianwei Zhao <xianwei.zhao@amlogic.com> wrote:
>>
>>
>>
>> On 2023/6/27 17:10, Lucas Tanure wrote:
>>> [ EXTERNAL EMAIL ]
>>>
>>> The Khadas VIM4 uses the Amlogic A311D2 SoC, based on the Amlogic T7 SoC
>>> family, on a board with the same form factor as the VIM3 models.
>>>
>>> - 8GB LPDDR4X 2016MHz
>>> - 32GB eMMC 5.1 storage
>>> - 32MB SPI flash
>>> - 10/100/1000 Base-T Ethernet
>>> - AP6275S Wireless (802.11 a/b/g/n/ac/ax, BT5.1)
>>> - HDMI 2.1 video
>>> - HDMI Input
>>> - 1x USB 2.0 + 1x USB 3.0 ports
>>> - 1x USB-C (power) with USB 2.0 OTG
>>> - 3x LED's (1x red, 1x blue, 1x white)
>>> - 3x buttons (power, function, reset)
>>> - M2 socket with PCIe, USB, ADC & I2C
>>> - 40pin GPIO Header
>>> - 1x micro SD card slot
>>>
>>> Signed-off-by: Lucas Tanure <tanure@linux.com>
>>> ---
>>>    arch/arm64/boot/dts/amlogic/Makefile          |   1 +
>>>    .../amlogic/amlogic-t7-a311d2-khadas-vim4.dts |  52 ++++++
>>>    arch/arm64/boot/dts/amlogic/amlogic-t7.dtsi   | 158 ++++++++++++++++++
>>>    3 files changed, 211 insertions(+)
>>>    create mode 100644 arch/arm64/boot/dts/amlogic/amlogic-t7-a311d2-khadas-vim4.dts
>>>    create mode 100644 arch/arm64/boot/dts/amlogic/amlogic-t7.dtsi
>>>
>>> diff --git a/arch/arm64/boot/dts/amlogic/Makefile b/arch/arm64/boot/dts/amlogic/Makefile
>>> index cd1c5b04890a..166fec1e4229 100644
>>> --- a/arch/arm64/boot/dts/amlogic/Makefile
>>> +++ b/arch/arm64/boot/dts/amlogic/Makefile
>>> @@ -1,4 +1,5 @@
>>>    # SPDX-License-Identifier: GPL-2.0
>>> +dtb-$(CONFIG_ARCH_MESON) += amlogic-t7-a311d2-khadas-vim4.dtb
>>>    dtb-$(CONFIG_ARCH_MESON) += meson-a1-ad401.dtb
>>>    dtb-$(CONFIG_ARCH_MESON) += meson-axg-jethome-jethub-j100.dtb
>>>    dtb-$(CONFIG_ARCH_MESON) += meson-axg-jethome-jethub-j110-rev-2.dtb
>>> diff --git a/arch/arm64/boot/dts/amlogic/amlogic-t7-a311d2-khadas-vim4.dts b/arch/arm64/boot/dts/amlogic/amlogic-t7-a311d2-khadas-vim4.dts
>>> new file mode 100644
>>> index 000000000000..5d7fb86a9738
>>> --- /dev/null
>>> +++ b/arch/arm64/boot/dts/amlogic/amlogic-t7-a311d2-khadas-vim4.dts
>>> @@ -0,0 +1,52 @@
>>> +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
>>> +/*
>>> + * Copyright (c) 2022 Wesion, Inc. All rights reserved.
>>> + */
>>> +
>>> +/dts-v1/;
>>> +
>>> +#include "amlogic-t7.dtsi"
>>> +
>>> +/ {
>>> +       model = "Khadas vim4";
>>> +       compatible = "khadas,vim4", "amlogic,a311d2", "amlogic,t7";
>>> +
>>> +       aliases {
>>> +               serial0 = &uart_A;
>>> +       };
>>> +
>>> +       memory@0 {
>>> +               device_type = "memory";
>>> +               reg = <0x0 0x0 0x2 0x0>; /* 8 GB */
>>> +       };
>>> +
>>> +       reserved-memory {
>>> +               #address-cells = <2>;
>>> +               #size-cells = <2>;
>>> +               ranges;
>>> +
>>> +               /* 3 MiB reserved for ARM Trusted Firmware (BL31) */
>>> +               secmon_reserved: secmon@5000000 {
>>> +                       reg = <0x0 0x05000000 0x0 0x300000>;
>>> +                       no-map;
>>> +               };
>>> +
>>> +               /* 32 MiB reserved for ARM Trusted Firmware (BL32) */
>>> +               secmon_reserved_bl32: secmon@5300000 {
>>> +                       reg = <0x0 0x05300000 0x0 0x2000000>;
>>> +                       no-map;
>>> +               };
>>> +       };
>>> +
>>> +       xtal: xtal-clk {
>>> +               compatible = "fixed-clock";
>>> +               clock-frequency = <24000000>;
>>> +               clock-output-names = "xtal";
>>> +               #clock-cells = <0>;
>>> +       };
>>> +
>>> +};
>>> +
>>> +&uart_A {
>>> +       status = "okay";
>>> +};
>>> diff --git a/arch/arm64/boot/dts/amlogic/amlogic-t7.dtsi b/arch/arm64/boot/dts/amlogic/amlogic-t7.dtsi
>>> new file mode 100644
>>> index 000000000000..6f3971b4df99
>>> --- /dev/null
>>> +++ b/arch/arm64/boot/dts/amlogic/amlogic-t7.dtsi
>>> @@ -0,0 +1,158 @@
>>> +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
>>> +/*
>>> + * Copyright (c) 2019 Amlogic, Inc. All rights reserved.
>>> + */
>>> +
>>> +#include <dt-bindings/interrupt-controller/arm-gic.h>
>>> +
>>> +/ {
>>> +       interrupt-parent = <&gic>;
>>> +       #address-cells = <2>;
>>> +       #size-cells = <2>;
>>> +
>>> +       cpus {
>>> +               #address-cells = <0x2>;
>>> +               #size-cells = <0x0>;
>>> +
>>> +               cpu-map {
>>> +                       cluster0 {
>>> +                               core0 {
>>> +                                       cpu = <&cpu100>;
>>> +                               };
>>> +                               core1 {
>>> +                                       cpu = <&cpu101>;
>>> +                               };
>>> +                               core2 {
>>> +                                       cpu = <&cpu102>;
>>> +                               };
>>> +                               core3 {
>>> +                                       cpu = <&cpu103>;
>>> +                               };
>>> +                       };
>>> +
>>> +                       cluster1 {
>>> +                               core0 {
>>> +                                       cpu = <&cpu0>;
>>> +                               };
>>> +                               core1 {
>>> +                                       cpu = <&cpu1>;
>>> +                               };
>>> +                               core2 {
>>> +                                       cpu = <&cpu2>;
>>> +                               };
>>> +                               core3 {
>>> +                                       cpu = <&cpu3>;
>>> +                               };
>>> +                       };
>>> +               };
>>> +
>>> +               cpu100: cpu@100 {
>>> +                       device_type = "cpu";
>>> +                       compatible = "arm,cortex-a53";
>>> +                       reg = <0x0 0x100>;
>>> +                       enable-method = "psci";
>>> +               };
>>> +
>>> +               cpu101: cpu@101{
>>> +                       device_type = "cpu";
>>> +                       compatible = "arm,cortex-a53";
>>> +                       reg = <0x0 0x101>;
>>> +                       enable-method = "psci";
>>> +               };
>>> +
>>> +               cpu102: cpu@102 {
>>> +                       device_type = "cpu";
>>> +                       compatible = "arm,cortex-a53";
>>> +                       reg = <0x0 0x102>;
>>> +                       enable-method = "psci";
>>> +               };
>>> +
>>> +               cpu103: cpu@103 {
>>> +                       device_type = "cpu";
>>> +                       compatible = "arm,cortex-a53";
>>> +                       reg = <0x0 0x103>;
>>> +                       enable-method = "psci";
>>> +               };
>>> +
>>> +               cpu0: cpu@0 {
>>> +                       device_type = "cpu";
>>> +                       compatible = "arm,cortex-a73";
>>> +                       reg = <0x0 0x0>;
>>> +                       enable-method = "psci";
>>> +               };
>>> +
>>> +               cpu1: cpu@1 {
>>> +                       device_type = "cpu";
>>> +                       compatible = "arm,cortex-a73";
>>> +                       reg = <0x0 0x1>;
>>> +                       enable-method = "psci";
>>> +               };
>>> +
>>> +               cpu2: cpu@2 {
>>> +                       device_type = "cpu";
>>> +                       compatible = "arm,cortex-a73";
>>> +                       reg = <0x0 0x2>;
>>> +                       enable-method = "psci";
>>> +               };
>>> +
>>> +               cpu3: cpu@3 {
>>> +                       device_type = "cpu";
>>> +                       compatible = "arm,cortex-a73";
>>> +                       reg = <0x0 0x3>;
>>> +                       enable-method = "psci";
>>> +               };
>>> +       };
>>> +
>>> +       timer {
>>> +               compatible = "arm,armv8-timer";
>>> +               interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
>>> +                            <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
>>> +                            <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
>>> +                            <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
>>> +       };
>> cpu number is 8, not 4, need use GIC_CPU_MASK_SIMPLE(8)
>>> +
>>> +       psci {
>>> +               compatible = "arm,psci-1.0";
>>> +               method = "smc";
>>> +       };
>>> +
>>> +       sm: secure-monitor {
>>> +               compatible = "amlogic,meson-gxbb-sm";
>>> +       };
>>> +
>>> +       soc {
>>> +               compatible = "simple-bus";
>>> +               #address-cells = <2>;
>>> +               #size-cells = <2>;
>>> +               ranges;
>>> +
>>> +               gic: interrupt-controller@fff01000 {
>>> +                       compatible = "arm,gic-400";
>>> +                       #interrupt-cells = <3>;
>>> +                       #address-cells = <0>;
>>> +                       interrupt-controller;
>>> +                       reg = <0x0 0xfff01000 0 0x1000>,
>>> +                             <0x0 0xfff02000 0 0x0100>;
>>> +                       interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
>> cpu number is 8, not 4, need use GIC_CPU_MASK_SIMPLE(8)
> OK
> 
>>> +               };
>>> +
>>> +               apb4: bus@fe000000 {
>>> +                       compatible = "simple-bus";
>>> +                       reg = <0x0 0xfe000000 0x0 0x480000>;
>>> +                       #address-cells = <2>;
>>> +                       #size-cells = <2>;
>>> +                       ranges = <0x0 0x0 0x0 0xfe000000 0x0 0x480000>;
>>> +
>>> +                       uart_A: serial@78000 {
>> use lowercase, "uart_a"
> 
> OK
>>> +                               compatible = "amlogic,t7-uart",
>>> +                                            "amlogic,meson-s4-uart";
>>> +                               reg = <0x0 0x78000 0x0 0x18>;
>>> +                               interrupts = <GIC_SPI 168 IRQ_TYPE_EDGE_RISING>;
>>> +                               status = "disabled";
>>> +                               clocks = <&xtal>, <&xtal>, <&xtal>
>> "xtal" why defined in  amlogic-t7-a311d2-khadas-vim4.dts files
> 
> The 24MHz clock is a crystal in VIm4 schematic, so its something the
> board did to provide that clock.
> Other boards using a311d2 could provide that clock in a different way.
> Or are you saying that this clock is mandatory at boot time, and all
> boards using this chip will have the same crystal?
> 

The board must use crystal, different boards maybe use different
frequency. DTSI file be included by other DTS or DTSI files.
It is strange that DTSI file reference DTS file's  property .
The property "xtal" can  be defined in DTSI file, DTS file can Change 
the "frequency" if necessary, like other property.

>>> +                               clock-names = "xtal", "pclk", "baud";
>>> +                       };
>>> +               };
>>> +
>>> +       };
>>> +};
>>> --
>>> 2.41.0
>>>

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

^ permalink raw reply	[flat|nested] 36+ messages in thread

* Re: [PATCH v6 4/4] arm64: dts: amlogic-t7-a311d2-khadas-vim4: add initial device-tree
@ 2023-06-29  7:48         ` Xianwei Zhao
  0 siblings, 0 replies; 36+ messages in thread
From: Xianwei Zhao @ 2023-06-29  7:48 UTC (permalink / raw)
  To: tanure
  Cc: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Neil Armstrong,
	Jerome Brunet, Kevin Hilman, Nick, Artem, devicetree,
	linux-kernel, linux-amlogic, linux-arm-kernel



On 2023/6/29 15:10, Lucas Tanure wrote:
> [ EXTERNAL EMAIL ]
> 
> On Tue, Jun 27, 2023 at 10:21 AM Xianwei Zhao <xianwei.zhao@amlogic.com> wrote:
>>
>>
>>
>> On 2023/6/27 17:10, Lucas Tanure wrote:
>>> [ EXTERNAL EMAIL ]
>>>
>>> The Khadas VIM4 uses the Amlogic A311D2 SoC, based on the Amlogic T7 SoC
>>> family, on a board with the same form factor as the VIM3 models.
>>>
>>> - 8GB LPDDR4X 2016MHz
>>> - 32GB eMMC 5.1 storage
>>> - 32MB SPI flash
>>> - 10/100/1000 Base-T Ethernet
>>> - AP6275S Wireless (802.11 a/b/g/n/ac/ax, BT5.1)
>>> - HDMI 2.1 video
>>> - HDMI Input
>>> - 1x USB 2.0 + 1x USB 3.0 ports
>>> - 1x USB-C (power) with USB 2.0 OTG
>>> - 3x LED's (1x red, 1x blue, 1x white)
>>> - 3x buttons (power, function, reset)
>>> - M2 socket with PCIe, USB, ADC & I2C
>>> - 40pin GPIO Header
>>> - 1x micro SD card slot
>>>
>>> Signed-off-by: Lucas Tanure <tanure@linux.com>
>>> ---
>>>    arch/arm64/boot/dts/amlogic/Makefile          |   1 +
>>>    .../amlogic/amlogic-t7-a311d2-khadas-vim4.dts |  52 ++++++
>>>    arch/arm64/boot/dts/amlogic/amlogic-t7.dtsi   | 158 ++++++++++++++++++
>>>    3 files changed, 211 insertions(+)
>>>    create mode 100644 arch/arm64/boot/dts/amlogic/amlogic-t7-a311d2-khadas-vim4.dts
>>>    create mode 100644 arch/arm64/boot/dts/amlogic/amlogic-t7.dtsi
>>>
>>> diff --git a/arch/arm64/boot/dts/amlogic/Makefile b/arch/arm64/boot/dts/amlogic/Makefile
>>> index cd1c5b04890a..166fec1e4229 100644
>>> --- a/arch/arm64/boot/dts/amlogic/Makefile
>>> +++ b/arch/arm64/boot/dts/amlogic/Makefile
>>> @@ -1,4 +1,5 @@
>>>    # SPDX-License-Identifier: GPL-2.0
>>> +dtb-$(CONFIG_ARCH_MESON) += amlogic-t7-a311d2-khadas-vim4.dtb
>>>    dtb-$(CONFIG_ARCH_MESON) += meson-a1-ad401.dtb
>>>    dtb-$(CONFIG_ARCH_MESON) += meson-axg-jethome-jethub-j100.dtb
>>>    dtb-$(CONFIG_ARCH_MESON) += meson-axg-jethome-jethub-j110-rev-2.dtb
>>> diff --git a/arch/arm64/boot/dts/amlogic/amlogic-t7-a311d2-khadas-vim4.dts b/arch/arm64/boot/dts/amlogic/amlogic-t7-a311d2-khadas-vim4.dts
>>> new file mode 100644
>>> index 000000000000..5d7fb86a9738
>>> --- /dev/null
>>> +++ b/arch/arm64/boot/dts/amlogic/amlogic-t7-a311d2-khadas-vim4.dts
>>> @@ -0,0 +1,52 @@
>>> +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
>>> +/*
>>> + * Copyright (c) 2022 Wesion, Inc. All rights reserved.
>>> + */
>>> +
>>> +/dts-v1/;
>>> +
>>> +#include "amlogic-t7.dtsi"
>>> +
>>> +/ {
>>> +       model = "Khadas vim4";
>>> +       compatible = "khadas,vim4", "amlogic,a311d2", "amlogic,t7";
>>> +
>>> +       aliases {
>>> +               serial0 = &uart_A;
>>> +       };
>>> +
>>> +       memory@0 {
>>> +               device_type = "memory";
>>> +               reg = <0x0 0x0 0x2 0x0>; /* 8 GB */
>>> +       };
>>> +
>>> +       reserved-memory {
>>> +               #address-cells = <2>;
>>> +               #size-cells = <2>;
>>> +               ranges;
>>> +
>>> +               /* 3 MiB reserved for ARM Trusted Firmware (BL31) */
>>> +               secmon_reserved: secmon@5000000 {
>>> +                       reg = <0x0 0x05000000 0x0 0x300000>;
>>> +                       no-map;
>>> +               };
>>> +
>>> +               /* 32 MiB reserved for ARM Trusted Firmware (BL32) */
>>> +               secmon_reserved_bl32: secmon@5300000 {
>>> +                       reg = <0x0 0x05300000 0x0 0x2000000>;
>>> +                       no-map;
>>> +               };
>>> +       };
>>> +
>>> +       xtal: xtal-clk {
>>> +               compatible = "fixed-clock";
>>> +               clock-frequency = <24000000>;
>>> +               clock-output-names = "xtal";
>>> +               #clock-cells = <0>;
>>> +       };
>>> +
>>> +};
>>> +
>>> +&uart_A {
>>> +       status = "okay";
>>> +};
>>> diff --git a/arch/arm64/boot/dts/amlogic/amlogic-t7.dtsi b/arch/arm64/boot/dts/amlogic/amlogic-t7.dtsi
>>> new file mode 100644
>>> index 000000000000..6f3971b4df99
>>> --- /dev/null
>>> +++ b/arch/arm64/boot/dts/amlogic/amlogic-t7.dtsi
>>> @@ -0,0 +1,158 @@
>>> +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
>>> +/*
>>> + * Copyright (c) 2019 Amlogic, Inc. All rights reserved.
>>> + */
>>> +
>>> +#include <dt-bindings/interrupt-controller/arm-gic.h>
>>> +
>>> +/ {
>>> +       interrupt-parent = <&gic>;
>>> +       #address-cells = <2>;
>>> +       #size-cells = <2>;
>>> +
>>> +       cpus {
>>> +               #address-cells = <0x2>;
>>> +               #size-cells = <0x0>;
>>> +
>>> +               cpu-map {
>>> +                       cluster0 {
>>> +                               core0 {
>>> +                                       cpu = <&cpu100>;
>>> +                               };
>>> +                               core1 {
>>> +                                       cpu = <&cpu101>;
>>> +                               };
>>> +                               core2 {
>>> +                                       cpu = <&cpu102>;
>>> +                               };
>>> +                               core3 {
>>> +                                       cpu = <&cpu103>;
>>> +                               };
>>> +                       };
>>> +
>>> +                       cluster1 {
>>> +                               core0 {
>>> +                                       cpu = <&cpu0>;
>>> +                               };
>>> +                               core1 {
>>> +                                       cpu = <&cpu1>;
>>> +                               };
>>> +                               core2 {
>>> +                                       cpu = <&cpu2>;
>>> +                               };
>>> +                               core3 {
>>> +                                       cpu = <&cpu3>;
>>> +                               };
>>> +                       };
>>> +               };
>>> +
>>> +               cpu100: cpu@100 {
>>> +                       device_type = "cpu";
>>> +                       compatible = "arm,cortex-a53";
>>> +                       reg = <0x0 0x100>;
>>> +                       enable-method = "psci";
>>> +               };
>>> +
>>> +               cpu101: cpu@101{
>>> +                       device_type = "cpu";
>>> +                       compatible = "arm,cortex-a53";
>>> +                       reg = <0x0 0x101>;
>>> +                       enable-method = "psci";
>>> +               };
>>> +
>>> +               cpu102: cpu@102 {
>>> +                       device_type = "cpu";
>>> +                       compatible = "arm,cortex-a53";
>>> +                       reg = <0x0 0x102>;
>>> +                       enable-method = "psci";
>>> +               };
>>> +
>>> +               cpu103: cpu@103 {
>>> +                       device_type = "cpu";
>>> +                       compatible = "arm,cortex-a53";
>>> +                       reg = <0x0 0x103>;
>>> +                       enable-method = "psci";
>>> +               };
>>> +
>>> +               cpu0: cpu@0 {
>>> +                       device_type = "cpu";
>>> +                       compatible = "arm,cortex-a73";
>>> +                       reg = <0x0 0x0>;
>>> +                       enable-method = "psci";
>>> +               };
>>> +
>>> +               cpu1: cpu@1 {
>>> +                       device_type = "cpu";
>>> +                       compatible = "arm,cortex-a73";
>>> +                       reg = <0x0 0x1>;
>>> +                       enable-method = "psci";
>>> +               };
>>> +
>>> +               cpu2: cpu@2 {
>>> +                       device_type = "cpu";
>>> +                       compatible = "arm,cortex-a73";
>>> +                       reg = <0x0 0x2>;
>>> +                       enable-method = "psci";
>>> +               };
>>> +
>>> +               cpu3: cpu@3 {
>>> +                       device_type = "cpu";
>>> +                       compatible = "arm,cortex-a73";
>>> +                       reg = <0x0 0x3>;
>>> +                       enable-method = "psci";
>>> +               };
>>> +       };
>>> +
>>> +       timer {
>>> +               compatible = "arm,armv8-timer";
>>> +               interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
>>> +                            <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
>>> +                            <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
>>> +                            <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
>>> +       };
>> cpu number is 8, not 4, need use GIC_CPU_MASK_SIMPLE(8)
>>> +
>>> +       psci {
>>> +               compatible = "arm,psci-1.0";
>>> +               method = "smc";
>>> +       };
>>> +
>>> +       sm: secure-monitor {
>>> +               compatible = "amlogic,meson-gxbb-sm";
>>> +       };
>>> +
>>> +       soc {
>>> +               compatible = "simple-bus";
>>> +               #address-cells = <2>;
>>> +               #size-cells = <2>;
>>> +               ranges;
>>> +
>>> +               gic: interrupt-controller@fff01000 {
>>> +                       compatible = "arm,gic-400";
>>> +                       #interrupt-cells = <3>;
>>> +                       #address-cells = <0>;
>>> +                       interrupt-controller;
>>> +                       reg = <0x0 0xfff01000 0 0x1000>,
>>> +                             <0x0 0xfff02000 0 0x0100>;
>>> +                       interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
>> cpu number is 8, not 4, need use GIC_CPU_MASK_SIMPLE(8)
> OK
> 
>>> +               };
>>> +
>>> +               apb4: bus@fe000000 {
>>> +                       compatible = "simple-bus";
>>> +                       reg = <0x0 0xfe000000 0x0 0x480000>;
>>> +                       #address-cells = <2>;
>>> +                       #size-cells = <2>;
>>> +                       ranges = <0x0 0x0 0x0 0xfe000000 0x0 0x480000>;
>>> +
>>> +                       uart_A: serial@78000 {
>> use lowercase, "uart_a"
> 
> OK
>>> +                               compatible = "amlogic,t7-uart",
>>> +                                            "amlogic,meson-s4-uart";
>>> +                               reg = <0x0 0x78000 0x0 0x18>;
>>> +                               interrupts = <GIC_SPI 168 IRQ_TYPE_EDGE_RISING>;
>>> +                               status = "disabled";
>>> +                               clocks = <&xtal>, <&xtal>, <&xtal>
>> "xtal" why defined in  amlogic-t7-a311d2-khadas-vim4.dts files
> 
> The 24MHz clock is a crystal in VIm4 schematic, so its something the
> board did to provide that clock.
> Other boards using a311d2 could provide that clock in a different way.
> Or are you saying that this clock is mandatory at boot time, and all
> boards using this chip will have the same crystal?
> 

The board must use crystal, different boards maybe use different
frequency. DTSI file be included by other DTS or DTSI files.
It is strange that DTSI file reference DTS file's  property .
The property "xtal" can  be defined in DTSI file, DTS file can Change 
the "frequency" if necessary, like other property.

>>> +                               clock-names = "xtal", "pclk", "baud";
>>> +                       };
>>> +               };
>>> +
>>> +       };
>>> +};
>>> --
>>> 2.41.0
>>>

_______________________________________________
linux-amlogic mailing list
linux-amlogic@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-amlogic

^ permalink raw reply	[flat|nested] 36+ messages in thread

* Re: [PATCH v6 4/4] arm64: dts: amlogic-t7-a311d2-khadas-vim4: add initial device-tree
@ 2023-06-29  7:48         ` Xianwei Zhao
  0 siblings, 0 replies; 36+ messages in thread
From: Xianwei Zhao @ 2023-06-29  7:48 UTC (permalink / raw)
  To: tanure
  Cc: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Neil Armstrong,
	Jerome Brunet, Kevin Hilman, Nick, Artem, devicetree,
	linux-kernel, linux-amlogic, linux-arm-kernel



On 2023/6/29 15:10, Lucas Tanure wrote:
> [ EXTERNAL EMAIL ]
> 
> On Tue, Jun 27, 2023 at 10:21 AM Xianwei Zhao <xianwei.zhao@amlogic.com> wrote:
>>
>>
>>
>> On 2023/6/27 17:10, Lucas Tanure wrote:
>>> [ EXTERNAL EMAIL ]
>>>
>>> The Khadas VIM4 uses the Amlogic A311D2 SoC, based on the Amlogic T7 SoC
>>> family, on a board with the same form factor as the VIM3 models.
>>>
>>> - 8GB LPDDR4X 2016MHz
>>> - 32GB eMMC 5.1 storage
>>> - 32MB SPI flash
>>> - 10/100/1000 Base-T Ethernet
>>> - AP6275S Wireless (802.11 a/b/g/n/ac/ax, BT5.1)
>>> - HDMI 2.1 video
>>> - HDMI Input
>>> - 1x USB 2.0 + 1x USB 3.0 ports
>>> - 1x USB-C (power) with USB 2.0 OTG
>>> - 3x LED's (1x red, 1x blue, 1x white)
>>> - 3x buttons (power, function, reset)
>>> - M2 socket with PCIe, USB, ADC & I2C
>>> - 40pin GPIO Header
>>> - 1x micro SD card slot
>>>
>>> Signed-off-by: Lucas Tanure <tanure@linux.com>
>>> ---
>>>    arch/arm64/boot/dts/amlogic/Makefile          |   1 +
>>>    .../amlogic/amlogic-t7-a311d2-khadas-vim4.dts |  52 ++++++
>>>    arch/arm64/boot/dts/amlogic/amlogic-t7.dtsi   | 158 ++++++++++++++++++
>>>    3 files changed, 211 insertions(+)
>>>    create mode 100644 arch/arm64/boot/dts/amlogic/amlogic-t7-a311d2-khadas-vim4.dts
>>>    create mode 100644 arch/arm64/boot/dts/amlogic/amlogic-t7.dtsi
>>>
>>> diff --git a/arch/arm64/boot/dts/amlogic/Makefile b/arch/arm64/boot/dts/amlogic/Makefile
>>> index cd1c5b04890a..166fec1e4229 100644
>>> --- a/arch/arm64/boot/dts/amlogic/Makefile
>>> +++ b/arch/arm64/boot/dts/amlogic/Makefile
>>> @@ -1,4 +1,5 @@
>>>    # SPDX-License-Identifier: GPL-2.0
>>> +dtb-$(CONFIG_ARCH_MESON) += amlogic-t7-a311d2-khadas-vim4.dtb
>>>    dtb-$(CONFIG_ARCH_MESON) += meson-a1-ad401.dtb
>>>    dtb-$(CONFIG_ARCH_MESON) += meson-axg-jethome-jethub-j100.dtb
>>>    dtb-$(CONFIG_ARCH_MESON) += meson-axg-jethome-jethub-j110-rev-2.dtb
>>> diff --git a/arch/arm64/boot/dts/amlogic/amlogic-t7-a311d2-khadas-vim4.dts b/arch/arm64/boot/dts/amlogic/amlogic-t7-a311d2-khadas-vim4.dts
>>> new file mode 100644
>>> index 000000000000..5d7fb86a9738
>>> --- /dev/null
>>> +++ b/arch/arm64/boot/dts/amlogic/amlogic-t7-a311d2-khadas-vim4.dts
>>> @@ -0,0 +1,52 @@
>>> +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
>>> +/*
>>> + * Copyright (c) 2022 Wesion, Inc. All rights reserved.
>>> + */
>>> +
>>> +/dts-v1/;
>>> +
>>> +#include "amlogic-t7.dtsi"
>>> +
>>> +/ {
>>> +       model = "Khadas vim4";
>>> +       compatible = "khadas,vim4", "amlogic,a311d2", "amlogic,t7";
>>> +
>>> +       aliases {
>>> +               serial0 = &uart_A;
>>> +       };
>>> +
>>> +       memory@0 {
>>> +               device_type = "memory";
>>> +               reg = <0x0 0x0 0x2 0x0>; /* 8 GB */
>>> +       };
>>> +
>>> +       reserved-memory {
>>> +               #address-cells = <2>;
>>> +               #size-cells = <2>;
>>> +               ranges;
>>> +
>>> +               /* 3 MiB reserved for ARM Trusted Firmware (BL31) */
>>> +               secmon_reserved: secmon@5000000 {
>>> +                       reg = <0x0 0x05000000 0x0 0x300000>;
>>> +                       no-map;
>>> +               };
>>> +
>>> +               /* 32 MiB reserved for ARM Trusted Firmware (BL32) */
>>> +               secmon_reserved_bl32: secmon@5300000 {
>>> +                       reg = <0x0 0x05300000 0x0 0x2000000>;
>>> +                       no-map;
>>> +               };
>>> +       };
>>> +
>>> +       xtal: xtal-clk {
>>> +               compatible = "fixed-clock";
>>> +               clock-frequency = <24000000>;
>>> +               clock-output-names = "xtal";
>>> +               #clock-cells = <0>;
>>> +       };
>>> +
>>> +};
>>> +
>>> +&uart_A {
>>> +       status = "okay";
>>> +};
>>> diff --git a/arch/arm64/boot/dts/amlogic/amlogic-t7.dtsi b/arch/arm64/boot/dts/amlogic/amlogic-t7.dtsi
>>> new file mode 100644
>>> index 000000000000..6f3971b4df99
>>> --- /dev/null
>>> +++ b/arch/arm64/boot/dts/amlogic/amlogic-t7.dtsi
>>> @@ -0,0 +1,158 @@
>>> +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
>>> +/*
>>> + * Copyright (c) 2019 Amlogic, Inc. All rights reserved.
>>> + */
>>> +
>>> +#include <dt-bindings/interrupt-controller/arm-gic.h>
>>> +
>>> +/ {
>>> +       interrupt-parent = <&gic>;
>>> +       #address-cells = <2>;
>>> +       #size-cells = <2>;
>>> +
>>> +       cpus {
>>> +               #address-cells = <0x2>;
>>> +               #size-cells = <0x0>;
>>> +
>>> +               cpu-map {
>>> +                       cluster0 {
>>> +                               core0 {
>>> +                                       cpu = <&cpu100>;
>>> +                               };
>>> +                               core1 {
>>> +                                       cpu = <&cpu101>;
>>> +                               };
>>> +                               core2 {
>>> +                                       cpu = <&cpu102>;
>>> +                               };
>>> +                               core3 {
>>> +                                       cpu = <&cpu103>;
>>> +                               };
>>> +                       };
>>> +
>>> +                       cluster1 {
>>> +                               core0 {
>>> +                                       cpu = <&cpu0>;
>>> +                               };
>>> +                               core1 {
>>> +                                       cpu = <&cpu1>;
>>> +                               };
>>> +                               core2 {
>>> +                                       cpu = <&cpu2>;
>>> +                               };
>>> +                               core3 {
>>> +                                       cpu = <&cpu3>;
>>> +                               };
>>> +                       };
>>> +               };
>>> +
>>> +               cpu100: cpu@100 {
>>> +                       device_type = "cpu";
>>> +                       compatible = "arm,cortex-a53";
>>> +                       reg = <0x0 0x100>;
>>> +                       enable-method = "psci";
>>> +               };
>>> +
>>> +               cpu101: cpu@101{
>>> +                       device_type = "cpu";
>>> +                       compatible = "arm,cortex-a53";
>>> +                       reg = <0x0 0x101>;
>>> +                       enable-method = "psci";
>>> +               };
>>> +
>>> +               cpu102: cpu@102 {
>>> +                       device_type = "cpu";
>>> +                       compatible = "arm,cortex-a53";
>>> +                       reg = <0x0 0x102>;
>>> +                       enable-method = "psci";
>>> +               };
>>> +
>>> +               cpu103: cpu@103 {
>>> +                       device_type = "cpu";
>>> +                       compatible = "arm,cortex-a53";
>>> +                       reg = <0x0 0x103>;
>>> +                       enable-method = "psci";
>>> +               };
>>> +
>>> +               cpu0: cpu@0 {
>>> +                       device_type = "cpu";
>>> +                       compatible = "arm,cortex-a73";
>>> +                       reg = <0x0 0x0>;
>>> +                       enable-method = "psci";
>>> +               };
>>> +
>>> +               cpu1: cpu@1 {
>>> +                       device_type = "cpu";
>>> +                       compatible = "arm,cortex-a73";
>>> +                       reg = <0x0 0x1>;
>>> +                       enable-method = "psci";
>>> +               };
>>> +
>>> +               cpu2: cpu@2 {
>>> +                       device_type = "cpu";
>>> +                       compatible = "arm,cortex-a73";
>>> +                       reg = <0x0 0x2>;
>>> +                       enable-method = "psci";
>>> +               };
>>> +
>>> +               cpu3: cpu@3 {
>>> +                       device_type = "cpu";
>>> +                       compatible = "arm,cortex-a73";
>>> +                       reg = <0x0 0x3>;
>>> +                       enable-method = "psci";
>>> +               };
>>> +       };
>>> +
>>> +       timer {
>>> +               compatible = "arm,armv8-timer";
>>> +               interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
>>> +                            <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
>>> +                            <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
>>> +                            <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
>>> +       };
>> cpu number is 8, not 4, need use GIC_CPU_MASK_SIMPLE(8)
>>> +
>>> +       psci {
>>> +               compatible = "arm,psci-1.0";
>>> +               method = "smc";
>>> +       };
>>> +
>>> +       sm: secure-monitor {
>>> +               compatible = "amlogic,meson-gxbb-sm";
>>> +       };
>>> +
>>> +       soc {
>>> +               compatible = "simple-bus";
>>> +               #address-cells = <2>;
>>> +               #size-cells = <2>;
>>> +               ranges;
>>> +
>>> +               gic: interrupt-controller@fff01000 {
>>> +                       compatible = "arm,gic-400";
>>> +                       #interrupt-cells = <3>;
>>> +                       #address-cells = <0>;
>>> +                       interrupt-controller;
>>> +                       reg = <0x0 0xfff01000 0 0x1000>,
>>> +                             <0x0 0xfff02000 0 0x0100>;
>>> +                       interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
>> cpu number is 8, not 4, need use GIC_CPU_MASK_SIMPLE(8)
> OK
> 
>>> +               };
>>> +
>>> +               apb4: bus@fe000000 {
>>> +                       compatible = "simple-bus";
>>> +                       reg = <0x0 0xfe000000 0x0 0x480000>;
>>> +                       #address-cells = <2>;
>>> +                       #size-cells = <2>;
>>> +                       ranges = <0x0 0x0 0x0 0xfe000000 0x0 0x480000>;
>>> +
>>> +                       uart_A: serial@78000 {
>> use lowercase, "uart_a"
> 
> OK
>>> +                               compatible = "amlogic,t7-uart",
>>> +                                            "amlogic,meson-s4-uart";
>>> +                               reg = <0x0 0x78000 0x0 0x18>;
>>> +                               interrupts = <GIC_SPI 168 IRQ_TYPE_EDGE_RISING>;
>>> +                               status = "disabled";
>>> +                               clocks = <&xtal>, <&xtal>, <&xtal>
>> "xtal" why defined in  amlogic-t7-a311d2-khadas-vim4.dts files
> 
> The 24MHz clock is a crystal in VIm4 schematic, so its something the
> board did to provide that clock.
> Other boards using a311d2 could provide that clock in a different way.
> Or are you saying that this clock is mandatory at boot time, and all
> boards using this chip will have the same crystal?
> 

The board must use crystal, different boards maybe use different
frequency. DTSI file be included by other DTS or DTSI files.
It is strange that DTSI file reference DTS file's  property .
The property "xtal" can  be defined in DTSI file, DTS file can Change 
the "frequency" if necessary, like other property.

>>> +                               clock-names = "xtal", "pclk", "baud";
>>> +                       };
>>> +               };
>>> +
>>> +       };
>>> +};
>>> --
>>> 2.41.0
>>>

^ permalink raw reply	[flat|nested] 36+ messages in thread

end of thread, other threads:[~2023-06-29  7:51 UTC | newest]

Thread overview: 36+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2023-06-27  9:10 [PATCH v6 0/4] Add Amlogic A311D2 and Khadas Vim4 Board Support Lucas Tanure
2023-06-27  9:10 ` Lucas Tanure
2023-06-27  9:10 ` Lucas Tanure
2023-06-27  9:10 ` [PATCH v6 1/4] dt-bindings: arm: amlogic: add Amlogic A311D2 bindings Lucas Tanure
2023-06-27  9:10   ` Lucas Tanure
2023-06-27  9:10   ` Lucas Tanure
2023-06-27  9:10 ` [PATCH v6 2/4] dt-bindings: serial: amlogic,meson-uart: Add compatible string for T7 Lucas Tanure
2023-06-27  9:10   ` Lucas Tanure
2023-06-27  9:10   ` Lucas Tanure
2023-06-27 10:38   ` Krzysztof Kozlowski
2023-06-27 10:38     ` Krzysztof Kozlowski
2023-06-27 10:38     ` Krzysztof Kozlowski
2023-06-27  9:10 ` [PATCH v6 3/4] tty: serial: meson: Add a earlycon for the T7 SoC Lucas Tanure
2023-06-27  9:10   ` Lucas Tanure
2023-06-27  9:10   ` Lucas Tanure
2023-06-27  9:12   ` Neil Armstrong
2023-06-27  9:12     ` Neil Armstrong
2023-06-27  9:12     ` Neil Armstrong
2023-06-27  9:16     ` Lucas Tanure
2023-06-27  9:16       ` Lucas Tanure
2023-06-27  9:16       ` Lucas Tanure
2023-06-27  9:10 ` [PATCH v6 4/4] arm64: dts: amlogic-t7-a311d2-khadas-vim4: add initial device-tree Lucas Tanure
2023-06-27  9:10   ` Lucas Tanure
2023-06-27  9:10   ` Lucas Tanure
2023-06-27  9:21   ` Xianwei Zhao
2023-06-27  9:21     ` Xianwei Zhao
2023-06-27  9:21     ` Xianwei Zhao
2023-06-29  7:10     ` Lucas Tanure
2023-06-29  7:10       ` Lucas Tanure
2023-06-29  7:10       ` Lucas Tanure
2023-06-29  7:36       ` Xianwei Zhao
2023-06-29  7:36         ` Xianwei Zhao
2023-06-29  7:36         ` Xianwei Zhao
2023-06-29  7:48       ` Xianwei Zhao
2023-06-29  7:48         ` Xianwei Zhao
2023-06-29  7:48         ` Xianwei Zhao

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