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* [PATCH 1/2] drm/i915: Verify workarounds immediately after application
@ 2019-04-16 13:14 Chris Wilson
  2019-04-16 13:14 ` [PATCH 2/2] drm/i915: Verify the engine workarounds stick on application Chris Wilson
                   ` (2 more replies)
  0 siblings, 3 replies; 12+ messages in thread
From: Chris Wilson @ 2019-04-16 13:14 UTC (permalink / raw)
  To: intel-gfx

Immediately after writing the workaround, verify that it stuck in the
register.

References: https://bugs.freedesktop.org/show_bug.cgi?id=108954
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
---
 drivers/gpu/drm/i915/intel_workarounds.c | 32 +++++++++++++-----------
 1 file changed, 18 insertions(+), 14 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_workarounds.c b/drivers/gpu/drm/i915/intel_workarounds.c
index ccaf63679435..ea9292ee755a 100644
--- a/drivers/gpu/drm/i915/intel_workarounds.c
+++ b/drivers/gpu/drm/i915/intel_workarounds.c
@@ -913,6 +913,20 @@ wal_get_fw_for_rmw(struct intel_uncore *uncore, const struct i915_wa_list *wal)
 	return fw;
 }
 
+static bool
+wa_verify(const struct i915_wa *wa, u32 cur, const char *name, const char *from)
+{
+	if ((cur ^ wa->val) & wa->mask) {
+		DRM_ERROR("%s workaround lost on %s! (%x=%x/%x, expected %x, mask=%x)\n",
+			  name, from, i915_mmio_reg_offset(wa->reg), cur,
+			  cur & wa->mask, wa->val, wa->mask);
+
+		return false;
+	}
+
+	return true;
+}
+
 static void
 wa_list_apply(struct intel_uncore *uncore, const struct i915_wa_list *wal)
 {
@@ -931,6 +945,10 @@ wa_list_apply(struct intel_uncore *uncore, const struct i915_wa_list *wal)
 
 	for (i = 0, wa = wal->list; i < wal->count; i++, wa++) {
 		intel_uncore_rmw_fw(uncore, wa->reg, wa->mask, wa->val);
+		if (IS_ENABLED(CONFIG_DRM_I915_DEBUG_GEM))
+			wa_verify(wa,
+				  intel_uncore_read_fw(uncore, wa->reg),
+				  wal->name, "application");
 	}
 
 	intel_uncore_forcewake_put__locked(uncore, fw);
@@ -942,20 +960,6 @@ void intel_gt_apply_workarounds(struct drm_i915_private *i915)
 	wa_list_apply(&i915->uncore, &i915->gt_wa_list);
 }
 
-static bool
-wa_verify(const struct i915_wa *wa, u32 cur, const char *name, const char *from)
-{
-	if ((cur ^ wa->val) & wa->mask) {
-		DRM_ERROR("%s workaround lost on %s! (%x=%x/%x, expected %x, mask=%x)\n",
-			  name, from, i915_mmio_reg_offset(wa->reg), cur,
-			  cur & wa->mask, wa->val, wa->mask);
-
-		return false;
-	}
-
-	return true;
-}
-
 static bool wa_list_verify(struct intel_uncore *uncore,
 			   const struct i915_wa_list *wal,
 			   const char *from)
-- 
2.20.1

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply related	[flat|nested] 12+ messages in thread

* [PATCH 2/2] drm/i915: Verify the engine workarounds stick on application
  2019-04-16 13:14 [PATCH 1/2] drm/i915: Verify workarounds immediately after application Chris Wilson
@ 2019-04-16 13:14 ` Chris Wilson
  2019-04-16 14:10   ` Tvrtko Ursulin
  2019-04-16 14:05 ` ✓ Fi.CI.BAT: success for series starting with [1/2] drm/i915: Verify workarounds immediately after application Patchwork
  2019-04-16 19:48 ` ✗ Fi.CI.IGT: failure " Patchwork
  2 siblings, 1 reply; 12+ messages in thread
From: Chris Wilson @ 2019-04-16 13:14 UTC (permalink / raw)
  To: intel-gfx

Read the engine workarounds back using the GPU after loading the initial
context state to verify that we are setting them correctly, and bail if
it fails.

v2: Break out the verification into its own loop

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
---
 drivers/gpu/drm/i915/i915_gem.c               |  21 +++
 drivers/gpu/drm/i915/intel_workarounds.c      | 120 ++++++++++++++++++
 drivers/gpu/drm/i915/intel_workarounds.h      |   2 +
 .../drm/i915/selftests/intel_workarounds.c    |  53 +-------
 4 files changed, 149 insertions(+), 47 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index 0a818a60ad31..a5412323fee1 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -4842,6 +4842,23 @@ static void i915_gem_fini_scratch(struct drm_i915_private *i915)
 	i915_vma_unpin_and_release(&i915->gt.scratch, 0);
 }
 
+static int intel_engines_verify_workarounds(struct drm_i915_private *i915)
+{
+	struct intel_engine_cs *engine;
+	enum intel_engine_id id;
+	int err = 0;
+
+	if (!IS_ENABLED(CONFIG_DRM_I915_DEBUG_GEM))
+		return 0;
+
+	for_each_engine(engine, i915, id) {
+		if (intel_engine_verify_workarounds(engine, "load"))
+			err = -EIO;
+	}
+
+	return err;
+}
+
 int i915_gem_init(struct drm_i915_private *dev_priv)
 {
 	int ret;
@@ -4927,6 +4944,10 @@ int i915_gem_init(struct drm_i915_private *dev_priv)
 	 */
 	intel_init_clock_gating(dev_priv);
 
+	ret = intel_engines_verify_workarounds(dev_priv);
+	if (ret)
+		goto err_init_hw;
+
 	ret = __intel_engines_record_defaults(dev_priv);
 	if (ret)
 		goto err_init_hw;
diff --git a/drivers/gpu/drm/i915/intel_workarounds.c b/drivers/gpu/drm/i915/intel_workarounds.c
index ea9292ee755a..89e2c603e34b 100644
--- a/drivers/gpu/drm/i915/intel_workarounds.c
+++ b/drivers/gpu/drm/i915/intel_workarounds.c
@@ -1259,6 +1259,126 @@ void intel_engine_apply_workarounds(struct intel_engine_cs *engine)
 	wa_list_apply(engine->uncore, &engine->wa_list);
 }
 
+static struct i915_vma *
+create_scratch(struct i915_address_space *vm, int count)
+{
+	struct drm_i915_gem_object *obj;
+	struct i915_vma *vma;
+	unsigned int size;
+	int err;
+
+	size = round_up(count * sizeof(u32), PAGE_SIZE);
+	obj = i915_gem_object_create_internal(vm->i915, size);
+	if (IS_ERR(obj))
+		return ERR_CAST(obj);
+
+	i915_gem_object_set_cache_coherency(obj, I915_CACHE_LLC);
+
+	vma = i915_vma_instance(obj, vm, NULL);
+	if (IS_ERR(vma)) {
+		err = PTR_ERR(vma);
+		goto err_obj;
+	}
+
+	err = i915_vma_pin(vma, 0, 0,
+			   i915_vma_is_ggtt(vma) ? PIN_GLOBAL : PIN_USER);
+	if (err)
+		goto err_obj;
+
+	return vma;
+
+err_obj:
+	i915_gem_object_put(obj);
+	return ERR_PTR(err);
+}
+
+static int
+wa_list_srm(struct i915_request *rq,
+	    const struct i915_wa_list *wal,
+	    struct i915_vma *vma)
+{
+	const struct i915_wa *wa;
+	unsigned int i;
+	u32 srm, *cs;
+
+	srm = MI_STORE_REGISTER_MEM | MI_SRM_LRM_GLOBAL_GTT;
+	if (INTEL_GEN(rq->i915) >= 8)
+		srm++;
+
+	cs = intel_ring_begin(rq, 4 * wal->count);
+	if (IS_ERR(cs))
+		return PTR_ERR(cs);
+
+	for (i = 0, wa = wal->list; i < wal->count; i++, wa++) {
+		*cs++ = srm;
+		*cs++ = i915_mmio_reg_offset(wa->reg);
+		*cs++ = i915_ggtt_offset(vma) + sizeof(u32) * i;
+		*cs++ = 0;
+	}
+	intel_ring_advance(rq, cs);
+
+	return 0;
+}
+
+static int engine_wa_list_verify(struct intel_engine_cs *engine,
+				 const struct i915_wa_list * const wal,
+				 const char *from)
+{
+	const struct i915_wa *wa;
+	struct i915_request *rq;
+	struct i915_vma *vma;
+	unsigned int i;
+	u32 *results;
+	int err;
+
+	if (!wal->count)
+		return 0;
+
+	vma = create_scratch(&engine->i915->ggtt.vm, wal->count);
+	if (IS_ERR(vma))
+		return PTR_ERR(vma);
+
+	rq = i915_request_alloc(engine, engine->kernel_context->gem_context);
+	if (IS_ERR(rq)) {
+		err = PTR_ERR(rq);
+		goto err_vma;
+	}
+
+	err = wa_list_srm(rq, wal, vma);
+	if (err)
+		goto err_vma;
+
+	i915_request_add(rq);
+	if (i915_request_wait(rq, I915_WAIT_LOCKED, HZ / 5) < 0) {
+		err = -ETIME;
+		goto err_vma;
+	}
+
+	results = i915_gem_object_pin_map(vma->obj, I915_MAP_WB);
+	if (IS_ERR(results)) {
+		err = PTR_ERR(results);
+		goto err_vma;
+	}
+
+	err = 0;
+	for (i = 0, wa = wal->list; i < wal->count; i++, wa++)
+		if (!wa_verify(wa, results[i], wal->name, from))
+			err = -ENXIO;
+
+	i915_gem_object_unpin_map(vma->obj);
+
+err_vma:
+	i915_vma_unpin(vma);
+	i915_vma_put(vma);
+	return err;
+}
+
+int intel_engine_verify_workarounds(struct intel_engine_cs *engine,
+				    const char *from)
+{
+	return engine_wa_list_verify(engine, &engine->wa_list, from);
+}
+
 #if IS_ENABLED(CONFIG_DRM_I915_SELFTEST)
 #include "selftests/intel_workarounds.c"
 #endif
diff --git a/drivers/gpu/drm/i915/intel_workarounds.h b/drivers/gpu/drm/i915/intel_workarounds.h
index 34eee5ec511e..fdf7ebb90f28 100644
--- a/drivers/gpu/drm/i915/intel_workarounds.h
+++ b/drivers/gpu/drm/i915/intel_workarounds.h
@@ -30,5 +30,7 @@ void intel_engine_apply_whitelist(struct intel_engine_cs *engine);
 
 void intel_engine_init_workarounds(struct intel_engine_cs *engine);
 void intel_engine_apply_workarounds(struct intel_engine_cs *engine);
+int intel_engine_verify_workarounds(struct intel_engine_cs *engine,
+				    const char *from);
 
 #endif
diff --git a/drivers/gpu/drm/i915/selftests/intel_workarounds.c b/drivers/gpu/drm/i915/selftests/intel_workarounds.c
index 567b6f8dae86..a363748a7a4f 100644
--- a/drivers/gpu/drm/i915/selftests/intel_workarounds.c
+++ b/drivers/gpu/drm/i915/selftests/intel_workarounds.c
@@ -340,49 +340,6 @@ static int check_whitelist_across_reset(struct intel_engine_cs *engine,
 	return err;
 }
 
-static struct i915_vma *create_scratch(struct i915_gem_context *ctx)
-{
-	struct drm_i915_gem_object *obj;
-	struct i915_vma *vma;
-	void *ptr;
-	int err;
-
-	obj = i915_gem_object_create_internal(ctx->i915, PAGE_SIZE);
-	if (IS_ERR(obj))
-		return ERR_CAST(obj);
-
-	i915_gem_object_set_cache_coherency(obj, I915_CACHE_LLC);
-
-	ptr = i915_gem_object_pin_map(obj, I915_MAP_WB);
-	if (IS_ERR(ptr)) {
-		err = PTR_ERR(ptr);
-		goto err_obj;
-	}
-	memset(ptr, 0xc5, PAGE_SIZE);
-	i915_gem_object_flush_map(obj);
-	i915_gem_object_unpin_map(obj);
-
-	vma = i915_vma_instance(obj, &ctx->ppgtt->vm, NULL);
-	if (IS_ERR(vma)) {
-		err = PTR_ERR(vma);
-		goto err_obj;
-	}
-
-	err = i915_vma_pin(vma, 0, 0, PIN_USER);
-	if (err)
-		goto err_obj;
-
-	err = i915_gem_object_set_to_cpu_domain(obj, false);
-	if (err)
-		goto err_obj;
-
-	return vma;
-
-err_obj:
-	i915_gem_object_put(obj);
-	return ERR_PTR(err);
-}
-
 static struct i915_vma *create_batch(struct i915_gem_context *ctx)
 {
 	struct drm_i915_gem_object *obj;
@@ -475,7 +432,7 @@ static int check_dirty_whitelist(struct i915_gem_context *ctx,
 	int err = 0, i, v;
 	u32 *cs, *results;
 
-	scratch = create_scratch(ctx);
+	scratch = create_scratch(&ctx->ppgtt->vm, 2 * ARRAY_SIZE(values) + 1);
 	if (IS_ERR(scratch))
 		return PTR_ERR(scratch);
 
@@ -752,9 +709,11 @@ static bool verify_gt_engine_wa(struct drm_i915_private *i915,
 
 	ok &= wa_list_verify(&i915->uncore, &lists->gt_wa_list, str);
 
-	for_each_engine(engine, i915, id)
-		ok &= wa_list_verify(engine->uncore,
-				     &lists->engine[id].wa_list, str);
+	for_each_engine(engine, i915, id) {
+		ok &= engine_wa_list_verify(engine,
+					    &lists->engine[id].wa_list,
+					    str) == 0;
+	}
 
 	return ok;
 }
-- 
2.20.1

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply related	[flat|nested] 12+ messages in thread

* ✓ Fi.CI.BAT: success for series starting with [1/2] drm/i915: Verify workarounds immediately after application
  2019-04-16 13:14 [PATCH 1/2] drm/i915: Verify workarounds immediately after application Chris Wilson
  2019-04-16 13:14 ` [PATCH 2/2] drm/i915: Verify the engine workarounds stick on application Chris Wilson
@ 2019-04-16 14:05 ` Patchwork
  2019-04-16 19:48 ` ✗ Fi.CI.IGT: failure " Patchwork
  2 siblings, 0 replies; 12+ messages in thread
From: Patchwork @ 2019-04-16 14:05 UTC (permalink / raw)
  To: Chris Wilson; +Cc: intel-gfx

== Series Details ==

Series: series starting with [1/2] drm/i915: Verify workarounds immediately after application
URL   : https://patchwork.freedesktop.org/series/59579/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_5938 -> Patchwork_12816
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  External URL: https://patchwork.freedesktop.org/api/1.0/series/59579/revisions/1/mbox/

Known issues
------------

  Here are the changes found in Patchwork_12816 that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@amdgpu/amd_basic@semaphore:
    - fi-bdw-5557u:       NOTRUN -> SKIP [fdo#109271] +38

  * igt@amdgpu/amd_cs_nop@fork-compute0:
    - fi-icl-y:           NOTRUN -> SKIP [fdo#109315] +17

  * igt@amdgpu/amd_cs_nop@sync-fork-compute0:
    - fi-icl-u3:          NOTRUN -> SKIP [fdo#109315] +17

  * igt@gem_exec_basic@basic-bsd2:
    - fi-icl-y:           NOTRUN -> SKIP [fdo#109276] +7

  * igt@gem_exec_basic@gtt-bsd1:
    - fi-icl-u3:          NOTRUN -> SKIP [fdo#109276] +7

  * igt@gem_exec_parse@basic-rejected:
    - fi-icl-u3:          NOTRUN -> SKIP [fdo#109289] +1
    - fi-icl-y:           NOTRUN -> SKIP [fdo#109289] +1

  * igt@i915_selftest@live_contexts:
    - fi-bdw-gvtdvm:      PASS -> DMESG-FAIL [fdo#110235 ]

  * igt@kms_chamelium@dp-crc-fast:
    - fi-icl-y:           NOTRUN -> SKIP [fdo#109284] +8

  * igt@kms_chamelium@hdmi-edid-read:
    - fi-icl-u3:          NOTRUN -> SKIP [fdo#109284] +8

  * igt@kms_force_connector_basic@force-load-detect:
    - fi-icl-y:           NOTRUN -> SKIP [fdo#109285] +3

  * igt@kms_force_connector_basic@prune-stale-modes:
    - fi-icl-u3:          NOTRUN -> SKIP [fdo#109285] +3

  * igt@kms_psr@cursor_plane_move:
    - fi-skl-6260u:       NOTRUN -> SKIP [fdo#109271] +37

  * igt@kms_psr@primary_mmap_gtt:
    - fi-icl-y:           NOTRUN -> SKIP [fdo#110189] +3

  * igt@prime_vgem@basic-fence-flip:
    - fi-icl-y:           NOTRUN -> SKIP [fdo#109294]

  
#### Possible fixes ####

  * igt@i915_selftest@live_contexts:
    - fi-skl-gvtdvm:      DMESG-FAIL [fdo#110235 ] -> PASS

  * igt@i915_selftest@live_execlists:
    - fi-apl-guc:         INCOMPLETE [fdo#103927] / [fdo#109720] -> PASS

  * igt@kms_frontbuffer_tracking@basic:
    - fi-byt-clapper:     FAIL [fdo#103167] -> PASS

  
  [fdo#103167]: https://bugs.freedesktop.org/show_bug.cgi?id=103167
  [fdo#103927]: https://bugs.freedesktop.org/show_bug.cgi?id=103927
  [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
  [fdo#109276]: https://bugs.freedesktop.org/show_bug.cgi?id=109276
  [fdo#109284]: https://bugs.freedesktop.org/show_bug.cgi?id=109284
  [fdo#109285]: https://bugs.freedesktop.org/show_bug.cgi?id=109285
  [fdo#109289]: https://bugs.freedesktop.org/show_bug.cgi?id=109289
  [fdo#109294]: https://bugs.freedesktop.org/show_bug.cgi?id=109294
  [fdo#109315]: https://bugs.freedesktop.org/show_bug.cgi?id=109315
  [fdo#109720]: https://bugs.freedesktop.org/show_bug.cgi?id=109720
  [fdo#110189]: https://bugs.freedesktop.org/show_bug.cgi?id=110189
  [fdo#110235 ]: https://bugs.freedesktop.org/show_bug.cgi?id=110235 


Participating hosts (47 -> 44)
------------------------------

  Additional (3): fi-icl-y fi-bdw-5557u fi-skl-6260u 
  Missing    (6): fi-kbl-soraka fi-ilk-m540 fi-hsw-4200u fi-bsw-cyan fi-ctg-p8600 fi-bdw-samus 


Build changes
-------------

    * Linux: CI_DRM_5938 -> Patchwork_12816

  CI_DRM_5938: 61a332623362ea87cdde81115229b1b955335654 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_4951: cc9a60c029432b5843724e4f2c57f9f815f7adbb @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  Patchwork_12816: 1fcada518ec8f301a3f8c77bb3d1f22a5368f578 @ git://anongit.freedesktop.org/gfx-ci/linux


== Linux commits ==

1fcada518ec8 drm/i915: Verify the engine workarounds stick on application
0fe56c9cea0e drm/i915: Verify workarounds immediately after application

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12816/
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 12+ messages in thread

* Re: [PATCH 2/2] drm/i915: Verify the engine workarounds stick on application
  2019-04-16 13:14 ` [PATCH 2/2] drm/i915: Verify the engine workarounds stick on application Chris Wilson
@ 2019-04-16 14:10   ` Tvrtko Ursulin
  2019-04-16 14:17     ` Chris Wilson
  0 siblings, 1 reply; 12+ messages in thread
From: Tvrtko Ursulin @ 2019-04-16 14:10 UTC (permalink / raw)
  To: Chris Wilson, intel-gfx


On 16/04/2019 14:14, Chris Wilson wrote:
> Read the engine workarounds back using the GPU after loading the initial
> context state to verify that we are setting them correctly, and bail if
> it fails.
> 
> v2: Break out the verification into its own loop
> 
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
> ---
>   drivers/gpu/drm/i915/i915_gem.c               |  21 +++
>   drivers/gpu/drm/i915/intel_workarounds.c      | 120 ++++++++++++++++++
>   drivers/gpu/drm/i915/intel_workarounds.h      |   2 +
>   .../drm/i915/selftests/intel_workarounds.c    |  53 +-------
>   4 files changed, 149 insertions(+), 47 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
> index 0a818a60ad31..a5412323fee1 100644
> --- a/drivers/gpu/drm/i915/i915_gem.c
> +++ b/drivers/gpu/drm/i915/i915_gem.c
> @@ -4842,6 +4842,23 @@ static void i915_gem_fini_scratch(struct drm_i915_private *i915)
>   	i915_vma_unpin_and_release(&i915->gt.scratch, 0);
>   }
>   
> +static int intel_engines_verify_workarounds(struct drm_i915_private *i915)
> +{
> +	struct intel_engine_cs *engine;
> +	enum intel_engine_id id;
> +	int err = 0;
> +
> +	if (!IS_ENABLED(CONFIG_DRM_I915_DEBUG_GEM))
> +		return 0;
> +
> +	for_each_engine(engine, i915, id) {
> +		if (intel_engine_verify_workarounds(engine, "load"))
> +			err = -EIO;
> +	}
> +
> +	return err;
> +}
> +
>   int i915_gem_init(struct drm_i915_private *dev_priv)
>   {
>   	int ret;
> @@ -4927,6 +4944,10 @@ int i915_gem_init(struct drm_i915_private *dev_priv)
>   	 */
>   	intel_init_clock_gating(dev_priv);
>   
> +	ret = intel_engines_verify_workarounds(dev_priv);
> +	if (ret)
> +		goto err_init_hw;
> +
>   	ret = __intel_engines_record_defaults(dev_priv);
>   	if (ret)
>   		goto err_init_hw;
> diff --git a/drivers/gpu/drm/i915/intel_workarounds.c b/drivers/gpu/drm/i915/intel_workarounds.c
> index ea9292ee755a..89e2c603e34b 100644
> --- a/drivers/gpu/drm/i915/intel_workarounds.c
> +++ b/drivers/gpu/drm/i915/intel_workarounds.c
> @@ -1259,6 +1259,126 @@ void intel_engine_apply_workarounds(struct intel_engine_cs *engine)
>   	wa_list_apply(engine->uncore, &engine->wa_list);
>   }
>   
> +static struct i915_vma *
> +create_scratch(struct i915_address_space *vm, int count)
> +{
> +	struct drm_i915_gem_object *obj;
> +	struct i915_vma *vma;
> +	unsigned int size;
> +	int err;
> +
> +	size = round_up(count * sizeof(u32), PAGE_SIZE);
> +	obj = i915_gem_object_create_internal(vm->i915, size);
> +	if (IS_ERR(obj))
> +		return ERR_CAST(obj);
> +
> +	i915_gem_object_set_cache_coherency(obj, I915_CACHE_LLC);
> +
> +	vma = i915_vma_instance(obj, vm, NULL);
> +	if (IS_ERR(vma)) {
> +		err = PTR_ERR(vma);
> +		goto err_obj;
> +	}
> +
> +	err = i915_vma_pin(vma, 0, 0,
> +			   i915_vma_is_ggtt(vma) ? PIN_GLOBAL : PIN_USER);
> +	if (err)
> +		goto err_obj;
> +
> +	return vma;
> +
> +err_obj:
> +	i915_gem_object_put(obj);
> +	return ERR_PTR(err);
> +}
> +
> +static int
> +wa_list_srm(struct i915_request *rq,
> +	    const struct i915_wa_list *wal,
> +	    struct i915_vma *vma)
> +{
> +	const struct i915_wa *wa;
> +	unsigned int i;
> +	u32 srm, *cs;
> +
> +	srm = MI_STORE_REGISTER_MEM | MI_SRM_LRM_GLOBAL_GTT;
> +	if (INTEL_GEN(rq->i915) >= 8)
> +		srm++;
> +
> +	cs = intel_ring_begin(rq, 4 * wal->count);
> +	if (IS_ERR(cs))
> +		return PTR_ERR(cs);
> +
> +	for (i = 0, wa = wal->list; i < wal->count; i++, wa++) {
> +		*cs++ = srm;
> +		*cs++ = i915_mmio_reg_offset(wa->reg);
> +		*cs++ = i915_ggtt_offset(vma) + sizeof(u32) * i;
> +		*cs++ = 0;
> +	}
> +	intel_ring_advance(rq, cs);
> +
> +	return 0;
> +}
> +
> +static int engine_wa_list_verify(struct intel_engine_cs *engine,
> +				 const struct i915_wa_list * const wal,
> +				 const char *from)
> +{
> +	const struct i915_wa *wa;
> +	struct i915_request *rq;
> +	struct i915_vma *vma;
> +	unsigned int i;
> +	u32 *results;
> +	int err;
> +
> +	if (!wal->count)
> +		return 0;
> +
> +	vma = create_scratch(&engine->i915->ggtt.vm, wal->count);
> +	if (IS_ERR(vma))
> +		return PTR_ERR(vma);
> +
> +	rq = i915_request_alloc(engine, engine->kernel_context->gem_context);
> +	if (IS_ERR(rq)) {
> +		err = PTR_ERR(rq);
> +		goto err_vma;
> +	}
> +
> +	err = wa_list_srm(rq, wal, vma);
> +	if (err)
> +		goto err_vma;
> +
> +	i915_request_add(rq);
> +	if (i915_request_wait(rq, I915_WAIT_LOCKED, HZ / 5) < 0) {
> +		err = -ETIME;
> +		goto err_vma;
> +	}
> +
> +	results = i915_gem_object_pin_map(vma->obj, I915_MAP_WB);
> +	if (IS_ERR(results)) {
> +		err = PTR_ERR(results);
> +		goto err_vma;
> +	}
> +
> +	err = 0;
> +	for (i = 0, wa = wal->list; i < wal->count; i++, wa++)
> +		if (!wa_verify(wa, results[i], wal->name, from))
> +			err = -ENXIO;
> +
> +	i915_gem_object_unpin_map(vma->obj);
> +
> +err_vma:
> +	i915_vma_unpin(vma);
> +	i915_vma_put(vma);
> +	return err;
> +}
> +
> +int intel_engine_verify_workarounds(struct intel_engine_cs *engine,
> +				    const char *from)
> +{
> +	return engine_wa_list_verify(engine, &engine->wa_list, from);
> +}
> +
>   #if IS_ENABLED(CONFIG_DRM_I915_SELFTEST)
>   #include "selftests/intel_workarounds.c"
>   #endif
> diff --git a/drivers/gpu/drm/i915/intel_workarounds.h b/drivers/gpu/drm/i915/intel_workarounds.h
> index 34eee5ec511e..fdf7ebb90f28 100644
> --- a/drivers/gpu/drm/i915/intel_workarounds.h
> +++ b/drivers/gpu/drm/i915/intel_workarounds.h
> @@ -30,5 +30,7 @@ void intel_engine_apply_whitelist(struct intel_engine_cs *engine);
>   
>   void intel_engine_init_workarounds(struct intel_engine_cs *engine);
>   void intel_engine_apply_workarounds(struct intel_engine_cs *engine);
> +int intel_engine_verify_workarounds(struct intel_engine_cs *engine,
> +				    const char *from);
>   
>   #endif
> diff --git a/drivers/gpu/drm/i915/selftests/intel_workarounds.c b/drivers/gpu/drm/i915/selftests/intel_workarounds.c
> index 567b6f8dae86..a363748a7a4f 100644
> --- a/drivers/gpu/drm/i915/selftests/intel_workarounds.c
> +++ b/drivers/gpu/drm/i915/selftests/intel_workarounds.c
> @@ -340,49 +340,6 @@ static int check_whitelist_across_reset(struct intel_engine_cs *engine,
>   	return err;
>   }
>   
> -static struct i915_vma *create_scratch(struct i915_gem_context *ctx)
> -{
> -	struct drm_i915_gem_object *obj;
> -	struct i915_vma *vma;
> -	void *ptr;
> -	int err;
> -
> -	obj = i915_gem_object_create_internal(ctx->i915, PAGE_SIZE);
> -	if (IS_ERR(obj))
> -		return ERR_CAST(obj);
> -
> -	i915_gem_object_set_cache_coherency(obj, I915_CACHE_LLC);
> -
> -	ptr = i915_gem_object_pin_map(obj, I915_MAP_WB);
> -	if (IS_ERR(ptr)) {
> -		err = PTR_ERR(ptr);
> -		goto err_obj;
> -	}
> -	memset(ptr, 0xc5, PAGE_SIZE);
> -	i915_gem_object_flush_map(obj);
> -	i915_gem_object_unpin_map(obj);
> -
> -	vma = i915_vma_instance(obj, &ctx->ppgtt->vm, NULL);
> -	if (IS_ERR(vma)) {
> -		err = PTR_ERR(vma);
> -		goto err_obj;
> -	}
> -
> -	err = i915_vma_pin(vma, 0, 0, PIN_USER);
> -	if (err)
> -		goto err_obj;
> -
> -	err = i915_gem_object_set_to_cpu_domain(obj, false);
> -	if (err)
> -		goto err_obj;
> -
> -	return vma;
> -
> -err_obj:
> -	i915_gem_object_put(obj);
> -	return ERR_PTR(err);
> -}
> -
>   static struct i915_vma *create_batch(struct i915_gem_context *ctx)
>   {
>   	struct drm_i915_gem_object *obj;
> @@ -475,7 +432,7 @@ static int check_dirty_whitelist(struct i915_gem_context *ctx,
>   	int err = 0, i, v;
>   	u32 *cs, *results;
>   
> -	scratch = create_scratch(ctx);
> +	scratch = create_scratch(&ctx->ppgtt->vm, 2 * ARRAY_SIZE(values) + 1);
>   	if (IS_ERR(scratch))
>   		return PTR_ERR(scratch);
>   
> @@ -752,9 +709,11 @@ static bool verify_gt_engine_wa(struct drm_i915_private *i915,
>   
>   	ok &= wa_list_verify(&i915->uncore, &lists->gt_wa_list, str);
>   
> -	for_each_engine(engine, i915, id)
> -		ok &= wa_list_verify(engine->uncore,
> -				     &lists->engine[id].wa_list, str);
> +	for_each_engine(engine, i915, id) {
> +		ok &= engine_wa_list_verify(engine,
> +					    &lists->engine[id].wa_list,
> +					    str) == 0;
> +	}
>   
>   	return ok;
>   }
> 

Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>

Regards,

Tvrtko
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 12+ messages in thread

* Re: [PATCH 2/2] drm/i915: Verify the engine workarounds stick on application
  2019-04-16 14:10   ` Tvrtko Ursulin
@ 2019-04-16 14:17     ` Chris Wilson
  2019-04-16 14:53       ` Tvrtko Ursulin
  0 siblings, 1 reply; 12+ messages in thread
From: Chris Wilson @ 2019-04-16 14:17 UTC (permalink / raw)
  To: Tvrtko Ursulin, intel-gfx

Quoting Tvrtko Ursulin (2019-04-16 15:10:25)
> 
> On 16/04/2019 14:14, Chris Wilson wrote:
> > Read the engine workarounds back using the GPU after loading the initial
> > context state to verify that we are setting them correctly, and bail if
> > it fails.
> > 
> > v2: Break out the verification into its own loop
> > 
> > Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> > Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
> Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>

Now we just have to decide what to do about the +47 icl failures :)
(Or however many it is this time.)
-Chris
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 12+ messages in thread

* Re: [PATCH 2/2] drm/i915: Verify the engine workarounds stick on application
  2019-04-16 14:17     ` Chris Wilson
@ 2019-04-16 14:53       ` Tvrtko Ursulin
  2019-04-16 14:59         ` Chris Wilson
  0 siblings, 1 reply; 12+ messages in thread
From: Tvrtko Ursulin @ 2019-04-16 14:53 UTC (permalink / raw)
  To: Chris Wilson, intel-gfx


On 16/04/2019 15:17, Chris Wilson wrote:
> Quoting Tvrtko Ursulin (2019-04-16 15:10:25)
>>
>> On 16/04/2019 14:14, Chris Wilson wrote:
>>> Read the engine workarounds back using the GPU after loading the initial
>>> context state to verify that we are setting them correctly, and bail if
>>> it fails.
>>>
>>> v2: Break out the verification into its own loop
>>>
>>> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
>>> Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
>> Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
> 
> Now we just have to decide what to do about the +47 icl failures :)
> (Or however many it is this time.)

I am hardly keeping pace with your patches, let alone looking at the CI 
results. :I

I see BAT success - where to see the failures and what is failing?

Regards,

Tvrtko
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 12+ messages in thread

* Re: [PATCH 2/2] drm/i915: Verify the engine workarounds stick on application
  2019-04-16 14:53       ` Tvrtko Ursulin
@ 2019-04-16 14:59         ` Chris Wilson
  2019-04-16 20:04           ` Chris Wilson
  0 siblings, 1 reply; 12+ messages in thread
From: Chris Wilson @ 2019-04-16 14:59 UTC (permalink / raw)
  To: Tvrtko Ursulin, intel-gfx

Quoting Tvrtko Ursulin (2019-04-16 15:53:40)
> 
> On 16/04/2019 15:17, Chris Wilson wrote:
> > Quoting Tvrtko Ursulin (2019-04-16 15:10:25)
> >>
> >> On 16/04/2019 14:14, Chris Wilson wrote:
> >>> Read the engine workarounds back using the GPU after loading the initial
> >>> context state to verify that we are setting them correctly, and bail if
> >>> it fails.
> >>>
> >>> v2: Break out the verification into its own loop
> >>>
> >>> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> >>> Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
> >> Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
> > 
> > Now we just have to decide what to do about the +47 icl failures :)
> > (Or however many it is this time.)
> 
> I am hardly keeping pace with your patches, let alone looking at the CI 
> results. :I
> 
> I see BAT success - where to see the failures and what is failing?

Wait for the shards. BAT just happens to have machines that work!
In the shards we have about a 30% chance (at the last count) of any test
that reloads the module to trigger a warning.
-Chris
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 12+ messages in thread

* ✗ Fi.CI.IGT: failure for series starting with [1/2] drm/i915: Verify workarounds immediately after application
  2019-04-16 13:14 [PATCH 1/2] drm/i915: Verify workarounds immediately after application Chris Wilson
  2019-04-16 13:14 ` [PATCH 2/2] drm/i915: Verify the engine workarounds stick on application Chris Wilson
  2019-04-16 14:05 ` ✓ Fi.CI.BAT: success for series starting with [1/2] drm/i915: Verify workarounds immediately after application Patchwork
@ 2019-04-16 19:48 ` Patchwork
  2 siblings, 0 replies; 12+ messages in thread
From: Patchwork @ 2019-04-16 19:48 UTC (permalink / raw)
  To: Chris Wilson; +Cc: intel-gfx

== Series Details ==

Series: series starting with [1/2] drm/i915: Verify workarounds immediately after application
URL   : https://patchwork.freedesktop.org/series/59579/
State : failure

== Summary ==

CI Bug Log - changes from CI_DRM_5938_full -> Patchwork_12816_full
====================================================

Summary
-------

  **FAILURE**

  Serious unknown changes coming with Patchwork_12816_full absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_12816_full, please notify your bug team to allow them
  to document this new failure mode, which will reduce false positives in CI.

  

Possible new issues
-------------------

  Here are the unknown changes that may have been introduced in Patchwork_12816_full:

### IGT changes ###

#### Possible regressions ####

  * igt@gem_exec_blt@normal-min:
    - shard-iclb:         NOTRUN -> SKIP +78

  * igt@i915_pm_rpm@system-suspend-execbuf:
    - shard-iclb:         PASS -> DMESG-FAIL +4

  * igt@i915_selftest@live_coherency:
    - shard-iclb:         PASS -> DMESG-WARN +13

  * igt@kms_ccs@pipe-b-ccs-on-another-bo:
    - shard-iclb:         NOTRUN -> INCOMPLETE

  * igt@kms_draw_crc@draw-method-xrgb8888-render-ytiled:
    - shard-iclb:         PASS -> INCOMPLETE +13

  * igt@kms_frontbuffer_tracking@fbcpsr-1p-offscren-pri-shrfb-draw-mmap-wc:
    - shard-iclb:         NOTRUN -> FAIL +23

  * igt@kms_frontbuffer_tracking@psr-rgb101010-draw-blt:
    - shard-iclb:         PASS -> FAIL +103

  * igt@prime_vgem@fence-wait-blt:
    - shard-iclb:         PASS -> SKIP +349

  * igt@runner@aborted:
    - shard-iclb:         NOTRUN -> ( 13 FAIL ) [fdo#108654]

  
#### Warnings ####

  * igt@i915_pm_rpm@gem-execbuf-stress-pc8:
    - shard-iclb:         SKIP [fdo#109506] -> FAIL

  * igt@i915_pm_rpm@i2c:
    - shard-iclb:         DMESG-WARN [fdo#109982] -> FAIL

  * igt@i915_pm_rpm@modeset-non-lpsp-stress:
    - shard-iclb:         SKIP [fdo#109308] -> FAIL

  * igt@i915_selftest@live_workarounds:
    - shard-iclb:         DMESG-FAIL [fdo#108954] -> DMESG-WARN

  * igt@prime_busy@wait-before-bsd2:
    - shard-iclb:         SKIP [fdo#109276] -> INCOMPLETE

  
#### Suppressed ####

  The following results come from untrusted machines, tests, or statuses.
  They do not affect the overall result.

  * {igt@gem_exec_big@single}:
    - shard-iclb:         PASS -> SKIP

  
Known issues
------------

  Here are the changes found in Patchwork_12816_full that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@gem_exec_params@invalid-bsd1-flag-on-blt:
    - shard-iclb:         PASS -> SKIP [fdo#109276] +1

  * igt@gem_tiled_swapping@non-threaded:
    - shard-iclb:         NOTRUN -> INCOMPLETE [fdo#108686]

  * igt@i915_pm_lpsp@edp-native:
    - shard-iclb:         NOTRUN -> SKIP [fdo#109301]

  * igt@i915_pm_lpsp@screens-disabled:
    - shard-skl:          NOTRUN -> SKIP [fdo#109271] +55

  * igt@i915_selftest@live_requests:
    - shard-iclb:         PASS -> DMESG-WARN [fdo#109644]

  * igt@i915_suspend@sysfs-reader:
    - shard-apl:          PASS -> DMESG-WARN [fdo#108566] +6

  * igt@kms_atomic_transition@3x-modeset-transitions-nonblocking-fencing:
    - shard-snb:          NOTRUN -> SKIP [fdo#109271] / [fdo#109278] +2

  * igt@kms_atomic_transition@6x-modeset-transitions:
    - shard-iclb:         NOTRUN -> SKIP [fdo#109278] +8

  * igt@kms_chamelium@hdmi-crc-planes-random:
    - shard-iclb:         NOTRUN -> SKIP [fdo#109284] +4

  * igt@kms_color@pipe-a-gamma:
    - shard-skl:          PASS -> FAIL [fdo#104782]

  * igt@kms_color@pipe-b-degamma:
    - shard-iclb:         NOTRUN -> FAIL [fdo#104782]

  * igt@kms_cursor_crc@cursor-128x42-sliding:
    - shard-apl:          PASS -> INCOMPLETE [fdo#103927]

  * igt@kms_cursor_crc@cursor-512x170-onscreen:
    - shard-iclb:         NOTRUN -> SKIP [fdo#109279]

  * igt@kms_cursor_legacy@cursora-vs-flipb-varying-size:
    - shard-iclb:         NOTRUN -> SKIP [fdo#109274] +8

  * igt@kms_fbcon_fbt@psr-suspend:
    - shard-iclb:         PASS -> FAIL [fdo#103833]

  * igt@kms_flip@flip-vs-expired-vblank-interruptible:
    - shard-glk:          PASS -> FAIL [fdo#102887] / [fdo#105363]

  * igt@kms_force_connector_basic@prune-stale-modes:
    - shard-iclb:         NOTRUN -> SKIP [fdo#109285]

  * igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-spr-indfb-draw-mmap-gtt:
    - shard-iclb:         NOTRUN -> SKIP [fdo#109280] +21

  * igt@kms_frontbuffer_tracking@psr-2p-scndscrn-cur-indfb-onoff:
    - shard-kbl:          NOTRUN -> SKIP [fdo#109271] +2

  * igt@kms_frontbuffer_tracking@psr-2p-scndscrn-indfb-msflip-blt:
    - shard-snb:          NOTRUN -> SKIP [fdo#109271] +38

  * igt@kms_frontbuffer_tracking@psr-shrfb-scaledprimary:
    - shard-skl:          PASS -> FAIL [fdo#103167] +1

  * igt@kms_lease@page_flip_implicit_plane:
    - shard-iclb:         NOTRUN -> FAIL [fdo#110281]

  * igt@kms_pipe_crc_basic@suspend-read-crc-pipe-d:
    - shard-skl:          NOTRUN -> SKIP [fdo#109271] / [fdo#109278] +6

  * igt@kms_plane@pixel-format-pipe-b-planes-source-clamping:
    - shard-iclb:         NOTRUN -> INCOMPLETE [fdo#110036 ]

  * igt@kms_plane@pixel-format-pipe-c-planes:
    - shard-iclb:         PASS -> INCOMPLETE [fdo#110036 ] +1

  * igt@kms_plane_alpha_blend@pipe-a-constant-alpha-min:
    - shard-skl:          PASS -> FAIL [fdo#108145]

  * igt@kms_plane_alpha_blend@pipe-b-alpha-7efc:
    - shard-skl:          NOTRUN -> FAIL [fdo#108145] +1

  * igt@kms_plane_alpha_blend@pipe-c-coverage-7efc:
    - shard-skl:          PASS -> FAIL [fdo#108145] / [fdo#110403]

  * igt@kms_psr@dpms:
    - shard-iclb:         PASS -> FAIL [fdo#107383] / [fdo#110215] +1

  * igt@kms_psr@psr2_primary_mmap_gtt:
    - shard-iclb:         NOTRUN -> SKIP [fdo#109441] +2

  * igt@kms_psr@psr2_sprite_mmap_gtt:
    - shard-iclb:         PASS -> SKIP [fdo#109441] +1

  * igt@kms_psr@sprite_blt:
    - shard-iclb:         NOTRUN -> FAIL [fdo#107383] / [fdo#110215] +1

  * igt@kms_rotation_crc@multiplane-rotation:
    - shard-kbl:          PASS -> FAIL [fdo#109016]

  * igt@kms_setmode@basic:
    - shard-apl:          PASS -> FAIL [fdo#99912]

  * igt@kms_sysfs_edid_timing:
    - shard-skl:          NOTRUN -> FAIL [fdo#100047]

  * igt@kms_vblank@pipe-b-query-idle-hang:
    - shard-iclb:         PASS -> SKIP [fdo#109278] +15

  * igt@kms_vrr@flip-basic:
    - shard-iclb:         NOTRUN -> SKIP [fdo#109502]

  * igt@perf_pmu@busy-vcs1:
    - shard-iclb:         NOTRUN -> SKIP [fdo#109276] +11

  * igt@prime_nv_pcopy@test3_2:
    - shard-iclb:         NOTRUN -> SKIP [fdo#109291] +2

  * igt@runner@aborted:
    - shard-snb:          NOTRUN -> FAIL [fdo#108686]

  
#### Possible fixes ####

  * igt@i915_suspend@debugfs-reader:
    - shard-apl:          DMESG-WARN [fdo#108566] -> PASS +5

  * igt@kms_cursor_crc@cursor-128x42-sliding:
    - shard-iclb:         INCOMPLETE -> PASS

  * igt@kms_flip@plain-flip-fb-recreate:
    - shard-skl:          FAIL [fdo#100368] -> PASS

  * igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a:
    - shard-kbl:          INCOMPLETE [fdo#103665] -> PASS

  * igt@kms_plane@pixel-format-pipe-b-planes:
    - shard-glk:          SKIP [fdo#109271] -> PASS

  * igt@kms_plane_alpha_blend@pipe-b-constant-alpha-min:
    - shard-skl:          FAIL [fdo#108145] -> PASS

  * igt@kms_plane_scaling@pipe-a-scaler-with-pixel-format:
    - shard-glk:          SKIP [fdo#109271] / [fdo#109278] -> PASS +1

  * igt@kms_psr@cursor_plane_onoff:
    - shard-iclb:         FAIL [fdo#107383] / [fdo#110215] -> PASS

  * igt@kms_psr@psr2_cursor_render:
    - shard-iclb:         SKIP [fdo#109441] -> PASS +1

  * igt@kms_rotation_crc@multiplane-rotation-cropping-bottom:
    - shard-kbl:          DMESG-FAIL [fdo#105763] -> PASS

  * igt@perf@oa-exponents:
    - shard-glk:          FAIL [fdo#105483] -> PASS

  
  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).

  [fdo#100047]: https://bugs.freedesktop.org/show_bug.cgi?id=100047
  [fdo#100368]: https://bugs.freedesktop.org/show_bug.cgi?id=100368
  [fdo#102887]: https://bugs.freedesktop.org/show_bug.cgi?id=102887
  [fdo#103167]: https://bugs.freedesktop.org/show_bug.cgi?id=103167
  [fdo#103665]: https://bugs.freedesktop.org/show_bug.cgi?id=103665
  [fdo#103833]: https://bugs.freedesktop.org/show_bug.cgi?id=103833
  [fdo#103927]: https://bugs.freedesktop.org/show_bug.cgi?id=103927
  [fdo#104782]: https://bugs.freedesktop.org/show_bug.cgi?id=104782
  [fdo#105363]: https://bugs.freedesktop.org/show_bug.cgi?id=105363
  [fdo#105483]: https://bugs.freedesktop.org/show_bug.cgi?id=105483
  [fdo#105763]: https://bugs.freedesktop.org/show_bug.cgi?id=105763
  [fdo#107383]: https://bugs.freedesktop.org/show_bug.cgi?id=107383
  [fdo#108145]: https://bugs.freedesktop.org/show_bug.cgi?id=108145
  [fdo#108566]: https://bugs.freedesktop.org/show_bug.cgi?id=108566
  [fdo#108654]: https://bugs.freedesktop.org/show_bug.cgi?id=108654
  [fdo#108686]: https://bugs.freedesktop.org/show_bug.cgi?id=108686
  [fdo#108954]: https://bugs.freedesktop.org/show_bug.cgi?id=108954
  [fdo#109016]: https://bugs.freedesktop.org/show_bug.cgi?id=109016
  [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
  [fdo#109274]: https://bugs.freedesktop.org/show_bug.cgi?id=109274
  [fdo#109276]: https://bugs.freedesktop.org/show_bug.cgi?id=109276
  [fdo#109278]: https://bugs.freedesktop.org/show_bug.cgi?id=109278
  [fdo#109279]: https://bugs.freedesktop.org/show_bug.cgi?id=109279
  [fdo#109280]: https://bugs.freedesktop.org/show_bug.cgi?id=109280
  [fdo#109284]: https://bugs.freedesktop.org/show_bug.cgi?id=109284
  [fdo#109285]: https://bugs.freedesktop.org/show_bug.cgi?id=109285
  [fdo#109291]: https://bugs.freedesktop.org/show_bug.cgi?id=109291
  [fdo#109301]: https://bugs.freedesktop.org/show_bug.cgi?id=109301
  [fdo#109308]: https://bugs.freedesktop.org/show_bug.cgi?id=109308
  [fdo#109441]: https://bugs.freedesktop.org/show_bug.cgi?id=109441
  [fdo#109502]: https://bugs.freedesktop.org/show_bug.cgi?id=109502
  [fdo#109506]: https://bugs.freedesktop.org/show_bug.cgi?id=109506
  [fdo#109644]: https://bugs.freedesktop.org/show_bug.cgi?id=109644
  [fdo#109982]: https://bugs.freedesktop.org/show_bug.cgi?id=109982
  [fdo#110036 ]: https://bugs.freedesktop.org/show_bug.cgi?id=110036 
  [fdo#110215]: https://bugs.freedesktop.org/show_bug.cgi?id=110215
  [fdo#110281]: https://bugs.freedesktop.org/show_bug.cgi?id=110281
  [fdo#110403]: https://bugs.freedesktop.org/show_bug.cgi?id=110403
  [fdo#99912]: https://bugs.freedesktop.org/show_bug.cgi?id=99912


Participating hosts (10 -> 9)
------------------------------

  Missing    (1): shard-hsw 


Build changes
-------------

    * Linux: CI_DRM_5938 -> Patchwork_12816

  CI_DRM_5938: 61a332623362ea87cdde81115229b1b955335654 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_4951: cc9a60c029432b5843724e4f2c57f9f815f7adbb @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  Patchwork_12816: 1fcada518ec8f301a3f8c77bb3d1f22a5368f578 @ git://anongit.freedesktop.org/gfx-ci/linux
  piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12816/
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^ permalink raw reply	[flat|nested] 12+ messages in thread

* Re: [PATCH 2/2] drm/i915: Verify the engine workarounds stick on application
  2019-04-16 14:59         ` Chris Wilson
@ 2019-04-16 20:04           ` Chris Wilson
  2019-04-17  7:55             ` Tvrtko Ursulin
  0 siblings, 1 reply; 12+ messages in thread
From: Chris Wilson @ 2019-04-16 20:04 UTC (permalink / raw)
  To: Tvrtko Ursulin, intel-gfx

Quoting Chris Wilson (2019-04-16 15:59:38)
> Quoting Tvrtko Ursulin (2019-04-16 15:53:40)
> > 
> > On 16/04/2019 15:17, Chris Wilson wrote:
> > > Quoting Tvrtko Ursulin (2019-04-16 15:10:25)
> > >>
> > >> On 16/04/2019 14:14, Chris Wilson wrote:
> > >>> Read the engine workarounds back using the GPU after loading the initial
> > >>> context state to verify that we are setting them correctly, and bail if
> > >>> it fails.
> > >>>
> > >>> v2: Break out the verification into its own loop
> > >>>
> > >>> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> > >>> Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
> > >> Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
> > > 
> > > Now we just have to decide what to do about the +47 icl failures :)
> > > (Or however many it is this time.)
> > 
> > I am hardly keeping pace with your patches, let alone looking at the CI 
> > results. :I
> > 
> > I see BAT success - where to see the failures and what is failing?
> 
> Wait for the shards. BAT just happens to have machines that work!
> In the shards we have about a 30% chance (at the last count) of any test
> that reloads the module to trigger a warning.

With the -EIO if the intel_engines_verify_workaround() failed, we scored
over 500 changes/failures :) With a whole boatload of tests still trying
to use the GPU even when wedged.
-Chris
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^ permalink raw reply	[flat|nested] 12+ messages in thread

* Re: [PATCH 2/2] drm/i915: Verify the engine workarounds stick on application
  2019-04-16 20:04           ` Chris Wilson
@ 2019-04-17  7:55             ` Tvrtko Ursulin
  2019-04-17  7:58               ` Chris Wilson
  0 siblings, 1 reply; 12+ messages in thread
From: Tvrtko Ursulin @ 2019-04-17  7:55 UTC (permalink / raw)
  To: Chris Wilson, intel-gfx


On 16/04/2019 21:04, Chris Wilson wrote:
> Quoting Chris Wilson (2019-04-16 15:59:38)
>> Quoting Tvrtko Ursulin (2019-04-16 15:53:40)
>>>
>>> On 16/04/2019 15:17, Chris Wilson wrote:
>>>> Quoting Tvrtko Ursulin (2019-04-16 15:10:25)
>>>>>
>>>>> On 16/04/2019 14:14, Chris Wilson wrote:
>>>>>> Read the engine workarounds back using the GPU after loading the initial
>>>>>> context state to verify that we are setting them correctly, and bail if
>>>>>> it fails.
>>>>>>
>>>>>> v2: Break out the verification into its own loop
>>>>>>
>>>>>> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
>>>>>> Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
>>>>> Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
>>>>
>>>> Now we just have to decide what to do about the +47 icl failures :)
>>>> (Or however many it is this time.)
>>>
>>> I am hardly keeping pace with your patches, let alone looking at the CI
>>> results. :I
>>>
>>> I see BAT success - where to see the failures and what is failing?
>>
>> Wait for the shards. BAT just happens to have machines that work!
>> In the shards we have about a 30% chance (at the last count) of any test
>> that reloads the module to trigger a warning.
> 
> With the -EIO if the intel_engines_verify_workaround() failed, we scored
> over 500 changes/failures :) With a whole boatload of tests still trying
> to use the GPU even when wedged.

With -EIO I guess the only option seems to have the ignore verification 
patch back.

Regards,

Tvrtko
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^ permalink raw reply	[flat|nested] 12+ messages in thread

* Re: [PATCH 2/2] drm/i915: Verify the engine workarounds stick on application
  2019-04-17  7:55             ` Tvrtko Ursulin
@ 2019-04-17  7:58               ` Chris Wilson
  2019-04-17  8:06                 ` Tvrtko Ursulin
  0 siblings, 1 reply; 12+ messages in thread
From: Chris Wilson @ 2019-04-17  7:58 UTC (permalink / raw)
  To: Tvrtko Ursulin, intel-gfx

Quoting Tvrtko Ursulin (2019-04-17 08:55:26)
> 
> On 16/04/2019 21:04, Chris Wilson wrote:
> > Quoting Chris Wilson (2019-04-16 15:59:38)
> >> Quoting Tvrtko Ursulin (2019-04-16 15:53:40)
> >>>
> >>> On 16/04/2019 15:17, Chris Wilson wrote:
> >>>> Quoting Tvrtko Ursulin (2019-04-16 15:10:25)
> >>>>>
> >>>>> On 16/04/2019 14:14, Chris Wilson wrote:
> >>>>>> Read the engine workarounds back using the GPU after loading the initial
> >>>>>> context state to verify that we are setting them correctly, and bail if
> >>>>>> it fails.
> >>>>>>
> >>>>>> v2: Break out the verification into its own loop
> >>>>>>
> >>>>>> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> >>>>>> Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
> >>>>> Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
> >>>>
> >>>> Now we just have to decide what to do about the +47 icl failures :)
> >>>> (Or however many it is this time.)
> >>>
> >>> I am hardly keeping pace with your patches, let alone looking at the CI
> >>> results. :I
> >>>
> >>> I see BAT success - where to see the failures and what is failing?
> >>
> >> Wait for the shards. BAT just happens to have machines that work!
> >> In the shards we have about a 30% chance (at the last count) of any test
> >> that reloads the module to trigger a warning.
> > 
> > With the -EIO if the intel_engines_verify_workaround() failed, we scored
> > over 500 changes/failures :) With a whole boatload of tests still trying
> > to use the GPU even when wedged.
> 
> With -EIO I guess the only option seems to have the ignore verification 
> patch back.

Even without that, we still get an *ERROR* on every module load and
reset. So we still end up with a sea of orange for icl.
-Chris
_______________________________________________
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^ permalink raw reply	[flat|nested] 12+ messages in thread

* Re: [PATCH 2/2] drm/i915: Verify the engine workarounds stick on application
  2019-04-17  7:58               ` Chris Wilson
@ 2019-04-17  8:06                 ` Tvrtko Ursulin
  0 siblings, 0 replies; 12+ messages in thread
From: Tvrtko Ursulin @ 2019-04-17  8:06 UTC (permalink / raw)
  To: Chris Wilson, intel-gfx


On 17/04/2019 08:58, Chris Wilson wrote:
> Quoting Tvrtko Ursulin (2019-04-17 08:55:26)
>>
>> On 16/04/2019 21:04, Chris Wilson wrote:
>>> Quoting Chris Wilson (2019-04-16 15:59:38)
>>>> Quoting Tvrtko Ursulin (2019-04-16 15:53:40)
>>>>>
>>>>> On 16/04/2019 15:17, Chris Wilson wrote:
>>>>>> Quoting Tvrtko Ursulin (2019-04-16 15:10:25)
>>>>>>>
>>>>>>> On 16/04/2019 14:14, Chris Wilson wrote:
>>>>>>>> Read the engine workarounds back using the GPU after loading the initial
>>>>>>>> context state to verify that we are setting them correctly, and bail if
>>>>>>>> it fails.
>>>>>>>>
>>>>>>>> v2: Break out the verification into its own loop
>>>>>>>>
>>>>>>>> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
>>>>>>>> Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
>>>>>>> Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
>>>>>>
>>>>>> Now we just have to decide what to do about the +47 icl failures :)
>>>>>> (Or however many it is this time.)
>>>>>
>>>>> I am hardly keeping pace with your patches, let alone looking at the CI
>>>>> results. :I
>>>>>
>>>>> I see BAT success - where to see the failures and what is failing?
>>>>
>>>> Wait for the shards. BAT just happens to have machines that work!
>>>> In the shards we have about a 30% chance (at the last count) of any test
>>>> that reloads the module to trigger a warning.
>>>
>>> With the -EIO if the intel_engines_verify_workaround() failed, we scored
>>> over 500 changes/failures :) With a whole boatload of tests still trying
>>> to use the GPU even when wedged.
>>
>> With -EIO I guess the only option seems to have the ignore verification
>> patch back.
> 
> Even without that, we still get an *ERROR* on every module load and
> reset. So we still end up with a sea of orange for icl.

Yes, no alternative to having that patch, ignore_write_or or what it was 
called.

Retgards,

Tvrtko
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^ permalink raw reply	[flat|nested] 12+ messages in thread

end of thread, other threads:[~2019-04-17  8:06 UTC | newest]

Thread overview: 12+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2019-04-16 13:14 [PATCH 1/2] drm/i915: Verify workarounds immediately after application Chris Wilson
2019-04-16 13:14 ` [PATCH 2/2] drm/i915: Verify the engine workarounds stick on application Chris Wilson
2019-04-16 14:10   ` Tvrtko Ursulin
2019-04-16 14:17     ` Chris Wilson
2019-04-16 14:53       ` Tvrtko Ursulin
2019-04-16 14:59         ` Chris Wilson
2019-04-16 20:04           ` Chris Wilson
2019-04-17  7:55             ` Tvrtko Ursulin
2019-04-17  7:58               ` Chris Wilson
2019-04-17  8:06                 ` Tvrtko Ursulin
2019-04-16 14:05 ` ✓ Fi.CI.BAT: success for series starting with [1/2] drm/i915: Verify workarounds immediately after application Patchwork
2019-04-16 19:48 ` ✗ Fi.CI.IGT: failure " Patchwork

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