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* [PATCH 1/2] powerpc/pmu/fsl: fix is_nmi test for irq mask change
@ 2018-05-10  1:04 Nicholas Piggin
  2018-05-10  1:04 ` [PATCH 2/2] powerpc/64: change softe to irqmask in show_regs and xmon Nicholas Piggin
                   ` (2 more replies)
  0 siblings, 3 replies; 5+ messages in thread
From: Nicholas Piggin @ 2018-05-10  1:04 UTC (permalink / raw)
  To: linuxppc-dev; +Cc: Nicholas Piggin, Madhavan Srinivasan

When soft enabled was changed to irq disabled mask, this test missed
being converted (although the equivalent book3s test was converted).

The PMU drivers consider it an NMI when they take a PMI while general
interrupts are disabled. This change restores that behaviour.

Fixes: 01417c6cc7 ("powerpc/64: Change soft_enabled from flag to bitmask")
Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
---
 arch/powerpc/perf/core-fsl-emb.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/powerpc/perf/core-fsl-emb.c b/arch/powerpc/perf/core-fsl-emb.c
index 85f1d18e5fd3..ba485844d506 100644
--- a/arch/powerpc/perf/core-fsl-emb.c
+++ b/arch/powerpc/perf/core-fsl-emb.c
@@ -42,7 +42,7 @@ static DEFINE_MUTEX(pmc_reserve_mutex);
 static inline int perf_intr_is_nmi(struct pt_regs *regs)
 {
 #ifdef __powerpc64__
-	return !regs->softe;
+	return (regs->softe & IRQS_DISABLED);
 #else
 	return 0;
 #endif
-- 
2.17.0

^ permalink raw reply related	[flat|nested] 5+ messages in thread

* [PATCH 2/2] powerpc/64: change softe to irqmask in show_regs and xmon
  2018-05-10  1:04 [PATCH 1/2] powerpc/pmu/fsl: fix is_nmi test for irq mask change Nicholas Piggin
@ 2018-05-10  1:04 ` Nicholas Piggin
  2018-05-10  1:17   ` Balbir Singh
  2018-05-10 14:24 ` [PATCH 1/2] powerpc/pmu/fsl: fix is_nmi test for irq mask change Madhavan Srinivasan
  2018-06-04 14:10 ` [1/2] " Michael Ellerman
  2 siblings, 1 reply; 5+ messages in thread
From: Nicholas Piggin @ 2018-05-10  1:04 UTC (permalink / raw)
  To: linuxppc-dev; +Cc: Nicholas Piggin, Madhavan Srinivasan

When the soft enabled flag was changed to a soft disable mask, xmon
and register dump code was not updated to reflect that, which is
confusing ('SOFTE: 1' previously meant interrupts were soft enabled,
currently it means the opposite, the general interrupt type has been
disabled).

Fix this by using the name irqmask, and printing it in hex.

Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
---
 arch/powerpc/kernel/process.c | 2 +-
 arch/powerpc/xmon/xmon.c      | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/powerpc/kernel/process.c b/arch/powerpc/kernel/process.c
index 1237f13fed51..52b1c379d618 100644
--- a/arch/powerpc/kernel/process.c
+++ b/arch/powerpc/kernel/process.c
@@ -1437,7 +1437,7 @@ void show_regs(struct pt_regs * regs)
 		pr_cont("DAR: "REG" DSISR: %08lx ", regs->dar, regs->dsisr);
 #endif
 #ifdef CONFIG_PPC64
-	pr_cont("SOFTE: %ld ", regs->softe);
+	pr_cont("IRQMASK: %lx ", regs->softe);
 #endif
 #ifdef CONFIG_PPC_TRANSACTIONAL_MEM
 	if (MSR_TM_ACTIVE(regs->msr))
diff --git a/arch/powerpc/xmon/xmon.c b/arch/powerpc/xmon/xmon.c
index a0842f1ff72c..05f648a55fa3 100644
--- a/arch/powerpc/xmon/xmon.c
+++ b/arch/powerpc/xmon/xmon.c
@@ -1636,7 +1636,7 @@ static void excprint(struct pt_regs *fp)
 
 	printf("  current = 0x%lx\n", current);
 #ifdef CONFIG_PPC64
-	printf("  paca    = 0x%lx\t softe: %d\t irq_happened: 0x%02x\n",
+	printf("  paca    = 0x%lx\t irqmask: 0x%02x\t irq_happened: 0x%02x\n",
 	       local_paca, local_paca->irq_soft_mask, local_paca->irq_happened);
 #endif
 	if (current) {
-- 
2.17.0

^ permalink raw reply related	[flat|nested] 5+ messages in thread

* Re: [PATCH 2/2] powerpc/64: change softe to irqmask in show_regs and xmon
  2018-05-10  1:04 ` [PATCH 2/2] powerpc/64: change softe to irqmask in show_regs and xmon Nicholas Piggin
@ 2018-05-10  1:17   ` Balbir Singh
  0 siblings, 0 replies; 5+ messages in thread
From: Balbir Singh @ 2018-05-10  1:17 UTC (permalink / raw)
  To: Nicholas Piggin
  Cc: open list:LINUX FOR POWERPC (32-BIT AND 64-BIT), Madhavan Srinivasan

On Thu, May 10, 2018 at 11:04 AM, Nicholas Piggin <npiggin@gmail.com> wrote:
> When the soft enabled flag was changed to a soft disable mask, xmon
> and register dump code was not updated to reflect that, which is
> confusing ('SOFTE: 1' previously meant interrupts were soft enabled,
> currently it means the opposite, the general interrupt type has been
> disabled).
>
> Fix this by using the name irqmask, and printing it in hex.
>
> Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
>

Acked-by: Balbir Singh <bsingharora@gmail.com>

^ permalink raw reply	[flat|nested] 5+ messages in thread

* Re: [PATCH 1/2] powerpc/pmu/fsl: fix is_nmi test for irq mask change
  2018-05-10  1:04 [PATCH 1/2] powerpc/pmu/fsl: fix is_nmi test for irq mask change Nicholas Piggin
  2018-05-10  1:04 ` [PATCH 2/2] powerpc/64: change softe to irqmask in show_regs and xmon Nicholas Piggin
@ 2018-05-10 14:24 ` Madhavan Srinivasan
  2018-06-04 14:10 ` [1/2] " Michael Ellerman
  2 siblings, 0 replies; 5+ messages in thread
From: Madhavan Srinivasan @ 2018-05-10 14:24 UTC (permalink / raw)
  To: Nicholas Piggin, linuxppc-dev



On Thursday 10 May 2018 06:34 AM, Nicholas Piggin wrote:
> When soft enabled was changed to irq disabled mask, this test missed
> being converted (although the equivalent book3s test was converted).
>
> The PMU drivers consider it an NMI when they take a PMI while general
> interrupts are disabled. This change restores that behaviour.
Looks fine to me.
Reviewed-by: Madhavan Srinivasan <maddy@linux.vnet.ibm.com>

> Fixes: 01417c6cc7 ("powerpc/64: Change soft_enabled from flag to bitmask")
> Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
> ---
>   arch/powerpc/perf/core-fsl-emb.c | 2 +-
>   1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/arch/powerpc/perf/core-fsl-emb.c b/arch/powerpc/perf/core-fsl-emb.c
> index 85f1d18e5fd3..ba485844d506 100644
> --- a/arch/powerpc/perf/core-fsl-emb.c
> +++ b/arch/powerpc/perf/core-fsl-emb.c
> @@ -42,7 +42,7 @@ static DEFINE_MUTEX(pmc_reserve_mutex);
>   static inline int perf_intr_is_nmi(struct pt_regs *regs)
>   {
>   #ifdef __powerpc64__
> -	return !regs->softe;
> +	return (regs->softe & IRQS_DISABLED);
>   #else
>   	return 0;
>   #endif

^ permalink raw reply	[flat|nested] 5+ messages in thread

* Re: [1/2] powerpc/pmu/fsl: fix is_nmi test for irq mask change
  2018-05-10  1:04 [PATCH 1/2] powerpc/pmu/fsl: fix is_nmi test for irq mask change Nicholas Piggin
  2018-05-10  1:04 ` [PATCH 2/2] powerpc/64: change softe to irqmask in show_regs and xmon Nicholas Piggin
  2018-05-10 14:24 ` [PATCH 1/2] powerpc/pmu/fsl: fix is_nmi test for irq mask change Madhavan Srinivasan
@ 2018-06-04 14:10 ` Michael Ellerman
  2 siblings, 0 replies; 5+ messages in thread
From: Michael Ellerman @ 2018-06-04 14:10 UTC (permalink / raw)
  To: Nicholas Piggin, linuxppc-dev; +Cc: Madhavan Srinivasan, Nicholas Piggin

On Thu, 2018-05-10 at 01:04:23 UTC, Nicholas Piggin wrote:
> When soft enabled was changed to irq disabled mask, this test missed
> being converted (although the equivalent book3s test was converted).
> 
> The PMU drivers consider it an NMI when they take a PMI while general
> interrupts are disabled. This change restores that behaviour.
> 
> Fixes: 01417c6cc7 ("powerpc/64: Change soft_enabled from flag to bitmask")
> Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
> Reviewed-by: Madhavan Srinivasan <maddy@linux.vnet.ibm.com>

Series applied to powerpc next, thanks.

https://git.kernel.org/powerpc/c/81ea11d3af3aba0bea475dd1dd2f79

cheers

^ permalink raw reply	[flat|nested] 5+ messages in thread

end of thread, other threads:[~2018-06-04 14:10 UTC | newest]

Thread overview: 5+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2018-05-10  1:04 [PATCH 1/2] powerpc/pmu/fsl: fix is_nmi test for irq mask change Nicholas Piggin
2018-05-10  1:04 ` [PATCH 2/2] powerpc/64: change softe to irqmask in show_regs and xmon Nicholas Piggin
2018-05-10  1:17   ` Balbir Singh
2018-05-10 14:24 ` [PATCH 1/2] powerpc/pmu/fsl: fix is_nmi test for irq mask change Madhavan Srinivasan
2018-06-04 14:10 ` [1/2] " Michael Ellerman

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