* [PATCH] ARM: V7M: Do not corrupt vector table around v7m_invalidate_l1 call
@ 2017-03-30 8:09 Vladimir Murzin
2017-03-30 8:09 ` [PATCH] ARM: V7M: Preserve registers across switch from Thread to Handler mode Vladimir Murzin
2017-04-18 12:53 ` [PATCH] ARM: V7M: Do not corrupt vector table around v7m_invalidate_l1 call Vladimir Murzin
0 siblings, 2 replies; 4+ messages in thread
From: Vladimir Murzin @ 2017-03-30 8:09 UTC (permalink / raw)
To: linux-arm-kernel
We save/restore registers around v7m_invalidate_l1 to address pointed
by r12, which is vector table, so the first eight entries are
overwritten with a garbage. We already have stack setup at that stage,
so use it to save/restore register.
Fixes: 6a8146f420be ("ARM: 8609/1: V7M: Add support for the Cortex-M7 processor")
Signed-off-by: Vladimir Murzin <vladimir.murzin@arm.com>
---
arch/arm/mm/proc-v7m.S | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm/mm/proc-v7m.S b/arch/arm/mm/proc-v7m.S
index 8dea616..5049777 100644
--- a/arch/arm/mm/proc-v7m.S
+++ b/arch/arm/mm/proc-v7m.S
@@ -147,10 +147,10 @@ __v7m_setup_cont:
@ Configure caches (if implemented)
teq r8, #0
- stmneia r12, {r0-r6, lr} @ v7m_invalidate_l1 touches r0-r6
+ stmneia sp, {r0-r6, lr} @ v7m_invalidate_l1 touches r0-r6
blne v7m_invalidate_l1
teq r8, #0 @ re-evalutae condition
- ldmneia r12, {r0-r6, lr}
+ ldmneia sp, {r0-r6, lr}
@ Configure the System Control Register to ensure 8-byte stack alignment
@ Note the STKALIGN bit is either RW or RAO.
--
1.9.1
^ permalink raw reply related [flat|nested] 4+ messages in thread
* [PATCH] ARM: V7M: Preserve registers across switch from Thread to Handler mode
2017-03-30 8:09 [PATCH] ARM: V7M: Do not corrupt vector table around v7m_invalidate_l1 call Vladimir Murzin
@ 2017-03-30 8:09 ` Vladimir Murzin
2017-04-18 12:54 ` Vladimir Murzin
2017-04-18 12:53 ` [PATCH] ARM: V7M: Do not corrupt vector table around v7m_invalidate_l1 call Vladimir Murzin
1 sibling, 1 reply; 4+ messages in thread
From: Vladimir Murzin @ 2017-03-30 8:09 UTC (permalink / raw)
To: linux-arm-kernel
According to ARMv7 ARM, when exception is taken content of r0-r3, r12
is unknown (see ExceptionTaken() pseudocode). Even though existent
implementations keep these register unchanged, preserve them to be in
line with architecture.
Reported-by: Dobromir Stefanov <dobromir.stefanov@arm.com>
Signed-off-by: Vladimir Murzin <vladimir.murzin@arm.com>
---
arch/arm/mm/proc-v7m.S | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm/mm/proc-v7m.S b/arch/arm/mm/proc-v7m.S
index 5049777..47a5acc 100644
--- a/arch/arm/mm/proc-v7m.S
+++ b/arch/arm/mm/proc-v7m.S
@@ -135,9 +135,11 @@ __v7m_setup_cont:
dsb
mov r6, lr @ save LR
ldr sp, =init_thread_union + THREAD_START_SP
+ stmia sp, {r0-r3, r12}
cpsie i
svc #0
1: cpsid i
+ ldmia sp, {r0-r3, r12}
str r5, [r12, #11 * 4] @ restore the original SVC vector entry
mov lr, r6 @ restore LR
--
1.9.1
^ permalink raw reply related [flat|nested] 4+ messages in thread
* [PATCH] ARM: V7M: Do not corrupt vector table around v7m_invalidate_l1 call
2017-03-30 8:09 [PATCH] ARM: V7M: Do not corrupt vector table around v7m_invalidate_l1 call Vladimir Murzin
2017-03-30 8:09 ` [PATCH] ARM: V7M: Preserve registers across switch from Thread to Handler mode Vladimir Murzin
@ 2017-04-18 12:53 ` Vladimir Murzin
1 sibling, 0 replies; 4+ messages in thread
From: Vladimir Murzin @ 2017-04-18 12:53 UTC (permalink / raw)
To: linux-arm-kernel
On 30/03/17 09:09, Vladimir Murzin wrote:
> We save/restore registers around v7m_invalidate_l1 to address pointed
> by r12, which is vector table, so the first eight entries are
> overwritten with a garbage. We already have stack setup at that stage,
> so use it to save/restore register.
>
> Fixes: 6a8146f420be ("ARM: 8609/1: V7M: Add support for the Cortex-M7 processor")
> Signed-off-by: Vladimir Murzin <vladimir.murzin@arm.com>
> ---
> arch/arm/mm/proc-v7m.S | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/arch/arm/mm/proc-v7m.S b/arch/arm/mm/proc-v7m.S
> index 8dea616..5049777 100644
> --- a/arch/arm/mm/proc-v7m.S
> +++ b/arch/arm/mm/proc-v7m.S
> @@ -147,10 +147,10 @@ __v7m_setup_cont:
>
> @ Configure caches (if implemented)
> teq r8, #0
> - stmneia r12, {r0-r6, lr} @ v7m_invalidate_l1 touches r0-r6
> + stmneia sp, {r0-r6, lr} @ v7m_invalidate_l1 touches r0-r6
> blne v7m_invalidate_l1
> teq r8, #0 @ re-evalutae condition
> - ldmneia r12, {r0-r6, lr}
> + ldmneia sp, {r0-r6, lr}
>
> @ Configure the System Control Register to ensure 8-byte stack alignment
> @ Note the STKALIGN bit is either RW or RAO.
>
Ok for patch tracker?
Vladimir
^ permalink raw reply [flat|nested] 4+ messages in thread
* [PATCH] ARM: V7M: Preserve registers across switch from Thread to Handler mode
2017-03-30 8:09 ` [PATCH] ARM: V7M: Preserve registers across switch from Thread to Handler mode Vladimir Murzin
@ 2017-04-18 12:54 ` Vladimir Murzin
0 siblings, 0 replies; 4+ messages in thread
From: Vladimir Murzin @ 2017-04-18 12:54 UTC (permalink / raw)
To: linux-arm-kernel
On 30/03/17 09:09, Vladimir Murzin wrote:
> According to ARMv7 ARM, when exception is taken content of r0-r3, r12
> is unknown (see ExceptionTaken() pseudocode). Even though existent
> implementations keep these register unchanged, preserve them to be in
> line with architecture.
>
> Reported-by: Dobromir Stefanov <dobromir.stefanov@arm.com>
> Signed-off-by: Vladimir Murzin <vladimir.murzin@arm.com>
> ---
> arch/arm/mm/proc-v7m.S | 2 ++
> 1 file changed, 2 insertions(+)
>
> diff --git a/arch/arm/mm/proc-v7m.S b/arch/arm/mm/proc-v7m.S
> index 5049777..47a5acc 100644
> --- a/arch/arm/mm/proc-v7m.S
> +++ b/arch/arm/mm/proc-v7m.S
> @@ -135,9 +135,11 @@ __v7m_setup_cont:
> dsb
> mov r6, lr @ save LR
> ldr sp, =init_thread_union + THREAD_START_SP
> + stmia sp, {r0-r3, r12}
> cpsie i
> svc #0
> 1: cpsid i
> + ldmia sp, {r0-r3, r12}
> str r5, [r12, #11 * 4] @ restore the original SVC vector entry
> mov lr, r6 @ restore LR
>
>
Ok for patch tracker?
Vladimir
^ permalink raw reply [flat|nested] 4+ messages in thread
end of thread, other threads:[~2017-04-18 12:54 UTC | newest]
Thread overview: 4+ messages (download: mbox.gz / follow: Atom feed)
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2017-03-30 8:09 [PATCH] ARM: V7M: Do not corrupt vector table around v7m_invalidate_l1 call Vladimir Murzin
2017-03-30 8:09 ` [PATCH] ARM: V7M: Preserve registers across switch from Thread to Handler mode Vladimir Murzin
2017-04-18 12:54 ` Vladimir Murzin
2017-04-18 12:53 ` [PATCH] ARM: V7M: Do not corrupt vector table around v7m_invalidate_l1 call Vladimir Murzin
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