* [PATCH] drm/i915: Use BUILD_BUG if possible in the i915 WARN_ON
@ 2014-12-08 16:06 Daniel Vetter
2014-12-08 16:10 ` Damien Lespiau
` (5 more replies)
0 siblings, 6 replies; 13+ messages in thread
From: Daniel Vetter @ 2014-12-08 16:06 UTC (permalink / raw)
To: Intel Graphics Development; +Cc: Daniel Vetter, Daniel Vetter
Faster feedback to errors is always better. This is inspired by the
addition to WARN_ONs to mask/enable helpers for registers to make sure
callers have the arguments ordered correctly: Pretty much always the
arguments are static.
We use WARN_ON(1) a lot in default switch statements though where we
should always handle all cases. So add a new macro specifically for
that.
The idea to use __builtin_constant_p is from Chris Wilson.
Cc: Damien Lespiau <damien.lespiau@intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Jani Nikula <jani.nikula@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@intel.com>
---
drivers/gpu/drm/i915/i915_debugfs.c | 2 +-
drivers/gpu/drm/i915/i915_drv.h | 10 +++++++++-
drivers/gpu/drm/i915/i915_gem_gtt.c | 6 +++---
drivers/gpu/drm/i915/intel_display.c | 4 ++--
drivers/gpu/drm/i915/intel_uncore.c | 4 ++--
5 files changed, 17 insertions(+), 9 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
index d0e445eca9ce..f44a844a48db 100644
--- a/drivers/gpu/drm/i915/i915_debugfs.c
+++ b/drivers/gpu/drm/i915/i915_debugfs.c
@@ -2347,7 +2347,7 @@ static const char *power_domain_str(enum intel_display_power_domain domain)
case POWER_DOMAIN_INIT:
return "INIT";
default:
- WARN_ON(1);
+ MISSING_CASE();
return "?";
}
}
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 95dfa2dd35b9..b2ddc121654d 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -57,8 +57,16 @@
#define DRIVER_DESC "Intel Graphics"
#define DRIVER_DATE "20141205"
+static inline void __i915_warn_on(bool cond)
+{
+ if (__builtin_constant_p(cond))
+ BUILD_BUG_ON(cond);
+}
+
#undef WARN_ON
-#define WARN_ON(x) WARN(x, "WARN_ON(" #x ")")
+#define WARN_ON(x) (__i915_warn_on((x)), WARN((x), "WARN_ON(" #x ")"))
+
+#define MISSING_CASE() WARN(1, "Missing switch case in %s\n", __func__);
enum pipe {
INVALID_PIPE = -1,
diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
index ac03a382000b..3b5807c11427 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.c
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
@@ -132,7 +132,7 @@ static gen6_gtt_pte_t snb_pte_encode(dma_addr_t addr,
pte |= GEN6_PTE_UNCACHED;
break;
default:
- WARN_ON(1);
+ MISSING_CASE();
}
return pte;
@@ -156,7 +156,7 @@ static gen6_gtt_pte_t ivb_pte_encode(dma_addr_t addr,
pte |= GEN6_PTE_UNCACHED;
break;
default:
- WARN_ON(1);
+ MISSING_CASE();
}
return pte;
@@ -1146,7 +1146,7 @@ int i915_ppgtt_init_hw(struct drm_device *dev)
else if (INTEL_INFO(dev)->gen >= 8)
gen8_ppgtt_enable(dev);
else
- WARN_ON(1);
+ MISSING_CASE();
if (ppgtt) {
for_each_ring(ring, dev_priv, i) {
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index d5153a4f90fe..b7155d5efc10 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -4847,7 +4847,7 @@ static void cherryview_set_cdclk(struct drm_device *dev, int cdclk)
cmd = 0;
break;
default:
- WARN_ON(1);
+ MISSING_CASE();
return;
}
@@ -8224,7 +8224,7 @@ static void i9xx_update_cursor(struct drm_crtc *crtc, u32 base)
cntl |= CURSOR_MODE_256_ARGB_AX;
break;
default:
- WARN_ON(1);
+ MISSING_CASE();
return;
}
cntl |= pipe << 28; /* Connect to correct pipe */
diff --git a/drivers/gpu/drm/i915/intel_uncore.c b/drivers/gpu/drm/i915/intel_uncore.c
index 46de8d75b4bf..83ab530fee06 100644
--- a/drivers/gpu/drm/i915/intel_uncore.c
+++ b/drivers/gpu/drm/i915/intel_uncore.c
@@ -1202,7 +1202,7 @@ void intel_uncore_init(struct drm_device *dev)
switch (INTEL_INFO(dev)->gen) {
default:
- WARN_ON(1);
+ MISSING_CASE();
return;
case 9:
ASSIGN_WRITE_MMIO_VFUNCS(gen9);
@@ -1300,7 +1300,7 @@ int i915_reg_read_ioctl(struct drm_device *dev,
reg->val = I915_READ8(reg->offset);
break;
default:
- WARN_ON(1);
+ MISSING_CASE();
ret = -EINVAL;
goto out;
}
--
2.1.1
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 13+ messages in thread
* Re: [PATCH] drm/i915: Use BUILD_BUG if possible in the i915 WARN_ON
2014-12-08 16:06 [PATCH] drm/i915: Use BUILD_BUG if possible in the i915 WARN_ON Daniel Vetter
@ 2014-12-08 16:10 ` Damien Lespiau
2014-12-08 16:20 ` Daniel Vetter
` (4 subsequent siblings)
5 siblings, 0 replies; 13+ messages in thread
From: Damien Lespiau @ 2014-12-08 16:10 UTC (permalink / raw)
To: Daniel Vetter; +Cc: Daniel Vetter, Intel Graphics Development
On Mon, Dec 08, 2014 at 05:06:34PM +0100, Daniel Vetter wrote:
> Faster feedback to errors is always better. This is inspired by the
> addition to WARN_ONs to mask/enable helpers for registers to make sure
> callers have the arguments ordered correctly: Pretty much always the
> arguments are static.
>
> We use WARN_ON(1) a lot in default switch statements though where we
> should always handle all cases. So add a new macro specifically for
> that.
>
> The idea to use __builtin_constant_p is from Chris Wilson.
>
> Cc: Damien Lespiau <damien.lespiau@intel.com>
> Cc: Chris Wilson <chris@chris-wilson.co.uk>
> Cc: Jani Nikula <jani.nikula@linux.intel.com>
> Signed-off-by: Daniel Vetter <daniel.vetter@intel.com>
> ---
> drivers/gpu/drm/i915/i915_debugfs.c | 2 +-
> drivers/gpu/drm/i915/i915_drv.h | 10 +++++++++-
> drivers/gpu/drm/i915/i915_gem_gtt.c | 6 +++---
> drivers/gpu/drm/i915/intel_display.c | 4 ++--
> drivers/gpu/drm/i915/intel_uncore.c | 4 ++--
> 5 files changed, 17 insertions(+), 9 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
> index d0e445eca9ce..f44a844a48db 100644
> --- a/drivers/gpu/drm/i915/i915_debugfs.c
> +++ b/drivers/gpu/drm/i915/i915_debugfs.c
> @@ -2347,7 +2347,7 @@ static const char *power_domain_str(enum intel_display_power_domain domain)
> case POWER_DOMAIN_INIT:
> return "INIT";
> default:
> - WARN_ON(1);
> + MISSING_CASE();
> return "?";
> }
> }
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index 95dfa2dd35b9..b2ddc121654d 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -57,8 +57,16 @@
> #define DRIVER_DESC "Intel Graphics"
> #define DRIVER_DATE "20141205"
>
> +static inline void __i915_warn_on(bool cond)
> +{
> + if (__builtin_constant_p(cond))
> + BUILD_BUG_ON(cond);
> +}
> +
> #undef WARN_ON
> -#define WARN_ON(x) WARN(x, "WARN_ON(" #x ")")
> +#define WARN_ON(x) (__i915_warn_on((x)), WARN((x), "WARN_ON(" #x ")"))
> +
We're now evaluating x twice.
> +#define MISSING_CASE() WARN(1, "Missing switch case in %s\n", __func__);
>
> enum pipe {
> INVALID_PIPE = -1,
> diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
> index ac03a382000b..3b5807c11427 100644
> --- a/drivers/gpu/drm/i915/i915_gem_gtt.c
> +++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
> @@ -132,7 +132,7 @@ static gen6_gtt_pte_t snb_pte_encode(dma_addr_t addr,
> pte |= GEN6_PTE_UNCACHED;
> break;
> default:
> - WARN_ON(1);
> + MISSING_CASE();
> }
>
> return pte;
> @@ -156,7 +156,7 @@ static gen6_gtt_pte_t ivb_pte_encode(dma_addr_t addr,
> pte |= GEN6_PTE_UNCACHED;
> break;
> default:
> - WARN_ON(1);
> + MISSING_CASE();
> }
>
> return pte;
> @@ -1146,7 +1146,7 @@ int i915_ppgtt_init_hw(struct drm_device *dev)
> else if (INTEL_INFO(dev)->gen >= 8)
> gen8_ppgtt_enable(dev);
> else
> - WARN_ON(1);
> + MISSING_CASE();
>
> if (ppgtt) {
> for_each_ring(ring, dev_priv, i) {
> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> index d5153a4f90fe..b7155d5efc10 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -4847,7 +4847,7 @@ static void cherryview_set_cdclk(struct drm_device *dev, int cdclk)
> cmd = 0;
> break;
> default:
> - WARN_ON(1);
> + MISSING_CASE();
> return;
> }
>
> @@ -8224,7 +8224,7 @@ static void i9xx_update_cursor(struct drm_crtc *crtc, u32 base)
> cntl |= CURSOR_MODE_256_ARGB_AX;
> break;
> default:
> - WARN_ON(1);
> + MISSING_CASE();
> return;
> }
> cntl |= pipe << 28; /* Connect to correct pipe */
> diff --git a/drivers/gpu/drm/i915/intel_uncore.c b/drivers/gpu/drm/i915/intel_uncore.c
> index 46de8d75b4bf..83ab530fee06 100644
> --- a/drivers/gpu/drm/i915/intel_uncore.c
> +++ b/drivers/gpu/drm/i915/intel_uncore.c
> @@ -1202,7 +1202,7 @@ void intel_uncore_init(struct drm_device *dev)
>
> switch (INTEL_INFO(dev)->gen) {
> default:
> - WARN_ON(1);
> + MISSING_CASE();
> return;
> case 9:
> ASSIGN_WRITE_MMIO_VFUNCS(gen9);
> @@ -1300,7 +1300,7 @@ int i915_reg_read_ioctl(struct drm_device *dev,
> reg->val = I915_READ8(reg->offset);
> break;
> default:
> - WARN_ON(1);
> + MISSING_CASE();
> ret = -EINVAL;
> goto out;
> }
> --
> 2.1.1
>
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 13+ messages in thread
* [PATCH] drm/i915: Use BUILD_BUG if possible in the i915 WARN_ON
2014-12-08 16:06 [PATCH] drm/i915: Use BUILD_BUG if possible in the i915 WARN_ON Daniel Vetter
2014-12-08 16:10 ` Damien Lespiau
@ 2014-12-08 16:20 ` Daniel Vetter
2014-12-09 18:11 ` shuang.he
2014-12-09 17:40 ` shuang.he
` (3 subsequent siblings)
5 siblings, 1 reply; 13+ messages in thread
From: Daniel Vetter @ 2014-12-08 16:20 UTC (permalink / raw)
To: Intel Graphics Development; +Cc: Daniel Vetter, Daniel Vetter
Faster feedback to errors is always better. This is inspired by the
addition to WARN_ONs to mask/enable helpers for registers to make sure
callers have the arguments ordered correctly: Pretty much always the
arguments are static.
We use WARN_ON(1) a lot in default switch statements though where we
should always handle all cases. So add a new macro specifically for
that.
The idea to use __builtin_constant_p is from Chris Wilson.
v2: Use the ({}) gcc-ism to avoid the static inline, suggested by
Dave. My first attempt used __cond as the temp var, which is the same
used by BUILD_BUG_ON, but with inverted sense. Hilarity ensued, so
sprinkle i915 into the name.
Also use a temporary variable to only evaluate the condition once,
suggested by Damien.
Cc: Damien Lespiau <damien.lespiau@intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Jani Nikula <jani.nikula@linux.intel.com>
Cc: Dave Gordon <david.s.gordon@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@intel.com>
---
drivers/gpu/drm/i915/i915_debugfs.c | 2 +-
drivers/gpu/drm/i915/i915_drv.h | 8 +++++++-
drivers/gpu/drm/i915/i915_gem_gtt.c | 6 +++---
drivers/gpu/drm/i915/intel_display.c | 4 ++--
drivers/gpu/drm/i915/intel_uncore.c | 4 ++--
5 files changed, 15 insertions(+), 9 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
index d0e445eca9ce..f44a844a48db 100644
--- a/drivers/gpu/drm/i915/i915_debugfs.c
+++ b/drivers/gpu/drm/i915/i915_debugfs.c
@@ -2347,7 +2347,7 @@ static const char *power_domain_str(enum intel_display_power_domain domain)
case POWER_DOMAIN_INIT:
return "INIT";
default:
- WARN_ON(1);
+ MISSING_CASE();
return "?";
}
}
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 95dfa2dd35b9..9fac6344856e 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -58,7 +58,13 @@
#define DRIVER_DATE "20141205"
#undef WARN_ON
-#define WARN_ON(x) WARN(x, "WARN_ON(" #x ")")
+#define WARN_ON(x) ({ \
+ bool __i915_warn_cond = (x); \
+ if (__builtin_constant_p(__i915_warn_cond)) \
+ BUILD_BUG_ON(__i915_warn_cond); \
+ WARN(__i915_warn_cond, "WARN_ON(" #x ")"); })
+
+#define MISSING_CASE() WARN(1, "Missing switch case in %s\n", __func__);
enum pipe {
INVALID_PIPE = -1,
diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
index ac03a382000b..3b5807c11427 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.c
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
@@ -132,7 +132,7 @@ static gen6_gtt_pte_t snb_pte_encode(dma_addr_t addr,
pte |= GEN6_PTE_UNCACHED;
break;
default:
- WARN_ON(1);
+ MISSING_CASE();
}
return pte;
@@ -156,7 +156,7 @@ static gen6_gtt_pte_t ivb_pte_encode(dma_addr_t addr,
pte |= GEN6_PTE_UNCACHED;
break;
default:
- WARN_ON(1);
+ MISSING_CASE();
}
return pte;
@@ -1146,7 +1146,7 @@ int i915_ppgtt_init_hw(struct drm_device *dev)
else if (INTEL_INFO(dev)->gen >= 8)
gen8_ppgtt_enable(dev);
else
- WARN_ON(1);
+ MISSING_CASE();
if (ppgtt) {
for_each_ring(ring, dev_priv, i) {
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index d5153a4f90fe..b7155d5efc10 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -4847,7 +4847,7 @@ static void cherryview_set_cdclk(struct drm_device *dev, int cdclk)
cmd = 0;
break;
default:
- WARN_ON(1);
+ MISSING_CASE();
return;
}
@@ -8224,7 +8224,7 @@ static void i9xx_update_cursor(struct drm_crtc *crtc, u32 base)
cntl |= CURSOR_MODE_256_ARGB_AX;
break;
default:
- WARN_ON(1);
+ MISSING_CASE();
return;
}
cntl |= pipe << 28; /* Connect to correct pipe */
diff --git a/drivers/gpu/drm/i915/intel_uncore.c b/drivers/gpu/drm/i915/intel_uncore.c
index 46de8d75b4bf..83ab530fee06 100644
--- a/drivers/gpu/drm/i915/intel_uncore.c
+++ b/drivers/gpu/drm/i915/intel_uncore.c
@@ -1202,7 +1202,7 @@ void intel_uncore_init(struct drm_device *dev)
switch (INTEL_INFO(dev)->gen) {
default:
- WARN_ON(1);
+ MISSING_CASE();
return;
case 9:
ASSIGN_WRITE_MMIO_VFUNCS(gen9);
@@ -1300,7 +1300,7 @@ int i915_reg_read_ioctl(struct drm_device *dev,
reg->val = I915_READ8(reg->offset);
break;
default:
- WARN_ON(1);
+ MISSING_CASE();
ret = -EINVAL;
goto out;
}
--
2.1.1
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 13+ messages in thread
* Re: [PATCH] drm/i915: Use BUILD_BUG if possible in the i915 WARN_ON
2014-12-08 16:06 [PATCH] drm/i915: Use BUILD_BUG if possible in the i915 WARN_ON Daniel Vetter
2014-12-08 16:10 ` Damien Lespiau
2014-12-08 16:20 ` Daniel Vetter
@ 2014-12-09 17:40 ` shuang.he
2014-12-10 13:49 ` Daniel Vetter
` (2 subsequent siblings)
5 siblings, 0 replies; 13+ messages in thread
From: shuang.he @ 2014-12-09 17:40 UTC (permalink / raw)
To: shuang.he, intel-gfx, daniel.vetter
Tested-By: PRC QA PRTS (Patch Regression Test System Contact: shuang.he@intel.com)
-------------------------------------Summary-------------------------------------
Platform Delta drm-intel-nightly Series Applied
PNV -5 311/311 306/311
ILK -24 364/366 340/366
SNB -53 401/403 348/403
IVB -54 497/498 443/498
BYT -6 289/289 283/289
HSW -8 392/392 384/392
BDW -12 417/417 405/417
-------------------------------------Detailed-------------------------------------
Platform Test drm-intel-nightly Series Applied
*PNV igt_gen3_mixed_blits PASS(2, M23M7) NO_RESULT(1, M7)
*PNV igt_gen3_render_mixed_blits PASS(2, M23M7) NO_RESULT(1, M7)
*PNV igt_gen3_render_tiledx_blits PASS(2, M23M7) NO_RESULT(1, M7)
*PNV igt_gen3_render_tiledy_blits PASS(2, M23M7) NO_RESULT(1, M7)
*PNV igt_kms_addfb_framebuffer-vs-set-tiling PASS(2, M23M7) DMESG_FAIL(1, M7)
*ILK igt_kms_addfb_framebuffer-vs-set-tiling PASS(2, M26) DMESG_FAIL(1, M26)
*ILK igt_kms_addfb_normal PASS(2, M26) DMESG_FAIL(1, M26)
*ILK igt_kms_addfb_size-max PASS(2, M26) DMESG_WARN(1, M26)
*ILK igt_kms_addfb_small-bo PASS(2, M26) DMESG_FAIL(1, M26)
*ILK igt_kms_addfb_X-tiled PASS(2, M26) DMESG_FAIL(1, M26)
ILK igt_kms_flip_nonexisting-fb DMESG_WARN(1, M26)PASS(1, M26) DMESG_WARN(1, M26)
*ILK igt_kms_setmode_invalid-clone-exclusive-crtc PASS(2, M26) DMESG_WARN(1, M26)
*ILK igt_kms_flip_rcs-flip-vs-panning-interruptible PASS(2, M26) DMESG_WARN(1, M26)
*ILK igt_kms_flip_rcs-wf_vblank-vs-dpms-interruptible PASS(3, M26) DMESG_WARN(1, M26)
*ILK igt_kms_render_direct-render PASS(2, M26) DMESG_WARN(1, M26)
*ILK igt_gem_caching_read-writes PASS(2, M26) DMESG_WARN(1, M26)
*ILK igt_gem_userptr_blits_forked-sync-mempressure-interruptible PASS(2, M26) DMESG_WARN(1, M26)
*ILK igt_kms_flip_bcs-flip-vs-modeset-interruptible PASS(2, M26) DMESG_WARN(1, M26)
*ILK igt_kms_flip_blocking-absolute-wf_vblank-interruptible PASS(2, M26) NSPT(1, M26)
*ILK igt_kms_flip_busy-flip-interruptible PASS(2, M26) DMESG_WARN(1, M26)
*ILK igt_kms_flip_flip-vs-dpms-interruptible PASS(2, M26) DMESG_WARN(1, M26)
*ILK igt_kms_flip_flip-vs-panning PASS(2, M26) DMESG_WARN(1, M26)
*ILK igt_kms_flip_flip-vs-rmfb-interruptible PASS(2, M26) DMESG_WARN(1, M26)
*ILK igt_kms_flip_plain-flip-fb-recreate-interruptible PASS(3, M26) DMESG_WARN(1, M26)
*ILK igt_kms_flip_plain-flip-ts-check-interruptible PASS(2, M26) DMESG_WARN(1, M26)
*ILK igt_kms_flip_rcs-flip-vs-modeset PASS(2, M26) DMESG_WARN(1, M26)
*ILK igt_kms_flip_rcs-flip-vs-panning PASS(2, M26) DMESG_WARN(1, M26)
ILK igt_kms_flip_vblank-vs-hang DMESG_WARN(1, M26)PASS(1, M26) DMESG_WARN(1, M26)
*ILK igt_kms_flip_wf_vblank-vs-modeset-interruptible PASS(2, M26) DMESG_WARN(1, M26)
*SNB igt_gem_evict_everything_minor-normal PASS(2, M35) DMESG_WARN(1, M35)
*SNB igt_gem_fence_thrash_bo-write-verify-none PASS(2, M35) TIMEOUT(1, M35)
*SNB igt_gem_mmap_offset_exhaustion PASS(2, M35) NO_RESULT(1, M35)
*SNB igt_gem_userptr_blits_minor-normal-sync PASS(2, M35) TIMEOUT(1, M35)
*SNB igt_gem_userptr_blits_minor-sync-interruptible PASS(2, M35) NO_RESULT(1, M35)
*SNB igt_gem_userptr_blits_minor-unsync-interruptible PASS(2, M35) TIMEOUT(1, M35)
*SNB igt_gem_userptr_blits_minor-unsync-normal PASS(2, M35) NO_RESULT(1, M35)
*SNB igt_kms_addfb_framebuffer-vs-set-tiling PASS(2, M35) DMESG_FAIL(1, M35)
*SNB igt_kms_addfb_normal PASS(2, M35) DMESG_FAIL(1, M35)
*SNB igt_kms_addfb_size-max PASS(2, M35) DMESG_WARN(1, M35)
*SNB igt_kms_addfb_small-bo PASS(2, M35) DMESG_FAIL(1, M35)
*SNB igt_kms_addfb_X-tiled PASS(2, M35) DMESG_FAIL(1, M35)
*SNB igt_kms_cursor_crc_cursor-size-change PASS(2, M35) DMESG_WARN(1, M35)
*SNB igt_kms_flip_bo-too-big PASS(2, M35) DMESG_WARN(1, M35)
*SNB igt_kms_flip_bo-too-big-interruptible PASS(2, M35) DMESG_WARN(1, M35)
*SNB igt_kms_flip_dpms-vs-vblank-race PASS(2, M35) DMESG_WARN(1, M35)
*SNB igt_kms_flip_dpms-vs-vblank-race-interruptible PASS(2, M35) DMESG_WARN(1, M35)
*SNB igt_kms_flip_event_leak PASS(2, M35) DMESG_WARN(1, M35)
*SNB igt_kms_flip_flip-vs-dpms-off-vs-modeset PASS(2, M35) DMESG_WARN(1, M35)
*SNB igt_kms_flip_flip-vs-dpms-off-vs-modeset-interruptible PASS(2, M35) DMESG_WARN(1, M35)
*SNB igt_kms_flip_modeset-vs-vblank-race PASS(2, M35) DMESG_WARN(1, M35)
*SNB igt_kms_flip_modeset-vs-vblank-race-interruptible PASS(2, M35) DMESG_WARN(1, M35)
*SNB igt_kms_flip_nonexisting-fb PASS(2, M35) DMESG_WARN(1, M35)
*SNB igt_kms_flip_nonexisting-fb-interruptible PASS(2, M35) DMESG_WARN(1, M35)
*SNB igt_kms_flip_single-buffer-flip-vs-dpms-off-vs-modeset PASS(2, M35) DMESG_WARN(1, M35)
*SNB igt_kms_flip_single-buffer-flip-vs-dpms-off-vs-modeset-interruptible PASS(2, M35) DMESG_WARN(1, M35)
*SNB igt_kms_flip_tiling_flip-changes-tiling PASS(2, M35) DMESG_WARN(1, M35)
*SNB igt_kms_mmio_vs_cs_flip_setcrtc_vs_cs_flip PASS(2, M35) DMESG_WARN(1, M35)
*SNB igt_kms_mmio_vs_cs_flip_setplane_vs_cs_flip PASS(2, M35) DMESG_WARN(1, M35)
*SNB igt_kms_pipe_crc_basic_read-crc-pipe-A PASS(2, M35) DMESG_WARN(1, M35)
*SNB igt_kms_pipe_crc_basic_read-crc-pipe-A-frame-sequence PASS(2, M35) DMESG_WARN(1, M35)
*SNB igt_kms_pipe_crc_basic_read-crc-pipe-B PASS(2, M35) DMESG_WARN(1, M35)
*SNB igt_kms_pipe_crc_basic_read-crc-pipe-B-frame-sequence PASS(2, M35) DMESG_WARN(1, M35)
*SNB igt_kms_plane_plane-panning-bottom-right-pipe-A-plane-1 PASS(2, M35) DMESG_WARN(1, M35)
*SNB igt_kms_plane_plane-panning-bottom-right-pipe-A-plane-2 PASS(3, M35M22) DMESG_WARN(1, M35)
*SNB igt_kms_plane_plane-panning-bottom-right-pipe-B-plane-1 PASS(2, M35) DMESG_WARN(1, M35)
*SNB igt_kms_plane_plane-panning-bottom-right-pipe-B-plane-2 PASS(2, M35) DMESG_WARN(1, M35)
*SNB igt_kms_plane_plane-panning-top-left-pipe-A-plane-1 PASS(2, M35) DMESG_WARN(1, M35)
*SNB igt_kms_plane_plane-panning-top-left-pipe-A-plane-2 PASS(2, M35) DMESG_WARN(1, M35)
*SNB igt_kms_plane_plane-panning-top-left-pipe-B-plane-1 PASS(2, M35) DMESG_WARN(1, M35)
*SNB igt_kms_plane_plane-panning-top-left-pipe-B-plane-2 PASS(2, M35) DMESG_WARN(1, M35)
*SNB igt_kms_plane_plane-position-covered-pipe-A-plane-2 PASS(2, M35) DMESG_WARN(1, M35)
*SNB igt_kms_plane_plane-position-covered-pipe-B-plane-1 PASS(2, M35) DMESG_WARN(1, M35)
*SNB igt_kms_plane_plane-position-covered-pipe-B-plane-2 PASS(2, M35) DMESG_WARN(1, M35)
*SNB igt_kms_plane_plane-position-hole-pipe-A-plane-1 PASS(2, M35) DMESG_WARN(1, M35)
*SNB igt_kms_plane_plane-position-hole-pipe-A-plane-2 PASS(2, M35) DMESG_WARN(1, M35)
*SNB igt_kms_plane_plane-position-hole-pipe-B-plane-1 PASS(2, M35) DMESG_WARN(1, M35)
*SNB igt_kms_plane_plane-position-hole-pipe-B-plane-2 PASS(2, M35) DMESG_WARN(1, M35)
*SNB igt_kms_rotation_crc_primary-rotation PASS(2, M35) DMESG_WARN(1, M35)
*SNB igt_kms_rotation_crc_sprite-rotation PASS(2, M35) DMESG_WARN(1, M35)
*SNB igt_kms_setmode_invalid-clone-exclusive-crtc PASS(2, M35) DMESG_WARN(1, M35)
*SNB igt_pm_rpm_cursor PASS(2, M35) DMESG_FAIL(1, M35)
*SNB igt_pm_rpm_cursor-dpms PASS(2, M35) DMESG_FAIL(1, M35)
*IVB igt_gem_evict_everything_minor-normal PASS(2, M4) DMESG_WARN(1, M4)
*IVB igt_gem_userptr_blits_minor-normal-sync PASS(2, M4) DMESG_WARN(1, M4)
*IVB igt_gem_userptr_blits_minor-sync-interruptible PASS(2, M4) NO_RESULT(1, M4)
*IVB igt_gem_userptr_blits_minor-unsync-interruptible PASS(2, M4) NO_RESULT(1, M4)
*IVB igt_gem_userptr_blits_minor-unsync-normal PASS(2, M4) NO_RESULT(1, M4)
*IVB igt_kms_addfb_framebuffer-vs-set-tiling PASS(2, M4) DMESG_FAIL(1, M4)
*IVB igt_kms_addfb_normal PASS(2, M4) DMESG_FAIL(1, M4)
*IVB igt_kms_addfb_size-max PASS(2, M4) DMESG_WARN(1, M4)
*IVB igt_kms_addfb_small-bo PASS(2, M4) DMESG_FAIL(1, M4)
*IVB igt_kms_addfb_X-tiled PASS(2, M4) DMESG_FAIL(1, M4)
*IVB igt_kms_cursor_crc_cursor-128x128-onscreen PASS(2, M4) DMESG_WARN(1, M4)
*IVB igt_kms_cursor_crc_cursor-128x128-random PASS(2, M4) DMESG_WARN(1, M4)
*IVB igt_kms_cursor_crc_cursor-128x128-sliding PASS(2, M4) DMESG_WARN(1, M4)
*IVB igt_kms_cursor_crc_cursor-256x256-offscreen PASS(2, M4) DMESG_WARN(1, M4)
*IVB igt_kms_cursor_crc_cursor-256x256-onscreen PASS(2, M4) DMESG_WARN(1, M4)
*IVB igt_kms_cursor_crc_cursor-256x256-sliding PASS(2, M4) DMESG_WARN(1, M4)
*IVB igt_kms_cursor_crc_cursor-64x64-offscreen PASS(2, M4) DMESG_WARN(1, M4)
*IVB igt_kms_cursor_crc_cursor-64x64-onscreen PASS(2, M4) DMESG_WARN(1, M4)
*IVB igt_kms_cursor_crc_cursor-64x64-random PASS(3, M4M21) DMESG_WARN(1, M4)
*IVB igt_kms_cursor_crc_cursor-64x64-sliding PASS(2, M4) DMESG_WARN(1, M4)
*IVB igt_kms_cursor_crc_cursor-size-change PASS(2, M4) DMESG_WARN(1, M4)
*IVB igt_kms_fence_pin_leak PASS(2, M4) DMESG_WARN(1, M4)
*IVB igt_kms_mmio_vs_cs_flip_setcrtc_vs_cs_flip PASS(2, M4) DMESG_WARN(1, M4)
*IVB igt_kms_mmio_vs_cs_flip_setplane_vs_cs_flip PASS(2, M4) DMESG_WARN(1, M4)
*IVB igt_kms_pipe_crc_basic_read-crc-pipe-A PASS(2, M4) DMESG_WARN(1, M4)
*IVB igt_kms_pipe_crc_basic_read-crc-pipe-A-frame-sequence PASS(2, M4) DMESG_WARN(1, M4)
*IVB igt_kms_pipe_crc_basic_read-crc-pipe-B PASS(2, M4) DMESG_WARN(1, M4)
*IVB igt_kms_pipe_crc_basic_read-crc-pipe-B-frame-sequence PASS(2, M4) DMESG_WARN(1, M4)
*IVB igt_kms_pipe_crc_basic_read-crc-pipe-C PASS(2, M4) DMESG_WARN(1, M4)
*IVB igt_kms_pipe_crc_basic_read-crc-pipe-C-frame-sequence PASS(2, M4) DMESG_WARN(1, M4)
*IVB igt_kms_plane_plane-panning-bottom-right-pipe-A-plane-1 PASS(2, M4) DMESG_WARN(1, M4)
*IVB igt_kms_plane_plane-panning-bottom-right-pipe-A-plane-2 PASS(2, M4) DMESG_WARN(1, M4)
*IVB igt_kms_plane_plane-panning-bottom-right-pipe-B-plane-1 PASS(2, M4) DMESG_WARN(1, M4)
*IVB igt_kms_plane_plane-panning-bottom-right-pipe-B-plane-2 PASS(2, M4) DMESG_WARN(1, M4)
*IVB igt_kms_plane_plane-panning-bottom-right-pipe-C-plane-2 PASS(2, M4) DMESG_WARN(1, M4)
*IVB igt_kms_plane_plane-panning-top-left-pipe-A-plane-1 PASS(2, M4) DMESG_WARN(1, M4)
*IVB igt_kms_plane_plane-panning-top-left-pipe-A-plane-2 PASS(2, M4) DMESG_WARN(1, M4)
*IVB igt_kms_plane_plane-panning-top-left-pipe-B-plane-1 PASS(2, M4) DMESG_WARN(1, M4)
*IVB igt_kms_plane_plane-panning-top-left-pipe-B-plane-2 PASS(2, M4) DMESG_WARN(1, M4)
*IVB igt_kms_plane_plane-panning-top-left-pipe-C-plane-2 PASS(2, M4) DMESG_WARN(1, M4)
*IVB igt_kms_plane_plane-position-covered-pipe-A-plane-1 PASS(2, M4) DMESG_WARN(1, M4)
*IVB igt_kms_plane_plane-position-covered-pipe-A-plane-2 PASS(2, M4) DMESG_WARN(1, M4)
*IVB igt_kms_plane_plane-position-covered-pipe-B-plane-1 PASS(2, M4) DMESG_WARN(1, M4)
*IVB igt_kms_plane_plane-position-covered-pipe-B-plane-2 PASS(2, M4) DMESG_WARN(1, M4)
*IVB igt_kms_plane_plane-position-covered-pipe-C-plane-2 PASS(2, M4) DMESG_WARN(1, M4)
*IVB igt_kms_plane_plane-position-hole-pipe-A-plane-1 PASS(2, M4) DMESG_WARN(1, M4)
*IVB igt_kms_plane_plane-position-hole-pipe-A-plane-2 PASS(2, M4) DMESG_WARN(1, M4)
*IVB igt_kms_plane_plane-position-hole-pipe-B-plane-1 PASS(2, M4) DMESG_WARN(1, M4)
*IVB igt_kms_plane_plane-position-hole-pipe-B-plane-2 PASS(2, M4) DMESG_WARN(1, M4)
*IVB igt_kms_plane_plane-position-hole-pipe-C-plane-1 PASS(2, M4) DMESG_WARN(1, M4)
*IVB igt_kms_plane_plane-position-hole-pipe-C-plane-2 PASS(2, M4) DMESG_WARN(1, M4)
*IVB igt_kms_rotation_crc_primary-rotation PASS(2, M4) DMESG_WARN(1, M4)
*IVB igt_kms_rotation_crc_sprite-rotation PASS(2, M4) DMESG_WARN(1, M4)
*IVB igt_kms_setmode_invalid-clone-exclusive-crtc PASS(2, M4) DMESG_WARN(1, M4)
*BYT igt_kms_addfb_framebuffer-vs-set-tiling PASS(2, M48M51) DMESG_FAIL(1, M51)
*BYT igt_kms_addfb_normal PASS(2, M48M51) DMESG_FAIL(1, M51)
*BYT igt_kms_addfb_size-max PASS(2, M48M51) DMESG_WARN(1, M51)
*BYT igt_kms_addfb_small-bo PASS(2, M48M51) DMESG_FAIL(1, M51)
*BYT igt_kms_addfb_X-tiled PASS(2, M48M51) DMESG_FAIL(1, M51)
*BYT igt_kms_setmode_invalid-clone-exclusive-crtc PASS(2, M48M51) DMESG_WARN(1, M51)
*HSW igt_gem_evict_everything_minor-normal PASS(2, M40M20) DMESG_WARN(1, M20)
*HSW igt_gem_exec_bad_domains_cpu-domain PASS(2, M40M20) NO_RESULT(1, M20)
*HSW igt_gem_mmap_offset_exhaustion PASS(2, M40M20) NO_RESULT(1, M20)
*HSW igt_gem_userptr_blits_minor-normal-sync PASS(2, M40M20) TIMEOUT(1, M20)
*HSW igt_gem_userptr_blits_minor-sync-interruptible PASS(2, M40M20) DMESG_WARN(1, M20)
*HSW igt_gem_userptr_blits_minor-unsync-interruptible PASS(2, M40M20) TIMEOUT(1, M20)
*HSW igt_gem_userptr_blits_minor-unsync-normal PASS(2, M40M20) TIMEOUT(1, M20)
*HSW igt_kms_addfb_framebuffer-vs-set-tiling PASS(2, M40M20) DMESG_FAIL(1, M20)
*BDW igt_gem_mmap_offset_exhaustion PASS(2, M30M28) NO_RESULT(1, M28)
*BDW igt_gem_render_linear_blits PASS(2, M30M28) TIMEOUT(1, M28)
*BDW igt_gem_render_tiled_blits PASS(2, M30M28) NO_RESULT(1, M28)
*BDW igt_gem_tiled_fence_blits PASS(2, M30M28) DMESG_WARN(1, M28)
*BDW igt_gem_tiled_partial_pwrite_pread_reads PASS(2, M30M28) CRASH(1, M28)
*BDW igt_kms_addfb_framebuffer-vs-set-tiling PASS(2, M30M28) DMESG_FAIL(1, M28)
*BDW igt_kms_addfb_normal PASS(2, M30M28) DMESG_FAIL(1, M28)
*BDW igt_kms_addfb_size-max PASS(2, M30M28) DMESG_WARN(1, M28)
*BDW igt_kms_addfb_small-bo PASS(2, M30M28) DMESG_FAIL(1, M28)
*BDW igt_kms_addfb_X-tiled PASS(2, M30M28) DMESG_FAIL(1, M28)
*BDW igt_kms_fence_pin_leak PASS(2, M30M28) DMESG_WARN(1, M28)
*BDW igt_kms_setmode_invalid-clone-exclusive-crtc PASS(2, M30M28) DMESG_WARN(1, M28)
Note: You need to pay more attention to line start with '*'
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 13+ messages in thread
* Re: [PATCH] drm/i915: Use BUILD_BUG if possible in the i915 WARN_ON
2014-12-08 16:20 ` Daniel Vetter
@ 2014-12-09 18:11 ` shuang.he
0 siblings, 0 replies; 13+ messages in thread
From: shuang.he @ 2014-12-09 18:11 UTC (permalink / raw)
To: shuang.he, intel-gfx, daniel.vetter
Tested-By: PRC QA PRTS (Patch Regression Test System Contact: shuang.he@intel.com)
-------------------------------------Summary-------------------------------------
Platform Delta drm-intel-nightly Series Applied
PNV 364/364 364/364
ILK +1-3 364/366 362/366
SNB 448/450 448/450
IVB 497/498 497/498
BYT 289/289 289/289
HSW 563/564 563/564
BDW 417/417 417/417
-------------------------------------Detailed-------------------------------------
Platform Test drm-intel-nightly Series Applied
ILK igt_kms_flip_blocking-absolute-wf_vblank-interruptible DMESG_WARN(1, M26)PASS(2, M26) DMESG_WARN(1, M26)
*ILK igt_kms_flip_busy-flip-interruptible PASS(3, M26) DMESG_WARN(1, M26)
*ILK igt_kms_flip_flip-vs-rmfb-interruptible PASS(3, M26) DMESG_WARN(1, M26)
ILK igt_kms_flip_wf_vblank-ts-check DMESG_WARN(1, M26)PASS(6, M26M37) PASS(1, M26)
Note: You need to pay more attention to line start with '*'
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 13+ messages in thread
* [PATCH] drm/i915: Use BUILD_BUG if possible in the i915 WARN_ON
2014-12-08 16:06 [PATCH] drm/i915: Use BUILD_BUG if possible in the i915 WARN_ON Daniel Vetter
` (2 preceding siblings ...)
2014-12-09 17:40 ` shuang.he
@ 2014-12-10 13:49 ` Daniel Vetter
2014-12-10 13:53 ` Chris Wilson
2014-12-10 18:17 ` shuang.he
2014-12-10 14:43 ` Daniel Vetter
2014-12-10 16:47 ` Daniel Vetter
5 siblings, 2 replies; 13+ messages in thread
From: Daniel Vetter @ 2014-12-10 13:49 UTC (permalink / raw)
To: Intel Graphics Development; +Cc: Daniel Vetter, Daniel Vetter
Faster feedback to errors is always better. This is inspired by the
addition to WARN_ONs to mask/enable helpers for registers to make sure
callers have the arguments ordered correctly: Pretty much always the
arguments are static.
We use WARN_ON(1) a lot in default switch statements though where we
should always handle all cases. So add a new macro specifically for
that.
The idea to use __builtin_constant_p is from Chris Wilson.
v2: Use the ({}) gcc-ism to avoid the static inline, suggested by
Dave. My first attempt used __cond as the temp var, which is the same
used by BUILD_BUG_ON, but with inverted sense. Hilarity ensued, so
sprinkle i915 into the name.
Also use a temporary variable to only evaluate the condition once,
suggested by Damien.
v3: It's crazy but apparently 32bit gcc can't compile out the
BUILD_BUG_ON in a lot of cases and just falls over. I have no idea
why, but until clue grows just disable this nifty idea on 32bit
builds. Reported by 0-day builder.
Cc: Damien Lespiau <damien.lespiau@intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Jani Nikula <jani.nikula@linux.intel.com>
Cc: Dave Gordon <david.s.gordon@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@intel.com>
---
drivers/gpu/drm/i915/i915_debugfs.c | 2 +-
drivers/gpu/drm/i915/i915_drv.h | 13 ++++++++++++-
drivers/gpu/drm/i915/i915_gem_gtt.c | 6 +++---
drivers/gpu/drm/i915/intel_display.c | 4 ++--
drivers/gpu/drm/i915/intel_uncore.c | 4 ++--
5 files changed, 20 insertions(+), 9 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
index d0e445eca9ce..f44a844a48db 100644
--- a/drivers/gpu/drm/i915/i915_debugfs.c
+++ b/drivers/gpu/drm/i915/i915_debugfs.c
@@ -2347,7 +2347,7 @@ static const char *power_domain_str(enum intel_display_power_domain domain)
case POWER_DOMAIN_INIT:
return "INIT";
default:
- WARN_ON(1);
+ MISSING_CASE();
return "?";
}
}
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 95dfa2dd35b9..51d7948a7e88 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -58,7 +58,18 @@
#define DRIVER_DATE "20141205"
#undef WARN_ON
-#define WARN_ON(x) WARN(x, "WARN_ON(" #x ")")
+#if BITS_PER_LONG == 64
+#define WARN_ON(x) ({ \
+ bool __i915_warn_cond = (x); \
+ if (__builtin_constant_p(__i915_warn_cond)) \
+ BUILD_BUG_ON(__i915_warn_cond); \
+ WARN(__i915_warn_cond, "WARN_ON(" #x ")"); })
+#else
+/* Somehow 32bit gcc can't compile out the BUILD_BUG_ON. */
+#define WARN_ON(x) WARN((x), "WARN_ON(" #x ")")
+#endif
+
+#define MISSING_CASE() WARN(1, "Missing switch case in %s\n", __func__);
enum pipe {
INVALID_PIPE = -1,
diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
index ac03a382000b..3b5807c11427 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.c
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
@@ -132,7 +132,7 @@ static gen6_gtt_pte_t snb_pte_encode(dma_addr_t addr,
pte |= GEN6_PTE_UNCACHED;
break;
default:
- WARN_ON(1);
+ MISSING_CASE();
}
return pte;
@@ -156,7 +156,7 @@ static gen6_gtt_pte_t ivb_pte_encode(dma_addr_t addr,
pte |= GEN6_PTE_UNCACHED;
break;
default:
- WARN_ON(1);
+ MISSING_CASE();
}
return pte;
@@ -1146,7 +1146,7 @@ int i915_ppgtt_init_hw(struct drm_device *dev)
else if (INTEL_INFO(dev)->gen >= 8)
gen8_ppgtt_enable(dev);
else
- WARN_ON(1);
+ MISSING_CASE();
if (ppgtt) {
for_each_ring(ring, dev_priv, i) {
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index d5153a4f90fe..b7155d5efc10 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -4847,7 +4847,7 @@ static void cherryview_set_cdclk(struct drm_device *dev, int cdclk)
cmd = 0;
break;
default:
- WARN_ON(1);
+ MISSING_CASE();
return;
}
@@ -8224,7 +8224,7 @@ static void i9xx_update_cursor(struct drm_crtc *crtc, u32 base)
cntl |= CURSOR_MODE_256_ARGB_AX;
break;
default:
- WARN_ON(1);
+ MISSING_CASE();
return;
}
cntl |= pipe << 28; /* Connect to correct pipe */
diff --git a/drivers/gpu/drm/i915/intel_uncore.c b/drivers/gpu/drm/i915/intel_uncore.c
index 46de8d75b4bf..83ab530fee06 100644
--- a/drivers/gpu/drm/i915/intel_uncore.c
+++ b/drivers/gpu/drm/i915/intel_uncore.c
@@ -1202,7 +1202,7 @@ void intel_uncore_init(struct drm_device *dev)
switch (INTEL_INFO(dev)->gen) {
default:
- WARN_ON(1);
+ MISSING_CASE();
return;
case 9:
ASSIGN_WRITE_MMIO_VFUNCS(gen9);
@@ -1300,7 +1300,7 @@ int i915_reg_read_ioctl(struct drm_device *dev,
reg->val = I915_READ8(reg->offset);
break;
default:
- WARN_ON(1);
+ MISSING_CASE();
ret = -EINVAL;
goto out;
}
--
2.1.1
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 13+ messages in thread
* Re: [PATCH] drm/i915: Use BUILD_BUG if possible in the i915 WARN_ON
2014-12-10 13:49 ` Daniel Vetter
@ 2014-12-10 13:53 ` Chris Wilson
2014-12-10 18:17 ` shuang.he
1 sibling, 0 replies; 13+ messages in thread
From: Chris Wilson @ 2014-12-10 13:53 UTC (permalink / raw)
To: Daniel Vetter; +Cc: Intel Graphics Development, Daniel Vetter
On Wed, Dec 10, 2014 at 02:49:05PM +0100, Daniel Vetter wrote:
> Faster feedback to errors is always better. This is inspired by the
> addition to WARN_ONs to mask/enable helpers for registers to make sure
> callers have the arguments ordered correctly: Pretty much always the
> arguments are static.
>
> We use WARN_ON(1) a lot in default switch statements though where we
> should always handle all cases. So add a new macro specifically for
> that.
>
> The idea to use __builtin_constant_p is from Chris Wilson.
>
> v2: Use the ({}) gcc-ism to avoid the static inline, suggested by
> Dave. My first attempt used __cond as the temp var, which is the same
> used by BUILD_BUG_ON, but with inverted sense. Hilarity ensued, so
> sprinkle i915 into the name.
>
> Also use a temporary variable to only evaluate the condition once,
> suggested by Damien.
>
> v3: It's crazy but apparently 32bit gcc can't compile out the
> BUILD_BUG_ON in a lot of cases and just falls over. I have no idea
> why, but until clue grows just disable this nifty idea on 32bit
> builds. Reported by 0-day builder.
>
> Cc: Damien Lespiau <damien.lespiau@intel.com>
> Cc: Chris Wilson <chris@chris-wilson.co.uk>
> Cc: Jani Nikula <jani.nikula@linux.intel.com>
> Cc: Dave Gordon <david.s.gordon@intel.com>
> Signed-off-by: Daniel Vetter <daniel.vetter@intel.com>
> ---
> drivers/gpu/drm/i915/i915_debugfs.c | 2 +-
> drivers/gpu/drm/i915/i915_drv.h | 13 ++++++++++++-
> drivers/gpu/drm/i915/i915_gem_gtt.c | 6 +++---
> drivers/gpu/drm/i915/intel_display.c | 4 ++--
> drivers/gpu/drm/i915/intel_uncore.c | 4 ++--
> 5 files changed, 20 insertions(+), 9 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
> index d0e445eca9ce..f44a844a48db 100644
> --- a/drivers/gpu/drm/i915/i915_debugfs.c
> +++ b/drivers/gpu/drm/i915/i915_debugfs.c
> @@ -2347,7 +2347,7 @@ static const char *power_domain_str(enum intel_display_power_domain domain)
> case POWER_DOMAIN_INIT:
> return "INIT";
> default:
> - WARN_ON(1);
> + MISSING_CASE();
Whilst you are doing this janitorial task, if we add the case value to
the macro, that may speed up debugging when they are hit.
-Chris
--
Chris Wilson, Intel Open Source Technology Centre
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 13+ messages in thread
* [PATCH] drm/i915: Use BUILD_BUG if possible in the i915 WARN_ON
2014-12-08 16:06 [PATCH] drm/i915: Use BUILD_BUG if possible in the i915 WARN_ON Daniel Vetter
` (3 preceding siblings ...)
2014-12-10 13:49 ` Daniel Vetter
@ 2014-12-10 14:43 ` Daniel Vetter
2014-12-10 21:18 ` shuang.he
2014-12-10 16:47 ` Daniel Vetter
5 siblings, 1 reply; 13+ messages in thread
From: Daniel Vetter @ 2014-12-10 14:43 UTC (permalink / raw)
To: Intel Graphics Development; +Cc: Daniel Vetter, Daniel Vetter
Faster feedback to errors is always better. This is inspired by the
addition to WARN_ONs to mask/enable helpers for registers to make sure
callers have the arguments ordered correctly: Pretty much always the
arguments are static.
We use WARN_ON(1) a lot in default switch statements though where we
should always handle all cases. So add a new macro specifically for
that.
The idea to use __builtin_constant_p is from Chris Wilson.
v2: Use the ({}) gcc-ism to avoid the static inline, suggested by
Dave. My first attempt used __cond as the temp var, which is the same
used by BUILD_BUG_ON, but with inverted sense. Hilarity ensued, so
sprinkle i915 into the name.
Also use a temporary variable to only evaluate the condition once,
suggested by Damien.
v3: It's crazy but apparently 32bit gcc can't compile out the
BUILD_BUG_ON in a lot of cases and just falls over. I have no idea
why, but until clue grows just disable this nifty idea on 32bit
builds. Reported by 0-day builder.
v4: Got it all wrong, apparently its the gcc version. We need 4.9+.
Now reported by Imre.
Cc: Imre Deak <imre.deak@intel.com>
Cc: Damien Lespiau <damien.lespiau@intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Jani Nikula <jani.nikula@linux.intel.com>
Cc: Dave Gordon <david.s.gordon@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@intel.com>
---
drivers/gpu/drm/i915/i915_debugfs.c | 2 +-
drivers/gpu/drm/i915/i915_drv.h | 13 ++++++++++++-
drivers/gpu/drm/i915/i915_gem_gtt.c | 6 +++---
drivers/gpu/drm/i915/intel_display.c | 4 ++--
drivers/gpu/drm/i915/intel_uncore.c | 4 ++--
5 files changed, 20 insertions(+), 9 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
index d0e445eca9ce..f44a844a48db 100644
--- a/drivers/gpu/drm/i915/i915_debugfs.c
+++ b/drivers/gpu/drm/i915/i915_debugfs.c
@@ -2347,7 +2347,7 @@ static const char *power_domain_str(enum intel_display_power_domain domain)
case POWER_DOMAIN_INIT:
return "INIT";
default:
- WARN_ON(1);
+ MISSING_CASE();
return "?";
}
}
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 95dfa2dd35b9..4532526deb5f 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -58,7 +58,18 @@
#define DRIVER_DATE "20141205"
#undef WARN_ON
-#define WARN_ON(x) WARN(x, "WARN_ON(" #x ")")
+/* Only 4.9+ gcc can compile away the BUILD_BUG_ON correctly. */
+#if __GNUC__ > 4 || (__GNUC__ == 4 && __GNUC_MINOR__ >= 9)
+#define WARN_ON(x) ({ \
+ bool __i915_warn_cond = (x); \
+ if (__builtin_constant_p(__i915_warn_cond)) \
+ BUILD_BUG_ON(__i915_warn_cond); \
+ WARN(__i915_warn_cond, "WARN_ON(" #x ")"); })
+#else
+#define WARN_ON(x) WARN((x), "WARN_ON(" #x ")")
+#endif
+
+#define MISSING_CASE() WARN(1, "Missing switch case in %s\n", __func__);
enum pipe {
INVALID_PIPE = -1,
diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
index ac03a382000b..3b5807c11427 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.c
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
@@ -132,7 +132,7 @@ static gen6_gtt_pte_t snb_pte_encode(dma_addr_t addr,
pte |= GEN6_PTE_UNCACHED;
break;
default:
- WARN_ON(1);
+ MISSING_CASE();
}
return pte;
@@ -156,7 +156,7 @@ static gen6_gtt_pte_t ivb_pte_encode(dma_addr_t addr,
pte |= GEN6_PTE_UNCACHED;
break;
default:
- WARN_ON(1);
+ MISSING_CASE();
}
return pte;
@@ -1146,7 +1146,7 @@ int i915_ppgtt_init_hw(struct drm_device *dev)
else if (INTEL_INFO(dev)->gen >= 8)
gen8_ppgtt_enable(dev);
else
- WARN_ON(1);
+ MISSING_CASE();
if (ppgtt) {
for_each_ring(ring, dev_priv, i) {
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index d5153a4f90fe..b7155d5efc10 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -4847,7 +4847,7 @@ static void cherryview_set_cdclk(struct drm_device *dev, int cdclk)
cmd = 0;
break;
default:
- WARN_ON(1);
+ MISSING_CASE();
return;
}
@@ -8224,7 +8224,7 @@ static void i9xx_update_cursor(struct drm_crtc *crtc, u32 base)
cntl |= CURSOR_MODE_256_ARGB_AX;
break;
default:
- WARN_ON(1);
+ MISSING_CASE();
return;
}
cntl |= pipe << 28; /* Connect to correct pipe */
diff --git a/drivers/gpu/drm/i915/intel_uncore.c b/drivers/gpu/drm/i915/intel_uncore.c
index 46de8d75b4bf..83ab530fee06 100644
--- a/drivers/gpu/drm/i915/intel_uncore.c
+++ b/drivers/gpu/drm/i915/intel_uncore.c
@@ -1202,7 +1202,7 @@ void intel_uncore_init(struct drm_device *dev)
switch (INTEL_INFO(dev)->gen) {
default:
- WARN_ON(1);
+ MISSING_CASE();
return;
case 9:
ASSIGN_WRITE_MMIO_VFUNCS(gen9);
@@ -1300,7 +1300,7 @@ int i915_reg_read_ioctl(struct drm_device *dev,
reg->val = I915_READ8(reg->offset);
break;
default:
- WARN_ON(1);
+ MISSING_CASE();
ret = -EINVAL;
goto out;
}
--
2.1.3
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 13+ messages in thread
* [PATCH] drm/i915: Use BUILD_BUG if possible in the i915 WARN_ON
2014-12-08 16:06 [PATCH] drm/i915: Use BUILD_BUG if possible in the i915 WARN_ON Daniel Vetter
` (4 preceding siblings ...)
2014-12-10 14:43 ` Daniel Vetter
@ 2014-12-10 16:47 ` Daniel Vetter
2014-12-11 1:05 ` shuang.he
2014-12-11 8:11 ` Jani Nikula
5 siblings, 2 replies; 13+ messages in thread
From: Daniel Vetter @ 2014-12-10 16:47 UTC (permalink / raw)
To: Intel Graphics Development; +Cc: Daniel Vetter, Daniel Vetter
Faster feedback to errors is always better. This is inspired by the
addition to WARN_ONs to mask/enable helpers for registers to make sure
callers have the arguments ordered correctly: Pretty much always the
arguments are static.
We use WARN_ON(1) a lot in default switch statements though where we
should always handle all cases. So add a new macro specifically for
that.
The idea to use __builtin_constant_p is from Chris Wilson.
v2: Use the ({}) gcc-ism to avoid the static inline, suggested by
Dave. My first attempt used __cond as the temp var, which is the same
used by BUILD_BUG_ON, but with inverted sense. Hilarity ensued, so
sprinkle i915 into the name.
Also use a temporary variable to only evaluate the condition once,
suggested by Damien.
v3: It's crazy but apparently 32bit gcc can't compile out the
BUILD_BUG_ON in a lot of cases and just falls over. I have no idea
why, but until clue grows just disable this nifty idea on 32bit
builds. Reported by 0-day builder.
v4: Got it all wrong, apparently its the gcc version. We need 4.9+.
Now reported by Imre.
v5: Chris suggested to add the case to MISSING_CASE for speedier
debug.
Cc: Imre Deak <imre.deak@intel.com>
Cc: Damien Lespiau <damien.lespiau@intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Jani Nikula <jani.nikula@linux.intel.com>
Cc: Dave Gordon <david.s.gordon@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@intel.com>
---
drivers/gpu/drm/i915/i915_debugfs.c | 2 +-
drivers/gpu/drm/i915/i915_drv.h | 14 +++++++++++++-
drivers/gpu/drm/i915/i915_gem_gtt.c | 6 +++---
drivers/gpu/drm/i915/intel_display.c | 4 ++--
drivers/gpu/drm/i915/intel_uncore.c | 4 ++--
5 files changed, 21 insertions(+), 9 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
index 165a38f36009..479e0c119111 100644
--- a/drivers/gpu/drm/i915/i915_debugfs.c
+++ b/drivers/gpu/drm/i915/i915_debugfs.c
@@ -2347,7 +2347,7 @@ static const char *power_domain_str(enum intel_display_power_domain domain)
case POWER_DOMAIN_INIT:
return "INIT";
default:
- WARN_ON(1);
+ MISSING_CASE(domain);
return "?";
}
}
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index c74dc946cbf6..aeb1ef3ef2b6 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -58,7 +58,19 @@
#define DRIVER_DATE "20141205"
#undef WARN_ON
-#define WARN_ON(x) WARN(x, "WARN_ON(" #x ")")
+/* Only 4.9+ gcc can compile away the BUILD_BUG_ON correctly. */
+#if __GNUC__ > 4 || (__GNUC__ == 4 && __GNUC_MINOR__ >= 9)
+#define WARN_ON(x) ({ \
+ bool __i915_warn_cond = (x); \
+ if (__builtin_constant_p(__i915_warn_cond)) \
+ BUILD_BUG_ON(__i915_warn_cond); \
+ WARN(__i915_warn_cond, "WARN_ON(" #x ")"); })
+#else
+#define WARN_ON(x) WARN((x), "WARN_ON(" #x ")")
+#endif
+
+#define MISSING_CASE(x) WARN(1, "Missing switch case (%lu) in %s\n", \
+ (long) (x), __func__);
enum pipe {
INVALID_PIPE = -1,
diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
index ac03a382000b..ce4e46c443a1 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.c
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
@@ -132,7 +132,7 @@ static gen6_gtt_pte_t snb_pte_encode(dma_addr_t addr,
pte |= GEN6_PTE_UNCACHED;
break;
default:
- WARN_ON(1);
+ MISSING_CASE(level);
}
return pte;
@@ -156,7 +156,7 @@ static gen6_gtt_pte_t ivb_pte_encode(dma_addr_t addr,
pte |= GEN6_PTE_UNCACHED;
break;
default:
- WARN_ON(1);
+ MISSING_CASE(level);
}
return pte;
@@ -1146,7 +1146,7 @@ int i915_ppgtt_init_hw(struct drm_device *dev)
else if (INTEL_INFO(dev)->gen >= 8)
gen8_ppgtt_enable(dev);
else
- WARN_ON(1);
+ MISSING_CASE(INTEL_INFO(dev)->gen);
if (ppgtt) {
for_each_ring(ring, dev_priv, i) {
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 841af6c1f50b..878c4857ff49 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -4847,7 +4847,7 @@ static void cherryview_set_cdclk(struct drm_device *dev, int cdclk)
cmd = 0;
break;
default:
- WARN_ON(1);
+ MISSING_CASE(cdclk);
return;
}
@@ -8224,7 +8224,7 @@ static void i9xx_update_cursor(struct drm_crtc *crtc, u32 base)
cntl |= CURSOR_MODE_256_ARGB_AX;
break;
default:
- WARN_ON(1);
+ MISSING_CASE(intel_crtc->cursor_width);
return;
}
cntl |= pipe << 28; /* Connect to correct pipe */
diff --git a/drivers/gpu/drm/i915/intel_uncore.c b/drivers/gpu/drm/i915/intel_uncore.c
index 46de8d75b4bf..883d2febb705 100644
--- a/drivers/gpu/drm/i915/intel_uncore.c
+++ b/drivers/gpu/drm/i915/intel_uncore.c
@@ -1202,7 +1202,7 @@ void intel_uncore_init(struct drm_device *dev)
switch (INTEL_INFO(dev)->gen) {
default:
- WARN_ON(1);
+ MISSING_CASE(INTEL_INFO(dev)->gen);
return;
case 9:
ASSIGN_WRITE_MMIO_VFUNCS(gen9);
@@ -1300,7 +1300,7 @@ int i915_reg_read_ioctl(struct drm_device *dev,
reg->val = I915_READ8(reg->offset);
break;
default:
- WARN_ON(1);
+ MISSING_CASE(entry->size);
ret = -EINVAL;
goto out;
}
--
2.1.3
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 13+ messages in thread
* Re: [PATCH] drm/i915: Use BUILD_BUG if possible in the i915 WARN_ON
2014-12-10 13:49 ` Daniel Vetter
2014-12-10 13:53 ` Chris Wilson
@ 2014-12-10 18:17 ` shuang.he
1 sibling, 0 replies; 13+ messages in thread
From: shuang.he @ 2014-12-10 18:17 UTC (permalink / raw)
To: shuang.he, intel-gfx, daniel.vetter
Tested-By: PRC QA PRTS (Patch Regression Test System Contact: shuang.he@intel.com)
-------------------------------------Summary-------------------------------------
Platform Delta drm-intel-nightly Series Applied
PNV 364/364 364/364
ILK +1 364/366 365/366
SNB 448/450 448/450
IVB 497/498 497/498
BYT 289/289 289/289
HSW 563/564 563/564
BDW 417/417 417/417
-------------------------------------Detailed-------------------------------------
Platform Test drm-intel-nightly Series Applied
ILK igt_kms_flip_wf_vblank-ts-check DMESG_WARN(3, M26)PASS(16, M26M37) PASS(1, M37)
Note: You need to pay more attention to line start with '*'
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 13+ messages in thread
* Re: [PATCH] drm/i915: Use BUILD_BUG if possible in the i915 WARN_ON
2014-12-10 14:43 ` Daniel Vetter
@ 2014-12-10 21:18 ` shuang.he
0 siblings, 0 replies; 13+ messages in thread
From: shuang.he @ 2014-12-10 21:18 UTC (permalink / raw)
To: shuang.he, intel-gfx, daniel.vetter
Tested-By: PRC QA PRTS (Patch Regression Test System Contact: shuang.he@intel.com)
-------------------------------------Summary-------------------------------------
Platform Delta drm-intel-nightly Series Applied
PNV 364/364 364/364
ILK +1 364/366 365/366
SNB 448/450 448/450
IVB 497/498 497/498
BYT 289/289 289/289
HSW 563/564 563/564
BDW 417/417 417/417
-------------------------------------Detailed-------------------------------------
Platform Test drm-intel-nightly Series Applied
ILK igt_kms_flip_wf_vblank-ts-check DMESG_WARN(3, M26)PASS(18, M26M37) PASS(1, M37)
Note: You need to pay more attention to line start with '*'
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 13+ messages in thread
* Re: [PATCH] drm/i915: Use BUILD_BUG if possible in the i915 WARN_ON
2014-12-10 16:47 ` Daniel Vetter
@ 2014-12-11 1:05 ` shuang.he
2014-12-11 8:11 ` Jani Nikula
1 sibling, 0 replies; 13+ messages in thread
From: shuang.he @ 2014-12-11 1:05 UTC (permalink / raw)
To: shuang.he, intel-gfx, daniel.vetter
Tested-By: PRC QA PRTS (Patch Regression Test System Contact: shuang.he@intel.com)
-------------------------------------Summary-------------------------------------
Platform Delta drm-intel-nightly Series Applied
PNV 364/364 364/364
ILK +1-4 364/366 361/366
SNB 448/450 448/450
IVB 497/498 497/498
BYT 289/289 289/289
HSW 563/564 563/564
BDW 417/417 417/417
-------------------------------------Detailed-------------------------------------
Platform Test drm-intel-nightly Series Applied
*ILK igt_kms_flip_nonexisting-fb DMESG_WARN(1, M26)PASS(5, M26) NSPT(1, M26)
*ILK igt_kms_flip_rcs-flip-vs-panning-interruptible PASS(4, M26) DMESG_WARN(1, M26)
ILK igt_kms_flip_blocking-absolute-wf_vblank-interruptible DMESG_WARN(1, M26)PASS(6, M26) DMESG_WARN(1, M26)
ILK igt_kms_flip_plain-flip-ts-check-interruptible DMESG_WARN(1, M26)PASS(3, M26) DMESG_WARN(1, M26)
ILK igt_kms_flip_wf_vblank-ts-check DMESG_WARN(4, M26)PASS(19, M26M37) PASS(1, M26)
Note: You need to pay more attention to line start with '*'
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 13+ messages in thread
* Re: [PATCH] drm/i915: Use BUILD_BUG if possible in the i915 WARN_ON
2014-12-10 16:47 ` Daniel Vetter
2014-12-11 1:05 ` shuang.he
@ 2014-12-11 8:11 ` Jani Nikula
1 sibling, 0 replies; 13+ messages in thread
From: Jani Nikula @ 2014-12-11 8:11 UTC (permalink / raw)
To: Intel Graphics Development; +Cc: Daniel Vetter, Daniel Vetter
On Wed, 10 Dec 2014, Daniel Vetter <daniel.vetter@ffwll.ch> wrote:
> Faster feedback to errors is always better. This is inspired by the
> addition to WARN_ONs to mask/enable helpers for registers to make sure
> callers have the arguments ordered correctly: Pretty much always the
> arguments are static.
>
> We use WARN_ON(1) a lot in default switch statements though where we
> should always handle all cases. So add a new macro specifically for
> that.
>
> The idea to use __builtin_constant_p is from Chris Wilson.
>
> v2: Use the ({}) gcc-ism to avoid the static inline, suggested by
> Dave. My first attempt used __cond as the temp var, which is the same
> used by BUILD_BUG_ON, but with inverted sense. Hilarity ensued, so
> sprinkle i915 into the name.
>
> Also use a temporary variable to only evaluate the condition once,
> suggested by Damien.
>
> v3: It's crazy but apparently 32bit gcc can't compile out the
> BUILD_BUG_ON in a lot of cases and just falls over. I have no idea
> why, but until clue grows just disable this nifty idea on 32bit
> builds. Reported by 0-day builder.
>
> v4: Got it all wrong, apparently its the gcc version. We need 4.9+.
> Now reported by Imre.
>
> v5: Chris suggested to add the case to MISSING_CASE for speedier
> debug.
Still fails here. :(
$ gcc --version
gcc (Debian 4.9.1-19) 4.9.1
$ make
CHK include/config/kernel.release
CHK include/generated/uapi/linux/version.h
CHK include/generated/utsrelease.h
CALL scripts/checksyscalls.sh
CHK include/generated/compile.h
CHK kernel/config_data.h
CC [M] drivers/gpu/drm/i915/i915_drv.o
In file included from include/linux/ioport.h:12:0,
from include/linux/device.h:16,
from drivers/gpu/drm/i915/i915_drv.c:30:
drivers/gpu/drm/i915/i915_drv.c: In function ‘intel_detect_pch’:
include/linux/compiler.h:363:38: error: call to ‘__compiletime_assert_477’ declared with attribute error: BUILD_BUG_ON failed: __i915_warn_cond
_compiletime_assert(condition, msg, __compiletime_assert_, __LINE__)
^
include/linux/compiler.h:346:4: note: in definition of macro ‘__compiletime_assert’
prefix ## suffix(); \
^
include/linux/compiler.h:363:2: note: in expansion of macro ‘_compiletime_assert’
_compiletime_assert(condition, msg, __compiletime_assert_, __LINE__)
^
include/linux/bug.h:50:37: note: in expansion of macro ‘compiletime_assert’
#define BUILD_BUG_ON_MSG(cond, msg) compiletime_assert(!(cond), msg)
^
include/linux/bug.h:74:2: note: in expansion of macro ‘BUILD_BUG_ON_MSG’
BUILD_BUG_ON_MSG(condition, "BUILD_BUG_ON failed: " #condition)
^
drivers/gpu/drm/i915/i915_drv.h:66:3: note: in expansion of macro ‘BUILD_BUG_ON’
BUILD_BUG_ON(__i915_warn_cond); \
^
drivers/gpu/drm/i915/i915_drv.c:477:5: note: in expansion of macro ‘WARN_ON’
WARN_ON(!IS_HSW_ULT(dev));
^
include/linux/compiler.h:363:38: error: call to ‘__compiletime_assert_456’ declared with attribute error: BUILD_BUG_ON failed: __i915_warn_cond
_compiletime_assert(condition, msg, __compiletime_assert_, __LINE__)
^
include/linux/compiler.h:346:4: note: in definition of macro ‘__compiletime_assert’
prefix ## suffix(); \
^
include/linux/compiler.h:363:2: note: in expansion of macro ‘_compiletime_assert’
_compiletime_assert(condition, msg, __compiletime_assert_, __LINE__)
^
include/linux/bug.h:50:37: note: in expansion of macro ‘compiletime_assert’
#define BUILD_BUG_ON_MSG(cond, msg) compiletime_assert(!(cond), msg)
^
include/linux/bug.h:74:2: note: in expansion of macro ‘BUILD_BUG_ON_MSG’
BUILD_BUG_ON_MSG(condition, "BUILD_BUG_ON failed: " #condition)
^
drivers/gpu/drm/i915/i915_drv.h:66:3: note: in expansion of macro ‘BUILD_BUG_ON’
BUILD_BUG_ON(__i915_warn_cond); \
^
drivers/gpu/drm/i915/i915_drv.c:456:5: note: in expansion of macro ‘WARN_ON’
WARN_ON(!(IS_GEN6(dev) || IS_IVYBRIDGE(dev)));
^
include/linux/compiler.h:363:38: error: call to ‘__compiletime_assert_461’ declared with attribute error: BUILD_BUG_ON failed: __i915_warn_cond
_compiletime_assert(condition, msg, __compiletime_assert_, __LINE__)
^
include/linux/compiler.h:346:4: note: in definition of macro ‘__compiletime_assert’
prefix ## suffix(); \
^
include/linux/compiler.h:363:2: note: in expansion of macro ‘_compiletime_assert’
_compiletime_assert(condition, msg, __compiletime_assert_, __LINE__)
^
include/linux/bug.h:50:37: note: in expansion of macro ‘compiletime_assert’
#define BUILD_BUG_ON_MSG(cond, msg) compiletime_assert(!(cond), msg)
^
include/linux/bug.h:74:2: note: in expansion of macro ‘BUILD_BUG_ON_MSG’
BUILD_BUG_ON_MSG(condition, "BUILD_BUG_ON failed: " #condition)
^
drivers/gpu/drm/i915/i915_drv.h:66:3: note: in expansion of macro ‘BUILD_BUG_ON’
BUILD_BUG_ON(__i915_warn_cond); \
^
drivers/gpu/drm/i915/i915_drv.c:461:5: note: in expansion of macro ‘WARN_ON’
WARN_ON(!(IS_GEN6(dev) || IS_IVYBRIDGE(dev)));
^
include/linux/compiler.h:363:38: error: call to ‘__compiletime_assert_466’ declared with attribute error: BUILD_BUG_ON failed: __i915_warn_cond
_compiletime_assert(condition, msg, __compiletime_assert_, __LINE__)
^
include/linux/compiler.h:346:4: note: in definition of macro ‘__compiletime_assert’
prefix ## suffix(); \
^
include/linux/compiler.h:363:2: note: in expansion of macro ‘_compiletime_assert’
_compiletime_assert(condition, msg, __compiletime_assert_, __LINE__)
^
include/linux/bug.h:50:37: note: in expansion of macro ‘compiletime_assert’
#define BUILD_BUG_ON_MSG(cond, msg) compiletime_assert(!(cond), msg)
^
include/linux/bug.h:74:2: note: in expansion of macro ‘BUILD_BUG_ON_MSG’
BUILD_BUG_ON_MSG(condition, "BUILD_BUG_ON failed: " #condition)
^
drivers/gpu/drm/i915/i915_drv.h:66:3: note: in expansion of macro ‘BUILD_BUG_ON’
BUILD_BUG_ON(__i915_warn_cond); \
^
drivers/gpu/drm/i915/i915_drv.c:466:5: note: in expansion of macro ‘WARN_ON’
WARN_ON(IS_HSW_ULT(dev));
^
scripts/Makefile.build:257: recipe for target 'drivers/gpu/drm/i915/i915_drv.o' failed
make[4]: *** [drivers/gpu/drm/i915/i915_drv.o] Error 1
scripts/Makefile.build:402: recipe for target 'drivers/gpu/drm/i915' failed
make[3]: *** [drivers/gpu/drm/i915] Error 2
scripts/Makefile.build:402: recipe for target 'drivers/gpu/drm' failed
make[2]: *** [drivers/gpu/drm] Error 2
scripts/Makefile.build:402: recipe for target 'drivers/gpu' failed
make[1]: *** [drivers/gpu] Error 2
Makefile:937: recipe for target 'drivers' failed
make: *** [drivers] Error 2
--
Jani Nikula, Intel Open Source Technology Center
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 13+ messages in thread
end of thread, other threads:[~2014-12-11 8:11 UTC | newest]
Thread overview: 13+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2014-12-08 16:06 [PATCH] drm/i915: Use BUILD_BUG if possible in the i915 WARN_ON Daniel Vetter
2014-12-08 16:10 ` Damien Lespiau
2014-12-08 16:20 ` Daniel Vetter
2014-12-09 18:11 ` shuang.he
2014-12-09 17:40 ` shuang.he
2014-12-10 13:49 ` Daniel Vetter
2014-12-10 13:53 ` Chris Wilson
2014-12-10 18:17 ` shuang.he
2014-12-10 14:43 ` Daniel Vetter
2014-12-10 21:18 ` shuang.he
2014-12-10 16:47 ` Daniel Vetter
2014-12-11 1:05 ` shuang.he
2014-12-11 8:11 ` Jani Nikula
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.