[PATCH 0/9] arm64: tegra: Initial Tegra234 VDK support

[PATCH 0/9] arm64: tegra: Initial Tegra234 VDK support

[Thierry Reding]

From: Thierry Reding <treding-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>

This set of patches introduces support for the new Tegra234 SoC, also
known as Orin. Currently no silicon of this chip is available, so the
support added here is for a simulation platform known as VDK.

Note that this simulation platform is not available publicly. However
the goal is to use the simulation platform as a way of upstreaming as
much support as possible ahead of tapeout.

Once actual silicon becomes available, the plan is to stop supporting
the simulation platform and shift focus to real hardware.

Thierry

Sandipan Patra (1):
  soc/tegra: fuse: Add Tegra186 and Tegra194 SoC IDs

Thierry Reding (8):
  dt-bindings: tegra: Add Tegra234 VDK compatible
  dt-bindings: fuse: tegra: Add missing compatible strings
  dt-bindings: fuse: tegra: Document Tegra234 compatible string
  soc/tegra: fuse: Extract tegra_get_platform()
  soc/tegra: fuse: Implement tegra_is_silicon()
  soc/tegra: fuse: Add Tegra234 support
  firmware: tegra: Enable BPMP support on Tegra234
  arm64: tegra: Initial Tegra234 VDK support

 .../devicetree/bindings/arm/tegra.yaml        |   4 +
 .../bindings/fuse/nvidia,tegra20-fuse.txt     |   6 +-
 arch/arm64/boot/dts/nvidia/Makefile           |   1 +
 .../boot/dts/nvidia/tegra234-sim-vdk.dts      |  40 ++++
 arch/arm64/boot/dts/nvidia/tegra234.dtsi      | 191 ++++++++++++++++++
 drivers/firmware/tegra/bpmp.c                 |   3 +-
 drivers/mailbox/tegra-hsp.c                   |   9 +-
 drivers/soc/tegra/Kconfig                     |  10 +
 drivers/soc/tegra/fuse/fuse-tegra.c           |   8 +-
 drivers/soc/tegra/fuse/fuse-tegra30.c         |  30 +++
 drivers/soc/tegra/fuse/fuse.h                 |  10 +-
 drivers/soc/tegra/fuse/tegra-apbmisc.c        |  19 ++
 include/dt-bindings/clock/tegra234-clock.h    |  14 ++
 include/dt-bindings/reset/tegra234-reset.h    |  10 +
 include/soc/tegra/fuse.h                      |   5 +
 15 files changed, 353 insertions(+), 7 deletions(-)
 create mode 100644 arch/arm64/boot/dts/nvidia/tegra234-sim-vdk.dts
 create mode 100644 arch/arm64/boot/dts/nvidia/tegra234.dtsi
 create mode 100644 include/dt-bindings/clock/tegra234-clock.h
 create mode 100644 include/dt-bindings/reset/tegra234-reset.h

-- 
2.27.0

[PATCH 0/9] arm64: tegra: Initial Tegra234 VDK support

[Thierry Reding]

From: Thierry Reding <treding@nvidia.com>

This set of patches introduces support for the new Tegra234 SoC, also
known as Orin. Currently no silicon of this chip is available, so the
support added here is for a simulation platform known as VDK.

Note that this simulation platform is not available publicly. However
the goal is to use the simulation platform as a way of upstreaming as
much support as possible ahead of tapeout.

Once actual silicon becomes available, the plan is to stop supporting
the simulation platform and shift focus to real hardware.

Thierry

Sandipan Patra (1):
  soc/tegra: fuse: Add Tegra186 and Tegra194 SoC IDs

Thierry Reding (8):
  dt-bindings: tegra: Add Tegra234 VDK compatible
  dt-bindings: fuse: tegra: Add missing compatible strings
  dt-bindings: fuse: tegra: Document Tegra234 compatible string
  soc/tegra: fuse: Extract tegra_get_platform()
  soc/tegra: fuse: Implement tegra_is_silicon()
  soc/tegra: fuse: Add Tegra234 support
  firmware: tegra: Enable BPMP support on Tegra234
  arm64: tegra: Initial Tegra234 VDK support

 .../devicetree/bindings/arm/tegra.yaml        |   4 +
 .../bindings/fuse/nvidia,tegra20-fuse.txt     |   6 +-
 arch/arm64/boot/dts/nvidia/Makefile           |   1 +
 .../boot/dts/nvidia/tegra234-sim-vdk.dts      |  40 ++++
 arch/arm64/boot/dts/nvidia/tegra234.dtsi      | 191 ++++++++++++++++++
 drivers/firmware/tegra/bpmp.c                 |   3 +-
 drivers/mailbox/tegra-hsp.c                   |   9 +-
 drivers/soc/tegra/Kconfig                     |  10 +
 drivers/soc/tegra/fuse/fuse-tegra.c           |   8 +-
 drivers/soc/tegra/fuse/fuse-tegra30.c         |  30 +++
 drivers/soc/tegra/fuse/fuse.h                 |  10 +-
 drivers/soc/tegra/fuse/tegra-apbmisc.c        |  19 ++
 include/dt-bindings/clock/tegra234-clock.h    |  14 ++
 include/dt-bindings/reset/tegra234-reset.h    |  10 +
 include/soc/tegra/fuse.h                      |   5 +
 15 files changed, 353 insertions(+), 7 deletions(-)
 create mode 100644 arch/arm64/boot/dts/nvidia/tegra234-sim-vdk.dts
 create mode 100644 arch/arm64/boot/dts/nvidia/tegra234.dtsi
 create mode 100644 include/dt-bindings/clock/tegra234-clock.h
 create mode 100644 include/dt-bindings/reset/tegra234-reset.h

-- 
2.27.0


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[PATCH 1/9] dt-bindings: tegra: Add Tegra234 VDK compatible

[Thierry Reding]

From: Thierry Reding <treding-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>

The NVIDIA Tegra234 VDK is a simulation platform for the Orin SoC. It
supports a subset of the peripherals that will be available in the final
chip and serves as a bootstrapping platform.

Signed-off-by: Thierry Reding <treding-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
---
 Documentation/devicetree/bindings/arm/tegra.yaml | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/Documentation/devicetree/bindings/arm/tegra.yaml b/Documentation/devicetree/bindings/arm/tegra.yaml
index 53845db64df1..5c781e6d8878 100644
--- a/Documentation/devicetree/bindings/arm/tegra.yaml
+++ b/Documentation/devicetree/bindings/arm/tegra.yaml
@@ -109,3 +109,7 @@ properties:
         items:
           - const: nvidia,p3509-0000+p3668-0000
           - const: nvidia,tegra194
+      - items:
+          - enum:
+              - nvidia,tegra234-vdk
+          - const: nvidia,tegra234
-- 
2.27.0

[PATCH 1/9] dt-bindings: tegra: Add Tegra234 VDK compatible

[Thierry Reding]

From: Thierry Reding <treding@nvidia.com>

The NVIDIA Tegra234 VDK is a simulation platform for the Orin SoC. It
supports a subset of the peripherals that will be available in the final
chip and serves as a bootstrapping platform.

Signed-off-by: Thierry Reding <treding@nvidia.com>
---
 Documentation/devicetree/bindings/arm/tegra.yaml | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/Documentation/devicetree/bindings/arm/tegra.yaml b/Documentation/devicetree/bindings/arm/tegra.yaml
index 53845db64df1..5c781e6d8878 100644
--- a/Documentation/devicetree/bindings/arm/tegra.yaml
+++ b/Documentation/devicetree/bindings/arm/tegra.yaml
@@ -109,3 +109,7 @@ properties:
         items:
           - const: nvidia,p3509-0000+p3668-0000
           - const: nvidia,tegra194
+      - items:
+          - enum:
+              - nvidia,tegra234-vdk
+          - const: nvidia,tegra234
-- 
2.27.0


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Re: [PATCH 1/9] dt-bindings: tegra: Add Tegra234 VDK compatible

[Jon Hunter]

On 16/07/2020 15:18, Thierry Reding wrote:
> From: Thierry Reding <treding@nvidia.com>
> 
> The NVIDIA Tegra234 VDK is a simulation platform for the Orin SoC. It
> supports a subset of the peripherals that will be available in the final
> chip and serves as a bootstrapping platform.
> 
> Signed-off-by: Thierry Reding <treding@nvidia.com>
> ---
>  Documentation/devicetree/bindings/arm/tegra.yaml | 4 ++++
>  1 file changed, 4 insertions(+)
> 
> diff --git a/Documentation/devicetree/bindings/arm/tegra.yaml b/Documentation/devicetree/bindings/arm/tegra.yaml
> index 53845db64df1..5c781e6d8878 100644
> --- a/Documentation/devicetree/bindings/arm/tegra.yaml
> +++ b/Documentation/devicetree/bindings/arm/tegra.yaml
> @@ -109,3 +109,7 @@ properties:
>          items:
>            - const: nvidia,p3509-0000+p3668-0000
>            - const: nvidia,tegra194
> +      - items:
> +          - enum:
> +              - nvidia,tegra234-vdk
> +          - const: nvidia,tegra234
> 


Reviewed-by: Jon Hunter <jonathanh@nvidia.com>

Cheers
Jon

-- 
nvpublic

Re: [PATCH 1/9] dt-bindings: tegra: Add Tegra234 VDK compatible

[Jon Hunter]

On 16/07/2020 15:18, Thierry Reding wrote:
> From: Thierry Reding <treding@nvidia.com>
> 
> The NVIDIA Tegra234 VDK is a simulation platform for the Orin SoC. It
> supports a subset of the peripherals that will be available in the final
> chip and serves as a bootstrapping platform.
> 
> Signed-off-by: Thierry Reding <treding@nvidia.com>
> ---
>  Documentation/devicetree/bindings/arm/tegra.yaml | 4 ++++
>  1 file changed, 4 insertions(+)
> 
> diff --git a/Documentation/devicetree/bindings/arm/tegra.yaml b/Documentation/devicetree/bindings/arm/tegra.yaml
> index 53845db64df1..5c781e6d8878 100644
> --- a/Documentation/devicetree/bindings/arm/tegra.yaml
> +++ b/Documentation/devicetree/bindings/arm/tegra.yaml
> @@ -109,3 +109,7 @@ properties:
>          items:
>            - const: nvidia,p3509-0000+p3668-0000
>            - const: nvidia,tegra194
> +      - items:
> +          - enum:
> +              - nvidia,tegra234-vdk
> +          - const: nvidia,tegra234
> 


Reviewed-by: Jon Hunter <jonathanh@nvidia.com>

Cheers
Jon

-- 
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[PATCH 2/9] dt-bindings: fuse: tegra: Add missing compatible strings

[Thierry Reding]

From: Thierry Reding <treding-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>

The Tegra FUSE device tree bindings haven't been updated in a while. Add
compatible strings for the SoC generations that were released since the
last update.

Signed-off-by: Thierry Reding <treding-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
---
 .../devicetree/bindings/fuse/nvidia,tegra20-fuse.txt         | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/Documentation/devicetree/bindings/fuse/nvidia,tegra20-fuse.txt b/Documentation/devicetree/bindings/fuse/nvidia,tegra20-fuse.txt
index 41372d441131..2aaf661c04ee 100644
--- a/Documentation/devicetree/bindings/fuse/nvidia,tegra20-fuse.txt
+++ b/Documentation/devicetree/bindings/fuse/nvidia,tegra20-fuse.txt
@@ -4,8 +4,9 @@ Required properties:
 - compatible : For Tegra20, must contain "nvidia,tegra20-efuse".  For Tegra30,
   must contain "nvidia,tegra30-efuse".  For Tegra114, must contain
   "nvidia,tegra114-efuse".  For Tegra124, must contain "nvidia,tegra124-efuse".
-  Otherwise, must contain "nvidia,<chip>-efuse", plus one of the above, where
-  <chip> is tegra132.
+  For Tegra132 must contain "nvidia,tegra132-efuse", "nvidia,tegra124-efuse".
+  For Tegra210 must contain "nvidia,tegra210-efuse". For Tegra186 must contain
+  "nvidia,tegra186-efuse". For Tegra194 must contain "nvidia,tegra194-efuse".
   Details:
   nvidia,tegra20-efuse: Tegra20 requires using APB DMA to read the fuse data
 	due to a hardware bug. Tegra20 also lacks certain information which is
-- 
2.27.0

[PATCH 2/9] dt-bindings: fuse: tegra: Add missing compatible strings

[Thierry Reding]

From: Thierry Reding <treding@nvidia.com>

The Tegra FUSE device tree bindings haven't been updated in a while. Add
compatible strings for the SoC generations that were released since the
last update.

Signed-off-by: Thierry Reding <treding@nvidia.com>
---
 .../devicetree/bindings/fuse/nvidia,tegra20-fuse.txt         | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/Documentation/devicetree/bindings/fuse/nvidia,tegra20-fuse.txt b/Documentation/devicetree/bindings/fuse/nvidia,tegra20-fuse.txt
index 41372d441131..2aaf661c04ee 100644
--- a/Documentation/devicetree/bindings/fuse/nvidia,tegra20-fuse.txt
+++ b/Documentation/devicetree/bindings/fuse/nvidia,tegra20-fuse.txt
@@ -4,8 +4,9 @@ Required properties:
 - compatible : For Tegra20, must contain "nvidia,tegra20-efuse".  For Tegra30,
   must contain "nvidia,tegra30-efuse".  For Tegra114, must contain
   "nvidia,tegra114-efuse".  For Tegra124, must contain "nvidia,tegra124-efuse".
-  Otherwise, must contain "nvidia,<chip>-efuse", plus one of the above, where
-  <chip> is tegra132.
+  For Tegra132 must contain "nvidia,tegra132-efuse", "nvidia,tegra124-efuse".
+  For Tegra210 must contain "nvidia,tegra210-efuse". For Tegra186 must contain
+  "nvidia,tegra186-efuse". For Tegra194 must contain "nvidia,tegra194-efuse".
   Details:
   nvidia,tegra20-efuse: Tegra20 requires using APB DMA to read the fuse data
 	due to a hardware bug. Tegra20 also lacks certain information which is
-- 
2.27.0


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Re: [PATCH 2/9] dt-bindings: fuse: tegra: Add missing compatible strings

[Jon Hunter]

On 16/07/2020 15:18, Thierry Reding wrote:
> From: Thierry Reding <treding@nvidia.com>
> 
> The Tegra FUSE device tree bindings haven't been updated in a while. Add
> compatible strings for the SoC generations that were released since the
> last update.
> 
> Signed-off-by: Thierry Reding <treding@nvidia.com>
> ---
>  .../devicetree/bindings/fuse/nvidia,tegra20-fuse.txt         | 5 +++--
>  1 file changed, 3 insertions(+), 2 deletions(-)
> 
> diff --git a/Documentation/devicetree/bindings/fuse/nvidia,tegra20-fuse.txt b/Documentation/devicetree/bindings/fuse/nvidia,tegra20-fuse.txt
> index 41372d441131..2aaf661c04ee 100644
> --- a/Documentation/devicetree/bindings/fuse/nvidia,tegra20-fuse.txt
> +++ b/Documentation/devicetree/bindings/fuse/nvidia,tegra20-fuse.txt
> @@ -4,8 +4,9 @@ Required properties:
>  - compatible : For Tegra20, must contain "nvidia,tegra20-efuse".  For Tegra30,
>    must contain "nvidia,tegra30-efuse".  For Tegra114, must contain
>    "nvidia,tegra114-efuse".  For Tegra124, must contain "nvidia,tegra124-efuse".
> -  Otherwise, must contain "nvidia,<chip>-efuse", plus one of the above, where
> -  <chip> is tegra132.
> +  For Tegra132 must contain "nvidia,tegra132-efuse", "nvidia,tegra124-efuse".
> +  For Tegra210 must contain "nvidia,tegra210-efuse". For Tegra186 must contain
> +  "nvidia,tegra186-efuse". For Tegra194 must contain "nvidia,tegra194-efuse".
>    Details:
>    nvidia,tegra20-efuse: Tegra20 requires using APB DMA to read the fuse data
>  	due to a hardware bug. Tegra20 also lacks certain information which is
> 


Reviewed-by: Jon Hunter <jonathanh@nvidia.com>

Cheers
Jon


-- 
nvpublic

Re: [PATCH 2/9] dt-bindings: fuse: tegra: Add missing compatible strings

[Jon Hunter]

On 16/07/2020 15:18, Thierry Reding wrote:
> From: Thierry Reding <treding@nvidia.com>
> 
> The Tegra FUSE device tree bindings haven't been updated in a while. Add
> compatible strings for the SoC generations that were released since the
> last update.
> 
> Signed-off-by: Thierry Reding <treding@nvidia.com>
> ---
>  .../devicetree/bindings/fuse/nvidia,tegra20-fuse.txt         | 5 +++--
>  1 file changed, 3 insertions(+), 2 deletions(-)
> 
> diff --git a/Documentation/devicetree/bindings/fuse/nvidia,tegra20-fuse.txt b/Documentation/devicetree/bindings/fuse/nvidia,tegra20-fuse.txt
> index 41372d441131..2aaf661c04ee 100644
> --- a/Documentation/devicetree/bindings/fuse/nvidia,tegra20-fuse.txt
> +++ b/Documentation/devicetree/bindings/fuse/nvidia,tegra20-fuse.txt
> @@ -4,8 +4,9 @@ Required properties:
>  - compatible : For Tegra20, must contain "nvidia,tegra20-efuse".  For Tegra30,
>    must contain "nvidia,tegra30-efuse".  For Tegra114, must contain
>    "nvidia,tegra114-efuse".  For Tegra124, must contain "nvidia,tegra124-efuse".
> -  Otherwise, must contain "nvidia,<chip>-efuse", plus one of the above, where
> -  <chip> is tegra132.
> +  For Tegra132 must contain "nvidia,tegra132-efuse", "nvidia,tegra124-efuse".
> +  For Tegra210 must contain "nvidia,tegra210-efuse". For Tegra186 must contain
> +  "nvidia,tegra186-efuse". For Tegra194 must contain "nvidia,tegra194-efuse".
>    Details:
>    nvidia,tegra20-efuse: Tegra20 requires using APB DMA to read the fuse data
>  	due to a hardware bug. Tegra20 also lacks certain information which is
> 


Reviewed-by: Jon Hunter <jonathanh@nvidia.com>

Cheers
Jon


-- 
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[PATCH 3/9] dt-bindings: fuse: tegra: Document Tegra234 compatible string

[Thierry Reding]

From: Thierry Reding <treding-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>

The Tegra234 FUSE block is very similar to that on prior chips but not
completely compatible. Document the new compatible string.

Signed-off-by: Thierry Reding <treding-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
---
 Documentation/devicetree/bindings/fuse/nvidia,tegra20-fuse.txt | 1 +
 1 file changed, 1 insertion(+)

diff --git a/Documentation/devicetree/bindings/fuse/nvidia,tegra20-fuse.txt b/Documentation/devicetree/bindings/fuse/nvidia,tegra20-fuse.txt
index 2aaf661c04ee..b76cf42639f1 100644
--- a/Documentation/devicetree/bindings/fuse/nvidia,tegra20-fuse.txt
+++ b/Documentation/devicetree/bindings/fuse/nvidia,tegra20-fuse.txt
@@ -7,6 +7,7 @@ Required properties:
   For Tegra132 must contain "nvidia,tegra132-efuse", "nvidia,tegra124-efuse".
   For Tegra210 must contain "nvidia,tegra210-efuse". For Tegra186 must contain
   "nvidia,tegra186-efuse". For Tegra194 must contain "nvidia,tegra194-efuse".
+  For Tegra234 must conatin "nvidia,tegra234-efuse".
   Details:
   nvidia,tegra20-efuse: Tegra20 requires using APB DMA to read the fuse data
 	due to a hardware bug. Tegra20 also lacks certain information which is
-- 
2.27.0

[PATCH 3/9] dt-bindings: fuse: tegra: Document Tegra234 compatible string

[Thierry Reding]

From: Thierry Reding <treding@nvidia.com>

The Tegra234 FUSE block is very similar to that on prior chips but not
completely compatible. Document the new compatible string.

Signed-off-by: Thierry Reding <treding@nvidia.com>
---
 Documentation/devicetree/bindings/fuse/nvidia,tegra20-fuse.txt | 1 +
 1 file changed, 1 insertion(+)

diff --git a/Documentation/devicetree/bindings/fuse/nvidia,tegra20-fuse.txt b/Documentation/devicetree/bindings/fuse/nvidia,tegra20-fuse.txt
index 2aaf661c04ee..b76cf42639f1 100644
--- a/Documentation/devicetree/bindings/fuse/nvidia,tegra20-fuse.txt
+++ b/Documentation/devicetree/bindings/fuse/nvidia,tegra20-fuse.txt
@@ -7,6 +7,7 @@ Required properties:
   For Tegra132 must contain "nvidia,tegra132-efuse", "nvidia,tegra124-efuse".
   For Tegra210 must contain "nvidia,tegra210-efuse". For Tegra186 must contain
   "nvidia,tegra186-efuse". For Tegra194 must contain "nvidia,tegra194-efuse".
+  For Tegra234 must conatin "nvidia,tegra234-efuse".
   Details:
   nvidia,tegra20-efuse: Tegra20 requires using APB DMA to read the fuse data
 	due to a hardware bug. Tegra20 also lacks certain information which is
-- 
2.27.0


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Re: [PATCH 3/9] dt-bindings: fuse: tegra: Document Tegra234 compatible string

[Jon Hunter]

On 16/07/2020 15:18, Thierry Reding wrote:
> From: Thierry Reding <treding@nvidia.com>
> 
> The Tegra234 FUSE block is very similar to that on prior chips but not
> completely compatible. Document the new compatible string.
> 
> Signed-off-by: Thierry Reding <treding@nvidia.com>
> ---
>  Documentation/devicetree/bindings/fuse/nvidia,tegra20-fuse.txt | 1 +
>  1 file changed, 1 insertion(+)
> 
> diff --git a/Documentation/devicetree/bindings/fuse/nvidia,tegra20-fuse.txt b/Documentation/devicetree/bindings/fuse/nvidia,tegra20-fuse.txt
> index 2aaf661c04ee..b76cf42639f1 100644
> --- a/Documentation/devicetree/bindings/fuse/nvidia,tegra20-fuse.txt
> +++ b/Documentation/devicetree/bindings/fuse/nvidia,tegra20-fuse.txt
> @@ -7,6 +7,7 @@ Required properties:
>    For Tegra132 must contain "nvidia,tegra132-efuse", "nvidia,tegra124-efuse".
>    For Tegra210 must contain "nvidia,tegra210-efuse". For Tegra186 must contain
>    "nvidia,tegra186-efuse". For Tegra194 must contain "nvidia,tegra194-efuse".
> +  For Tegra234 must conatin "nvidia,tegra234-efuse".
>    Details:
>    nvidia,tegra20-efuse: Tegra20 requires using APB DMA to read the fuse data
>  	due to a hardware bug. Tegra20 also lacks certain information which is
> 


Reviewed-by: Jon Hunter <jonathanh@nvidia.com>

Cheers
Jon

-- 
nvpublic

Re: [PATCH 3/9] dt-bindings: fuse: tegra: Document Tegra234 compatible string

[Jon Hunter]

On 16/07/2020 15:18, Thierry Reding wrote:
> From: Thierry Reding <treding@nvidia.com>
> 
> The Tegra234 FUSE block is very similar to that on prior chips but not
> completely compatible. Document the new compatible string.
> 
> Signed-off-by: Thierry Reding <treding@nvidia.com>
> ---
>  Documentation/devicetree/bindings/fuse/nvidia,tegra20-fuse.txt | 1 +
>  1 file changed, 1 insertion(+)
> 
> diff --git a/Documentation/devicetree/bindings/fuse/nvidia,tegra20-fuse.txt b/Documentation/devicetree/bindings/fuse/nvidia,tegra20-fuse.txt
> index 2aaf661c04ee..b76cf42639f1 100644
> --- a/Documentation/devicetree/bindings/fuse/nvidia,tegra20-fuse.txt
> +++ b/Documentation/devicetree/bindings/fuse/nvidia,tegra20-fuse.txt
> @@ -7,6 +7,7 @@ Required properties:
>    For Tegra132 must contain "nvidia,tegra132-efuse", "nvidia,tegra124-efuse".
>    For Tegra210 must contain "nvidia,tegra210-efuse". For Tegra186 must contain
>    "nvidia,tegra186-efuse". For Tegra194 must contain "nvidia,tegra194-efuse".
> +  For Tegra234 must conatin "nvidia,tegra234-efuse".
>    Details:
>    nvidia,tegra20-efuse: Tegra20 requires using APB DMA to read the fuse data
>  	due to a hardware bug. Tegra20 also lacks certain information which is
> 


Reviewed-by: Jon Hunter <jonathanh@nvidia.com>

Cheers
Jon

-- 
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[PATCH 4/9] soc/tegra: fuse: Add Tegra186 and Tegra194 SoC IDs

[Thierry Reding]

From: Sandipan Patra <spatra-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>

SoC IDs for these generations had never been defined. Do so now.

Signed-off-by: Sandipan Patra <spatra-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
Reviewed-by: Jon Hunter <jonathanh-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
Signed-off-by: Thierry Reding <treding-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
---
 include/soc/tegra/fuse.h | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/include/soc/tegra/fuse.h b/include/soc/tegra/fuse.h
index 252ea20fe4c1..1097feca41ed 100644
--- a/include/soc/tegra/fuse.h
+++ b/include/soc/tegra/fuse.h
@@ -12,6 +12,8 @@
 #define TEGRA124	0x40
 #define TEGRA132	0x13
 #define TEGRA210	0x21
+#define TEGRA186	0x18
+#define TEGRA194	0x19
 
 #define TEGRA_FUSE_SKU_CALIB_0	0xf0
 #define TEGRA30_FUSE_SATA_CALIB	0x124
-- 
2.27.0

[PATCH 4/9] soc/tegra: fuse: Add Tegra186 and Tegra194 SoC IDs

[Thierry Reding]

From: Sandipan Patra <spatra@nvidia.com>

SoC IDs for these generations had never been defined. Do so now.

Signed-off-by: Sandipan Patra <spatra@nvidia.com>
Reviewed-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
---
 include/soc/tegra/fuse.h | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/include/soc/tegra/fuse.h b/include/soc/tegra/fuse.h
index 252ea20fe4c1..1097feca41ed 100644
--- a/include/soc/tegra/fuse.h
+++ b/include/soc/tegra/fuse.h
@@ -12,6 +12,8 @@
 #define TEGRA124	0x40
 #define TEGRA132	0x13
 #define TEGRA210	0x21
+#define TEGRA186	0x18
+#define TEGRA194	0x19
 
 #define TEGRA_FUSE_SKU_CALIB_0	0xf0
 #define TEGRA30_FUSE_SATA_CALIB	0x124
-- 
2.27.0


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[PATCH 5/9] soc/tegra: fuse: Extract tegra_get_platform()

[Thierry Reding]

From: Thierry Reding <treding-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>

This function extracts the PRE_SI_PLATFORM field from the HIDREV
register and can be used to determine which platform the kernel runs on
(silicon, simulation, ...). Note that while only Tegra194 and later
define this field, it should be safe to call this on prior generations
as well since this field should read as 0, indicating silicon.

Signed-off-by: Thierry Reding <treding-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
---
 drivers/soc/tegra/fuse/fuse-tegra.c    | 2 +-
 drivers/soc/tegra/fuse/tegra-apbmisc.c | 5 +++++
 include/soc/tegra/fuse.h               | 1 +
 3 files changed, 7 insertions(+), 1 deletion(-)

diff --git a/drivers/soc/tegra/fuse/fuse-tegra.c b/drivers/soc/tegra/fuse/fuse-tegra.c
index d1f8dd0289e6..7e6b6ee59120 100644
--- a/drivers/soc/tegra/fuse/fuse-tegra.c
+++ b/drivers/soc/tegra/fuse/fuse-tegra.c
@@ -336,7 +336,7 @@ static ssize_t platform_show(struct device *dev, struct device_attribute *attr,
 	 * platform type is silicon and all other non-zero values indicate
 	 * the type of simulation platform is being used.
 	 */
-	return sprintf(buf, "%d\n", (tegra_read_chipid() >> 20) & 0xf);
+	return sprintf(buf, "%d\n", tegra_get_platform());
 }
 
 static DEVICE_ATTR_RO(platform);
diff --git a/drivers/soc/tegra/fuse/tegra-apbmisc.c b/drivers/soc/tegra/fuse/tegra-apbmisc.c
index 3cdd69d1bd4d..89f1479b4d0e 100644
--- a/drivers/soc/tegra/fuse/tegra-apbmisc.c
+++ b/drivers/soc/tegra/fuse/tegra-apbmisc.c
@@ -47,6 +47,11 @@ u8 tegra_get_minor_rev(void)
 	return (tegra_read_chipid() >> 16) & 0xf;
 }
 
+u8 tegra_get_platform(void)
+{
+	return (tegra_read_chipid() >> 20) & 0xf;
+}
+
 u32 tegra_read_straps(void)
 {
 	WARN(!chipid, "Tegra ABP MISC not yet available\n");
diff --git a/include/soc/tegra/fuse.h b/include/soc/tegra/fuse.h
index 1097feca41ed..214908fc5581 100644
--- a/include/soc/tegra/fuse.h
+++ b/include/soc/tegra/fuse.h
@@ -23,6 +23,7 @@
 
 u32 tegra_read_chipid(void);
 u8 tegra_get_chip_id(void);
+u8 tegra_get_platform(void);
 
 enum tegra_revision {
 	TEGRA_REVISION_UNKNOWN = 0,
-- 
2.27.0

[PATCH 5/9] soc/tegra: fuse: Extract tegra_get_platform()

[Thierry Reding]

From: Thierry Reding <treding@nvidia.com>

This function extracts the PRE_SI_PLATFORM field from the HIDREV
register and can be used to determine which platform the kernel runs on
(silicon, simulation, ...). Note that while only Tegra194 and later
define this field, it should be safe to call this on prior generations
as well since this field should read as 0, indicating silicon.

Signed-off-by: Thierry Reding <treding@nvidia.com>
---
 drivers/soc/tegra/fuse/fuse-tegra.c    | 2 +-
 drivers/soc/tegra/fuse/tegra-apbmisc.c | 5 +++++
 include/soc/tegra/fuse.h               | 1 +
 3 files changed, 7 insertions(+), 1 deletion(-)

diff --git a/drivers/soc/tegra/fuse/fuse-tegra.c b/drivers/soc/tegra/fuse/fuse-tegra.c
index d1f8dd0289e6..7e6b6ee59120 100644
--- a/drivers/soc/tegra/fuse/fuse-tegra.c
+++ b/drivers/soc/tegra/fuse/fuse-tegra.c
@@ -336,7 +336,7 @@ static ssize_t platform_show(struct device *dev, struct device_attribute *attr,
 	 * platform type is silicon and all other non-zero values indicate
 	 * the type of simulation platform is being used.
 	 */
-	return sprintf(buf, "%d\n", (tegra_read_chipid() >> 20) & 0xf);
+	return sprintf(buf, "%d\n", tegra_get_platform());
 }
 
 static DEVICE_ATTR_RO(platform);
diff --git a/drivers/soc/tegra/fuse/tegra-apbmisc.c b/drivers/soc/tegra/fuse/tegra-apbmisc.c
index 3cdd69d1bd4d..89f1479b4d0e 100644
--- a/drivers/soc/tegra/fuse/tegra-apbmisc.c
+++ b/drivers/soc/tegra/fuse/tegra-apbmisc.c
@@ -47,6 +47,11 @@ u8 tegra_get_minor_rev(void)
 	return (tegra_read_chipid() >> 16) & 0xf;
 }
 
+u8 tegra_get_platform(void)
+{
+	return (tegra_read_chipid() >> 20) & 0xf;
+}
+
 u32 tegra_read_straps(void)
 {
 	WARN(!chipid, "Tegra ABP MISC not yet available\n");
diff --git a/include/soc/tegra/fuse.h b/include/soc/tegra/fuse.h
index 1097feca41ed..214908fc5581 100644
--- a/include/soc/tegra/fuse.h
+++ b/include/soc/tegra/fuse.h
@@ -23,6 +23,7 @@
 
 u32 tegra_read_chipid(void);
 u8 tegra_get_chip_id(void);
+u8 tegra_get_platform(void);
 
 enum tegra_revision {
 	TEGRA_REVISION_UNKNOWN = 0,
-- 
2.27.0


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Re: [PATCH 5/9] soc/tegra: fuse: Extract tegra_get_platform()

[Jon Hunter]

On 16/07/2020 15:18, Thierry Reding wrote:
> From: Thierry Reding <treding@nvidia.com>
> 
> This function extracts the PRE_SI_PLATFORM field from the HIDREV
> register and can be used to determine which platform the kernel runs on
> (silicon, simulation, ...). Note that while only Tegra194 and later
> define this field, it should be safe to call this on prior generations
> as well since this field should read as 0, indicating silicon.
> 
> Signed-off-by: Thierry Reding <treding@nvidia.com>
> ---
>  drivers/soc/tegra/fuse/fuse-tegra.c    | 2 +-
>  drivers/soc/tegra/fuse/tegra-apbmisc.c | 5 +++++
>  include/soc/tegra/fuse.h               | 1 +
>  3 files changed, 7 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/soc/tegra/fuse/fuse-tegra.c b/drivers/soc/tegra/fuse/fuse-tegra.c
> index d1f8dd0289e6..7e6b6ee59120 100644
> --- a/drivers/soc/tegra/fuse/fuse-tegra.c
> +++ b/drivers/soc/tegra/fuse/fuse-tegra.c
> @@ -336,7 +336,7 @@ static ssize_t platform_show(struct device *dev, struct device_attribute *attr,
>  	 * platform type is silicon and all other non-zero values indicate
>  	 * the type of simulation platform is being used.
>  	 */
> -	return sprintf(buf, "%d\n", (tegra_read_chipid() >> 20) & 0xf);
> +	return sprintf(buf, "%d\n", tegra_get_platform());
>  }
>  
>  static DEVICE_ATTR_RO(platform);
> diff --git a/drivers/soc/tegra/fuse/tegra-apbmisc.c b/drivers/soc/tegra/fuse/tegra-apbmisc.c
> index 3cdd69d1bd4d..89f1479b4d0e 100644
> --- a/drivers/soc/tegra/fuse/tegra-apbmisc.c
> +++ b/drivers/soc/tegra/fuse/tegra-apbmisc.c
> @@ -47,6 +47,11 @@ u8 tegra_get_minor_rev(void)
>  	return (tegra_read_chipid() >> 16) & 0xf;
>  }
>  
> +u8 tegra_get_platform(void)
> +{
> +	return (tegra_read_chipid() >> 20) & 0xf;
> +}
> +
>  u32 tegra_read_straps(void)
>  {
>  	WARN(!chipid, "Tegra ABP MISC not yet available\n");
> diff --git a/include/soc/tegra/fuse.h b/include/soc/tegra/fuse.h
> index 1097feca41ed..214908fc5581 100644
> --- a/include/soc/tegra/fuse.h
> +++ b/include/soc/tegra/fuse.h
> @@ -23,6 +23,7 @@
>  
>  u32 tegra_read_chipid(void);
>  u8 tegra_get_chip_id(void);
> +u8 tegra_get_platform(void);
>  
>  enum tegra_revision {
>  	TEGRA_REVISION_UNKNOWN = 0,
> 


Reviewed-by: Jon Hunter <jonathanh@nvidia.com>

Cheers
Jon

-- 
nvpublic

Re: [PATCH 5/9] soc/tegra: fuse: Extract tegra_get_platform()

[Jon Hunter]

On 16/07/2020 15:18, Thierry Reding wrote:
> From: Thierry Reding <treding@nvidia.com>
> 
> This function extracts the PRE_SI_PLATFORM field from the HIDREV
> register and can be used to determine which platform the kernel runs on
> (silicon, simulation, ...). Note that while only Tegra194 and later
> define this field, it should be safe to call this on prior generations
> as well since this field should read as 0, indicating silicon.
> 
> Signed-off-by: Thierry Reding <treding@nvidia.com>
> ---
>  drivers/soc/tegra/fuse/fuse-tegra.c    | 2 +-
>  drivers/soc/tegra/fuse/tegra-apbmisc.c | 5 +++++
>  include/soc/tegra/fuse.h               | 1 +
>  3 files changed, 7 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/soc/tegra/fuse/fuse-tegra.c b/drivers/soc/tegra/fuse/fuse-tegra.c
> index d1f8dd0289e6..7e6b6ee59120 100644
> --- a/drivers/soc/tegra/fuse/fuse-tegra.c
> +++ b/drivers/soc/tegra/fuse/fuse-tegra.c
> @@ -336,7 +336,7 @@ static ssize_t platform_show(struct device *dev, struct device_attribute *attr,
>  	 * platform type is silicon and all other non-zero values indicate
>  	 * the type of simulation platform is being used.
>  	 */
> -	return sprintf(buf, "%d\n", (tegra_read_chipid() >> 20) & 0xf);
> +	return sprintf(buf, "%d\n", tegra_get_platform());
>  }
>  
>  static DEVICE_ATTR_RO(platform);
> diff --git a/drivers/soc/tegra/fuse/tegra-apbmisc.c b/drivers/soc/tegra/fuse/tegra-apbmisc.c
> index 3cdd69d1bd4d..89f1479b4d0e 100644
> --- a/drivers/soc/tegra/fuse/tegra-apbmisc.c
> +++ b/drivers/soc/tegra/fuse/tegra-apbmisc.c
> @@ -47,6 +47,11 @@ u8 tegra_get_minor_rev(void)
>  	return (tegra_read_chipid() >> 16) & 0xf;
>  }
>  
> +u8 tegra_get_platform(void)
> +{
> +	return (tegra_read_chipid() >> 20) & 0xf;
> +}
> +
>  u32 tegra_read_straps(void)
>  {
>  	WARN(!chipid, "Tegra ABP MISC not yet available\n");
> diff --git a/include/soc/tegra/fuse.h b/include/soc/tegra/fuse.h
> index 1097feca41ed..214908fc5581 100644
> --- a/include/soc/tegra/fuse.h
> +++ b/include/soc/tegra/fuse.h
> @@ -23,6 +23,7 @@
>  
>  u32 tegra_read_chipid(void);
>  u8 tegra_get_chip_id(void);
> +u8 tegra_get_platform(void);
>  
>  enum tegra_revision {
>  	TEGRA_REVISION_UNKNOWN = 0,
> 


Reviewed-by: Jon Hunter <jonathanh@nvidia.com>

Cheers
Jon

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[PATCH 6/9] soc/tegra: fuse: Implement tegra_is_silicon()

[Thierry Reding]

From: Thierry Reding <treding-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>

This function can be used by drivers to determine whether code is
running on silicon or on a simulation platform.

Signed-off-by: Thierry Reding <treding-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
---
 drivers/soc/tegra/fuse/tegra-apbmisc.c | 13 +++++++++++++
 include/soc/tegra/fuse.h               |  1 +
 2 files changed, 14 insertions(+)

diff --git a/drivers/soc/tegra/fuse/tegra-apbmisc.c b/drivers/soc/tegra/fuse/tegra-apbmisc.c
index 89f1479b4d0e..be6b7fc169ca 100644
--- a/drivers/soc/tegra/fuse/tegra-apbmisc.c
+++ b/drivers/soc/tegra/fuse/tegra-apbmisc.c
@@ -52,6 +52,19 @@ u8 tegra_get_platform(void)
 	return (tegra_read_chipid() >> 20) & 0xf;
 }
 
+bool tegra_is_silicon(void)
+{
+	switch (tegra_get_chip_id()) {
+	case TEGRA194:
+		if (tegra_get_platform() == 0)
+			return true;
+
+		return false;
+	}
+
+	return false;
+}
+
 u32 tegra_read_straps(void)
 {
 	WARN(!chipid, "Tegra ABP MISC not yet available\n");
diff --git a/include/soc/tegra/fuse.h b/include/soc/tegra/fuse.h
index 214908fc5581..a9db917a1d06 100644
--- a/include/soc/tegra/fuse.h
+++ b/include/soc/tegra/fuse.h
@@ -24,6 +24,7 @@
 u32 tegra_read_chipid(void);
 u8 tegra_get_chip_id(void);
 u8 tegra_get_platform(void);
+bool tegra_is_silicon(void);
 
 enum tegra_revision {
 	TEGRA_REVISION_UNKNOWN = 0,
-- 
2.27.0

[PATCH 6/9] soc/tegra: fuse: Implement tegra_is_silicon()

[Thierry Reding]

From: Thierry Reding <treding@nvidia.com>

This function can be used by drivers to determine whether code is
running on silicon or on a simulation platform.

Signed-off-by: Thierry Reding <treding@nvidia.com>
---
 drivers/soc/tegra/fuse/tegra-apbmisc.c | 13 +++++++++++++
 include/soc/tegra/fuse.h               |  1 +
 2 files changed, 14 insertions(+)

diff --git a/drivers/soc/tegra/fuse/tegra-apbmisc.c b/drivers/soc/tegra/fuse/tegra-apbmisc.c
index 89f1479b4d0e..be6b7fc169ca 100644
--- a/drivers/soc/tegra/fuse/tegra-apbmisc.c
+++ b/drivers/soc/tegra/fuse/tegra-apbmisc.c
@@ -52,6 +52,19 @@ u8 tegra_get_platform(void)
 	return (tegra_read_chipid() >> 20) & 0xf;
 }
 
+bool tegra_is_silicon(void)
+{
+	switch (tegra_get_chip_id()) {
+	case TEGRA194:
+		if (tegra_get_platform() == 0)
+			return true;
+
+		return false;
+	}
+
+	return false;
+}
+
 u32 tegra_read_straps(void)
 {
 	WARN(!chipid, "Tegra ABP MISC not yet available\n");
diff --git a/include/soc/tegra/fuse.h b/include/soc/tegra/fuse.h
index 214908fc5581..a9db917a1d06 100644
--- a/include/soc/tegra/fuse.h
+++ b/include/soc/tegra/fuse.h
@@ -24,6 +24,7 @@
 u32 tegra_read_chipid(void);
 u8 tegra_get_chip_id(void);
 u8 tegra_get_platform(void);
+bool tegra_is_silicon(void);
 
 enum tegra_revision {
 	TEGRA_REVISION_UNKNOWN = 0,
-- 
2.27.0


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Re: [PATCH 6/9] soc/tegra: fuse: Implement tegra_is_silicon()

[Jon Hunter]

On 16/07/2020 15:18, Thierry Reding wrote:
> From: Thierry Reding <treding@nvidia.com>
> 
> This function can be used by drivers to determine whether code is
> running on silicon or on a simulation platform.
> 
> Signed-off-by: Thierry Reding <treding@nvidia.com>
> ---
>  drivers/soc/tegra/fuse/tegra-apbmisc.c | 13 +++++++++++++
>  include/soc/tegra/fuse.h               |  1 +
>  2 files changed, 14 insertions(+)
> 
> diff --git a/drivers/soc/tegra/fuse/tegra-apbmisc.c b/drivers/soc/tegra/fuse/tegra-apbmisc.c
> index 89f1479b4d0e..be6b7fc169ca 100644
> --- a/drivers/soc/tegra/fuse/tegra-apbmisc.c
> +++ b/drivers/soc/tegra/fuse/tegra-apbmisc.c
> @@ -52,6 +52,19 @@ u8 tegra_get_platform(void)
>  	return (tegra_read_chipid() >> 20) & 0xf;
>  }
>  
> +bool tegra_is_silicon(void)
> +{
> +	switch (tegra_get_chip_id()) {
> +	case TEGRA194:
> +		if (tegra_get_platform() == 0)
> +			return true;
> +
> +		return false;
> +	}
> +
> +	return false;
> +}
> +

Should we do this the other way around and default to is-silicon?

For devices prior to Tegra194, this will always return false.

Jon

-- 
nvpublic

Re: [PATCH 6/9] soc/tegra: fuse: Implement tegra_is_silicon()

[Jon Hunter]

On 16/07/2020 15:18, Thierry Reding wrote:
> From: Thierry Reding <treding@nvidia.com>
> 
> This function can be used by drivers to determine whether code is
> running on silicon or on a simulation platform.
> 
> Signed-off-by: Thierry Reding <treding@nvidia.com>
> ---
>  drivers/soc/tegra/fuse/tegra-apbmisc.c | 13 +++++++++++++
>  include/soc/tegra/fuse.h               |  1 +
>  2 files changed, 14 insertions(+)
> 
> diff --git a/drivers/soc/tegra/fuse/tegra-apbmisc.c b/drivers/soc/tegra/fuse/tegra-apbmisc.c
> index 89f1479b4d0e..be6b7fc169ca 100644
> --- a/drivers/soc/tegra/fuse/tegra-apbmisc.c
> +++ b/drivers/soc/tegra/fuse/tegra-apbmisc.c
> @@ -52,6 +52,19 @@ u8 tegra_get_platform(void)
>  	return (tegra_read_chipid() >> 20) & 0xf;
>  }
>  
> +bool tegra_is_silicon(void)
> +{
> +	switch (tegra_get_chip_id()) {
> +	case TEGRA194:
> +		if (tegra_get_platform() == 0)
> +			return true;
> +
> +		return false;
> +	}
> +
> +	return false;
> +}
> +

Should we do this the other way around and default to is-silicon?

For devices prior to Tegra194, this will always return false.

Jon

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Re: [PATCH 6/9] soc/tegra: fuse: Implement tegra_is_silicon()

[Thierry Reding]

[-- Attachment #1: Type: text/plain, Size: 1349 bytes --]

On Mon, Sep 07, 2020 at 08:32:08PM +0100, Jon Hunter wrote:
> 
> On 16/07/2020 15:18, Thierry Reding wrote:
> > From: Thierry Reding <treding@nvidia.com>
> > 
> > This function can be used by drivers to determine whether code is
> > running on silicon or on a simulation platform.
> > 
> > Signed-off-by: Thierry Reding <treding@nvidia.com>
> > ---
> >  drivers/soc/tegra/fuse/tegra-apbmisc.c | 13 +++++++++++++
> >  include/soc/tegra/fuse.h               |  1 +
> >  2 files changed, 14 insertions(+)
> > 
> > diff --git a/drivers/soc/tegra/fuse/tegra-apbmisc.c b/drivers/soc/tegra/fuse/tegra-apbmisc.c
> > index 89f1479b4d0e..be6b7fc169ca 100644
> > --- a/drivers/soc/tegra/fuse/tegra-apbmisc.c
> > +++ b/drivers/soc/tegra/fuse/tegra-apbmisc.c
> > @@ -52,6 +52,19 @@ u8 tegra_get_platform(void)
> >  	return (tegra_read_chipid() >> 20) & 0xf;
> >  }
> >  
> > +bool tegra_is_silicon(void)
> > +{
> > +	switch (tegra_get_chip_id()) {
> > +	case TEGRA194:
> > +		if (tegra_get_platform() == 0)
> > +			return true;
> > +
> > +		return false;
> > +	}
> > +
> > +	return false;
> > +}
> > +
> 
> Should we do this the other way around and default to is-silicon?
> 
> For devices prior to Tegra194, this will always return false.

Yes, that's definitely a bug. I'll address that in the next version.

Thierry

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Re: [PATCH 6/9] soc/tegra: fuse: Implement tegra_is_silicon()

[Thierry Reding]

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On Mon, Sep 07, 2020 at 08:32:08PM +0100, Jon Hunter wrote:
> 
> On 16/07/2020 15:18, Thierry Reding wrote:
> > From: Thierry Reding <treding@nvidia.com>
> > 
> > This function can be used by drivers to determine whether code is
> > running on silicon or on a simulation platform.
> > 
> > Signed-off-by: Thierry Reding <treding@nvidia.com>
> > ---
> >  drivers/soc/tegra/fuse/tegra-apbmisc.c | 13 +++++++++++++
> >  include/soc/tegra/fuse.h               |  1 +
> >  2 files changed, 14 insertions(+)
> > 
> > diff --git a/drivers/soc/tegra/fuse/tegra-apbmisc.c b/drivers/soc/tegra/fuse/tegra-apbmisc.c
> > index 89f1479b4d0e..be6b7fc169ca 100644
> > --- a/drivers/soc/tegra/fuse/tegra-apbmisc.c
> > +++ b/drivers/soc/tegra/fuse/tegra-apbmisc.c
> > @@ -52,6 +52,19 @@ u8 tegra_get_platform(void)
> >  	return (tegra_read_chipid() >> 20) & 0xf;
> >  }
> >  
> > +bool tegra_is_silicon(void)
> > +{
> > +	switch (tegra_get_chip_id()) {
> > +	case TEGRA194:
> > +		if (tegra_get_platform() == 0)
> > +			return true;
> > +
> > +		return false;
> > +	}
> > +
> > +	return false;
> > +}
> > +
> 
> Should we do this the other way around and default to is-silicon?
> 
> For devices prior to Tegra194, this will always return false.

Yes, that's definitely a bug. I'll address that in the next version.

Thierry

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[PATCH 7/9] soc/tegra: fuse: Add Tegra234 support

[Thierry Reding]

From: Thierry Reding <treding-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>

Add support for FUSE block found on the Tegra234 SoC, which is largely
similar to the IP found on previous generations.

Signed-off-by: Thierry Reding <treding-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
---
 drivers/soc/tegra/fuse/fuse-tegra.c    |  6 +++++-
 drivers/soc/tegra/fuse/fuse-tegra30.c  | 30 ++++++++++++++++++++++++++
 drivers/soc/tegra/fuse/fuse.h          | 10 ++++++++-
 drivers/soc/tegra/fuse/tegra-apbmisc.c |  1 +
 include/soc/tegra/fuse.h               |  1 +
 5 files changed, 46 insertions(+), 2 deletions(-)

diff --git a/drivers/soc/tegra/fuse/fuse-tegra.c b/drivers/soc/tegra/fuse/fuse-tegra.c
index 7e6b6ee59120..94b60a692b51 100644
--- a/drivers/soc/tegra/fuse/fuse-tegra.c
+++ b/drivers/soc/tegra/fuse/fuse-tegra.c
@@ -49,6 +49,9 @@ static struct tegra_fuse *fuse = &(struct tegra_fuse) {
 };
 
 static const struct of_device_id tegra_fuse_match[] = {
+#ifdef CONFIG_ARCH_TEGRA_234_SOC
+	{ .compatible = "nvidia,tegra234-efuse", .data = &tegra234_fuse_soc },
+#endif
 #ifdef CONFIG_ARCH_TEGRA_194_SOC
 	{ .compatible = "nvidia,tegra194-efuse", .data = &tegra194_fuse_soc },
 #endif
@@ -326,7 +329,8 @@ const struct attribute_group tegra_soc_attr_group = {
 	.attrs = tegra_soc_attr,
 };
 
-#ifdef CONFIG_ARCH_TEGRA_194_SOC
+#if IS_ENABLED(CONFIG_ARCH_TEGRA_194_SOC) || \
+    IS_ENABLED(CONFIG_ARCH_TEGRA_234_SOC)
 static ssize_t platform_show(struct device *dev, struct device_attribute *attr,
 			     char *buf)
 {
diff --git a/drivers/soc/tegra/fuse/fuse-tegra30.c b/drivers/soc/tegra/fuse/fuse-tegra30.c
index 85accef41fa1..9ea7f0168457 100644
--- a/drivers/soc/tegra/fuse/fuse-tegra30.c
+++ b/drivers/soc/tegra/fuse/fuse-tegra30.c
@@ -356,3 +356,33 @@ const struct tegra_fuse_soc tegra194_fuse_soc = {
 	.soc_attr_group = &tegra194_soc_attr_group,
 };
 #endif
+
+#if defined(CONFIG_ARCH_TEGRA_234_SOC)
+static const struct nvmem_cell_lookup tegra234_fuse_lookups[] = {
+	{
+		.nvmem_name = "fuse",
+		.cell_name = "xusb-pad-calibration",
+		.dev_id = "3520000.padctl",
+		.con_id = "calibration",
+	}, {
+		.nvmem_name = "fuse",
+		.cell_name = "xusb-pad-calibration-ext",
+		.dev_id = "3520000.padctl",
+		.con_id = "calibration-ext",
+	},
+};
+
+static const struct tegra_fuse_info tegra234_fuse_info = {
+	.read = tegra30_fuse_read,
+	.size = 0x300,
+	.spare = 0x280,
+};
+
+const struct tegra_fuse_soc tegra234_fuse_soc = {
+	.init = tegra30_fuse_init,
+	.info = &tegra234_fuse_info,
+	.lookups = tegra234_fuse_lookups,
+	.num_lookups = ARRAY_SIZE(tegra234_fuse_lookups),
+	.soc_attr_group = &tegra194_soc_attr_group,
+};
+#endif
diff --git a/drivers/soc/tegra/fuse/fuse.h b/drivers/soc/tegra/fuse/fuse.h
index 9d4fc315a007..e057a58e2060 100644
--- a/drivers/soc/tegra/fuse/fuse.h
+++ b/drivers/soc/tegra/fuse/fuse.h
@@ -115,9 +115,17 @@ extern const struct tegra_fuse_soc tegra210_fuse_soc;
 extern const struct tegra_fuse_soc tegra186_fuse_soc;
 #endif
 
+#if IS_ENABLED(CONFIG_ARCH_TEGRA_194_SOC) || \
+    IS_ENABLED(CONFIG_ARCH_TEGRA_234_SOC)
+extern const struct attribute_group tegra194_soc_attr_group;
+#endif
+
 #ifdef CONFIG_ARCH_TEGRA_194_SOC
 extern const struct tegra_fuse_soc tegra194_fuse_soc;
-extern const struct attribute_group tegra194_soc_attr_group;
+#endif
+
+#ifdef CONFIG_ARCH_TEGRA_234_SOC
+extern const struct tegra_fuse_soc tegra234_fuse_soc;
 #endif
 
 #endif
diff --git a/drivers/soc/tegra/fuse/tegra-apbmisc.c b/drivers/soc/tegra/fuse/tegra-apbmisc.c
index be6b7fc169ca..6aeac5ea2d70 100644
--- a/drivers/soc/tegra/fuse/tegra-apbmisc.c
+++ b/drivers/soc/tegra/fuse/tegra-apbmisc.c
@@ -56,6 +56,7 @@ bool tegra_is_silicon(void)
 {
 	switch (tegra_get_chip_id()) {
 	case TEGRA194:
+	case TEGRA234:
 		if (tegra_get_platform() == 0)
 			return true;
 
diff --git a/include/soc/tegra/fuse.h b/include/soc/tegra/fuse.h
index a9db917a1d06..c702bd2911bc 100644
--- a/include/soc/tegra/fuse.h
+++ b/include/soc/tegra/fuse.h
@@ -14,6 +14,7 @@
 #define TEGRA210	0x21
 #define TEGRA186	0x18
 #define TEGRA194	0x19
+#define TEGRA234	0x23
 
 #define TEGRA_FUSE_SKU_CALIB_0	0xf0
 #define TEGRA30_FUSE_SATA_CALIB	0x124
-- 
2.27.0

[PATCH 7/9] soc/tegra: fuse: Add Tegra234 support

[Thierry Reding]

From: Thierry Reding <treding@nvidia.com>

Add support for FUSE block found on the Tegra234 SoC, which is largely
similar to the IP found on previous generations.

Signed-off-by: Thierry Reding <treding@nvidia.com>
---
 drivers/soc/tegra/fuse/fuse-tegra.c    |  6 +++++-
 drivers/soc/tegra/fuse/fuse-tegra30.c  | 30 ++++++++++++++++++++++++++
 drivers/soc/tegra/fuse/fuse.h          | 10 ++++++++-
 drivers/soc/tegra/fuse/tegra-apbmisc.c |  1 +
 include/soc/tegra/fuse.h               |  1 +
 5 files changed, 46 insertions(+), 2 deletions(-)

diff --git a/drivers/soc/tegra/fuse/fuse-tegra.c b/drivers/soc/tegra/fuse/fuse-tegra.c
index 7e6b6ee59120..94b60a692b51 100644
--- a/drivers/soc/tegra/fuse/fuse-tegra.c
+++ b/drivers/soc/tegra/fuse/fuse-tegra.c
@@ -49,6 +49,9 @@ static struct tegra_fuse *fuse = &(struct tegra_fuse) {
 };
 
 static const struct of_device_id tegra_fuse_match[] = {
+#ifdef CONFIG_ARCH_TEGRA_234_SOC
+	{ .compatible = "nvidia,tegra234-efuse", .data = &tegra234_fuse_soc },
+#endif
 #ifdef CONFIG_ARCH_TEGRA_194_SOC
 	{ .compatible = "nvidia,tegra194-efuse", .data = &tegra194_fuse_soc },
 #endif
@@ -326,7 +329,8 @@ const struct attribute_group tegra_soc_attr_group = {
 	.attrs = tegra_soc_attr,
 };
 
-#ifdef CONFIG_ARCH_TEGRA_194_SOC
+#if IS_ENABLED(CONFIG_ARCH_TEGRA_194_SOC) || \
+    IS_ENABLED(CONFIG_ARCH_TEGRA_234_SOC)
 static ssize_t platform_show(struct device *dev, struct device_attribute *attr,
 			     char *buf)
 {
diff --git a/drivers/soc/tegra/fuse/fuse-tegra30.c b/drivers/soc/tegra/fuse/fuse-tegra30.c
index 85accef41fa1..9ea7f0168457 100644
--- a/drivers/soc/tegra/fuse/fuse-tegra30.c
+++ b/drivers/soc/tegra/fuse/fuse-tegra30.c
@@ -356,3 +356,33 @@ const struct tegra_fuse_soc tegra194_fuse_soc = {
 	.soc_attr_group = &tegra194_soc_attr_group,
 };
 #endif
+
+#if defined(CONFIG_ARCH_TEGRA_234_SOC)
+static const struct nvmem_cell_lookup tegra234_fuse_lookups[] = {
+	{
+		.nvmem_name = "fuse",
+		.cell_name = "xusb-pad-calibration",
+		.dev_id = "3520000.padctl",
+		.con_id = "calibration",
+	}, {
+		.nvmem_name = "fuse",
+		.cell_name = "xusb-pad-calibration-ext",
+		.dev_id = "3520000.padctl",
+		.con_id = "calibration-ext",
+	},
+};
+
+static const struct tegra_fuse_info tegra234_fuse_info = {
+	.read = tegra30_fuse_read,
+	.size = 0x300,
+	.spare = 0x280,
+};
+
+const struct tegra_fuse_soc tegra234_fuse_soc = {
+	.init = tegra30_fuse_init,
+	.info = &tegra234_fuse_info,
+	.lookups = tegra234_fuse_lookups,
+	.num_lookups = ARRAY_SIZE(tegra234_fuse_lookups),
+	.soc_attr_group = &tegra194_soc_attr_group,
+};
+#endif
diff --git a/drivers/soc/tegra/fuse/fuse.h b/drivers/soc/tegra/fuse/fuse.h
index 9d4fc315a007..e057a58e2060 100644
--- a/drivers/soc/tegra/fuse/fuse.h
+++ b/drivers/soc/tegra/fuse/fuse.h
@@ -115,9 +115,17 @@ extern const struct tegra_fuse_soc tegra210_fuse_soc;
 extern const struct tegra_fuse_soc tegra186_fuse_soc;
 #endif
 
+#if IS_ENABLED(CONFIG_ARCH_TEGRA_194_SOC) || \
+    IS_ENABLED(CONFIG_ARCH_TEGRA_234_SOC)
+extern const struct attribute_group tegra194_soc_attr_group;
+#endif
+
 #ifdef CONFIG_ARCH_TEGRA_194_SOC
 extern const struct tegra_fuse_soc tegra194_fuse_soc;
-extern const struct attribute_group tegra194_soc_attr_group;
+#endif
+
+#ifdef CONFIG_ARCH_TEGRA_234_SOC
+extern const struct tegra_fuse_soc tegra234_fuse_soc;
 #endif
 
 #endif
diff --git a/drivers/soc/tegra/fuse/tegra-apbmisc.c b/drivers/soc/tegra/fuse/tegra-apbmisc.c
index be6b7fc169ca..6aeac5ea2d70 100644
--- a/drivers/soc/tegra/fuse/tegra-apbmisc.c
+++ b/drivers/soc/tegra/fuse/tegra-apbmisc.c
@@ -56,6 +56,7 @@ bool tegra_is_silicon(void)
 {
 	switch (tegra_get_chip_id()) {
 	case TEGRA194:
+	case TEGRA234:
 		if (tegra_get_platform() == 0)
 			return true;
 
diff --git a/include/soc/tegra/fuse.h b/include/soc/tegra/fuse.h
index a9db917a1d06..c702bd2911bc 100644
--- a/include/soc/tegra/fuse.h
+++ b/include/soc/tegra/fuse.h
@@ -14,6 +14,7 @@
 #define TEGRA210	0x21
 #define TEGRA186	0x18
 #define TEGRA194	0x19
+#define TEGRA234	0x23
 
 #define TEGRA_FUSE_SKU_CALIB_0	0xf0
 #define TEGRA30_FUSE_SATA_CALIB	0x124
-- 
2.27.0


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Re: [PATCH 7/9] soc/tegra: fuse: Add Tegra234 support

[Jon Hunter]

On 16/07/2020 15:18, Thierry Reding wrote:
> From: Thierry Reding <treding@nvidia.com>
> 
> Add support for FUSE block found on the Tegra234 SoC, which is largely
> similar to the IP found on previous generations.
> 
> Signed-off-by: Thierry Reding <treding@nvidia.com>
> ---
>  drivers/soc/tegra/fuse/fuse-tegra.c    |  6 +++++-
>  drivers/soc/tegra/fuse/fuse-tegra30.c  | 30 ++++++++++++++++++++++++++
>  drivers/soc/tegra/fuse/fuse.h          | 10 ++++++++-
>  drivers/soc/tegra/fuse/tegra-apbmisc.c |  1 +
>  include/soc/tegra/fuse.h               |  1 +
>  5 files changed, 46 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/soc/tegra/fuse/fuse-tegra.c b/drivers/soc/tegra/fuse/fuse-tegra.c
> index 7e6b6ee59120..94b60a692b51 100644
> --- a/drivers/soc/tegra/fuse/fuse-tegra.c
> +++ b/drivers/soc/tegra/fuse/fuse-tegra.c
> @@ -49,6 +49,9 @@ static struct tegra_fuse *fuse = &(struct tegra_fuse) {
>  };
>  
>  static const struct of_device_id tegra_fuse_match[] = {
> +#ifdef CONFIG_ARCH_TEGRA_234_SOC
> +	{ .compatible = "nvidia,tegra234-efuse", .data = &tegra234_fuse_soc },
> +#endif
>  #ifdef CONFIG_ARCH_TEGRA_194_SOC
>  	{ .compatible = "nvidia,tegra194-efuse", .data = &tegra194_fuse_soc },
>  #endif
> @@ -326,7 +329,8 @@ const struct attribute_group tegra_soc_attr_group = {
>  	.attrs = tegra_soc_attr,
>  };
>  
> -#ifdef CONFIG_ARCH_TEGRA_194_SOC
> +#if IS_ENABLED(CONFIG_ARCH_TEGRA_194_SOC) || \
> +    IS_ENABLED(CONFIG_ARCH_TEGRA_234_SOC)
>  static ssize_t platform_show(struct device *dev, struct device_attribute *attr,
>  			     char *buf)
>  {
> diff --git a/drivers/soc/tegra/fuse/fuse-tegra30.c b/drivers/soc/tegra/fuse/fuse-tegra30.c
> index 85accef41fa1..9ea7f0168457 100644
> --- a/drivers/soc/tegra/fuse/fuse-tegra30.c
> +++ b/drivers/soc/tegra/fuse/fuse-tegra30.c
> @@ -356,3 +356,33 @@ const struct tegra_fuse_soc tegra194_fuse_soc = {
>  	.soc_attr_group = &tegra194_soc_attr_group,
>  };
>  #endif
> +
> +#if defined(CONFIG_ARCH_TEGRA_234_SOC)
> +static const struct nvmem_cell_lookup tegra234_fuse_lookups[] = {
> +	{
> +		.nvmem_name = "fuse",
> +		.cell_name = "xusb-pad-calibration",
> +		.dev_id = "3520000.padctl",
> +		.con_id = "calibration",
> +	}, {
> +		.nvmem_name = "fuse",
> +		.cell_name = "xusb-pad-calibration-ext",
> +		.dev_id = "3520000.padctl",
> +		.con_id = "calibration-ext",
> +	},
> +};
> +
> +static const struct tegra_fuse_info tegra234_fuse_info = {
> +	.read = tegra30_fuse_read,
> +	.size = 0x300,
> +	.spare = 0x280,
> +};
> +
> +const struct tegra_fuse_soc tegra234_fuse_soc = {
> +	.init = tegra30_fuse_init,
> +	.info = &tegra234_fuse_info,
> +	.lookups = tegra234_fuse_lookups,
> +	.num_lookups = ARRAY_SIZE(tegra234_fuse_lookups),
> +	.soc_attr_group = &tegra194_soc_attr_group,
> +};
> +#endif
> diff --git a/drivers/soc/tegra/fuse/fuse.h b/drivers/soc/tegra/fuse/fuse.h
> index 9d4fc315a007..e057a58e2060 100644
> --- a/drivers/soc/tegra/fuse/fuse.h
> +++ b/drivers/soc/tegra/fuse/fuse.h
> @@ -115,9 +115,17 @@ extern const struct tegra_fuse_soc tegra210_fuse_soc;
>  extern const struct tegra_fuse_soc tegra186_fuse_soc;
>  #endif
>  
> +#if IS_ENABLED(CONFIG_ARCH_TEGRA_194_SOC) || \
> +    IS_ENABLED(CONFIG_ARCH_TEGRA_234_SOC)
> +extern const struct attribute_group tegra194_soc_attr_group;
> +#endif
> +
>  #ifdef CONFIG_ARCH_TEGRA_194_SOC
>  extern const struct tegra_fuse_soc tegra194_fuse_soc;
> -extern const struct attribute_group tegra194_soc_attr_group;
> +#endif
> +
> +#ifdef CONFIG_ARCH_TEGRA_234_SOC
> +extern const struct tegra_fuse_soc tegra234_fuse_soc;
>  #endif
>  
>  #endif
> diff --git a/drivers/soc/tegra/fuse/tegra-apbmisc.c b/drivers/soc/tegra/fuse/tegra-apbmisc.c
> index be6b7fc169ca..6aeac5ea2d70 100644
> --- a/drivers/soc/tegra/fuse/tegra-apbmisc.c
> +++ b/drivers/soc/tegra/fuse/tegra-apbmisc.c
> @@ -56,6 +56,7 @@ bool tegra_is_silicon(void)
>  {
>  	switch (tegra_get_chip_id()) {
>  	case TEGRA194:
> +	case TEGRA234:
>  		if (tegra_get_platform() == 0)
>  			return true;
>  
> diff --git a/include/soc/tegra/fuse.h b/include/soc/tegra/fuse.h
> index a9db917a1d06..c702bd2911bc 100644
> --- a/include/soc/tegra/fuse.h
> +++ b/include/soc/tegra/fuse.h
> @@ -14,6 +14,7 @@
>  #define TEGRA210	0x21
>  #define TEGRA186	0x18
>  #define TEGRA194	0x19
> +#define TEGRA234	0x23
>  
>  #define TEGRA_FUSE_SKU_CALIB_0	0xf0
>  #define TEGRA30_FUSE_SATA_CALIB	0x124
> 


Reviewed-by: Jon Hunter <jonathanh@nvidia.com>

Cheers
Jon

-- 
nvpublic

Re: [PATCH 7/9] soc/tegra: fuse: Add Tegra234 support

[Jon Hunter]

On 16/07/2020 15:18, Thierry Reding wrote:
> From: Thierry Reding <treding@nvidia.com>
> 
> Add support for FUSE block found on the Tegra234 SoC, which is largely
> similar to the IP found on previous generations.
> 
> Signed-off-by: Thierry Reding <treding@nvidia.com>
> ---
>  drivers/soc/tegra/fuse/fuse-tegra.c    |  6 +++++-
>  drivers/soc/tegra/fuse/fuse-tegra30.c  | 30 ++++++++++++++++++++++++++
>  drivers/soc/tegra/fuse/fuse.h          | 10 ++++++++-
>  drivers/soc/tegra/fuse/tegra-apbmisc.c |  1 +
>  include/soc/tegra/fuse.h               |  1 +
>  5 files changed, 46 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/soc/tegra/fuse/fuse-tegra.c b/drivers/soc/tegra/fuse/fuse-tegra.c
> index 7e6b6ee59120..94b60a692b51 100644
> --- a/drivers/soc/tegra/fuse/fuse-tegra.c
> +++ b/drivers/soc/tegra/fuse/fuse-tegra.c
> @@ -49,6 +49,9 @@ static struct tegra_fuse *fuse = &(struct tegra_fuse) {
>  };
>  
>  static const struct of_device_id tegra_fuse_match[] = {
> +#ifdef CONFIG_ARCH_TEGRA_234_SOC
> +	{ .compatible = "nvidia,tegra234-efuse", .data = &tegra234_fuse_soc },
> +#endif
>  #ifdef CONFIG_ARCH_TEGRA_194_SOC
>  	{ .compatible = "nvidia,tegra194-efuse", .data = &tegra194_fuse_soc },
>  #endif
> @@ -326,7 +329,8 @@ const struct attribute_group tegra_soc_attr_group = {
>  	.attrs = tegra_soc_attr,
>  };
>  
> -#ifdef CONFIG_ARCH_TEGRA_194_SOC
> +#if IS_ENABLED(CONFIG_ARCH_TEGRA_194_SOC) || \
> +    IS_ENABLED(CONFIG_ARCH_TEGRA_234_SOC)
>  static ssize_t platform_show(struct device *dev, struct device_attribute *attr,
>  			     char *buf)
>  {
> diff --git a/drivers/soc/tegra/fuse/fuse-tegra30.c b/drivers/soc/tegra/fuse/fuse-tegra30.c
> index 85accef41fa1..9ea7f0168457 100644
> --- a/drivers/soc/tegra/fuse/fuse-tegra30.c
> +++ b/drivers/soc/tegra/fuse/fuse-tegra30.c
> @@ -356,3 +356,33 @@ const struct tegra_fuse_soc tegra194_fuse_soc = {
>  	.soc_attr_group = &tegra194_soc_attr_group,
>  };
>  #endif
> +
> +#if defined(CONFIG_ARCH_TEGRA_234_SOC)
> +static const struct nvmem_cell_lookup tegra234_fuse_lookups[] = {
> +	{
> +		.nvmem_name = "fuse",
> +		.cell_name = "xusb-pad-calibration",
> +		.dev_id = "3520000.padctl",
> +		.con_id = "calibration",
> +	}, {
> +		.nvmem_name = "fuse",
> +		.cell_name = "xusb-pad-calibration-ext",
> +		.dev_id = "3520000.padctl",
> +		.con_id = "calibration-ext",
> +	},
> +};
> +
> +static const struct tegra_fuse_info tegra234_fuse_info = {
> +	.read = tegra30_fuse_read,
> +	.size = 0x300,
> +	.spare = 0x280,
> +};
> +
> +const struct tegra_fuse_soc tegra234_fuse_soc = {
> +	.init = tegra30_fuse_init,
> +	.info = &tegra234_fuse_info,
> +	.lookups = tegra234_fuse_lookups,
> +	.num_lookups = ARRAY_SIZE(tegra234_fuse_lookups),
> +	.soc_attr_group = &tegra194_soc_attr_group,
> +};
> +#endif
> diff --git a/drivers/soc/tegra/fuse/fuse.h b/drivers/soc/tegra/fuse/fuse.h
> index 9d4fc315a007..e057a58e2060 100644
> --- a/drivers/soc/tegra/fuse/fuse.h
> +++ b/drivers/soc/tegra/fuse/fuse.h
> @@ -115,9 +115,17 @@ extern const struct tegra_fuse_soc tegra210_fuse_soc;
>  extern const struct tegra_fuse_soc tegra186_fuse_soc;
>  #endif
>  
> +#if IS_ENABLED(CONFIG_ARCH_TEGRA_194_SOC) || \
> +    IS_ENABLED(CONFIG_ARCH_TEGRA_234_SOC)
> +extern const struct attribute_group tegra194_soc_attr_group;
> +#endif
> +
>  #ifdef CONFIG_ARCH_TEGRA_194_SOC
>  extern const struct tegra_fuse_soc tegra194_fuse_soc;
> -extern const struct attribute_group tegra194_soc_attr_group;
> +#endif
> +
> +#ifdef CONFIG_ARCH_TEGRA_234_SOC
> +extern const struct tegra_fuse_soc tegra234_fuse_soc;
>  #endif
>  
>  #endif
> diff --git a/drivers/soc/tegra/fuse/tegra-apbmisc.c b/drivers/soc/tegra/fuse/tegra-apbmisc.c
> index be6b7fc169ca..6aeac5ea2d70 100644
> --- a/drivers/soc/tegra/fuse/tegra-apbmisc.c
> +++ b/drivers/soc/tegra/fuse/tegra-apbmisc.c
> @@ -56,6 +56,7 @@ bool tegra_is_silicon(void)
>  {
>  	switch (tegra_get_chip_id()) {
>  	case TEGRA194:
> +	case TEGRA234:
>  		if (tegra_get_platform() == 0)
>  			return true;
>  
> diff --git a/include/soc/tegra/fuse.h b/include/soc/tegra/fuse.h
> index a9db917a1d06..c702bd2911bc 100644
> --- a/include/soc/tegra/fuse.h
> +++ b/include/soc/tegra/fuse.h
> @@ -14,6 +14,7 @@
>  #define TEGRA210	0x21
>  #define TEGRA186	0x18
>  #define TEGRA194	0x19
> +#define TEGRA234	0x23
>  
>  #define TEGRA_FUSE_SKU_CALIB_0	0xf0
>  #define TEGRA30_FUSE_SATA_CALIB	0x124
> 


Reviewed-by: Jon Hunter <jonathanh@nvidia.com>

Cheers
Jon

-- 
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[PATCH 8/9] firmware: tegra: Enable BPMP support on Tegra234

[Thierry Reding]

From: Thierry Reding <treding-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>

Enable support for the BPMP on Tegra234 to avoid relying on Tegra194
being enabled to pull in the needed OF device ID table entry.

On simulation platforms the BPMP hasn't booted up yet by the time we
probe the BPMP driver and the BPMP hasn't had a chance to mark the
doorbell as ringable by the CCPLEX. This corresponding check in the
BPMP driver will therefore fail. Work around this by disabling the
check on simulation platforms.

Signed-off-by: Thierry Reding <treding-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
---
 drivers/firmware/tegra/bpmp.c | 3 ++-
 drivers/mailbox/tegra-hsp.c   | 9 ++++++++-
 2 files changed, 10 insertions(+), 2 deletions(-)

diff --git a/drivers/firmware/tegra/bpmp.c b/drivers/firmware/tegra/bpmp.c
index 4d93d8925e14..0742a90cb844 100644
--- a/drivers/firmware/tegra/bpmp.c
+++ b/drivers/firmware/tegra/bpmp.c
@@ -856,7 +856,8 @@ static const struct tegra_bpmp_soc tegra210_soc = {
 
 static const struct of_device_id tegra_bpmp_match[] = {
 #if IS_ENABLED(CONFIG_ARCH_TEGRA_186_SOC) || \
-    IS_ENABLED(CONFIG_ARCH_TEGRA_194_SOC)
+    IS_ENABLED(CONFIG_ARCH_TEGRA_194_SOC) || \
+    IS_ENABLED(CONFIG_ARCH_TEGRA_234_SOC)
 	{ .compatible = "nvidia,tegra186-bpmp", .data = &tegra186_soc },
 #endif
 #if IS_ENABLED(CONFIG_ARCH_TEGRA_210_SOC)
diff --git a/drivers/mailbox/tegra-hsp.c b/drivers/mailbox/tegra-hsp.c
index 834b35dc3b13..e07091d71986 100644
--- a/drivers/mailbox/tegra-hsp.c
+++ b/drivers/mailbox/tegra-hsp.c
@@ -13,6 +13,8 @@
 #include <linux/pm.h>
 #include <linux/slab.h>
 
+#include <soc/tegra/fuse.h>
+
 #include <dt-bindings/mailbox/tegra186-hsp.h>
 
 #include "mailbox.h"
@@ -322,7 +324,12 @@ static int tegra_hsp_doorbell_startup(struct mbox_chan *chan)
 	if (!ccplex)
 		return -ENODEV;
 
-	if (!tegra_hsp_doorbell_can_ring(db))
+	/*
+	 * On simulation platforms the BPMP hasn't had a chance yet to mark
+	 * the doorbell as ringable by the CCPLEX, so we want to skip extra
+	 * checks here.
+	 */
+	if (tegra_is_silicon() && !tegra_hsp_doorbell_can_ring(db))
 		return -ENODEV;
 
 	spin_lock_irqsave(&hsp->lock, flags);
-- 
2.27.0

[PATCH 8/9] firmware: tegra: Enable BPMP support on Tegra234

[Thierry Reding]

From: Thierry Reding <treding@nvidia.com>

Enable support for the BPMP on Tegra234 to avoid relying on Tegra194
being enabled to pull in the needed OF device ID table entry.

On simulation platforms the BPMP hasn't booted up yet by the time we
probe the BPMP driver and the BPMP hasn't had a chance to mark the
doorbell as ringable by the CCPLEX. This corresponding check in the
BPMP driver will therefore fail. Work around this by disabling the
check on simulation platforms.

Signed-off-by: Thierry Reding <treding@nvidia.com>
---
 drivers/firmware/tegra/bpmp.c | 3 ++-
 drivers/mailbox/tegra-hsp.c   | 9 ++++++++-
 2 files changed, 10 insertions(+), 2 deletions(-)

diff --git a/drivers/firmware/tegra/bpmp.c b/drivers/firmware/tegra/bpmp.c
index 4d93d8925e14..0742a90cb844 100644
--- a/drivers/firmware/tegra/bpmp.c
+++ b/drivers/firmware/tegra/bpmp.c
@@ -856,7 +856,8 @@ static const struct tegra_bpmp_soc tegra210_soc = {
 
 static const struct of_device_id tegra_bpmp_match[] = {
 #if IS_ENABLED(CONFIG_ARCH_TEGRA_186_SOC) || \
-    IS_ENABLED(CONFIG_ARCH_TEGRA_194_SOC)
+    IS_ENABLED(CONFIG_ARCH_TEGRA_194_SOC) || \
+    IS_ENABLED(CONFIG_ARCH_TEGRA_234_SOC)
 	{ .compatible = "nvidia,tegra186-bpmp", .data = &tegra186_soc },
 #endif
 #if IS_ENABLED(CONFIG_ARCH_TEGRA_210_SOC)
diff --git a/drivers/mailbox/tegra-hsp.c b/drivers/mailbox/tegra-hsp.c
index 834b35dc3b13..e07091d71986 100644
--- a/drivers/mailbox/tegra-hsp.c
+++ b/drivers/mailbox/tegra-hsp.c
@@ -13,6 +13,8 @@
 #include <linux/pm.h>
 #include <linux/slab.h>
 
+#include <soc/tegra/fuse.h>
+
 #include <dt-bindings/mailbox/tegra186-hsp.h>
 
 #include "mailbox.h"
@@ -322,7 +324,12 @@ static int tegra_hsp_doorbell_startup(struct mbox_chan *chan)
 	if (!ccplex)
 		return -ENODEV;
 
-	if (!tegra_hsp_doorbell_can_ring(db))
+	/*
+	 * On simulation platforms the BPMP hasn't had a chance yet to mark
+	 * the doorbell as ringable by the CCPLEX, so we want to skip extra
+	 * checks here.
+	 */
+	if (tegra_is_silicon() && !tegra_hsp_doorbell_can_ring(db))
 		return -ENODEV;
 
 	spin_lock_irqsave(&hsp->lock, flags);
-- 
2.27.0


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Re: [PATCH 8/9] firmware: tegra: Enable BPMP support on Tegra234

[Jon Hunter]

On 16/07/2020 15:18, Thierry Reding wrote:
> From: Thierry Reding <treding@nvidia.com>
> 
> Enable support for the BPMP on Tegra234 to avoid relying on Tegra194
> being enabled to pull in the needed OF device ID table entry.
> 
> On simulation platforms the BPMP hasn't booted up yet by the time we
> probe the BPMP driver and the BPMP hasn't had a chance to mark the
> doorbell as ringable by the CCPLEX. This corresponding check in the
> BPMP driver will therefore fail. Work around this by disabling the
> check on simulation platforms.
> 
> Signed-off-by: Thierry Reding <treding@nvidia.com>
> ---
>  drivers/firmware/tegra/bpmp.c | 3 ++-
>  drivers/mailbox/tegra-hsp.c   | 9 ++++++++-
>  2 files changed, 10 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/firmware/tegra/bpmp.c b/drivers/firmware/tegra/bpmp.c
> index 4d93d8925e14..0742a90cb844 100644
> --- a/drivers/firmware/tegra/bpmp.c
> +++ b/drivers/firmware/tegra/bpmp.c
> @@ -856,7 +856,8 @@ static const struct tegra_bpmp_soc tegra210_soc = {
>  
>  static const struct of_device_id tegra_bpmp_match[] = {
>  #if IS_ENABLED(CONFIG_ARCH_TEGRA_186_SOC) || \
> -    IS_ENABLED(CONFIG_ARCH_TEGRA_194_SOC)
> +    IS_ENABLED(CONFIG_ARCH_TEGRA_194_SOC) || \
> +    IS_ENABLED(CONFIG_ARCH_TEGRA_234_SOC)
>  	{ .compatible = "nvidia,tegra186-bpmp", .data = &tegra186_soc },
>  #endif
>  #if IS_ENABLED(CONFIG_ARCH_TEGRA_210_SOC)
> diff --git a/drivers/mailbox/tegra-hsp.c b/drivers/mailbox/tegra-hsp.c
> index 834b35dc3b13..e07091d71986 100644
> --- a/drivers/mailbox/tegra-hsp.c
> +++ b/drivers/mailbox/tegra-hsp.c
> @@ -13,6 +13,8 @@
>  #include <linux/pm.h>
>  #include <linux/slab.h>
>  
> +#include <soc/tegra/fuse.h>
> +
>  #include <dt-bindings/mailbox/tegra186-hsp.h>
>  
>  #include "mailbox.h"
> @@ -322,7 +324,12 @@ static int tegra_hsp_doorbell_startup(struct mbox_chan *chan)
>  	if (!ccplex)
>  		return -ENODEV;
>  
> -	if (!tegra_hsp_doorbell_can_ring(db))
> +	/*
> +	 * On simulation platforms the BPMP hasn't had a chance yet to mark
> +	 * the doorbell as ringable by the CCPLEX, so we want to skip extra
> +	 * checks here.
> +	 */
> +	if (tegra_is_silicon() && !tegra_hsp_doorbell_can_ring(db))
>  		return -ENODEV;
>  
>  	spin_lock_irqsave(&hsp->lock, flags);
> 


Reviewed-by: Jon Hunter <jonathanh@nvidia.com>

Cheers
Jon

-- 
nvpublic

Re: [PATCH 8/9] firmware: tegra: Enable BPMP support on Tegra234

[Jon Hunter]

On 16/07/2020 15:18, Thierry Reding wrote:
> From: Thierry Reding <treding@nvidia.com>
> 
> Enable support for the BPMP on Tegra234 to avoid relying on Tegra194
> being enabled to pull in the needed OF device ID table entry.
> 
> On simulation platforms the BPMP hasn't booted up yet by the time we
> probe the BPMP driver and the BPMP hasn't had a chance to mark the
> doorbell as ringable by the CCPLEX. This corresponding check in the
> BPMP driver will therefore fail. Work around this by disabling the
> check on simulation platforms.
> 
> Signed-off-by: Thierry Reding <treding@nvidia.com>
> ---
>  drivers/firmware/tegra/bpmp.c | 3 ++-
>  drivers/mailbox/tegra-hsp.c   | 9 ++++++++-
>  2 files changed, 10 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/firmware/tegra/bpmp.c b/drivers/firmware/tegra/bpmp.c
> index 4d93d8925e14..0742a90cb844 100644
> --- a/drivers/firmware/tegra/bpmp.c
> +++ b/drivers/firmware/tegra/bpmp.c
> @@ -856,7 +856,8 @@ static const struct tegra_bpmp_soc tegra210_soc = {
>  
>  static const struct of_device_id tegra_bpmp_match[] = {
>  #if IS_ENABLED(CONFIG_ARCH_TEGRA_186_SOC) || \
> -    IS_ENABLED(CONFIG_ARCH_TEGRA_194_SOC)
> +    IS_ENABLED(CONFIG_ARCH_TEGRA_194_SOC) || \
> +    IS_ENABLED(CONFIG_ARCH_TEGRA_234_SOC)
>  	{ .compatible = "nvidia,tegra186-bpmp", .data = &tegra186_soc },
>  #endif
>  #if IS_ENABLED(CONFIG_ARCH_TEGRA_210_SOC)
> diff --git a/drivers/mailbox/tegra-hsp.c b/drivers/mailbox/tegra-hsp.c
> index 834b35dc3b13..e07091d71986 100644
> --- a/drivers/mailbox/tegra-hsp.c
> +++ b/drivers/mailbox/tegra-hsp.c
> @@ -13,6 +13,8 @@
>  #include <linux/pm.h>
>  #include <linux/slab.h>
>  
> +#include <soc/tegra/fuse.h>
> +
>  #include <dt-bindings/mailbox/tegra186-hsp.h>
>  
>  #include "mailbox.h"
> @@ -322,7 +324,12 @@ static int tegra_hsp_doorbell_startup(struct mbox_chan *chan)
>  	if (!ccplex)
>  		return -ENODEV;
>  
> -	if (!tegra_hsp_doorbell_can_ring(db))
> +	/*
> +	 * On simulation platforms the BPMP hasn't had a chance yet to mark
> +	 * the doorbell as ringable by the CCPLEX, so we want to skip extra
> +	 * checks here.
> +	 */
> +	if (tegra_is_silicon() && !tegra_hsp_doorbell_can_ring(db))
>  		return -ENODEV;
>  
>  	spin_lock_irqsave(&hsp->lock, flags);
> 


Reviewed-by: Jon Hunter <jonathanh@nvidia.com>

Cheers
Jon

-- 
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[PATCH 9/9] arm64: tegra: Initial Tegra234 VDK support

[Thierry Reding]

From: Thierry Reding <treding-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>

The NVIDIA Tegra234 VDK is a simulation platform for the Orin SoC. It
supports a subset of the peripherals that will be available in the final
chip and serves as a bootstrapping platform.

Signed-off-by: Thierry Reding <treding-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
---
 arch/arm64/boot/dts/nvidia/Makefile           |   1 +
 .../boot/dts/nvidia/tegra234-sim-vdk.dts      |  40 ++++
 arch/arm64/boot/dts/nvidia/tegra234.dtsi      | 191 ++++++++++++++++++
 drivers/soc/tegra/Kconfig                     |  10 +
 include/dt-bindings/clock/tegra234-clock.h    |  14 ++
 include/dt-bindings/reset/tegra234-reset.h    |  10 +
 6 files changed, 266 insertions(+)
 create mode 100644 arch/arm64/boot/dts/nvidia/tegra234-sim-vdk.dts
 create mode 100644 arch/arm64/boot/dts/nvidia/tegra234.dtsi
 create mode 100644 include/dt-bindings/clock/tegra234-clock.h
 create mode 100644 include/dt-bindings/reset/tegra234-reset.h

diff --git a/arch/arm64/boot/dts/nvidia/Makefile b/arch/arm64/boot/dts/nvidia/Makefile
index 2273fc5db19c..9296d12d11e9 100644
--- a/arch/arm64/boot/dts/nvidia/Makefile
+++ b/arch/arm64/boot/dts/nvidia/Makefile
@@ -9,3 +9,4 @@ dtb-$(CONFIG_ARCH_TEGRA_210_SOC) += tegra210-p2894-0050-a08.dtb
 dtb-$(CONFIG_ARCH_TEGRA_186_SOC) += tegra186-p2771-0000.dtb
 dtb-$(CONFIG_ARCH_TEGRA_194_SOC) += tegra194-p2972-0000.dtb
 dtb-$(CONFIG_ARCH_TEGRA_194_SOC) += tegra194-p3509-0000+p3668-0000.dtb
+dtb-$(CONFIG_ARCH_TEGRA_234_SOC) += tegra234-sim-vdk.dtb
diff --git a/arch/arm64/boot/dts/nvidia/tegra234-sim-vdk.dts b/arch/arm64/boot/dts/nvidia/tegra234-sim-vdk.dts
new file mode 100644
index 000000000000..f6e6a24829af
--- /dev/null
+++ b/arch/arm64/boot/dts/nvidia/tegra234-sim-vdk.dts
@@ -0,0 +1,40 @@
+// SPDX-License-Identifier: GPL-2.0
+/dts-v1/;
+
+#include "tegra234.dtsi"
+
+/ {
+	model = "NVIDIA Tegra234 VDK";
+	compatible = "nvidia,tegra234-vdk", "nvidia,tegra234";
+
+	aliases {
+		sdhci3 = "/cbb@0/sdhci@3460000";
+		serial0 = &uarta;
+	};
+
+	chosen {
+		bootargs = "console=ttyS0,115200n8 earlycon=uart8250,mmio32,0x03100000";
+		stdout-path = "serial0:115200n8";
+	};
+
+	cbb@0 {
+		serial@3100000 {
+			status = "okay";
+		};
+
+		sdhci@3460000 {
+			status = "okay";
+			bus-width = <8>;
+			non-removable;
+			only-1-8-v;
+		};
+
+		rtc@c2a0000 {
+			status = "okay";
+		};
+
+		pmc@c360000 {
+			nvidia,invert-interrupt;
+		};
+	};
+};
diff --git a/arch/arm64/boot/dts/nvidia/tegra234.dtsi b/arch/arm64/boot/dts/nvidia/tegra234.dtsi
new file mode 100644
index 000000000000..3509687441a1
--- /dev/null
+++ b/arch/arm64/boot/dts/nvidia/tegra234.dtsi
@@ -0,0 +1,191 @@
+// SPDX-License-Identifier: GPL-2.0
+
+#include <dt-bindings/clock/tegra234-clock.h>
+#include <dt-bindings/interrupt-controller/arm-gic.h>
+#include <dt-bindings/mailbox/tegra186-hsp.h>
+#include <dt-bindings/reset/tegra234-reset.h>
+
+/ {
+	compatible = "nvidia,tegra234";
+	interrupt-parent = <&gic>;
+	#address-cells = <2>;
+	#size-cells = <2>;
+
+	bus@0 {
+		compatible = "simple-bus";
+		#address-cells = <1>;
+		#size-cells = <1>;
+
+		ranges = <0x0 0x0 0x0 0x40000000>;
+
+		misc@100000 {
+			compatible = "nvidia,tegra234-misc";
+			reg = <0x00100000 0xf000>,
+			      <0x0010f000 0x1000>;
+			status = "okay";
+		};
+
+		uarta: serial@3100000 {
+			compatible = "nvidia,tegra234-uart", "nvidia,tegra20-uart";
+			reg = <0x03100000 0x10000>;
+			interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&bpmp TEGRA234_CLK_UARTA>;
+			clock-names = "serial";
+			resets = <&bpmp TEGRA234_RESET_UARTA>;
+			reset-names = "serial";
+			status = "disabled";
+		};
+
+		mmc@3460000 {
+			compatible = "nvidia,tegra234-sdhci", "nvidia,tegra186-sdhci";
+			reg = <0x03460000 0x20000>;
+			interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&bpmp TEGRA234_CLK_SDMMC4>;
+			clock-names = "sdhci";
+			resets = <&bpmp TEGRA234_RESET_SDMMC4>;
+			reset-names = "sdhci";
+			dma-coherent;
+			status = "disabled";
+		};
+
+		fuse@3810000 {
+			compatible = "nvidia,tegra234-efuse";
+			reg = <0x03810000 0x10000>;
+			clocks = <&bpmp TEGRA234_CLK_FUSE>;
+			clock-names = "fuse";
+		};
+
+		hsp_top0: hsp@3c00000 {
+			compatible = "nvidia,tegra234-hsp", "nvidia,tegra194-hsp";
+			reg = <0x03c00000 0xa0000>;
+			interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
+			interrupt-names = "doorbell", "shared0", "shared1", "shared2",
+					  "shared3", "shared4", "shared5", "shared6",
+					  "shared7";
+			#mbox-cells = <2>;
+		};
+
+		hsp_aon: hsp@c150000 {
+			compatible = "nvidia,tegra234-hsp", "nvidia,tegra194-hsp";
+			reg = <0x0c150000 0x90000>;
+			interrupts = <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 134 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>;
+			/*
+			 * Shared interrupt 0 is routed only to AON/SPE, so
+			 * we only have 4 shared interrupts for the CCPLEX.
+			 */
+			interrupt-names = "shared1", "shared2", "shared3", "shared4";
+			#mbox-cells = <2>;
+		};
+
+		rtc@c2a0000 {
+			compatible = "nvidia,tegra234-rtc";
+			reg = <0x0c2a0000 0x10000>;
+			interrupt-parent = <&pmc>;
+			interrupts = <73 IRQ_TYPE_LEVEL_HIGH>;
+			status = "disabled";
+		};
+
+		pmc: pmc@c360000 {
+			compatible = "nvidia,tegra234-pmc";
+			reg = <0x0c360000 0x10000>,
+			      <0x0c370000 0x10000>,
+			      <0x0c380000 0x10000>,
+			      <0x0c390000 0x10000>,
+			      <0x0c3a0000 0x10000>;
+			reg-names = "pmc", "wake", "aotag", "scratch", "misc";
+
+			#interrupt-cells = <2>;
+			interrupt-controller;
+		};
+
+		gic: interrupt-controller@f400000 {
+			compatible = "arm,gic-v3";
+			reg = <0x0f400000 0x010000>, /* GICD */
+			      <0x0f440000 0x200000>; /* GICR */
+			interrupt-parent = <&gic>;
+			interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
+
+			#redistributor-regions = <1>;
+			#interrupt-cells = <3>;
+			interrupt-controller;
+		};
+	};
+
+	sysram@40000000 {
+		compatible = "nvidia,tegra234-sysram", "mmio-sram";
+		reg = <0x0 0x40000000 0x0 0x50000>;
+		#address-cells = <1>;
+		#size-cells = <1>;
+		ranges = <0x0 0x0 0x40000000 0x50000>;
+
+		cpu_bpmp_tx: shmem@4e000 {
+			compatible = "nvidia,tegra234-bpmp-shmem";
+			reg = <0x4e000 0x1000>;
+			label = "cpu-bpmp-tx";
+			pool;
+		};
+
+		cpu_bpmp_rx: shmem@4f000 {
+			compatible = "nvidia,tegra234-bpmp-shmem";
+			reg = <0x4f000 0x1000>;
+			label = "cpu-bpmp-rx";
+			pool;
+		};
+	};
+
+	bpmp: bpmp {
+		compatible = "nvidia,tegra234-bpmp", "nvidia,tegra186-bpmp";
+		mboxes = <&hsp_top0 TEGRA_HSP_MBOX_TYPE_DB
+				    TEGRA_HSP_DB_MASTER_BPMP>;
+		shmem = <&cpu_bpmp_tx &cpu_bpmp_rx>;
+		#clock-cells = <1>;
+		#reset-cells = <1>;
+		#power-domain-cells = <1>;
+
+		bpmp_i2c: i2c {
+			compatible = "nvidia,tegra186-bpmp-i2c";
+			nvidia,bpmp-bus-id = <5>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+		};
+	};
+
+	cpus {
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		cpu@0 {
+			device_type = "cpu";
+			reg = <0x000>;
+
+			enable-method = "psci";
+		};
+	};
+
+	psci {
+		compatible = "arm,psci-1.0";
+		status = "okay";
+		method = "smc";
+	};
+
+	timer {
+		compatible = "arm,armv8-timer";
+		interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
+			     <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
+			     <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
+			     <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
+		interrupt-parent = <&gic>;
+		always-on;
+	};
+};
diff --git a/drivers/soc/tegra/Kconfig b/drivers/soc/tegra/Kconfig
index 6bc603d0b9d9..976dee036470 100644
--- a/drivers/soc/tegra/Kconfig
+++ b/drivers/soc/tegra/Kconfig
@@ -119,6 +119,16 @@ config ARCH_TEGRA_194_SOC
 	help
 	  Enable support for the NVIDIA Tegra194 SoC.
 
+config ARCH_TEGRA_234_SOC
+	bool "NVIDIA Tegra234 SoC"
+	select MAILBOX
+	select TEGRA_BPMP
+	select TEGRA_HSP_MBOX
+	select TEGRA_IVC
+	select SOC_TEGRA_PMC
+	help
+	  Enable support for the NVIDIA Tegra234 SoC.
+
 endif
 endif
 
diff --git a/include/dt-bindings/clock/tegra234-clock.h b/include/dt-bindings/clock/tegra234-clock.h
new file mode 100644
index 000000000000..2c82072950ee
--- /dev/null
+++ b/include/dt-bindings/clock/tegra234-clock.h
@@ -0,0 +1,14 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/* Copyright (c) 2018-2019, NVIDIA CORPORATION. All rights reserved. */
+
+#ifndef DT_BINDINGS_CLOCK_TEGRA234_CLOCK_H
+#define DT_BINDINGS_CLOCK_TEGRA234_CLOCK_H
+
+/** @brief output of gate CLK_ENB_FUSE */
+#define TEGRA234_CLK_FUSE			40
+/** @brief output of mux controlled by CLK_RST_CONTROLLER_CLK_SOURCE_SDMMC4 */
+#define TEGRA234_CLK_SDMMC4			123
+/** @brief output of mux controlled by CLK_RST_CONTROLLER_CLK_SOURCE_UARTA */
+#define TEGRA234_CLK_UARTA			155
+
+#endif
diff --git a/include/dt-bindings/reset/tegra234-reset.h b/include/dt-bindings/reset/tegra234-reset.h
new file mode 100644
index 000000000000..b3c63be06d2d
--- /dev/null
+++ b/include/dt-bindings/reset/tegra234-reset.h
@@ -0,0 +1,10 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/* Copyright (c) 2018-2020, NVIDIA CORPORATION. All rights reserved. */
+
+#ifndef DT_BINDINGS_RESET_TEGRA234_RESET_H
+#define DT_BINDINGS_RESET_TEGRA234_RESET_H
+
+#define TEGRA234_RESET_SDMMC4			85
+#define TEGRA234_RESET_UARTA			100
+
+#endif
-- 
2.27.0

[PATCH 9/9] arm64: tegra: Initial Tegra234 VDK support

[Thierry Reding]

From: Thierry Reding <treding@nvidia.com>

The NVIDIA Tegra234 VDK is a simulation platform for the Orin SoC. It
supports a subset of the peripherals that will be available in the final
chip and serves as a bootstrapping platform.

Signed-off-by: Thierry Reding <treding@nvidia.com>
---
 arch/arm64/boot/dts/nvidia/Makefile           |   1 +
 .../boot/dts/nvidia/tegra234-sim-vdk.dts      |  40 ++++
 arch/arm64/boot/dts/nvidia/tegra234.dtsi      | 191 ++++++++++++++++++
 drivers/soc/tegra/Kconfig                     |  10 +
 include/dt-bindings/clock/tegra234-clock.h    |  14 ++
 include/dt-bindings/reset/tegra234-reset.h    |  10 +
 6 files changed, 266 insertions(+)
 create mode 100644 arch/arm64/boot/dts/nvidia/tegra234-sim-vdk.dts
 create mode 100644 arch/arm64/boot/dts/nvidia/tegra234.dtsi
 create mode 100644 include/dt-bindings/clock/tegra234-clock.h
 create mode 100644 include/dt-bindings/reset/tegra234-reset.h

diff --git a/arch/arm64/boot/dts/nvidia/Makefile b/arch/arm64/boot/dts/nvidia/Makefile
index 2273fc5db19c..9296d12d11e9 100644
--- a/arch/arm64/boot/dts/nvidia/Makefile
+++ b/arch/arm64/boot/dts/nvidia/Makefile
@@ -9,3 +9,4 @@ dtb-$(CONFIG_ARCH_TEGRA_210_SOC) += tegra210-p2894-0050-a08.dtb
 dtb-$(CONFIG_ARCH_TEGRA_186_SOC) += tegra186-p2771-0000.dtb
 dtb-$(CONFIG_ARCH_TEGRA_194_SOC) += tegra194-p2972-0000.dtb
 dtb-$(CONFIG_ARCH_TEGRA_194_SOC) += tegra194-p3509-0000+p3668-0000.dtb
+dtb-$(CONFIG_ARCH_TEGRA_234_SOC) += tegra234-sim-vdk.dtb
diff --git a/arch/arm64/boot/dts/nvidia/tegra234-sim-vdk.dts b/arch/arm64/boot/dts/nvidia/tegra234-sim-vdk.dts
new file mode 100644
index 000000000000..f6e6a24829af
--- /dev/null
+++ b/arch/arm64/boot/dts/nvidia/tegra234-sim-vdk.dts
@@ -0,0 +1,40 @@
+// SPDX-License-Identifier: GPL-2.0
+/dts-v1/;
+
+#include "tegra234.dtsi"
+
+/ {
+	model = "NVIDIA Tegra234 VDK";
+	compatible = "nvidia,tegra234-vdk", "nvidia,tegra234";
+
+	aliases {
+		sdhci3 = "/cbb@0/sdhci@3460000";
+		serial0 = &uarta;
+	};
+
+	chosen {
+		bootargs = "console=ttyS0,115200n8 earlycon=uart8250,mmio32,0x03100000";
+		stdout-path = "serial0:115200n8";
+	};
+
+	cbb@0 {
+		serial@3100000 {
+			status = "okay";
+		};
+
+		sdhci@3460000 {
+			status = "okay";
+			bus-width = <8>;
+			non-removable;
+			only-1-8-v;
+		};
+
+		rtc@c2a0000 {
+			status = "okay";
+		};
+
+		pmc@c360000 {
+			nvidia,invert-interrupt;
+		};
+	};
+};
diff --git a/arch/arm64/boot/dts/nvidia/tegra234.dtsi b/arch/arm64/boot/dts/nvidia/tegra234.dtsi
new file mode 100644
index 000000000000..3509687441a1
--- /dev/null
+++ b/arch/arm64/boot/dts/nvidia/tegra234.dtsi
@@ -0,0 +1,191 @@
+// SPDX-License-Identifier: GPL-2.0
+
+#include <dt-bindings/clock/tegra234-clock.h>
+#include <dt-bindings/interrupt-controller/arm-gic.h>
+#include <dt-bindings/mailbox/tegra186-hsp.h>
+#include <dt-bindings/reset/tegra234-reset.h>
+
+/ {
+	compatible = "nvidia,tegra234";
+	interrupt-parent = <&gic>;
+	#address-cells = <2>;
+	#size-cells = <2>;
+
+	bus@0 {
+		compatible = "simple-bus";
+		#address-cells = <1>;
+		#size-cells = <1>;
+
+		ranges = <0x0 0x0 0x0 0x40000000>;
+
+		misc@100000 {
+			compatible = "nvidia,tegra234-misc";
+			reg = <0x00100000 0xf000>,
+			      <0x0010f000 0x1000>;
+			status = "okay";
+		};
+
+		uarta: serial@3100000 {
+			compatible = "nvidia,tegra234-uart", "nvidia,tegra20-uart";
+			reg = <0x03100000 0x10000>;
+			interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&bpmp TEGRA234_CLK_UARTA>;
+			clock-names = "serial";
+			resets = <&bpmp TEGRA234_RESET_UARTA>;
+			reset-names = "serial";
+			status = "disabled";
+		};
+
+		mmc@3460000 {
+			compatible = "nvidia,tegra234-sdhci", "nvidia,tegra186-sdhci";
+			reg = <0x03460000 0x20000>;
+			interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&bpmp TEGRA234_CLK_SDMMC4>;
+			clock-names = "sdhci";
+			resets = <&bpmp TEGRA234_RESET_SDMMC4>;
+			reset-names = "sdhci";
+			dma-coherent;
+			status = "disabled";
+		};
+
+		fuse@3810000 {
+			compatible = "nvidia,tegra234-efuse";
+			reg = <0x03810000 0x10000>;
+			clocks = <&bpmp TEGRA234_CLK_FUSE>;
+			clock-names = "fuse";
+		};
+
+		hsp_top0: hsp@3c00000 {
+			compatible = "nvidia,tegra234-hsp", "nvidia,tegra194-hsp";
+			reg = <0x03c00000 0xa0000>;
+			interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
+			interrupt-names = "doorbell", "shared0", "shared1", "shared2",
+					  "shared3", "shared4", "shared5", "shared6",
+					  "shared7";
+			#mbox-cells = <2>;
+		};
+
+		hsp_aon: hsp@c150000 {
+			compatible = "nvidia,tegra234-hsp", "nvidia,tegra194-hsp";
+			reg = <0x0c150000 0x90000>;
+			interrupts = <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 134 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>;
+			/*
+			 * Shared interrupt 0 is routed only to AON/SPE, so
+			 * we only have 4 shared interrupts for the CCPLEX.
+			 */
+			interrupt-names = "shared1", "shared2", "shared3", "shared4";
+			#mbox-cells = <2>;
+		};
+
+		rtc@c2a0000 {
+			compatible = "nvidia,tegra234-rtc";
+			reg = <0x0c2a0000 0x10000>;
+			interrupt-parent = <&pmc>;
+			interrupts = <73 IRQ_TYPE_LEVEL_HIGH>;
+			status = "disabled";
+		};
+
+		pmc: pmc@c360000 {
+			compatible = "nvidia,tegra234-pmc";
+			reg = <0x0c360000 0x10000>,
+			      <0x0c370000 0x10000>,
+			      <0x0c380000 0x10000>,
+			      <0x0c390000 0x10000>,
+			      <0x0c3a0000 0x10000>;
+			reg-names = "pmc", "wake", "aotag", "scratch", "misc";
+
+			#interrupt-cells = <2>;
+			interrupt-controller;
+		};
+
+		gic: interrupt-controller@f400000 {
+			compatible = "arm,gic-v3";
+			reg = <0x0f400000 0x010000>, /* GICD */
+			      <0x0f440000 0x200000>; /* GICR */
+			interrupt-parent = <&gic>;
+			interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
+
+			#redistributor-regions = <1>;
+			#interrupt-cells = <3>;
+			interrupt-controller;
+		};
+	};
+
+	sysram@40000000 {
+		compatible = "nvidia,tegra234-sysram", "mmio-sram";
+		reg = <0x0 0x40000000 0x0 0x50000>;
+		#address-cells = <1>;
+		#size-cells = <1>;
+		ranges = <0x0 0x0 0x40000000 0x50000>;
+
+		cpu_bpmp_tx: shmem@4e000 {
+			compatible = "nvidia,tegra234-bpmp-shmem";
+			reg = <0x4e000 0x1000>;
+			label = "cpu-bpmp-tx";
+			pool;
+		};
+
+		cpu_bpmp_rx: shmem@4f000 {
+			compatible = "nvidia,tegra234-bpmp-shmem";
+			reg = <0x4f000 0x1000>;
+			label = "cpu-bpmp-rx";
+			pool;
+		};
+	};
+
+	bpmp: bpmp {
+		compatible = "nvidia,tegra234-bpmp", "nvidia,tegra186-bpmp";
+		mboxes = <&hsp_top0 TEGRA_HSP_MBOX_TYPE_DB
+				    TEGRA_HSP_DB_MASTER_BPMP>;
+		shmem = <&cpu_bpmp_tx &cpu_bpmp_rx>;
+		#clock-cells = <1>;
+		#reset-cells = <1>;
+		#power-domain-cells = <1>;
+
+		bpmp_i2c: i2c {
+			compatible = "nvidia,tegra186-bpmp-i2c";
+			nvidia,bpmp-bus-id = <5>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+		};
+	};
+
+	cpus {
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		cpu@0 {
+			device_type = "cpu";
+			reg = <0x000>;
+
+			enable-method = "psci";
+		};
+	};
+
+	psci {
+		compatible = "arm,psci-1.0";
+		status = "okay";
+		method = "smc";
+	};
+
+	timer {
+		compatible = "arm,armv8-timer";
+		interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
+			     <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
+			     <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
+			     <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
+		interrupt-parent = <&gic>;
+		always-on;
+	};
+};
diff --git a/drivers/soc/tegra/Kconfig b/drivers/soc/tegra/Kconfig
index 6bc603d0b9d9..976dee036470 100644
--- a/drivers/soc/tegra/Kconfig
+++ b/drivers/soc/tegra/Kconfig
@@ -119,6 +119,16 @@ config ARCH_TEGRA_194_SOC
 	help
 	  Enable support for the NVIDIA Tegra194 SoC.
 
+config ARCH_TEGRA_234_SOC
+	bool "NVIDIA Tegra234 SoC"
+	select MAILBOX
+	select TEGRA_BPMP
+	select TEGRA_HSP_MBOX
+	select TEGRA_IVC
+	select SOC_TEGRA_PMC
+	help
+	  Enable support for the NVIDIA Tegra234 SoC.
+
 endif
 endif
 
diff --git a/include/dt-bindings/clock/tegra234-clock.h b/include/dt-bindings/clock/tegra234-clock.h
new file mode 100644
index 000000000000..2c82072950ee
--- /dev/null
+++ b/include/dt-bindings/clock/tegra234-clock.h
@@ -0,0 +1,14 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/* Copyright (c) 2018-2019, NVIDIA CORPORATION. All rights reserved. */
+
+#ifndef DT_BINDINGS_CLOCK_TEGRA234_CLOCK_H
+#define DT_BINDINGS_CLOCK_TEGRA234_CLOCK_H
+
+/** @brief output of gate CLK_ENB_FUSE */
+#define TEGRA234_CLK_FUSE			40
+/** @brief output of mux controlled by CLK_RST_CONTROLLER_CLK_SOURCE_SDMMC4 */
+#define TEGRA234_CLK_SDMMC4			123
+/** @brief output of mux controlled by CLK_RST_CONTROLLER_CLK_SOURCE_UARTA */
+#define TEGRA234_CLK_UARTA			155
+
+#endif
diff --git a/include/dt-bindings/reset/tegra234-reset.h b/include/dt-bindings/reset/tegra234-reset.h
new file mode 100644
index 000000000000..b3c63be06d2d
--- /dev/null
+++ b/include/dt-bindings/reset/tegra234-reset.h
@@ -0,0 +1,10 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/* Copyright (c) 2018-2020, NVIDIA CORPORATION. All rights reserved. */
+
+#ifndef DT_BINDINGS_RESET_TEGRA234_RESET_H
+#define DT_BINDINGS_RESET_TEGRA234_RESET_H
+
+#define TEGRA234_RESET_SDMMC4			85
+#define TEGRA234_RESET_UARTA			100
+
+#endif
-- 
2.27.0


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Re: [PATCH 9/9] arm64: tegra: Initial Tegra234 VDK support

[Jon Hunter]

On 16/07/2020 15:18, Thierry Reding wrote:
> From: Thierry Reding <treding@nvidia.com>
> 
> The NVIDIA Tegra234 VDK is a simulation platform for the Orin SoC. It
> supports a subset of the peripherals that will be available in the final
> chip and serves as a bootstrapping platform.
> 
> Signed-off-by: Thierry Reding <treding@nvidia.com>
> ---
>  arch/arm64/boot/dts/nvidia/Makefile           |   1 +
>  .../boot/dts/nvidia/tegra234-sim-vdk.dts      |  40 ++++
>  arch/arm64/boot/dts/nvidia/tegra234.dtsi      | 191 ++++++++++++++++++
>  drivers/soc/tegra/Kconfig                     |  10 +
>  include/dt-bindings/clock/tegra234-clock.h    |  14 ++
>  include/dt-bindings/reset/tegra234-reset.h    |  10 +
>  6 files changed, 266 insertions(+)
>  create mode 100644 arch/arm64/boot/dts/nvidia/tegra234-sim-vdk.dts
>  create mode 100644 arch/arm64/boot/dts/nvidia/tegra234.dtsi
>  create mode 100644 include/dt-bindings/clock/tegra234-clock.h
>  create mode 100644 include/dt-bindings/reset/tegra234-reset.h
> 
> diff --git a/arch/arm64/boot/dts/nvidia/Makefile b/arch/arm64/boot/dts/nvidia/Makefile
> index 2273fc5db19c..9296d12d11e9 100644
> --- a/arch/arm64/boot/dts/nvidia/Makefile
> +++ b/arch/arm64/boot/dts/nvidia/Makefile
> @@ -9,3 +9,4 @@ dtb-$(CONFIG_ARCH_TEGRA_210_SOC) += tegra210-p2894-0050-a08.dtb
>  dtb-$(CONFIG_ARCH_TEGRA_186_SOC) += tegra186-p2771-0000.dtb
>  dtb-$(CONFIG_ARCH_TEGRA_194_SOC) += tegra194-p2972-0000.dtb
>  dtb-$(CONFIG_ARCH_TEGRA_194_SOC) += tegra194-p3509-0000+p3668-0000.dtb
> +dtb-$(CONFIG_ARCH_TEGRA_234_SOC) += tegra234-sim-vdk.dtb
> diff --git a/arch/arm64/boot/dts/nvidia/tegra234-sim-vdk.dts b/arch/arm64/boot/dts/nvidia/tegra234-sim-vdk.dts
> new file mode 100644
> index 000000000000..f6e6a24829af
> --- /dev/null
> +++ b/arch/arm64/boot/dts/nvidia/tegra234-sim-vdk.dts
> @@ -0,0 +1,40 @@
> +// SPDX-License-Identifier: GPL-2.0
> +/dts-v1/;
> +
> +#include "tegra234.dtsi"
> +
> +/ {
> +	model = "NVIDIA Tegra234 VDK";
> +	compatible = "nvidia,tegra234-vdk", "nvidia,tegra234";
> +
> +	aliases {
> +		sdhci3 = "/cbb@0/sdhci@3460000";
> +		serial0 = &uarta;
> +	};
> +
> +	chosen {
> +		bootargs = "console=ttyS0,115200n8 earlycon=uart8250,mmio32,0x03100000";
> +		stdout-path = "serial0:115200n8";
> +	};
> +
> +	cbb@0 {
> +		serial@3100000 {
> +			status = "okay";
> +		};
> +
> +		sdhci@3460000 {
> +			status = "okay";
> +			bus-width = <8>;
> +			non-removable;
> +			only-1-8-v;
> +		};
> +
> +		rtc@c2a0000 {
> +			status = "okay";
> +		};
> +
> +		pmc@c360000 {
> +			nvidia,invert-interrupt;
> +		};
> +	};
> +};
> diff --git a/arch/arm64/boot/dts/nvidia/tegra234.dtsi b/arch/arm64/boot/dts/nvidia/tegra234.dtsi
> new file mode 100644
> index 000000000000..3509687441a1
> --- /dev/null
> +++ b/arch/arm64/boot/dts/nvidia/tegra234.dtsi
> @@ -0,0 +1,191 @@
> +// SPDX-License-Identifier: GPL-2.0
> +
> +#include <dt-bindings/clock/tegra234-clock.h>
> +#include <dt-bindings/interrupt-controller/arm-gic.h>
> +#include <dt-bindings/mailbox/tegra186-hsp.h>
> +#include <dt-bindings/reset/tegra234-reset.h>
> +
> +/ {
> +	compatible = "nvidia,tegra234";
> +	interrupt-parent = <&gic>;
> +	#address-cells = <2>;
> +	#size-cells = <2>;
> +
> +	bus@0 {
> +		compatible = "simple-bus";
> +		#address-cells = <1>;
> +		#size-cells = <1>;
> +
> +		ranges = <0x0 0x0 0x0 0x40000000>;
> +
> +		misc@100000 {
> +			compatible = "nvidia,tegra234-misc";
> +			reg = <0x00100000 0xf000>,
> +			      <0x0010f000 0x1000>;
> +			status = "okay";
> +		};


Is there meant to be a fallback option here, because I don't see
anything to match the above compatible string?

Cheers
Jon

-- 
nvpublic

Re: [PATCH 9/9] arm64: tegra: Initial Tegra234 VDK support

[Jon Hunter]

On 16/07/2020 15:18, Thierry Reding wrote:
> From: Thierry Reding <treding@nvidia.com>
> 
> The NVIDIA Tegra234 VDK is a simulation platform for the Orin SoC. It
> supports a subset of the peripherals that will be available in the final
> chip and serves as a bootstrapping platform.
> 
> Signed-off-by: Thierry Reding <treding@nvidia.com>
> ---
>  arch/arm64/boot/dts/nvidia/Makefile           |   1 +
>  .../boot/dts/nvidia/tegra234-sim-vdk.dts      |  40 ++++
>  arch/arm64/boot/dts/nvidia/tegra234.dtsi      | 191 ++++++++++++++++++
>  drivers/soc/tegra/Kconfig                     |  10 +
>  include/dt-bindings/clock/tegra234-clock.h    |  14 ++
>  include/dt-bindings/reset/tegra234-reset.h    |  10 +
>  6 files changed, 266 insertions(+)
>  create mode 100644 arch/arm64/boot/dts/nvidia/tegra234-sim-vdk.dts
>  create mode 100644 arch/arm64/boot/dts/nvidia/tegra234.dtsi
>  create mode 100644 include/dt-bindings/clock/tegra234-clock.h
>  create mode 100644 include/dt-bindings/reset/tegra234-reset.h
> 
> diff --git a/arch/arm64/boot/dts/nvidia/Makefile b/arch/arm64/boot/dts/nvidia/Makefile
> index 2273fc5db19c..9296d12d11e9 100644
> --- a/arch/arm64/boot/dts/nvidia/Makefile
> +++ b/arch/arm64/boot/dts/nvidia/Makefile
> @@ -9,3 +9,4 @@ dtb-$(CONFIG_ARCH_TEGRA_210_SOC) += tegra210-p2894-0050-a08.dtb
>  dtb-$(CONFIG_ARCH_TEGRA_186_SOC) += tegra186-p2771-0000.dtb
>  dtb-$(CONFIG_ARCH_TEGRA_194_SOC) += tegra194-p2972-0000.dtb
>  dtb-$(CONFIG_ARCH_TEGRA_194_SOC) += tegra194-p3509-0000+p3668-0000.dtb
> +dtb-$(CONFIG_ARCH_TEGRA_234_SOC) += tegra234-sim-vdk.dtb
> diff --git a/arch/arm64/boot/dts/nvidia/tegra234-sim-vdk.dts b/arch/arm64/boot/dts/nvidia/tegra234-sim-vdk.dts
> new file mode 100644
> index 000000000000..f6e6a24829af
> --- /dev/null
> +++ b/arch/arm64/boot/dts/nvidia/tegra234-sim-vdk.dts
> @@ -0,0 +1,40 @@
> +// SPDX-License-Identifier: GPL-2.0
> +/dts-v1/;
> +
> +#include "tegra234.dtsi"
> +
> +/ {
> +	model = "NVIDIA Tegra234 VDK";
> +	compatible = "nvidia,tegra234-vdk", "nvidia,tegra234";
> +
> +	aliases {
> +		sdhci3 = "/cbb@0/sdhci@3460000";
> +		serial0 = &uarta;
> +	};
> +
> +	chosen {
> +		bootargs = "console=ttyS0,115200n8 earlycon=uart8250,mmio32,0x03100000";
> +		stdout-path = "serial0:115200n8";
> +	};
> +
> +	cbb@0 {
> +		serial@3100000 {
> +			status = "okay";
> +		};
> +
> +		sdhci@3460000 {
> +			status = "okay";
> +			bus-width = <8>;
> +			non-removable;
> +			only-1-8-v;
> +		};
> +
> +		rtc@c2a0000 {
> +			status = "okay";
> +		};
> +
> +		pmc@c360000 {
> +			nvidia,invert-interrupt;
> +		};
> +	};
> +};
> diff --git a/arch/arm64/boot/dts/nvidia/tegra234.dtsi b/arch/arm64/boot/dts/nvidia/tegra234.dtsi
> new file mode 100644
> index 000000000000..3509687441a1
> --- /dev/null
> +++ b/arch/arm64/boot/dts/nvidia/tegra234.dtsi
> @@ -0,0 +1,191 @@
> +// SPDX-License-Identifier: GPL-2.0
> +
> +#include <dt-bindings/clock/tegra234-clock.h>
> +#include <dt-bindings/interrupt-controller/arm-gic.h>
> +#include <dt-bindings/mailbox/tegra186-hsp.h>
> +#include <dt-bindings/reset/tegra234-reset.h>
> +
> +/ {
> +	compatible = "nvidia,tegra234";
> +	interrupt-parent = <&gic>;
> +	#address-cells = <2>;
> +	#size-cells = <2>;
> +
> +	bus@0 {
> +		compatible = "simple-bus";
> +		#address-cells = <1>;
> +		#size-cells = <1>;
> +
> +		ranges = <0x0 0x0 0x0 0x40000000>;
> +
> +		misc@100000 {
> +			compatible = "nvidia,tegra234-misc";
> +			reg = <0x00100000 0xf000>,
> +			      <0x0010f000 0x1000>;
> +			status = "okay";
> +		};


Is there meant to be a fallback option here, because I don't see
anything to match the above compatible string?

Cheers
Jon

-- 
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Re: [PATCH 9/9] arm64: tegra: Initial Tegra234 VDK support

[Thierry Reding]

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On Mon, Sep 07, 2020 at 08:46:48PM +0100, Jon Hunter wrote:
> 
> On 16/07/2020 15:18, Thierry Reding wrote:
> > From: Thierry Reding <treding@nvidia.com>
> > 
> > The NVIDIA Tegra234 VDK is a simulation platform for the Orin SoC. It
> > supports a subset of the peripherals that will be available in the final
> > chip and serves as a bootstrapping platform.
> > 
> > Signed-off-by: Thierry Reding <treding@nvidia.com>
> > ---
> >  arch/arm64/boot/dts/nvidia/Makefile           |   1 +
> >  .../boot/dts/nvidia/tegra234-sim-vdk.dts      |  40 ++++
> >  arch/arm64/boot/dts/nvidia/tegra234.dtsi      | 191 ++++++++++++++++++
> >  drivers/soc/tegra/Kconfig                     |  10 +
> >  include/dt-bindings/clock/tegra234-clock.h    |  14 ++
> >  include/dt-bindings/reset/tegra234-reset.h    |  10 +
> >  6 files changed, 266 insertions(+)
> >  create mode 100644 arch/arm64/boot/dts/nvidia/tegra234-sim-vdk.dts
> >  create mode 100644 arch/arm64/boot/dts/nvidia/tegra234.dtsi
> >  create mode 100644 include/dt-bindings/clock/tegra234-clock.h
> >  create mode 100644 include/dt-bindings/reset/tegra234-reset.h
> > 
> > diff --git a/arch/arm64/boot/dts/nvidia/Makefile b/arch/arm64/boot/dts/nvidia/Makefile
> > index 2273fc5db19c..9296d12d11e9 100644
> > --- a/arch/arm64/boot/dts/nvidia/Makefile
> > +++ b/arch/arm64/boot/dts/nvidia/Makefile
> > @@ -9,3 +9,4 @@ dtb-$(CONFIG_ARCH_TEGRA_210_SOC) += tegra210-p2894-0050-a08.dtb
> >  dtb-$(CONFIG_ARCH_TEGRA_186_SOC) += tegra186-p2771-0000.dtb
> >  dtb-$(CONFIG_ARCH_TEGRA_194_SOC) += tegra194-p2972-0000.dtb
> >  dtb-$(CONFIG_ARCH_TEGRA_194_SOC) += tegra194-p3509-0000+p3668-0000.dtb
> > +dtb-$(CONFIG_ARCH_TEGRA_234_SOC) += tegra234-sim-vdk.dtb
> > diff --git a/arch/arm64/boot/dts/nvidia/tegra234-sim-vdk.dts b/arch/arm64/boot/dts/nvidia/tegra234-sim-vdk.dts
> > new file mode 100644
> > index 000000000000..f6e6a24829af
> > --- /dev/null
> > +++ b/arch/arm64/boot/dts/nvidia/tegra234-sim-vdk.dts
> > @@ -0,0 +1,40 @@
> > +// SPDX-License-Identifier: GPL-2.0
> > +/dts-v1/;
> > +
> > +#include "tegra234.dtsi"
> > +
> > +/ {
> > +	model = "NVIDIA Tegra234 VDK";
> > +	compatible = "nvidia,tegra234-vdk", "nvidia,tegra234";
> > +
> > +	aliases {
> > +		sdhci3 = "/cbb@0/sdhci@3460000";
> > +		serial0 = &uarta;
> > +	};
> > +
> > +	chosen {
> > +		bootargs = "console=ttyS0,115200n8 earlycon=uart8250,mmio32,0x03100000";
> > +		stdout-path = "serial0:115200n8";
> > +	};
> > +
> > +	cbb@0 {
> > +		serial@3100000 {
> > +			status = "okay";
> > +		};
> > +
> > +		sdhci@3460000 {
> > +			status = "okay";
> > +			bus-width = <8>;
> > +			non-removable;
> > +			only-1-8-v;
> > +		};
> > +
> > +		rtc@c2a0000 {
> > +			status = "okay";
> > +		};
> > +
> > +		pmc@c360000 {
> > +			nvidia,invert-interrupt;
> > +		};
> > +	};
> > +};
> > diff --git a/arch/arm64/boot/dts/nvidia/tegra234.dtsi b/arch/arm64/boot/dts/nvidia/tegra234.dtsi
> > new file mode 100644
> > index 000000000000..3509687441a1
> > --- /dev/null
> > +++ b/arch/arm64/boot/dts/nvidia/tegra234.dtsi
> > @@ -0,0 +1,191 @@
> > +// SPDX-License-Identifier: GPL-2.0
> > +
> > +#include <dt-bindings/clock/tegra234-clock.h>
> > +#include <dt-bindings/interrupt-controller/arm-gic.h>
> > +#include <dt-bindings/mailbox/tegra186-hsp.h>
> > +#include <dt-bindings/reset/tegra234-reset.h>
> > +
> > +/ {
> > +	compatible = "nvidia,tegra234";
> > +	interrupt-parent = <&gic>;
> > +	#address-cells = <2>;
> > +	#size-cells = <2>;
> > +
> > +	bus@0 {
> > +		compatible = "simple-bus";
> > +		#address-cells = <1>;
> > +		#size-cells = <1>;
> > +
> > +		ranges = <0x0 0x0 0x0 0x40000000>;
> > +
> > +		misc@100000 {
> > +			compatible = "nvidia,tegra234-misc";
> > +			reg = <0x00100000 0xf000>,
> > +			      <0x0010f000 0x1000>;
> > +			status = "okay";
> > +		};
> 
> 
> Is there meant to be a fallback option here, because I don't see
> anything to match the above compatible string?

I've got the below patch in my tree that's meant to add that code, but
it's in the wrong order in my local branch, so it didn't make it into
this subset. I'll reorder the patches to include the APBMISC support
patch in this series.

While this block is generally very similar, there are enough variations
for them not to count as compatible, in my opinion, so I don't think
adding a fallback is the right option.

Thierry

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Re: [PATCH 9/9] arm64: tegra: Initial Tegra234 VDK support

[Thierry Reding]

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On Mon, Sep 07, 2020 at 08:46:48PM +0100, Jon Hunter wrote:
> 
> On 16/07/2020 15:18, Thierry Reding wrote:
> > From: Thierry Reding <treding@nvidia.com>
> > 
> > The NVIDIA Tegra234 VDK is a simulation platform for the Orin SoC. It
> > supports a subset of the peripherals that will be available in the final
> > chip and serves as a bootstrapping platform.
> > 
> > Signed-off-by: Thierry Reding <treding@nvidia.com>
> > ---
> >  arch/arm64/boot/dts/nvidia/Makefile           |   1 +
> >  .../boot/dts/nvidia/tegra234-sim-vdk.dts      |  40 ++++
> >  arch/arm64/boot/dts/nvidia/tegra234.dtsi      | 191 ++++++++++++++++++
> >  drivers/soc/tegra/Kconfig                     |  10 +
> >  include/dt-bindings/clock/tegra234-clock.h    |  14 ++
> >  include/dt-bindings/reset/tegra234-reset.h    |  10 +
> >  6 files changed, 266 insertions(+)
> >  create mode 100644 arch/arm64/boot/dts/nvidia/tegra234-sim-vdk.dts
> >  create mode 100644 arch/arm64/boot/dts/nvidia/tegra234.dtsi
> >  create mode 100644 include/dt-bindings/clock/tegra234-clock.h
> >  create mode 100644 include/dt-bindings/reset/tegra234-reset.h
> > 
> > diff --git a/arch/arm64/boot/dts/nvidia/Makefile b/arch/arm64/boot/dts/nvidia/Makefile
> > index 2273fc5db19c..9296d12d11e9 100644
> > --- a/arch/arm64/boot/dts/nvidia/Makefile
> > +++ b/arch/arm64/boot/dts/nvidia/Makefile
> > @@ -9,3 +9,4 @@ dtb-$(CONFIG_ARCH_TEGRA_210_SOC) += tegra210-p2894-0050-a08.dtb
> >  dtb-$(CONFIG_ARCH_TEGRA_186_SOC) += tegra186-p2771-0000.dtb
> >  dtb-$(CONFIG_ARCH_TEGRA_194_SOC) += tegra194-p2972-0000.dtb
> >  dtb-$(CONFIG_ARCH_TEGRA_194_SOC) += tegra194-p3509-0000+p3668-0000.dtb
> > +dtb-$(CONFIG_ARCH_TEGRA_234_SOC) += tegra234-sim-vdk.dtb
> > diff --git a/arch/arm64/boot/dts/nvidia/tegra234-sim-vdk.dts b/arch/arm64/boot/dts/nvidia/tegra234-sim-vdk.dts
> > new file mode 100644
> > index 000000000000..f6e6a24829af
> > --- /dev/null
> > +++ b/arch/arm64/boot/dts/nvidia/tegra234-sim-vdk.dts
> > @@ -0,0 +1,40 @@
> > +// SPDX-License-Identifier: GPL-2.0
> > +/dts-v1/;
> > +
> > +#include "tegra234.dtsi"
> > +
> > +/ {
> > +	model = "NVIDIA Tegra234 VDK";
> > +	compatible = "nvidia,tegra234-vdk", "nvidia,tegra234";
> > +
> > +	aliases {
> > +		sdhci3 = "/cbb@0/sdhci@3460000";
> > +		serial0 = &uarta;
> > +	};
> > +
> > +	chosen {
> > +		bootargs = "console=ttyS0,115200n8 earlycon=uart8250,mmio32,0x03100000";
> > +		stdout-path = "serial0:115200n8";
> > +	};
> > +
> > +	cbb@0 {
> > +		serial@3100000 {
> > +			status = "okay";
> > +		};
> > +
> > +		sdhci@3460000 {
> > +			status = "okay";
> > +			bus-width = <8>;
> > +			non-removable;
> > +			only-1-8-v;
> > +		};
> > +
> > +		rtc@c2a0000 {
> > +			status = "okay";
> > +		};
> > +
> > +		pmc@c360000 {
> > +			nvidia,invert-interrupt;
> > +		};
> > +	};
> > +};
> > diff --git a/arch/arm64/boot/dts/nvidia/tegra234.dtsi b/arch/arm64/boot/dts/nvidia/tegra234.dtsi
> > new file mode 100644
> > index 000000000000..3509687441a1
> > --- /dev/null
> > +++ b/arch/arm64/boot/dts/nvidia/tegra234.dtsi
> > @@ -0,0 +1,191 @@
> > +// SPDX-License-Identifier: GPL-2.0
> > +
> > +#include <dt-bindings/clock/tegra234-clock.h>
> > +#include <dt-bindings/interrupt-controller/arm-gic.h>
> > +#include <dt-bindings/mailbox/tegra186-hsp.h>
> > +#include <dt-bindings/reset/tegra234-reset.h>
> > +
> > +/ {
> > +	compatible = "nvidia,tegra234";
> > +	interrupt-parent = <&gic>;
> > +	#address-cells = <2>;
> > +	#size-cells = <2>;
> > +
> > +	bus@0 {
> > +		compatible = "simple-bus";
> > +		#address-cells = <1>;
> > +		#size-cells = <1>;
> > +
> > +		ranges = <0x0 0x0 0x0 0x40000000>;
> > +
> > +		misc@100000 {
> > +			compatible = "nvidia,tegra234-misc";
> > +			reg = <0x00100000 0xf000>,
> > +			      <0x0010f000 0x1000>;
> > +			status = "okay";
> > +		};
> 
> 
> Is there meant to be a fallback option here, because I don't see
> anything to match the above compatible string?

I've got the below patch in my tree that's meant to add that code, but
it's in the wrong order in my local branch, so it didn't make it into
this subset. I'll reorder the patches to include the APBMISC support
patch in this series.

While this block is generally very similar, there are enough variations
for them not to count as compatible, in my opinion, so I don't think
adding a fallback is the right option.

Thierry

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Re: [PATCH 9/9] arm64: tegra: Initial Tegra234 VDK support

[Jon Hunter]

On 15/09/2020 13:44, Thierry Reding wrote:
> On Mon, Sep 07, 2020 at 08:46:48PM +0100, Jon Hunter wrote:
>>
>> On 16/07/2020 15:18, Thierry Reding wrote:
>>> From: Thierry Reding <treding@nvidia.com>
>>>
>>> The NVIDIA Tegra234 VDK is a simulation platform for the Orin SoC. It
>>> supports a subset of the peripherals that will be available in the final
>>> chip and serves as a bootstrapping platform.
>>>
>>> Signed-off-by: Thierry Reding <treding@nvidia.com>
>>> ---
>>>  arch/arm64/boot/dts/nvidia/Makefile           |   1 +
>>>  .../boot/dts/nvidia/tegra234-sim-vdk.dts      |  40 ++++
>>>  arch/arm64/boot/dts/nvidia/tegra234.dtsi      | 191 ++++++++++++++++++
>>>  drivers/soc/tegra/Kconfig                     |  10 +
>>>  include/dt-bindings/clock/tegra234-clock.h    |  14 ++
>>>  include/dt-bindings/reset/tegra234-reset.h    |  10 +
>>>  6 files changed, 266 insertions(+)
>>>  create mode 100644 arch/arm64/boot/dts/nvidia/tegra234-sim-vdk.dts
>>>  create mode 100644 arch/arm64/boot/dts/nvidia/tegra234.dtsi
>>>  create mode 100644 include/dt-bindings/clock/tegra234-clock.h
>>>  create mode 100644 include/dt-bindings/reset/tegra234-reset.h
>>>
>>> diff --git a/arch/arm64/boot/dts/nvidia/Makefile b/arch/arm64/boot/dts/nvidia/Makefile
>>> index 2273fc5db19c..9296d12d11e9 100644
>>> --- a/arch/arm64/boot/dts/nvidia/Makefile
>>> +++ b/arch/arm64/boot/dts/nvidia/Makefile
>>> @@ -9,3 +9,4 @@ dtb-$(CONFIG_ARCH_TEGRA_210_SOC) += tegra210-p2894-0050-a08.dtb
>>>  dtb-$(CONFIG_ARCH_TEGRA_186_SOC) += tegra186-p2771-0000.dtb
>>>  dtb-$(CONFIG_ARCH_TEGRA_194_SOC) += tegra194-p2972-0000.dtb
>>>  dtb-$(CONFIG_ARCH_TEGRA_194_SOC) += tegra194-p3509-0000+p3668-0000.dtb
>>> +dtb-$(CONFIG_ARCH_TEGRA_234_SOC) += tegra234-sim-vdk.dtb
>>> diff --git a/arch/arm64/boot/dts/nvidia/tegra234-sim-vdk.dts b/arch/arm64/boot/dts/nvidia/tegra234-sim-vdk.dts
>>> new file mode 100644
>>> index 000000000000..f6e6a24829af
>>> --- /dev/null
>>> +++ b/arch/arm64/boot/dts/nvidia/tegra234-sim-vdk.dts
>>> @@ -0,0 +1,40 @@
>>> +// SPDX-License-Identifier: GPL-2.0
>>> +/dts-v1/;
>>> +
>>> +#include "tegra234.dtsi"
>>> +
>>> +/ {
>>> +	model = "NVIDIA Tegra234 VDK";
>>> +	compatible = "nvidia,tegra234-vdk", "nvidia,tegra234";
>>> +
>>> +	aliases {
>>> +		sdhci3 = "/cbb@0/sdhci@3460000";
>>> +		serial0 = &uarta;
>>> +	};
>>> +
>>> +	chosen {
>>> +		bootargs = "console=ttyS0,115200n8 earlycon=uart8250,mmio32,0x03100000";
>>> +		stdout-path = "serial0:115200n8";
>>> +	};
>>> +
>>> +	cbb@0 {
>>> +		serial@3100000 {
>>> +			status = "okay";
>>> +		};
>>> +
>>> +		sdhci@3460000 {
>>> +			status = "okay";
>>> +			bus-width = <8>;
>>> +			non-removable;
>>> +			only-1-8-v;
>>> +		};
>>> +
>>> +		rtc@c2a0000 {
>>> +			status = "okay";
>>> +		};
>>> +
>>> +		pmc@c360000 {
>>> +			nvidia,invert-interrupt;
>>> +		};
>>> +	};
>>> +};
>>> diff --git a/arch/arm64/boot/dts/nvidia/tegra234.dtsi b/arch/arm64/boot/dts/nvidia/tegra234.dtsi
>>> new file mode 100644
>>> index 000000000000..3509687441a1
>>> --- /dev/null
>>> +++ b/arch/arm64/boot/dts/nvidia/tegra234.dtsi
>>> @@ -0,0 +1,191 @@
>>> +// SPDX-License-Identifier: GPL-2.0
>>> +
>>> +#include <dt-bindings/clock/tegra234-clock.h>
>>> +#include <dt-bindings/interrupt-controller/arm-gic.h>
>>> +#include <dt-bindings/mailbox/tegra186-hsp.h>
>>> +#include <dt-bindings/reset/tegra234-reset.h>
>>> +
>>> +/ {
>>> +	compatible = "nvidia,tegra234";
>>> +	interrupt-parent = <&gic>;
>>> +	#address-cells = <2>;
>>> +	#size-cells = <2>;
>>> +
>>> +	bus@0 {
>>> +		compatible = "simple-bus";
>>> +		#address-cells = <1>;
>>> +		#size-cells = <1>;
>>> +
>>> +		ranges = <0x0 0x0 0x0 0x40000000>;
>>> +
>>> +		misc@100000 {
>>> +			compatible = "nvidia,tegra234-misc";
>>> +			reg = <0x00100000 0xf000>,
>>> +			      <0x0010f000 0x1000>;
>>> +			status = "okay";
>>> +		};
>>
>>
>> Is there meant to be a fallback option here, because I don't see
>> anything to match the above compatible string?
> 
> I've got the below patch in my tree that's meant to add that code, but
> it's in the wrong order in my local branch, so it didn't make it into
> this subset. I'll reorder the patches to include the APBMISC support
> patch in this series.

OK, I think that the same also applies to efuse, pmc, rtc and bpmp-shmem
from looking at this patch.

Jon

-- 
nvpublic

Re: [PATCH 9/9] arm64: tegra: Initial Tegra234 VDK support

[Jon Hunter]

On 15/09/2020 13:44, Thierry Reding wrote:
> On Mon, Sep 07, 2020 at 08:46:48PM +0100, Jon Hunter wrote:
>>
>> On 16/07/2020 15:18, Thierry Reding wrote:
>>> From: Thierry Reding <treding@nvidia.com>
>>>
>>> The NVIDIA Tegra234 VDK is a simulation platform for the Orin SoC. It
>>> supports a subset of the peripherals that will be available in the final
>>> chip and serves as a bootstrapping platform.
>>>
>>> Signed-off-by: Thierry Reding <treding@nvidia.com>
>>> ---
>>>  arch/arm64/boot/dts/nvidia/Makefile           |   1 +
>>>  .../boot/dts/nvidia/tegra234-sim-vdk.dts      |  40 ++++
>>>  arch/arm64/boot/dts/nvidia/tegra234.dtsi      | 191 ++++++++++++++++++
>>>  drivers/soc/tegra/Kconfig                     |  10 +
>>>  include/dt-bindings/clock/tegra234-clock.h    |  14 ++
>>>  include/dt-bindings/reset/tegra234-reset.h    |  10 +
>>>  6 files changed, 266 insertions(+)
>>>  create mode 100644 arch/arm64/boot/dts/nvidia/tegra234-sim-vdk.dts
>>>  create mode 100644 arch/arm64/boot/dts/nvidia/tegra234.dtsi
>>>  create mode 100644 include/dt-bindings/clock/tegra234-clock.h
>>>  create mode 100644 include/dt-bindings/reset/tegra234-reset.h
>>>
>>> diff --git a/arch/arm64/boot/dts/nvidia/Makefile b/arch/arm64/boot/dts/nvidia/Makefile
>>> index 2273fc5db19c..9296d12d11e9 100644
>>> --- a/arch/arm64/boot/dts/nvidia/Makefile
>>> +++ b/arch/arm64/boot/dts/nvidia/Makefile
>>> @@ -9,3 +9,4 @@ dtb-$(CONFIG_ARCH_TEGRA_210_SOC) += tegra210-p2894-0050-a08.dtb
>>>  dtb-$(CONFIG_ARCH_TEGRA_186_SOC) += tegra186-p2771-0000.dtb
>>>  dtb-$(CONFIG_ARCH_TEGRA_194_SOC) += tegra194-p2972-0000.dtb
>>>  dtb-$(CONFIG_ARCH_TEGRA_194_SOC) += tegra194-p3509-0000+p3668-0000.dtb
>>> +dtb-$(CONFIG_ARCH_TEGRA_234_SOC) += tegra234-sim-vdk.dtb
>>> diff --git a/arch/arm64/boot/dts/nvidia/tegra234-sim-vdk.dts b/arch/arm64/boot/dts/nvidia/tegra234-sim-vdk.dts
>>> new file mode 100644
>>> index 000000000000..f6e6a24829af
>>> --- /dev/null
>>> +++ b/arch/arm64/boot/dts/nvidia/tegra234-sim-vdk.dts
>>> @@ -0,0 +1,40 @@
>>> +// SPDX-License-Identifier: GPL-2.0
>>> +/dts-v1/;
>>> +
>>> +#include "tegra234.dtsi"
>>> +
>>> +/ {
>>> +	model = "NVIDIA Tegra234 VDK";
>>> +	compatible = "nvidia,tegra234-vdk", "nvidia,tegra234";
>>> +
>>> +	aliases {
>>> +		sdhci3 = "/cbb@0/sdhci@3460000";
>>> +		serial0 = &uarta;
>>> +	};
>>> +
>>> +	chosen {
>>> +		bootargs = "console=ttyS0,115200n8 earlycon=uart8250,mmio32,0x03100000";
>>> +		stdout-path = "serial0:115200n8";
>>> +	};
>>> +
>>> +	cbb@0 {
>>> +		serial@3100000 {
>>> +			status = "okay";
>>> +		};
>>> +
>>> +		sdhci@3460000 {
>>> +			status = "okay";
>>> +			bus-width = <8>;
>>> +			non-removable;
>>> +			only-1-8-v;
>>> +		};
>>> +
>>> +		rtc@c2a0000 {
>>> +			status = "okay";
>>> +		};
>>> +
>>> +		pmc@c360000 {
>>> +			nvidia,invert-interrupt;
>>> +		};
>>> +	};
>>> +};
>>> diff --git a/arch/arm64/boot/dts/nvidia/tegra234.dtsi b/arch/arm64/boot/dts/nvidia/tegra234.dtsi
>>> new file mode 100644
>>> index 000000000000..3509687441a1
>>> --- /dev/null
>>> +++ b/arch/arm64/boot/dts/nvidia/tegra234.dtsi
>>> @@ -0,0 +1,191 @@
>>> +// SPDX-License-Identifier: GPL-2.0
>>> +
>>> +#include <dt-bindings/clock/tegra234-clock.h>
>>> +#include <dt-bindings/interrupt-controller/arm-gic.h>
>>> +#include <dt-bindings/mailbox/tegra186-hsp.h>
>>> +#include <dt-bindings/reset/tegra234-reset.h>
>>> +
>>> +/ {
>>> +	compatible = "nvidia,tegra234";
>>> +	interrupt-parent = <&gic>;
>>> +	#address-cells = <2>;
>>> +	#size-cells = <2>;
>>> +
>>> +	bus@0 {
>>> +		compatible = "simple-bus";
>>> +		#address-cells = <1>;
>>> +		#size-cells = <1>;
>>> +
>>> +		ranges = <0x0 0x0 0x0 0x40000000>;
>>> +
>>> +		misc@100000 {
>>> +			compatible = "nvidia,tegra234-misc";
>>> +			reg = <0x00100000 0xf000>,
>>> +			      <0x0010f000 0x1000>;
>>> +			status = "okay";
>>> +		};
>>
>>
>> Is there meant to be a fallback option here, because I don't see
>> anything to match the above compatible string?
> 
> I've got the below patch in my tree that's meant to add that code, but
> it's in the wrong order in my local branch, so it didn't make it into
> this subset. I'll reorder the patches to include the APBMISC support
> patch in this series.

OK, I think that the same also applies to efuse, pmc, rtc and bpmp-shmem
from looking at this patch.

Jon

-- 
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Re: [PATCH 9/9] arm64: tegra: Initial Tegra234 VDK support

[Thierry Reding]

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On Tue, Sep 15, 2020 at 02:17:39PM +0100, Jon Hunter wrote:
> 
> 
> On 15/09/2020 13:44, Thierry Reding wrote:
> > On Mon, Sep 07, 2020 at 08:46:48PM +0100, Jon Hunter wrote:
> >>
> >> On 16/07/2020 15:18, Thierry Reding wrote:
> >>> From: Thierry Reding <treding@nvidia.com>
> >>>
> >>> The NVIDIA Tegra234 VDK is a simulation platform for the Orin SoC. It
> >>> supports a subset of the peripherals that will be available in the final
> >>> chip and serves as a bootstrapping platform.
> >>>
> >>> Signed-off-by: Thierry Reding <treding@nvidia.com>
> >>> ---
> >>>  arch/arm64/boot/dts/nvidia/Makefile           |   1 +
> >>>  .../boot/dts/nvidia/tegra234-sim-vdk.dts      |  40 ++++
> >>>  arch/arm64/boot/dts/nvidia/tegra234.dtsi      | 191 ++++++++++++++++++
> >>>  drivers/soc/tegra/Kconfig                     |  10 +
> >>>  include/dt-bindings/clock/tegra234-clock.h    |  14 ++
> >>>  include/dt-bindings/reset/tegra234-reset.h    |  10 +
> >>>  6 files changed, 266 insertions(+)
> >>>  create mode 100644 arch/arm64/boot/dts/nvidia/tegra234-sim-vdk.dts
> >>>  create mode 100644 arch/arm64/boot/dts/nvidia/tegra234.dtsi
> >>>  create mode 100644 include/dt-bindings/clock/tegra234-clock.h
> >>>  create mode 100644 include/dt-bindings/reset/tegra234-reset.h
> >>>
> >>> diff --git a/arch/arm64/boot/dts/nvidia/Makefile b/arch/arm64/boot/dts/nvidia/Makefile
> >>> index 2273fc5db19c..9296d12d11e9 100644
> >>> --- a/arch/arm64/boot/dts/nvidia/Makefile
> >>> +++ b/arch/arm64/boot/dts/nvidia/Makefile
> >>> @@ -9,3 +9,4 @@ dtb-$(CONFIG_ARCH_TEGRA_210_SOC) += tegra210-p2894-0050-a08.dtb
> >>>  dtb-$(CONFIG_ARCH_TEGRA_186_SOC) += tegra186-p2771-0000.dtb
> >>>  dtb-$(CONFIG_ARCH_TEGRA_194_SOC) += tegra194-p2972-0000.dtb
> >>>  dtb-$(CONFIG_ARCH_TEGRA_194_SOC) += tegra194-p3509-0000+p3668-0000.dtb
> >>> +dtb-$(CONFIG_ARCH_TEGRA_234_SOC) += tegra234-sim-vdk.dtb
> >>> diff --git a/arch/arm64/boot/dts/nvidia/tegra234-sim-vdk.dts b/arch/arm64/boot/dts/nvidia/tegra234-sim-vdk.dts
> >>> new file mode 100644
> >>> index 000000000000..f6e6a24829af
> >>> --- /dev/null
> >>> +++ b/arch/arm64/boot/dts/nvidia/tegra234-sim-vdk.dts
> >>> @@ -0,0 +1,40 @@
> >>> +// SPDX-License-Identifier: GPL-2.0
> >>> +/dts-v1/;
> >>> +
> >>> +#include "tegra234.dtsi"
> >>> +
> >>> +/ {
> >>> +	model = "NVIDIA Tegra234 VDK";
> >>> +	compatible = "nvidia,tegra234-vdk", "nvidia,tegra234";
> >>> +
> >>> +	aliases {
> >>> +		sdhci3 = "/cbb@0/sdhci@3460000";
> >>> +		serial0 = &uarta;
> >>> +	};
> >>> +
> >>> +	chosen {
> >>> +		bootargs = "console=ttyS0,115200n8 earlycon=uart8250,mmio32,0x03100000";
> >>> +		stdout-path = "serial0:115200n8";
> >>> +	};
> >>> +
> >>> +	cbb@0 {
> >>> +		serial@3100000 {
> >>> +			status = "okay";
> >>> +		};
> >>> +
> >>> +		sdhci@3460000 {
> >>> +			status = "okay";
> >>> +			bus-width = <8>;
> >>> +			non-removable;
> >>> +			only-1-8-v;
> >>> +		};
> >>> +
> >>> +		rtc@c2a0000 {
> >>> +			status = "okay";
> >>> +		};
> >>> +
> >>> +		pmc@c360000 {
> >>> +			nvidia,invert-interrupt;
> >>> +		};
> >>> +	};
> >>> +};
> >>> diff --git a/arch/arm64/boot/dts/nvidia/tegra234.dtsi b/arch/arm64/boot/dts/nvidia/tegra234.dtsi
> >>> new file mode 100644
> >>> index 000000000000..3509687441a1
> >>> --- /dev/null
> >>> +++ b/arch/arm64/boot/dts/nvidia/tegra234.dtsi
> >>> @@ -0,0 +1,191 @@
> >>> +// SPDX-License-Identifier: GPL-2.0
> >>> +
> >>> +#include <dt-bindings/clock/tegra234-clock.h>
> >>> +#include <dt-bindings/interrupt-controller/arm-gic.h>
> >>> +#include <dt-bindings/mailbox/tegra186-hsp.h>
> >>> +#include <dt-bindings/reset/tegra234-reset.h>
> >>> +
> >>> +/ {
> >>> +	compatible = "nvidia,tegra234";
> >>> +	interrupt-parent = <&gic>;
> >>> +	#address-cells = <2>;
> >>> +	#size-cells = <2>;
> >>> +
> >>> +	bus@0 {
> >>> +		compatible = "simple-bus";
> >>> +		#address-cells = <1>;
> >>> +		#size-cells = <1>;
> >>> +
> >>> +		ranges = <0x0 0x0 0x0 0x40000000>;
> >>> +
> >>> +		misc@100000 {
> >>> +			compatible = "nvidia,tegra234-misc";
> >>> +			reg = <0x00100000 0xf000>,
> >>> +			      <0x0010f000 0x1000>;
> >>> +			status = "okay";
> >>> +		};
> >>
> >>
> >> Is there meant to be a fallback option here, because I don't see
> >> anything to match the above compatible string?
> > 
> > I've got the below patch in my tree that's meant to add that code, but
> > it's in the wrong order in my local branch, so it didn't make it into
> > this subset. I'll reorder the patches to include the APBMISC support
> > patch in this series.
> 
> OK, I think that the same also applies to efuse, pmc, rtc and bpmp-shmem
> from looking at this patch.

efuse is addressed in another of the patches that I have locally. I'll
add it to the series. For PMC I think we can just add a minimum version
of driver support for simulation, but there are a few registers that are
already known to be different from previous chips.

RTC needs the fallback for nvidia,tegra20-rtc. I'll add that in the next
version.

As for bpmp-shmem, that's something we can remove altogether since we
removed it recently from existing device trees. Turns out those regions
don't actually need any compatible strings.

Thierry

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Re: [PATCH 9/9] arm64: tegra: Initial Tegra234 VDK support

[Thierry Reding]

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On Tue, Sep 15, 2020 at 02:17:39PM +0100, Jon Hunter wrote:
> 
> 
> On 15/09/2020 13:44, Thierry Reding wrote:
> > On Mon, Sep 07, 2020 at 08:46:48PM +0100, Jon Hunter wrote:
> >>
> >> On 16/07/2020 15:18, Thierry Reding wrote:
> >>> From: Thierry Reding <treding@nvidia.com>
> >>>
> >>> The NVIDIA Tegra234 VDK is a simulation platform for the Orin SoC. It
> >>> supports a subset of the peripherals that will be available in the final
> >>> chip and serves as a bootstrapping platform.
> >>>
> >>> Signed-off-by: Thierry Reding <treding@nvidia.com>
> >>> ---
> >>>  arch/arm64/boot/dts/nvidia/Makefile           |   1 +
> >>>  .../boot/dts/nvidia/tegra234-sim-vdk.dts      |  40 ++++
> >>>  arch/arm64/boot/dts/nvidia/tegra234.dtsi      | 191 ++++++++++++++++++
> >>>  drivers/soc/tegra/Kconfig                     |  10 +
> >>>  include/dt-bindings/clock/tegra234-clock.h    |  14 ++
> >>>  include/dt-bindings/reset/tegra234-reset.h    |  10 +
> >>>  6 files changed, 266 insertions(+)
> >>>  create mode 100644 arch/arm64/boot/dts/nvidia/tegra234-sim-vdk.dts
> >>>  create mode 100644 arch/arm64/boot/dts/nvidia/tegra234.dtsi
> >>>  create mode 100644 include/dt-bindings/clock/tegra234-clock.h
> >>>  create mode 100644 include/dt-bindings/reset/tegra234-reset.h
> >>>
> >>> diff --git a/arch/arm64/boot/dts/nvidia/Makefile b/arch/arm64/boot/dts/nvidia/Makefile
> >>> index 2273fc5db19c..9296d12d11e9 100644
> >>> --- a/arch/arm64/boot/dts/nvidia/Makefile
> >>> +++ b/arch/arm64/boot/dts/nvidia/Makefile
> >>> @@ -9,3 +9,4 @@ dtb-$(CONFIG_ARCH_TEGRA_210_SOC) += tegra210-p2894-0050-a08.dtb
> >>>  dtb-$(CONFIG_ARCH_TEGRA_186_SOC) += tegra186-p2771-0000.dtb
> >>>  dtb-$(CONFIG_ARCH_TEGRA_194_SOC) += tegra194-p2972-0000.dtb
> >>>  dtb-$(CONFIG_ARCH_TEGRA_194_SOC) += tegra194-p3509-0000+p3668-0000.dtb
> >>> +dtb-$(CONFIG_ARCH_TEGRA_234_SOC) += tegra234-sim-vdk.dtb
> >>> diff --git a/arch/arm64/boot/dts/nvidia/tegra234-sim-vdk.dts b/arch/arm64/boot/dts/nvidia/tegra234-sim-vdk.dts
> >>> new file mode 100644
> >>> index 000000000000..f6e6a24829af
> >>> --- /dev/null
> >>> +++ b/arch/arm64/boot/dts/nvidia/tegra234-sim-vdk.dts
> >>> @@ -0,0 +1,40 @@
> >>> +// SPDX-License-Identifier: GPL-2.0
> >>> +/dts-v1/;
> >>> +
> >>> +#include "tegra234.dtsi"
> >>> +
> >>> +/ {
> >>> +	model = "NVIDIA Tegra234 VDK";
> >>> +	compatible = "nvidia,tegra234-vdk", "nvidia,tegra234";
> >>> +
> >>> +	aliases {
> >>> +		sdhci3 = "/cbb@0/sdhci@3460000";
> >>> +		serial0 = &uarta;
> >>> +	};
> >>> +
> >>> +	chosen {
> >>> +		bootargs = "console=ttyS0,115200n8 earlycon=uart8250,mmio32,0x03100000";
> >>> +		stdout-path = "serial0:115200n8";
> >>> +	};
> >>> +
> >>> +	cbb@0 {
> >>> +		serial@3100000 {
> >>> +			status = "okay";
> >>> +		};
> >>> +
> >>> +		sdhci@3460000 {
> >>> +			status = "okay";
> >>> +			bus-width = <8>;
> >>> +			non-removable;
> >>> +			only-1-8-v;
> >>> +		};
> >>> +
> >>> +		rtc@c2a0000 {
> >>> +			status = "okay";
> >>> +		};
> >>> +
> >>> +		pmc@c360000 {
> >>> +			nvidia,invert-interrupt;
> >>> +		};
> >>> +	};
> >>> +};
> >>> diff --git a/arch/arm64/boot/dts/nvidia/tegra234.dtsi b/arch/arm64/boot/dts/nvidia/tegra234.dtsi
> >>> new file mode 100644
> >>> index 000000000000..3509687441a1
> >>> --- /dev/null
> >>> +++ b/arch/arm64/boot/dts/nvidia/tegra234.dtsi
> >>> @@ -0,0 +1,191 @@
> >>> +// SPDX-License-Identifier: GPL-2.0
> >>> +
> >>> +#include <dt-bindings/clock/tegra234-clock.h>
> >>> +#include <dt-bindings/interrupt-controller/arm-gic.h>
> >>> +#include <dt-bindings/mailbox/tegra186-hsp.h>
> >>> +#include <dt-bindings/reset/tegra234-reset.h>
> >>> +
> >>> +/ {
> >>> +	compatible = "nvidia,tegra234";
> >>> +	interrupt-parent = <&gic>;
> >>> +	#address-cells = <2>;
> >>> +	#size-cells = <2>;
> >>> +
> >>> +	bus@0 {
> >>> +		compatible = "simple-bus";
> >>> +		#address-cells = <1>;
> >>> +		#size-cells = <1>;
> >>> +
> >>> +		ranges = <0x0 0x0 0x0 0x40000000>;
> >>> +
> >>> +		misc@100000 {
> >>> +			compatible = "nvidia,tegra234-misc";
> >>> +			reg = <0x00100000 0xf000>,
> >>> +			      <0x0010f000 0x1000>;
> >>> +			status = "okay";
> >>> +		};
> >>
> >>
> >> Is there meant to be a fallback option here, because I don't see
> >> anything to match the above compatible string?
> > 
> > I've got the below patch in my tree that's meant to add that code, but
> > it's in the wrong order in my local branch, so it didn't make it into
> > this subset. I'll reorder the patches to include the APBMISC support
> > patch in this series.
> 
> OK, I think that the same also applies to efuse, pmc, rtc and bpmp-shmem
> from looking at this patch.

efuse is addressed in another of the patches that I have locally. I'll
add it to the series. For PMC I think we can just add a minimum version
of driver support for simulation, but there are a few registers that are
already known to be different from previous chips.

RTC needs the fallback for nvidia,tegra20-rtc. I'll add that in the next
version.

As for bpmp-shmem, that's something we can remove altogether since we
removed it recently from existing device trees. Turns out those regions
don't actually need any compatible strings.

Thierry

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