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From: "Thomas Hellström (VMware)" <thomas_os@shipmail.org>
To: Andy Lutomirski <luto@kernel.org>
Cc: "Dave Hansen" <dave.hansen@intel.com>,
	"Daniel Vetter" <daniel@ffwll.ch>,
	dri-devel <dri-devel@lists.freedesktop.org>,
	pv-drivers@vmware.com,
	"VMware Graphics" <linux-graphics-maintainer@vmware.com>,
	"Linux Kernel Mailing List" <linux-kernel@vger.kernel.org>,
	"Tom Lendacky" <thomas.lendacky@amd.com>,
	"Thomas Hellstrom" <thellstrom@vmware.com>,
	"Peter Zijlstra" <peterz@infradead.org>,
	"Dave Hansen" <dave.hansen@linux.intel.com>,
	"Heiko Carstens" <heiko.carstens@de.ibm.com>,
	"Christian Borntraeger" <borntraeger@de.ibm.com>,
	"Ingo Molnar" <mingo@redhat.com>,
	"Borislav Petkov" <bp@alien8.de>,
	"H. Peter Anvin" <hpa@zytor.com>,
	"Thomas Gleixner" <tglx@linutronix.de>,
	"Christian König" <christian.koenig@amd.com>
Subject: Re: [PATCH v2 3/4] drm/ttm, drm/vmwgfx: Correctly support support AMD memory encryption
Date: Wed, 4 Sep 2019 00:15:26 +0200	[thread overview]
Message-ID: <6d122d62-9c96-4c29-8d06-02f7134e5e2a@shipmail.org> (raw)
In-Reply-To: <44b094c8-63fe-d9e5-1bf4-7da0788caccf@shipmail.org>

On 9/4/19 12:08 AM, Thomas Hellström (VMware) wrote:
> On 9/3/19 11:46 PM, Andy Lutomirski wrote:
>> On Tue, Sep 3, 2019 at 2:05 PM Thomas Hellström (VMware)
>> <thomas_os@shipmail.org> wrote:
>>> On 9/3/19 10:51 PM, Dave Hansen wrote:
>>>> On 9/3/19 1:36 PM, Thomas Hellström (VMware) wrote:
>>>>> So the question here should really be, can we determine already at 
>>>>> mmap
>>>>> time whether backing memory will be unencrypted and adjust the *real*
>>>>> vma->vm_page_prot under the mmap_sem?
>>>>>
>>>>> Possibly, but that requires populating the buffer with memory at mmap
>>>>> time rather than at first fault time.
>>>> I'm not connecting the dots.
>>>>
>>>> vma->vm_page_prot is used to create a VMA's PTEs regardless of if they
>>>> are created at mmap() or fault time.  If we establish a good
>>>> vma->vm_page_prot, can't we just use it forever for demand faults?
>>> With SEV I think that we could possibly establish the encryption flags
>>> at vma creation time. But thinking of it, it would actually break with
>>> SME where buffer content can be moved between encrypted system memory
>>> and unencrypted graphics card PCI memory behind user-space's back. That
>>> would imply killing all user-space encrypted PTEs and at fault time set
>>> up new ones pointing to unencrypted PCI memory..
>>>
>>>> Or, are you concerned that if an attempt is made to demand-fault page
>>>> that's incompatible with vma->vm_page_prot that we have to SEGV?
>>>>
>>>>> And it still requires knowledge whether the device DMA is always
>>>>> unencrypted (or if SEV is active).
>>>> I may be getting mixed up on MKTME (the Intel memory encryption) and
>>>> SEV.  Is SEV supported on all memory types?  Page cache, hugetlbfs,
>>>> anonymous?  Or just anonymous?
>>> SEV AFAIK encrypts *all* memory except DMA memory. To do that it uses a
>>> SWIOTLB backed by unencrypted memory, and it also flips coherent DMA
>>> memory to unencrypted (which is a very slow operation and patch 4 deals
>>> with caching such memory).
>>>
>> I'm still lost.  You have some fancy VMA where the backing pages
>> change behind the application's back.  This isn't particularly novel
>> -- plain old anonymous memory and plain old mapped files do this too.
>> Can't you all the insert_pfn APIs and call it a day?  What's so
>> special that you need all this magic?  ISTM you should be able to
>> allocate memory that's addressable by the device (dma_alloc_coherent()
>> or whatever) and then map it into user memory just like you'd map any
>> other page.
>>
>> I feel like I'm missing something here.
>
> Yes, so in this case we use dma_alloc_coherent().
>
> With SEV, that gives us unencrypted pages. (Pages whose linear kernel 
> map is marked unencrypted). With SME that (typcially) gives us 
> encrypted pages. In both these cases, vm_get_page_prot() returns
> an encrypted page protection, which lands in vma->vm_page_prot.
>
> In the SEV case, we therefore need to modify the page protection to 
> unencrypted. Hence we need to know whether we're running under SEV and 
> therefore need to modify the protection. If not, the user-space PTE 
> would incorrectly have the encryption flag set.
>
> /Thomas
>
>
And, of course, had we not been "fancy", we could have used 
dma_mmap_coherent(), which in theory should set up the correct 
user-space page protection. But now we're moving stuff around so we can't.

/Thomas



WARNING: multiple messages have this Message-ID (diff)
From: "Thomas Hellström (VMware)" <thomas_os@shipmail.org>
To: Andy Lutomirski <luto@kernel.org>
Cc: "Tom Lendacky" <thomas.lendacky@amd.com>,
	"Thomas Hellstrom" <thellstrom@vmware.com>,
	"Christian Borntraeger" <borntraeger@de.ibm.com>,
	pv-drivers@vmware.com,
	"Dave Hansen" <dave.hansen@linux.intel.com>,
	"Heiko Carstens" <heiko.carstens@de.ibm.com>,
	"Linux Kernel Mailing List" <linux-kernel@vger.kernel.org>,
	dri-devel <dri-devel@lists.freedesktop.org>,
	"Dave Hansen" <dave.hansen@intel.com>,
	"Peter Zijlstra" <peterz@infradead.org>,
	"Ingo Molnar" <mingo@redhat.com>,
	"VMware Graphics" <linux-graphics-maintainer@vmware.com>,
	"H. Peter Anvin" <hpa@zytor.com>,
	"Borislav Petkov" <bp@alien8.de>,
	"Thomas Gleixner" <tglx@linutronix.de>,
	"Christian König" <christian.koenig@amd.com>
Subject: Re: [PATCH v2 3/4] drm/ttm, drm/vmwgfx: Correctly support support AMD memory encryption
Date: Wed, 4 Sep 2019 00:15:26 +0200	[thread overview]
Message-ID: <6d122d62-9c96-4c29-8d06-02f7134e5e2a@shipmail.org> (raw)
In-Reply-To: <44b094c8-63fe-d9e5-1bf4-7da0788caccf@shipmail.org>

On 9/4/19 12:08 AM, Thomas Hellström (VMware) wrote:
> On 9/3/19 11:46 PM, Andy Lutomirski wrote:
>> On Tue, Sep 3, 2019 at 2:05 PM Thomas Hellström (VMware)
>> <thomas_os@shipmail.org> wrote:
>>> On 9/3/19 10:51 PM, Dave Hansen wrote:
>>>> On 9/3/19 1:36 PM, Thomas Hellström (VMware) wrote:
>>>>> So the question here should really be, can we determine already at 
>>>>> mmap
>>>>> time whether backing memory will be unencrypted and adjust the *real*
>>>>> vma->vm_page_prot under the mmap_sem?
>>>>>
>>>>> Possibly, but that requires populating the buffer with memory at mmap
>>>>> time rather than at first fault time.
>>>> I'm not connecting the dots.
>>>>
>>>> vma->vm_page_prot is used to create a VMA's PTEs regardless of if they
>>>> are created at mmap() or fault time.  If we establish a good
>>>> vma->vm_page_prot, can't we just use it forever for demand faults?
>>> With SEV I think that we could possibly establish the encryption flags
>>> at vma creation time. But thinking of it, it would actually break with
>>> SME where buffer content can be moved between encrypted system memory
>>> and unencrypted graphics card PCI memory behind user-space's back. That
>>> would imply killing all user-space encrypted PTEs and at fault time set
>>> up new ones pointing to unencrypted PCI memory..
>>>
>>>> Or, are you concerned that if an attempt is made to demand-fault page
>>>> that's incompatible with vma->vm_page_prot that we have to SEGV?
>>>>
>>>>> And it still requires knowledge whether the device DMA is always
>>>>> unencrypted (or if SEV is active).
>>>> I may be getting mixed up on MKTME (the Intel memory encryption) and
>>>> SEV.  Is SEV supported on all memory types?  Page cache, hugetlbfs,
>>>> anonymous?  Or just anonymous?
>>> SEV AFAIK encrypts *all* memory except DMA memory. To do that it uses a
>>> SWIOTLB backed by unencrypted memory, and it also flips coherent DMA
>>> memory to unencrypted (which is a very slow operation and patch 4 deals
>>> with caching such memory).
>>>
>> I'm still lost.  You have some fancy VMA where the backing pages
>> change behind the application's back.  This isn't particularly novel
>> -- plain old anonymous memory and plain old mapped files do this too.
>> Can't you all the insert_pfn APIs and call it a day?  What's so
>> special that you need all this magic?  ISTM you should be able to
>> allocate memory that's addressable by the device (dma_alloc_coherent()
>> or whatever) and then map it into user memory just like you'd map any
>> other page.
>>
>> I feel like I'm missing something here.
>
> Yes, so in this case we use dma_alloc_coherent().
>
> With SEV, that gives us unencrypted pages. (Pages whose linear kernel 
> map is marked unencrypted). With SME that (typcially) gives us 
> encrypted pages. In both these cases, vm_get_page_prot() returns
> an encrypted page protection, which lands in vma->vm_page_prot.
>
> In the SEV case, we therefore need to modify the page protection to 
> unencrypted. Hence we need to know whether we're running under SEV and 
> therefore need to modify the protection. If not, the user-space PTE 
> would incorrectly have the encryption flag set.
>
> /Thomas
>
>
And, of course, had we not been "fancy", we could have used 
dma_mmap_coherent(), which in theory should set up the correct 
user-space page protection. But now we're moving stuff around so we can't.

/Thomas


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  reply	other threads:[~2019-09-03 22:15 UTC|newest]

Thread overview: 53+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-09-03 13:15 [PATCH v2 0/4] Have TTM support SEV encryption with coherent memory Thomas Hellström (VMware)
2019-09-03 13:15 ` [PATCH v2 1/4] x86/mm: Export force_dma_unencrypted Thomas Hellström (VMware)
2019-09-03 13:46   ` Christoph Hellwig
2019-09-03 14:32     ` Thomas Hellström (VMware)
2019-09-03 16:22       ` Christoph Hellwig
2019-09-03 16:22         ` Christoph Hellwig
2019-09-03 20:46         ` Thomas Hellström (VMware)
2019-09-03 20:46           ` Thomas Hellström (VMware)
2019-09-03 21:41           ` Andy Lutomirski
2019-09-04  6:58           ` Christoph Hellwig
2019-09-04  7:32             ` Thomas Hellström (VMware)
2019-09-04 12:22               ` Christoph Hellwig
2019-09-04 17:28                 ` Thomas Hellström (VMware)
2019-09-03 15:14   ` Dave Hansen
2019-09-03 15:14     ` Dave Hansen
2019-09-03 18:50     ` Thomas Hellström (VMware)
2019-09-03 18:50       ` Thomas Hellström (VMware)
2019-09-03 13:15 ` [PATCH v2 2/4] s390/mm: " Thomas Hellström (VMware)
2019-09-03 13:46   ` Christoph Hellwig
2019-09-03 13:15 ` [PATCH v2 3/4] drm/ttm, drm/vmwgfx: Correctly support support AMD memory encryption Thomas Hellström (VMware)
2019-09-03 19:38   ` Dave Hansen
2019-09-03 19:51     ` Daniel Vetter
2019-09-03 19:51       ` Daniel Vetter
2019-09-03 19:55       ` Dave Hansen
2019-09-03 20:36         ` Thomas Hellström (VMware)
2019-09-03 20:51           ` Dave Hansen
2019-09-03 21:05             ` Thomas Hellström (VMware)
2019-09-03 21:46               ` Andy Lutomirski
2019-09-03 22:08                 ` Thomas Hellström (VMware)
2019-09-03 22:15                   ` Thomas Hellström (VMware) [this message]
2019-09-03 22:15                     ` Thomas Hellström (VMware)
2019-09-03 23:10                     ` Dave Hansen
2019-09-04  8:34                       ` Thomas Hellström (VMware)
2019-09-03 23:15                     ` Andy Lutomirski
2019-09-04  6:49                       ` Thomas Hellström (VMware)
2019-09-04  7:53                         ` Daniel Vetter
2019-09-04 10:37                           ` Thomas Hellström (VMware)
2019-09-04 10:37                             ` Thomas Hellström (VMware)
2019-09-04 11:43                             ` Daniel Vetter
2019-09-04 18:16                         ` Christoph Hellwig
2019-09-04 18:16                           ` Christoph Hellwig
2019-09-04  7:33               ` Koenig, Christian
2019-09-04  8:19                 ` Thomas Hellström (VMware)
2019-09-04  8:42                   ` Thomas Hellström (VMware)
2019-09-04  8:42                     ` Thomas Hellström (VMware)
2019-09-04 11:10                   ` Koenig, Christian
2019-09-04 11:10                     ` Koenig, Christian
2019-09-04 12:35                     ` Thomas Hellström (VMware)
2019-09-04 12:35                       ` Thomas Hellström (VMware)
2019-09-04 13:05                       ` Thomas Hellström (VMware)
2019-09-03 13:15 ` [PATCH v2 4/4] drm/ttm: Cache dma pool decrypted pages when AMD SEV is active Thomas Hellström (VMware)
2019-09-03 15:18 ` [PATCH v2 0/4] Have TTM support SEV encryption with coherent memory Daniel Vetter
2019-09-05 10:43 ` Thomas Hellström (VMware)

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