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From: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
To: Tinghan Shen <tinghan.shen@mediatek.com>,
	Bjorn Andersson <andersson@kernel.org>,
	Mathieu Poirier <mathieu.poirier@linaro.org>,
	Rob Herring <robh+dt@kernel.org>,
	Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
	Matthias Brugger <matthias.bgg@gmail.com>,
	Tiffany Lin <tiffany.lin@mediatek.com>,
	Andrew-CT Chen <andrew-ct.chen@mediatek.com>,
	Yunfei Dong <yunfei.dong@mediatek.com>,
	Mauro Carvalho Chehab <mchehab@kernel.org>
Cc: linux-remoteproc@vger.kernel.org, devicetree@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org,
	linux-mediatek@lists.infradead.org, linux-kernel@vger.kernel.org,
	linux-media@vger.kernel.org
Subject: Re: [PATCH v3 02/11] dt-bindings: remoteproc: mediatek: Support MT8195 dual-core SCP
Date: Wed, 28 Sep 2022 19:48:42 +0200	[thread overview]
Message-ID: <6df35c78-0ab1-b471-4541-7e29ea26a6ca@linaro.org> (raw)
In-Reply-To: <20220927025606.26673-3-tinghan.shen@mediatek.com>

On 27/09/2022 04:55, Tinghan Shen wrote:
> The MT8195 SCP is a dual-core RISC-V MCU. Extend the yaml file
> to describe the 2nd core as a subnode of the boot core.
> 
> The configuration register is shared by MT8195 SCP core 0
> and core 1. The core 1 can retrieve the information of configuration
> registers from parent node.
> 
> Signed-off-by: Tinghan Shen <tinghan.shen@mediatek.com>
> ---
>  .../bindings/remoteproc/mtk,scp.yaml          | 97 ++++++++++++++++++-
>  1 file changed, 92 insertions(+), 5 deletions(-)
> 
> diff --git a/Documentation/devicetree/bindings/remoteproc/mtk,scp.yaml b/Documentation/devicetree/bindings/remoteproc/mtk,scp.yaml
> index 786bed897916..c012265be4eb 100644
> --- a/Documentation/devicetree/bindings/remoteproc/mtk,scp.yaml
> +++ b/Documentation/devicetree/bindings/remoteproc/mtk,scp.yaml
> @@ -75,6 +75,83 @@ properties:
>      required:
>        - mediatek,rpmsg-name
>  
> +  '#address-cells':
> +    const: 1
> +
> +  '#size-cells':
> +    const: 1
> +
> +  ranges: true
> +
> +patternProperties:
> +  "^scp-c[0-9]+@[a-f0-9]+$":

drop c[0-9]. Node names should be generic

> +    type: object
> +    description:
> +      The MediaTek SCP integrated to SoC might be a multi-core version.
> +      The other cores are represented as child nodes of the boot core.
> +      There are some integration differences for the IP like the usage of
> +      address translator for translating SoC bus addresses into address space
> +      for the processor.
> +
> +      Each SCP core has own cache memory. The SRAM and L1TCM are shared by
> +      cores. The power of cache, SRAM and L1TCM power should be enabled
> +      before booting SCP cores. The size of cache, SRAM, and L1TCM are varied
> +      on differnt SoCs.
> +
> +      The SCP cores do not use an MMU, but has a set of registers to
> +      control the translations between 32-bit CPU addresses into system bus
> +      addresses. Cache and memory access settings are provided through a
> +      Memory Protection Unit (MPU), programmable only from the SCP.
> +
> +    properties:
> +      compatible:
> +        enum:
> +          - mediatek,mt8195-scp-core
> +
> +      reg:
> +        description: The base address and size of SRAM.
> +        maxItems: 1
> +
> +      reg-names:
> +        const: sram
> +
> +      interrupts:
> +        maxItems: 1
> +
> +      firmware-name:
> +        $ref: /schemas/types.yaml#/definitions/string
> +        description:
> +          If present, name (or relative path) of the file within the
> +          firmware search path containing the firmware image used when
> +          initializing sub cores of multi-core SCP.
> +
> +      memory-region:
> +        maxItems: 1
> +
> +      cros-ec-rpmsg:
> +        type: object
> +        description:
> +          This subnode represents the rpmsg device. The namesof the devices
> +          are not important. The properties of this node are defined by the
> +          individual bindings for the rpmsg devices.

Same comments as with patch #1.

> +
> +        properties:
> +          mediatek,rpmsg-name:
> +            $ref: /schemas/types.yaml#/definitions/string-array
> +            description:
> +              Contains the name for the rpmsg device. Used to match
> +              the subnode to rpmsg device announced by SCP.
> +
> +        required:
> +          - mediatek,rpmsg-name
> +
> +    required:
> +      - compatible
> +      - reg
> +      - reg-names
> +
> +    additionalProperties: false
> +
>  required:
>    - compatible
>    - reg
> @@ -110,16 +187,26 @@ additionalProperties: false
>  
>  examples:
>    - |
> -    #include <dt-bindings/clock/mt8192-clk.h>
> -
>      scp@10500000 {
> -        compatible = "mediatek,mt8192-scp";
> +        compatible = "mediatek,mt8195-scp";
>          reg = <0x10500000 0x80000>,
>                <0x10700000 0x8000>,
>                <0x10720000 0xe0000>;
>          reg-names = "sram", "cfg", "l1tcm";
> -        clocks = <&infracfg CLK_INFRA_SCPSYS>;
> -        clock-names = "main";
> +
> +        #address-cells = <1>;
> +        #size-cells = <1>;
> +        ranges = <0x105a0000 0x105a0000 0x20000>;
> +
> +        scp-c1@105a0000 {
> +                compatible = "mediatek,mt8195-scp-core";

Messed indentation. Use 4 spaces for example indentation.


Best regards,
Krzysztof


WARNING: multiple messages have this Message-ID (diff)
From: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
To: Tinghan Shen <tinghan.shen@mediatek.com>,
	Bjorn Andersson <andersson@kernel.org>,
	Mathieu Poirier <mathieu.poirier@linaro.org>,
	Rob Herring <robh+dt@kernel.org>,
	Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
	Matthias Brugger <matthias.bgg@gmail.com>,
	Tiffany Lin <tiffany.lin@mediatek.com>,
	Andrew-CT Chen <andrew-ct.chen@mediatek.com>,
	Yunfei Dong <yunfei.dong@mediatek.com>,
	Mauro Carvalho Chehab <mchehab@kernel.org>
Cc: linux-remoteproc@vger.kernel.org, devicetree@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org,
	linux-mediatek@lists.infradead.org, linux-kernel@vger.kernel.org,
	linux-media@vger.kernel.org
Subject: Re: [PATCH v3 02/11] dt-bindings: remoteproc: mediatek: Support MT8195 dual-core SCP
Date: Wed, 28 Sep 2022 19:48:42 +0200	[thread overview]
Message-ID: <6df35c78-0ab1-b471-4541-7e29ea26a6ca@linaro.org> (raw)
In-Reply-To: <20220927025606.26673-3-tinghan.shen@mediatek.com>

On 27/09/2022 04:55, Tinghan Shen wrote:
> The MT8195 SCP is a dual-core RISC-V MCU. Extend the yaml file
> to describe the 2nd core as a subnode of the boot core.
> 
> The configuration register is shared by MT8195 SCP core 0
> and core 1. The core 1 can retrieve the information of configuration
> registers from parent node.
> 
> Signed-off-by: Tinghan Shen <tinghan.shen@mediatek.com>
> ---
>  .../bindings/remoteproc/mtk,scp.yaml          | 97 ++++++++++++++++++-
>  1 file changed, 92 insertions(+), 5 deletions(-)
> 
> diff --git a/Documentation/devicetree/bindings/remoteproc/mtk,scp.yaml b/Documentation/devicetree/bindings/remoteproc/mtk,scp.yaml
> index 786bed897916..c012265be4eb 100644
> --- a/Documentation/devicetree/bindings/remoteproc/mtk,scp.yaml
> +++ b/Documentation/devicetree/bindings/remoteproc/mtk,scp.yaml
> @@ -75,6 +75,83 @@ properties:
>      required:
>        - mediatek,rpmsg-name
>  
> +  '#address-cells':
> +    const: 1
> +
> +  '#size-cells':
> +    const: 1
> +
> +  ranges: true
> +
> +patternProperties:
> +  "^scp-c[0-9]+@[a-f0-9]+$":

drop c[0-9]. Node names should be generic

> +    type: object
> +    description:
> +      The MediaTek SCP integrated to SoC might be a multi-core version.
> +      The other cores are represented as child nodes of the boot core.
> +      There are some integration differences for the IP like the usage of
> +      address translator for translating SoC bus addresses into address space
> +      for the processor.
> +
> +      Each SCP core has own cache memory. The SRAM and L1TCM are shared by
> +      cores. The power of cache, SRAM and L1TCM power should be enabled
> +      before booting SCP cores. The size of cache, SRAM, and L1TCM are varied
> +      on differnt SoCs.
> +
> +      The SCP cores do not use an MMU, but has a set of registers to
> +      control the translations between 32-bit CPU addresses into system bus
> +      addresses. Cache and memory access settings are provided through a
> +      Memory Protection Unit (MPU), programmable only from the SCP.
> +
> +    properties:
> +      compatible:
> +        enum:
> +          - mediatek,mt8195-scp-core
> +
> +      reg:
> +        description: The base address and size of SRAM.
> +        maxItems: 1
> +
> +      reg-names:
> +        const: sram
> +
> +      interrupts:
> +        maxItems: 1
> +
> +      firmware-name:
> +        $ref: /schemas/types.yaml#/definitions/string
> +        description:
> +          If present, name (or relative path) of the file within the
> +          firmware search path containing the firmware image used when
> +          initializing sub cores of multi-core SCP.
> +
> +      memory-region:
> +        maxItems: 1
> +
> +      cros-ec-rpmsg:
> +        type: object
> +        description:
> +          This subnode represents the rpmsg device. The namesof the devices
> +          are not important. The properties of this node are defined by the
> +          individual bindings for the rpmsg devices.

Same comments as with patch #1.

> +
> +        properties:
> +          mediatek,rpmsg-name:
> +            $ref: /schemas/types.yaml#/definitions/string-array
> +            description:
> +              Contains the name for the rpmsg device. Used to match
> +              the subnode to rpmsg device announced by SCP.
> +
> +        required:
> +          - mediatek,rpmsg-name
> +
> +    required:
> +      - compatible
> +      - reg
> +      - reg-names
> +
> +    additionalProperties: false
> +
>  required:
>    - compatible
>    - reg
> @@ -110,16 +187,26 @@ additionalProperties: false
>  
>  examples:
>    - |
> -    #include <dt-bindings/clock/mt8192-clk.h>
> -
>      scp@10500000 {
> -        compatible = "mediatek,mt8192-scp";
> +        compatible = "mediatek,mt8195-scp";
>          reg = <0x10500000 0x80000>,
>                <0x10700000 0x8000>,
>                <0x10720000 0xe0000>;
>          reg-names = "sram", "cfg", "l1tcm";
> -        clocks = <&infracfg CLK_INFRA_SCPSYS>;
> -        clock-names = "main";
> +
> +        #address-cells = <1>;
> +        #size-cells = <1>;
> +        ranges = <0x105a0000 0x105a0000 0x20000>;
> +
> +        scp-c1@105a0000 {
> +                compatible = "mediatek,mt8195-scp-core";

Messed indentation. Use 4 spaces for example indentation.


Best regards,
Krzysztof


_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

  parent reply	other threads:[~2022-09-28 17:48 UTC|newest]

Thread overview: 60+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-09-27  2:55 [PATCH v3 00/11] Add support for MT8195 SCP 2nd core Tinghan Shen
2022-09-27  2:55 ` Tinghan Shen
2022-09-27  2:55 ` [PATCH v3 01/11] dt-bindings: remoteproc: mediatek: Give the subnode a persistent name Tinghan Shen
2022-09-27  2:55   ` Tinghan Shen
2022-09-28  6:54   ` Peng Fan
2022-09-28  6:54     ` Peng Fan
2022-09-28 17:47   ` Krzysztof Kozlowski
2022-09-28 17:47     ` Krzysztof Kozlowski
2022-09-27  2:55 ` [PATCH v3 02/11] dt-bindings: remoteproc: mediatek: Support MT8195 dual-core SCP Tinghan Shen
2022-09-27  2:55   ` Tinghan Shen
2022-09-28  7:01   ` Peng Fan
2022-09-28  7:01     ` Peng Fan
2022-09-28  9:17     ` TingHan Shen (沈廷翰)
2022-09-28  9:17       ` TingHan Shen (沈廷翰)
2022-09-28  9:37       ` Peng Fan
2022-09-28  9:37         ` Peng Fan
2022-09-28 17:50       ` Krzysztof Kozlowski
2022-09-28 17:50         ` Krzysztof Kozlowski
2022-09-28 17:48   ` Krzysztof Kozlowski [this message]
2022-09-28 17:48     ` Krzysztof Kozlowski
2022-09-27  2:55 ` [PATCH v3 03/11] arm64: dts: mt8195: Add SCP core 1 node Tinghan Shen
2022-09-27  2:55   ` Tinghan Shen
2022-09-27 11:01   ` AngeloGioacchino Del Regno
2022-09-27 11:01     ` AngeloGioacchino Del Regno
2023-01-17  8:19     ` TingHan Shen (沈廷翰)
2023-01-17  8:19       ` TingHan Shen (沈廷翰)
2023-01-17  8:55       ` AngeloGioacchino Del Regno
2023-01-17  8:55         ` AngeloGioacchino Del Regno
2022-09-27  2:55 ` [PATCH v3 04/11] remoteproc: mediatek: Remove redundant rproc_boot Tinghan Shen
2022-09-27  2:55   ` Tinghan Shen
2022-09-27 11:03   ` AngeloGioacchino Del Regno
2022-09-27 11:03     ` AngeloGioacchino Del Regno
2022-09-28  8:27     ` TingHan Shen (沈廷翰)
2022-09-28  8:27       ` TingHan Shen (沈廷翰)
2022-09-28  9:40       ` Peng Fan
2022-09-28  9:40         ` Peng Fan
2022-09-28 10:14         ` TingHan Shen (沈廷翰)
2022-09-28 10:14           ` TingHan Shen (沈廷翰)
2022-09-27  2:56 ` [PATCH v3 05/11] remoteproc: mediatek: Add SCP core 1 register definitions Tinghan Shen
2022-09-27  2:56   ` Tinghan Shen
2022-09-27 11:04   ` AngeloGioacchino Del Regno
2022-09-27 11:04     ` AngeloGioacchino Del Regno
2022-09-27  2:56 ` [PATCH v3 06/11] remoteproc: mediatek: Add MT8195 SCP core 1 operations Tinghan Shen
2022-09-27  2:56   ` Tinghan Shen
2022-09-27  2:56 ` [PATCH v3 07/11] remoteproc: mediatek: Probe MT8195 SCP core 1 Tinghan Shen
2022-09-27  2:56   ` Tinghan Shen
2022-09-27  2:56 ` [PATCH v3 08/11] remoteproc: mediatek: Control SCP core 1 boot by rproc subdevice Tinghan Shen
2022-09-27  2:56   ` Tinghan Shen
2022-09-27  2:56 ` [PATCH v3 09/11] remoteproc: mediatek: Setup MT8195 SCP core 1 SRAM offset Tinghan Shen
2022-09-27  2:56   ` Tinghan Shen
2022-09-27  2:56 ` [PATCH v3 10/11] remoteproc: mediatek: Handle MT8195 SCP core 1 watchdog timeout Tinghan Shen
2022-09-27  2:56   ` Tinghan Shen
2022-09-27  2:56 ` [PATCH v3 11/11] remoteproc: mediatek: Refine ipi handler error message Tinghan Shen
2022-09-27  2:56   ` Tinghan Shen
2022-09-27 11:06   ` AngeloGioacchino Del Regno
2022-09-27 11:06     ` AngeloGioacchino Del Regno
2022-11-01 20:40 ` [PATCH v3 00/11] Add support for MT8195 SCP 2nd core Mathieu Poirier
2022-11-01 20:40   ` Mathieu Poirier
2023-01-17  7:43   ` TingHan Shen (沈廷翰)
2023-01-17  7:43     ` TingHan Shen (沈廷翰)

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