* [PATCH v2 0/4] support USI for Exynos Auto v9 SoC [not found] <CGME20220630021951epcas2p3fb04daeddd98c74cbee3fed5044da6f9@epcas2p3.samsung.com> @ 2022-06-30 2:16 ` Chanho Park 0 siblings, 0 replies; 24+ messages in thread From: Chanho Park @ 2022-06-30 2:16 UTC (permalink / raw) To: Krzysztof Kozlowski, Rob Herring Cc: Alim Akhtar, Sam Protsenko, Jaewon Kim, devicetree, linux-samsung-soc, linux-arm-kernel, Chanho Park Add to support USI(Universal Serial Interface) for Exynos Auto v9 SoC. This patchset is built on top of below patchset. - spi patchset: https://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi.git for-next - serial patch to expand serial devices to 12: https://lore.kernel.org/linux-samsung-soc/20220629005538.60132-1-chanho61.park@samsung.com/ The SoC supports up to 12 USIs so they can be configured as below - 12 x UARTs(4pins) - 12 x SPIs(4pins) - 24 x I2C - 12 x UARTS(2pin) and 12 x I2C Changes from v1: - Move all usi nodes from exynosautov9-usi.dtsi to exynosautov9.dtsi as suggested by Krzysztof - Add exynosautov9-usi and exynosautov9-uart compatibles - Drop unnecessary /* USI: */ comments - Separate phandles of dmas nodes Chanho Park (4): dt-bindings: soc: samsung: usi: add exynosautov9-usi compatible dt-bindings: serial: samsung: add exynosautov9-uart compatible arm64: dts: exynosautov9: add pdma0 device tree node arm64: dts: exynosautov9: add usi device tree nodes .../bindings/serial/samsung_uart.yaml | 5 +- .../bindings/soc/samsung/exynos-usi.yaml | 8 +- .../boot/dts/exynos/exynosautov9-sadk.dts | 2 + arch/arm64/boot/dts/exynos/exynosautov9.dtsi | 1087 ++++++++++++++++- 4 files changed, 1094 insertions(+), 8 deletions(-) -- 2.36.1 ^ permalink raw reply [flat|nested] 24+ messages in thread
* [PATCH v2 0/4] support USI for Exynos Auto v9 SoC @ 2022-06-30 2:16 ` Chanho Park 0 siblings, 0 replies; 24+ messages in thread From: Chanho Park @ 2022-06-30 2:16 UTC (permalink / raw) To: Krzysztof Kozlowski, Rob Herring Cc: Alim Akhtar, Sam Protsenko, Jaewon Kim, devicetree, linux-samsung-soc, linux-arm-kernel, Chanho Park Add to support USI(Universal Serial Interface) for Exynos Auto v9 SoC. This patchset is built on top of below patchset. - spi patchset: https://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi.git for-next - serial patch to expand serial devices to 12: https://lore.kernel.org/linux-samsung-soc/20220629005538.60132-1-chanho61.park@samsung.com/ The SoC supports up to 12 USIs so they can be configured as below - 12 x UARTs(4pins) - 12 x SPIs(4pins) - 24 x I2C - 12 x UARTS(2pin) and 12 x I2C Changes from v1: - Move all usi nodes from exynosautov9-usi.dtsi to exynosautov9.dtsi as suggested by Krzysztof - Add exynosautov9-usi and exynosautov9-uart compatibles - Drop unnecessary /* USI: */ comments - Separate phandles of dmas nodes Chanho Park (4): dt-bindings: soc: samsung: usi: add exynosautov9-usi compatible dt-bindings: serial: samsung: add exynosautov9-uart compatible arm64: dts: exynosautov9: add pdma0 device tree node arm64: dts: exynosautov9: add usi device tree nodes .../bindings/serial/samsung_uart.yaml | 5 +- .../bindings/soc/samsung/exynos-usi.yaml | 8 +- .../boot/dts/exynos/exynosautov9-sadk.dts | 2 + arch/arm64/boot/dts/exynos/exynosautov9.dtsi | 1087 ++++++++++++++++- 4 files changed, 1094 insertions(+), 8 deletions(-) -- 2.36.1 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel ^ permalink raw reply [flat|nested] 24+ messages in thread
[parent not found: <CGME20220630021951epcas2p26cd4a554f01f9cb6e44acd813eee15fd@epcas2p2.samsung.com>]
* [PATCH v2 1/4] dt-bindings: soc: samsung: usi: add exynosautov9-usi compatible [not found] ` <CGME20220630021951epcas2p26cd4a554f01f9cb6e44acd813eee15fd@epcas2p2.samsung.com> @ 2022-06-30 2:16 ` Chanho Park 0 siblings, 0 replies; 24+ messages in thread From: Chanho Park @ 2022-06-30 2:16 UTC (permalink / raw) To: Krzysztof Kozlowski, Rob Herring Cc: Alim Akhtar, Sam Protsenko, Jaewon Kim, devicetree, linux-samsung-soc, linux-arm-kernel, Chanho Park Add samsung,exynosautov9-uart dedicated compatible for representing usi of Exynos Auto v9 SoC. Signed-off-by: Chanho Park <chanho61.park@samsung.com> --- .../devicetree/bindings/soc/samsung/exynos-usi.yaml | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/soc/samsung/exynos-usi.yaml b/Documentation/devicetree/bindings/soc/samsung/exynos-usi.yaml index fde886a8cf43..6e806e950a36 100644 --- a/Documentation/devicetree/bindings/soc/samsung/exynos-usi.yaml +++ b/Documentation/devicetree/bindings/soc/samsung/exynos-usi.yaml @@ -22,8 +22,12 @@ properties: pattern: "^usi@[0-9a-f]+$" compatible: - enum: - - samsung,exynos850-usi # for USIv2 (Exynos850, ExynosAutoV9) + oneOf: + - items: + - const: samsung,exynosautov9-usi + - const: samsung,exynos850-usi + - enum: + - samsung,exynos850-usi # for USIv2 (Exynos850, ExynosAutoV9) reg: true -- 2.36.1 ^ permalink raw reply related [flat|nested] 24+ messages in thread
* [PATCH v2 1/4] dt-bindings: soc: samsung: usi: add exynosautov9-usi compatible @ 2022-06-30 2:16 ` Chanho Park 0 siblings, 0 replies; 24+ messages in thread From: Chanho Park @ 2022-06-30 2:16 UTC (permalink / raw) To: Krzysztof Kozlowski, Rob Herring Cc: Alim Akhtar, Sam Protsenko, Jaewon Kim, devicetree, linux-samsung-soc, linux-arm-kernel, Chanho Park Add samsung,exynosautov9-uart dedicated compatible for representing usi of Exynos Auto v9 SoC. Signed-off-by: Chanho Park <chanho61.park@samsung.com> --- .../devicetree/bindings/soc/samsung/exynos-usi.yaml | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/soc/samsung/exynos-usi.yaml b/Documentation/devicetree/bindings/soc/samsung/exynos-usi.yaml index fde886a8cf43..6e806e950a36 100644 --- a/Documentation/devicetree/bindings/soc/samsung/exynos-usi.yaml +++ b/Documentation/devicetree/bindings/soc/samsung/exynos-usi.yaml @@ -22,8 +22,12 @@ properties: pattern: "^usi@[0-9a-f]+$" compatible: - enum: - - samsung,exynos850-usi # for USIv2 (Exynos850, ExynosAutoV9) + oneOf: + - items: + - const: samsung,exynosautov9-usi + - const: samsung,exynos850-usi + - enum: + - samsung,exynos850-usi # for USIv2 (Exynos850, ExynosAutoV9) reg: true -- 2.36.1 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel ^ permalink raw reply related [flat|nested] 24+ messages in thread
* Re: [PATCH v2 1/4] dt-bindings: soc: samsung: usi: add exynosautov9-usi compatible 2022-06-30 2:16 ` Chanho Park @ 2022-06-30 5:59 ` Sam Protsenko -1 siblings, 0 replies; 24+ messages in thread From: Sam Protsenko @ 2022-06-30 5:59 UTC (permalink / raw) To: Chanho Park Cc: Krzysztof Kozlowski, Rob Herring, Alim Akhtar, Jaewon Kim, devicetree, linux-samsung-soc, linux-arm-kernel Hi Chanho, On Thu, 30 Jun 2022 at 05:19, Chanho Park <chanho61.park@samsung.com> wrote: > > Add samsung,exynosautov9-uart dedicated compatible for representing > usi of Exynos Auto v9 SoC. > > Signed-off-by: Chanho Park <chanho61.park@samsung.com> > --- > .../devicetree/bindings/soc/samsung/exynos-usi.yaml | 8 ++++++-- > 1 file changed, 6 insertions(+), 2 deletions(-) > > diff --git a/Documentation/devicetree/bindings/soc/samsung/exynos-usi.yaml b/Documentation/devicetree/bindings/soc/samsung/exynos-usi.yaml > index fde886a8cf43..6e806e950a36 100644 > --- a/Documentation/devicetree/bindings/soc/samsung/exynos-usi.yaml > +++ b/Documentation/devicetree/bindings/soc/samsung/exynos-usi.yaml > @@ -22,8 +22,12 @@ properties: > pattern: "^usi@[0-9a-f]+$" > > compatible: > - enum: > - - samsung,exynos850-usi # for USIv2 (Exynos850, ExynosAutoV9) > + oneOf: > + - items: > + - const: samsung,exynosautov9-usi > + - const: samsung,exynos850-usi > + - enum: > + - samsung,exynos850-usi # for USIv2 (Exynos850, ExynosAutoV9) > Why "samsung,exynos850-usi" is duplicated? Maybe it would be correct to leave only "items" and remove the "enum"? > reg: true > > -- > 2.36.1 > ^ permalink raw reply [flat|nested] 24+ messages in thread
* Re: [PATCH v2 1/4] dt-bindings: soc: samsung: usi: add exynosautov9-usi compatible @ 2022-06-30 5:59 ` Sam Protsenko 0 siblings, 0 replies; 24+ messages in thread From: Sam Protsenko @ 2022-06-30 5:59 UTC (permalink / raw) To: Chanho Park Cc: Krzysztof Kozlowski, Rob Herring, Alim Akhtar, Jaewon Kim, devicetree, linux-samsung-soc, linux-arm-kernel Hi Chanho, On Thu, 30 Jun 2022 at 05:19, Chanho Park <chanho61.park@samsung.com> wrote: > > Add samsung,exynosautov9-uart dedicated compatible for representing > usi of Exynos Auto v9 SoC. > > Signed-off-by: Chanho Park <chanho61.park@samsung.com> > --- > .../devicetree/bindings/soc/samsung/exynos-usi.yaml | 8 ++++++-- > 1 file changed, 6 insertions(+), 2 deletions(-) > > diff --git a/Documentation/devicetree/bindings/soc/samsung/exynos-usi.yaml b/Documentation/devicetree/bindings/soc/samsung/exynos-usi.yaml > index fde886a8cf43..6e806e950a36 100644 > --- a/Documentation/devicetree/bindings/soc/samsung/exynos-usi.yaml > +++ b/Documentation/devicetree/bindings/soc/samsung/exynos-usi.yaml > @@ -22,8 +22,12 @@ properties: > pattern: "^usi@[0-9a-f]+$" > > compatible: > - enum: > - - samsung,exynos850-usi # for USIv2 (Exynos850, ExynosAutoV9) > + oneOf: > + - items: > + - const: samsung,exynosautov9-usi > + - const: samsung,exynos850-usi > + - enum: > + - samsung,exynos850-usi # for USIv2 (Exynos850, ExynosAutoV9) > Why "samsung,exynos850-usi" is duplicated? Maybe it would be correct to leave only "items" and remove the "enum"? > reg: true > > -- > 2.36.1 > _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel ^ permalink raw reply [flat|nested] 24+ messages in thread
* Re: [PATCH v2 1/4] dt-bindings: soc: samsung: usi: add exynosautov9-usi compatible 2022-06-30 5:59 ` Sam Protsenko @ 2022-06-30 7:11 ` Krzysztof Kozlowski -1 siblings, 0 replies; 24+ messages in thread From: Krzysztof Kozlowski @ 2022-06-30 7:11 UTC (permalink / raw) To: Sam Protsenko, Chanho Park Cc: Krzysztof Kozlowski, Rob Herring, Alim Akhtar, Jaewon Kim, devicetree, linux-samsung-soc, linux-arm-kernel On 30/06/2022 07:59, Sam Protsenko wrote: > Hi Chanho, > > On Thu, 30 Jun 2022 at 05:19, Chanho Park <chanho61.park@samsung.com> wrote: >> >> Add samsung,exynosautov9-uart dedicated compatible for representing >> usi of Exynos Auto v9 SoC. >> >> Signed-off-by: Chanho Park <chanho61.park@samsung.com> >> --- >> .../devicetree/bindings/soc/samsung/exynos-usi.yaml | 8 ++++++-- >> 1 file changed, 6 insertions(+), 2 deletions(-) >> >> diff --git a/Documentation/devicetree/bindings/soc/samsung/exynos-usi.yaml b/Documentation/devicetree/bindings/soc/samsung/exynos-usi.yaml >> index fde886a8cf43..6e806e950a36 100644 >> --- a/Documentation/devicetree/bindings/soc/samsung/exynos-usi.yaml >> +++ b/Documentation/devicetree/bindings/soc/samsung/exynos-usi.yaml >> @@ -22,8 +22,12 @@ properties: >> pattern: "^usi@[0-9a-f]+$" >> >> compatible: >> - enum: >> - - samsung,exynos850-usi # for USIv2 (Exynos850, ExynosAutoV9) >> + oneOf: >> + - items: >> + - const: samsung,exynosautov9-usi >> + - const: samsung,exynos850-usi >> + - enum: >> + - samsung,exynos850-usi # for USIv2 (Exynos850, ExynosAutoV9) >> > > Why "samsung,exynos850-usi" is duplicated? Maybe it would be correct > to leave only "items" and remove the "enum"? It has to be like this. Either you use exynos850-usi directly (on Exynos850) or as a fallback (on Autov9). Best regards, Krzysztof ^ permalink raw reply [flat|nested] 24+ messages in thread
* Re: [PATCH v2 1/4] dt-bindings: soc: samsung: usi: add exynosautov9-usi compatible @ 2022-06-30 7:11 ` Krzysztof Kozlowski 0 siblings, 0 replies; 24+ messages in thread From: Krzysztof Kozlowski @ 2022-06-30 7:11 UTC (permalink / raw) To: Sam Protsenko, Chanho Park Cc: Krzysztof Kozlowski, Rob Herring, Alim Akhtar, Jaewon Kim, devicetree, linux-samsung-soc, linux-arm-kernel On 30/06/2022 07:59, Sam Protsenko wrote: > Hi Chanho, > > On Thu, 30 Jun 2022 at 05:19, Chanho Park <chanho61.park@samsung.com> wrote: >> >> Add samsung,exynosautov9-uart dedicated compatible for representing >> usi of Exynos Auto v9 SoC. >> >> Signed-off-by: Chanho Park <chanho61.park@samsung.com> >> --- >> .../devicetree/bindings/soc/samsung/exynos-usi.yaml | 8 ++++++-- >> 1 file changed, 6 insertions(+), 2 deletions(-) >> >> diff --git a/Documentation/devicetree/bindings/soc/samsung/exynos-usi.yaml b/Documentation/devicetree/bindings/soc/samsung/exynos-usi.yaml >> index fde886a8cf43..6e806e950a36 100644 >> --- a/Documentation/devicetree/bindings/soc/samsung/exynos-usi.yaml >> +++ b/Documentation/devicetree/bindings/soc/samsung/exynos-usi.yaml >> @@ -22,8 +22,12 @@ properties: >> pattern: "^usi@[0-9a-f]+$" >> >> compatible: >> - enum: >> - - samsung,exynos850-usi # for USIv2 (Exynos850, ExynosAutoV9) >> + oneOf: >> + - items: >> + - const: samsung,exynosautov9-usi >> + - const: samsung,exynos850-usi >> + - enum: >> + - samsung,exynos850-usi # for USIv2 (Exynos850, ExynosAutoV9) >> > > Why "samsung,exynos850-usi" is duplicated? Maybe it would be correct > to leave only "items" and remove the "enum"? It has to be like this. Either you use exynos850-usi directly (on Exynos850) or as a fallback (on Autov9). Best regards, Krzysztof _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel ^ permalink raw reply [flat|nested] 24+ messages in thread
* Re: [PATCH v2 1/4] dt-bindings: soc: samsung: usi: add exynosautov9-usi compatible 2022-06-30 7:11 ` Krzysztof Kozlowski @ 2022-06-30 7:58 ` Sam Protsenko -1 siblings, 0 replies; 24+ messages in thread From: Sam Protsenko @ 2022-06-30 7:58 UTC (permalink / raw) To: Krzysztof Kozlowski Cc: Chanho Park, Krzysztof Kozlowski, Rob Herring, Alim Akhtar, Jaewon Kim, devicetree, linux-samsung-soc, linux-arm-kernel On Thu, 30 Jun 2022 at 10:11, Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> wrote: > > On 30/06/2022 07:59, Sam Protsenko wrote: > > Hi Chanho, > > > > On Thu, 30 Jun 2022 at 05:19, Chanho Park <chanho61.park@samsung.com> wrote: > >> > >> Add samsung,exynosautov9-uart dedicated compatible for representing > >> usi of Exynos Auto v9 SoC. > >> > >> Signed-off-by: Chanho Park <chanho61.park@samsung.com> > >> --- > >> .../devicetree/bindings/soc/samsung/exynos-usi.yaml | 8 ++++++-- > >> 1 file changed, 6 insertions(+), 2 deletions(-) > >> > >> diff --git a/Documentation/devicetree/bindings/soc/samsung/exynos-usi.yaml b/Documentation/devicetree/bindings/soc/samsung/exynos-usi.yaml > >> index fde886a8cf43..6e806e950a36 100644 > >> --- a/Documentation/devicetree/bindings/soc/samsung/exynos-usi.yaml > >> +++ b/Documentation/devicetree/bindings/soc/samsung/exynos-usi.yaml > >> @@ -22,8 +22,12 @@ properties: > >> pattern: "^usi@[0-9a-f]+$" > >> > >> compatible: > >> - enum: > >> - - samsung,exynos850-usi # for USIv2 (Exynos850, ExynosAutoV9) > >> + oneOf: > >> + - items: > >> + - const: samsung,exynosautov9-usi > >> + - const: samsung,exynos850-usi > >> + - enum: > >> + - samsung,exynos850-usi # for USIv2 (Exynos850, ExynosAutoV9) > >> > > > > Why "samsung,exynos850-usi" is duplicated? Maybe it would be correct > > to leave only "items" and remove the "enum"? > > It has to be like this. Either you use exynos850-usi directly (on > Exynos850) or as a fallback (on Autov9). > Thanks for the explanation, I never thought about that case before, though noticed that pattern in bindings long ago. > Best regards, > Krzysztof ^ permalink raw reply [flat|nested] 24+ messages in thread
* Re: [PATCH v2 1/4] dt-bindings: soc: samsung: usi: add exynosautov9-usi compatible @ 2022-06-30 7:58 ` Sam Protsenko 0 siblings, 0 replies; 24+ messages in thread From: Sam Protsenko @ 2022-06-30 7:58 UTC (permalink / raw) To: Krzysztof Kozlowski Cc: Chanho Park, Krzysztof Kozlowski, Rob Herring, Alim Akhtar, Jaewon Kim, devicetree, linux-samsung-soc, linux-arm-kernel On Thu, 30 Jun 2022 at 10:11, Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> wrote: > > On 30/06/2022 07:59, Sam Protsenko wrote: > > Hi Chanho, > > > > On Thu, 30 Jun 2022 at 05:19, Chanho Park <chanho61.park@samsung.com> wrote: > >> > >> Add samsung,exynosautov9-uart dedicated compatible for representing > >> usi of Exynos Auto v9 SoC. > >> > >> Signed-off-by: Chanho Park <chanho61.park@samsung.com> > >> --- > >> .../devicetree/bindings/soc/samsung/exynos-usi.yaml | 8 ++++++-- > >> 1 file changed, 6 insertions(+), 2 deletions(-) > >> > >> diff --git a/Documentation/devicetree/bindings/soc/samsung/exynos-usi.yaml b/Documentation/devicetree/bindings/soc/samsung/exynos-usi.yaml > >> index fde886a8cf43..6e806e950a36 100644 > >> --- a/Documentation/devicetree/bindings/soc/samsung/exynos-usi.yaml > >> +++ b/Documentation/devicetree/bindings/soc/samsung/exynos-usi.yaml > >> @@ -22,8 +22,12 @@ properties: > >> pattern: "^usi@[0-9a-f]+$" > >> > >> compatible: > >> - enum: > >> - - samsung,exynos850-usi # for USIv2 (Exynos850, ExynosAutoV9) > >> + oneOf: > >> + - items: > >> + - const: samsung,exynosautov9-usi > >> + - const: samsung,exynos850-usi > >> + - enum: > >> + - samsung,exynos850-usi # for USIv2 (Exynos850, ExynosAutoV9) > >> > > > > Why "samsung,exynos850-usi" is duplicated? Maybe it would be correct > > to leave only "items" and remove the "enum"? > > It has to be like this. Either you use exynos850-usi directly (on > Exynos850) or as a fallback (on Autov9). > Thanks for the explanation, I never thought about that case before, though noticed that pattern in bindings long ago. > Best regards, > Krzysztof _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel ^ permalink raw reply [flat|nested] 24+ messages in thread
* Re: [PATCH v2 1/4] dt-bindings: soc: samsung: usi: add exynosautov9-usi compatible 2022-06-30 2:16 ` Chanho Park @ 2022-06-30 7:13 ` Krzysztof Kozlowski -1 siblings, 0 replies; 24+ messages in thread From: Krzysztof Kozlowski @ 2022-06-30 7:13 UTC (permalink / raw) To: Chanho Park, Krzysztof Kozlowski, Rob Herring Cc: Alim Akhtar, Sam Protsenko, Jaewon Kim, devicetree, linux-samsung-soc, linux-arm-kernel On 30/06/2022 04:16, Chanho Park wrote: > Add samsung,exynosautov9-uart dedicated compatible for representing > usi of Exynos Auto v9 SoC. > > Signed-off-by: Chanho Park <chanho61.park@samsung.com> > --- > .../devicetree/bindings/soc/samsung/exynos-usi.yaml | 8 ++++++-- > 1 file changed, 6 insertions(+), 2 deletions(-) > > diff --git a/Documentation/devicetree/bindings/soc/samsung/exynos-usi.yaml b/Documentation/devicetree/bindings/soc/samsung/exynos-usi.yaml > index fde886a8cf43..6e806e950a36 100644 > --- a/Documentation/devicetree/bindings/soc/samsung/exynos-usi.yaml > +++ b/Documentation/devicetree/bindings/soc/samsung/exynos-usi.yaml > @@ -22,8 +22,12 @@ properties: > pattern: "^usi@[0-9a-f]+$" > > compatible: > - enum: > - - samsung,exynos850-usi # for USIv2 (Exynos850, ExynosAutoV9) > + oneOf: > + - items: > + - const: samsung,exynosautov9-usi > + - const: samsung,exynos850-usi > + - enum: > + - samsung,exynos850-usi # for USIv2 (Exynos850, ExynosAutoV9) But now the comment is not appropriate. I can remove it while applying. > > reg: true > Best regards, Krzysztof ^ permalink raw reply [flat|nested] 24+ messages in thread
* Re: [PATCH v2 1/4] dt-bindings: soc: samsung: usi: add exynosautov9-usi compatible @ 2022-06-30 7:13 ` Krzysztof Kozlowski 0 siblings, 0 replies; 24+ messages in thread From: Krzysztof Kozlowski @ 2022-06-30 7:13 UTC (permalink / raw) To: Chanho Park, Krzysztof Kozlowski, Rob Herring Cc: Alim Akhtar, Sam Protsenko, Jaewon Kim, devicetree, linux-samsung-soc, linux-arm-kernel On 30/06/2022 04:16, Chanho Park wrote: > Add samsung,exynosautov9-uart dedicated compatible for representing > usi of Exynos Auto v9 SoC. > > Signed-off-by: Chanho Park <chanho61.park@samsung.com> > --- > .../devicetree/bindings/soc/samsung/exynos-usi.yaml | 8 ++++++-- > 1 file changed, 6 insertions(+), 2 deletions(-) > > diff --git a/Documentation/devicetree/bindings/soc/samsung/exynos-usi.yaml b/Documentation/devicetree/bindings/soc/samsung/exynos-usi.yaml > index fde886a8cf43..6e806e950a36 100644 > --- a/Documentation/devicetree/bindings/soc/samsung/exynos-usi.yaml > +++ b/Documentation/devicetree/bindings/soc/samsung/exynos-usi.yaml > @@ -22,8 +22,12 @@ properties: > pattern: "^usi@[0-9a-f]+$" > > compatible: > - enum: > - - samsung,exynos850-usi # for USIv2 (Exynos850, ExynosAutoV9) > + oneOf: > + - items: > + - const: samsung,exynosautov9-usi > + - const: samsung,exynos850-usi > + - enum: > + - samsung,exynos850-usi # for USIv2 (Exynos850, ExynosAutoV9) But now the comment is not appropriate. I can remove it while applying. > > reg: true > Best regards, Krzysztof _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel ^ permalink raw reply [flat|nested] 24+ messages in thread
* Re: [PATCH v2 1/4] dt-bindings: soc: samsung: usi: add exynosautov9-usi compatible 2022-06-30 2:16 ` Chanho Park @ 2022-06-30 7:59 ` Sam Protsenko -1 siblings, 0 replies; 24+ messages in thread From: Sam Protsenko @ 2022-06-30 7:59 UTC (permalink / raw) To: Chanho Park Cc: Krzysztof Kozlowski, Rob Herring, Alim Akhtar, Jaewon Kim, devicetree, linux-samsung-soc, linux-arm-kernel On Thu, 30 Jun 2022 at 05:19, Chanho Park <chanho61.park@samsung.com> wrote: > > Add samsung,exynosautov9-uart dedicated compatible for representing > usi of Exynos Auto v9 SoC. > > Signed-off-by: Chanho Park <chanho61.park@samsung.com> > --- Reviewed-by: Sam Protsenko <semen.protsenko@linaro.org> with a note for incorrect comment (I guess Krzysztof agreed to remove that while applying the patch). Thanks! > .../devicetree/bindings/soc/samsung/exynos-usi.yaml | 8 ++++++-- > 1 file changed, 6 insertions(+), 2 deletions(-) > > diff --git a/Documentation/devicetree/bindings/soc/samsung/exynos-usi.yaml b/Documentation/devicetree/bindings/soc/samsung/exynos-usi.yaml > index fde886a8cf43..6e806e950a36 100644 > --- a/Documentation/devicetree/bindings/soc/samsung/exynos-usi.yaml > +++ b/Documentation/devicetree/bindings/soc/samsung/exynos-usi.yaml > @@ -22,8 +22,12 @@ properties: > pattern: "^usi@[0-9a-f]+$" > > compatible: > - enum: > - - samsung,exynos850-usi # for USIv2 (Exynos850, ExynosAutoV9) > + oneOf: > + - items: > + - const: samsung,exynosautov9-usi > + - const: samsung,exynos850-usi > + - enum: > + - samsung,exynos850-usi # for USIv2 (Exynos850, ExynosAutoV9) > > reg: true > > -- > 2.36.1 > ^ permalink raw reply [flat|nested] 24+ messages in thread
* Re: [PATCH v2 1/4] dt-bindings: soc: samsung: usi: add exynosautov9-usi compatible @ 2022-06-30 7:59 ` Sam Protsenko 0 siblings, 0 replies; 24+ messages in thread From: Sam Protsenko @ 2022-06-30 7:59 UTC (permalink / raw) To: Chanho Park Cc: Krzysztof Kozlowski, Rob Herring, Alim Akhtar, Jaewon Kim, devicetree, linux-samsung-soc, linux-arm-kernel On Thu, 30 Jun 2022 at 05:19, Chanho Park <chanho61.park@samsung.com> wrote: > > Add samsung,exynosautov9-uart dedicated compatible for representing > usi of Exynos Auto v9 SoC. > > Signed-off-by: Chanho Park <chanho61.park@samsung.com> > --- Reviewed-by: Sam Protsenko <semen.protsenko@linaro.org> with a note for incorrect comment (I guess Krzysztof agreed to remove that while applying the patch). Thanks! > .../devicetree/bindings/soc/samsung/exynos-usi.yaml | 8 ++++++-- > 1 file changed, 6 insertions(+), 2 deletions(-) > > diff --git a/Documentation/devicetree/bindings/soc/samsung/exynos-usi.yaml b/Documentation/devicetree/bindings/soc/samsung/exynos-usi.yaml > index fde886a8cf43..6e806e950a36 100644 > --- a/Documentation/devicetree/bindings/soc/samsung/exynos-usi.yaml > +++ b/Documentation/devicetree/bindings/soc/samsung/exynos-usi.yaml > @@ -22,8 +22,12 @@ properties: > pattern: "^usi@[0-9a-f]+$" > > compatible: > - enum: > - - samsung,exynos850-usi # for USIv2 (Exynos850, ExynosAutoV9) > + oneOf: > + - items: > + - const: samsung,exynosautov9-usi > + - const: samsung,exynos850-usi > + - enum: > + - samsung,exynos850-usi # for USIv2 (Exynos850, ExynosAutoV9) > > reg: true > > -- > 2.36.1 > _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel ^ permalink raw reply [flat|nested] 24+ messages in thread
[parent not found: <CGME20220630021951epcas2p1d35e3e0b6d4267eccbe0468b15a558f0@epcas2p1.samsung.com>]
* [PATCH v2 2/4] dt-bindings: serial: samsung: add exynosautov9-uart compatible [not found] ` <CGME20220630021951epcas2p1d35e3e0b6d4267eccbe0468b15a558f0@epcas2p1.samsung.com> @ 2022-06-30 2:16 ` Chanho Park 0 siblings, 0 replies; 24+ messages in thread From: Chanho Park @ 2022-06-30 2:16 UTC (permalink / raw) To: Krzysztof Kozlowski, Rob Herring Cc: Alim Akhtar, Sam Protsenko, Jaewon Kim, devicetree, linux-samsung-soc, linux-arm-kernel, Chanho Park Add samsung,exynosautov9-uart dedicated compatible for representing uart of Exynos Auto v9 SoC. Signed-off-by: Chanho Park <chanho61.park@samsung.com> --- Documentation/devicetree/bindings/serial/samsung_uart.yaml | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/serial/samsung_uart.yaml b/Documentation/devicetree/bindings/serial/samsung_uart.yaml index 901c1e2cea28..41d3b082eb72 100644 --- a/Documentation/devicetree/bindings/serial/samsung_uart.yaml +++ b/Documentation/devicetree/bindings/serial/samsung_uart.yaml @@ -17,7 +17,10 @@ description: |+ properties: compatible: - items: + oneOf: + - items: + - const: samsung,exynosautov9-uart + - const: samsung,exynos850-uart - enum: - apple,s5l-uart - axis,artpec8-uart -- 2.36.1 ^ permalink raw reply related [flat|nested] 24+ messages in thread
* [PATCH v2 2/4] dt-bindings: serial: samsung: add exynosautov9-uart compatible @ 2022-06-30 2:16 ` Chanho Park 0 siblings, 0 replies; 24+ messages in thread From: Chanho Park @ 2022-06-30 2:16 UTC (permalink / raw) To: Krzysztof Kozlowski, Rob Herring Cc: Alim Akhtar, Sam Protsenko, Jaewon Kim, devicetree, linux-samsung-soc, linux-arm-kernel, Chanho Park Add samsung,exynosautov9-uart dedicated compatible for representing uart of Exynos Auto v9 SoC. Signed-off-by: Chanho Park <chanho61.park@samsung.com> --- Documentation/devicetree/bindings/serial/samsung_uart.yaml | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/serial/samsung_uart.yaml b/Documentation/devicetree/bindings/serial/samsung_uart.yaml index 901c1e2cea28..41d3b082eb72 100644 --- a/Documentation/devicetree/bindings/serial/samsung_uart.yaml +++ b/Documentation/devicetree/bindings/serial/samsung_uart.yaml @@ -17,7 +17,10 @@ description: |+ properties: compatible: - items: + oneOf: + - items: + - const: samsung,exynosautov9-uart + - const: samsung,exynos850-uart - enum: - apple,s5l-uart - axis,artpec8-uart -- 2.36.1 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel ^ permalink raw reply related [flat|nested] 24+ messages in thread
* Re: [PATCH v2 2/4] dt-bindings: serial: samsung: add exynosautov9-uart compatible 2022-06-30 2:16 ` Chanho Park @ 2022-06-30 7:16 ` Krzysztof Kozlowski -1 siblings, 0 replies; 24+ messages in thread From: Krzysztof Kozlowski @ 2022-06-30 7:16 UTC (permalink / raw) To: Chanho Park, Krzysztof Kozlowski, Rob Herring Cc: Alim Akhtar, Sam Protsenko, Jaewon Kim, devicetree, linux-samsung-soc, linux-arm-kernel On 30/06/2022 04:16, Chanho Park wrote: > Add samsung,exynosautov9-uart dedicated compatible for representing > uart of Exynos Auto v9 SoC. s/uart of Exynos Auto v9 SoC/UART of Exynos Auto v9 SoC/ > > Signed-off-by: Chanho Park <chanho61.park@samsung.com> > --- > Documentation/devicetree/bindings/serial/samsung_uart.yaml | 5 ++++- > 1 file changed, 4 insertions(+), 1 deletion(-) > Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Best regards, Krzysztof ^ permalink raw reply [flat|nested] 24+ messages in thread
* Re: [PATCH v2 2/4] dt-bindings: serial: samsung: add exynosautov9-uart compatible @ 2022-06-30 7:16 ` Krzysztof Kozlowski 0 siblings, 0 replies; 24+ messages in thread From: Krzysztof Kozlowski @ 2022-06-30 7:16 UTC (permalink / raw) To: Chanho Park, Krzysztof Kozlowski, Rob Herring Cc: Alim Akhtar, Sam Protsenko, Jaewon Kim, devicetree, linux-samsung-soc, linux-arm-kernel On 30/06/2022 04:16, Chanho Park wrote: > Add samsung,exynosautov9-uart dedicated compatible for representing > uart of Exynos Auto v9 SoC. s/uart of Exynos Auto v9 SoC/UART of Exynos Auto v9 SoC/ > > Signed-off-by: Chanho Park <chanho61.park@samsung.com> > --- > Documentation/devicetree/bindings/serial/samsung_uart.yaml | 5 ++++- > 1 file changed, 4 insertions(+), 1 deletion(-) > Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Best regards, Krzysztof _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel ^ permalink raw reply [flat|nested] 24+ messages in thread
[parent not found: <CGME20220630021951epcas2p44f7b0f49a9d9209793e90cdc8ec0d536@epcas2p4.samsung.com>]
* [PATCH v2 3/4] arm64: dts: exynosautov9: add pdma0 device tree node [not found] ` <CGME20220630021951epcas2p44f7b0f49a9d9209793e90cdc8ec0d536@epcas2p4.samsung.com> @ 2022-06-30 2:16 ` Chanho Park 0 siblings, 0 replies; 24+ messages in thread From: Chanho Park @ 2022-06-30 2:16 UTC (permalink / raw) To: Krzysztof Kozlowski, Rob Herring Cc: Alim Akhtar, Sam Protsenko, Jaewon Kim, devicetree, linux-samsung-soc, linux-arm-kernel, Chanho Park Add an ARM pl330 dma controller DT node as pdma0. Signed-off-by: Chanho Park <chanho61.park@samsung.com> --- arch/arm64/boot/dts/exynos/exynosautov9.dtsi | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/arch/arm64/boot/dts/exynos/exynosautov9.dtsi b/arch/arm64/boot/dts/exynos/exynosautov9.dtsi index 00411d4c9c5a..c4cfa93e4c2e 100644 --- a/arch/arm64/boot/dts/exynos/exynosautov9.dtsi +++ b/arch/arm64/boot/dts/exynos/exynosautov9.dtsi @@ -266,6 +266,16 @@ gic: interrupt-controller@10101000 { IRQ_TYPE_LEVEL_HIGH)>; }; + pdma0: dma-controller@1b2e0000 { + compatible = "arm,pl330", "arm,primecell"; + reg = <0x1b2e0000 0x1000>; + interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cmu_busmc CLK_GOUT_BUSMC_PDMA0_PCLK>; + clock-names = "apb_pclk"; + arm,pl330-broken-no-flushp; + #dma-cells = <1>; + }; + pinctrl_alive: pinctrl@10450000 { compatible = "samsung,exynosautov9-pinctrl"; reg = <0x10450000 0x1000>; -- 2.36.1 ^ permalink raw reply related [flat|nested] 24+ messages in thread
* [PATCH v2 3/4] arm64: dts: exynosautov9: add pdma0 device tree node @ 2022-06-30 2:16 ` Chanho Park 0 siblings, 0 replies; 24+ messages in thread From: Chanho Park @ 2022-06-30 2:16 UTC (permalink / raw) To: Krzysztof Kozlowski, Rob Herring Cc: Alim Akhtar, Sam Protsenko, Jaewon Kim, devicetree, linux-samsung-soc, linux-arm-kernel, Chanho Park Add an ARM pl330 dma controller DT node as pdma0. Signed-off-by: Chanho Park <chanho61.park@samsung.com> --- arch/arm64/boot/dts/exynos/exynosautov9.dtsi | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/arch/arm64/boot/dts/exynos/exynosautov9.dtsi b/arch/arm64/boot/dts/exynos/exynosautov9.dtsi index 00411d4c9c5a..c4cfa93e4c2e 100644 --- a/arch/arm64/boot/dts/exynos/exynosautov9.dtsi +++ b/arch/arm64/boot/dts/exynos/exynosautov9.dtsi @@ -266,6 +266,16 @@ gic: interrupt-controller@10101000 { IRQ_TYPE_LEVEL_HIGH)>; }; + pdma0: dma-controller@1b2e0000 { + compatible = "arm,pl330", "arm,primecell"; + reg = <0x1b2e0000 0x1000>; + interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cmu_busmc CLK_GOUT_BUSMC_PDMA0_PCLK>; + clock-names = "apb_pclk"; + arm,pl330-broken-no-flushp; + #dma-cells = <1>; + }; + pinctrl_alive: pinctrl@10450000 { compatible = "samsung,exynosautov9-pinctrl"; reg = <0x10450000 0x1000>; -- 2.36.1 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel ^ permalink raw reply related [flat|nested] 24+ messages in thread
[parent not found: <CGME20220630021951epcas2p27f839eead168052d03039c2e3efa3460@epcas2p2.samsung.com>]
* [PATCH v2 4/4] arm64: dts: exynosautov9: add usi device tree nodes [not found] ` <CGME20220630021951epcas2p27f839eead168052d03039c2e3efa3460@epcas2p2.samsung.com> @ 2022-06-30 2:16 ` Chanho Park 0 siblings, 0 replies; 24+ messages in thread From: Chanho Park @ 2022-06-30 2:16 UTC (permalink / raw) To: Krzysztof Kozlowski, Rob Herring Cc: Alim Akhtar, Sam Protsenko, Jaewon Kim, devicetree, linux-samsung-soc, linux-arm-kernel, Chanho Park Universal Serial Interface (USI) supports three types of serial interface such as Universal Asynchronous Receiver and Transmitter (UART), Serial Peripheral Interface (SPI), and Inter-Integrated Circuit (I2C). Each protocols can be working independently and configured as one of those using external configuration inputs. Exynos Auto v9 SoC support 12 USIs. When a USI uses two pins such as i2c and 3 wire uarts(RX/TX only), we can use remain two pins as i2c mode. So, we can define one USI node that includes serial/spi and hsi2c. usi_i2c nodes can be used only for i2c mode. We can have below combinations for one USI. 1) The usi node is used either 4 pin uart or 4 pin spi -> No usi_i2c can be used 2) The usi node is used 2 pin uart(RX/TX) and i2c(SDA/SCL) -> usi_i2c should be enabled to use the latter i2c 3) The usi node is used i2c(SDA/SCL) and i2c(SDA/SCL) -> usi_i2c should be enabled to use the latter i2c By default, all USIs are initially set to uart mode by below setting. samsung,mode = <USI_V2_UART>; You can change it either USI_V2_SPI or USI_V2_I2C. Signed-off-by: Chanho Park <chanho61.park@samsung.com> --- .../boot/dts/exynos/exynosautov9-sadk.dts | 2 + arch/arm64/boot/dts/exynos/exynosautov9.dtsi | 1077 ++++++++++++++++- 2 files changed, 1074 insertions(+), 5 deletions(-) diff --git a/arch/arm64/boot/dts/exynos/exynosautov9-sadk.dts b/arch/arm64/boot/dts/exynos/exynosautov9-sadk.dts index 2b30a7458297..eec3192c0631 100644 --- a/arch/arm64/boot/dts/exynos/exynosautov9-sadk.dts +++ b/arch/arm64/boot/dts/exynos/exynosautov9-sadk.dts @@ -50,6 +50,7 @@ ufs_1_fixed_vcc_reg: regulator-1 { }; &serial_0 { + pinctrl-0 = <&uart0_bus_dual>; status = "okay"; }; @@ -74,6 +75,7 @@ &ufs_1 { }; &usi_0 { + samsung,clkreq-on; /* needed for UART mode */ status = "okay"; }; diff --git a/arch/arm64/boot/dts/exynos/exynosautov9.dtsi b/arch/arm64/boot/dts/exynos/exynosautov9.dtsi index c4cfa93e4c2e..2013718532f3 100644 --- a/arch/arm64/boot/dts/exynos/exynosautov9.dtsi +++ b/arch/arm64/boot/dts/exynos/exynosautov9.dtsi @@ -351,12 +351,17 @@ syscon_peric0: syscon@10220000 { reg = <0x10220000 0x2000>; }; + syscon_peric1: syscon@10820000 { + compatible = "samsung,exynosautov9-sysreg", "syscon"; + reg = <0x10820000 0x2000>; + }; + usi_0: usi@103000c0 { - compatible = "samsung,exynos850-usi"; + compatible = "samsung,exynosautov9-usi", + "samsung,exynos850-usi"; reg = <0x103000c0 0x20>; samsung,sysreg = <&syscon_peric0 0x1000>; samsung,mode = <USI_V2_UART>; - samsung,clkreq-on; /* needed for UART mode */ #address-cells = <1>; #size-cells = <1>; ranges; @@ -365,16 +370,1078 @@ usi_0: usi@103000c0 { clock-names = "pclk", "ipclk"; status = "disabled"; - /* USI: UART */ serial_0: serial@10300000 { - compatible = "samsung,exynos850-uart"; + compatible = "samsung,exynosautov9-uart", + "samsung,exynos850-uart"; reg = <0x10300000 0xc0>; interrupts = <GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>; pinctrl-names = "default"; - pinctrl-0 = <&uart0_bus_dual>; + pinctrl-0 = <&uart0_bus>; clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PCLK_0>, <&cmu_peric0 CLK_GOUT_PERIC0_IPCLK_0>; clock-names = "uart", "clk_uart_baud0"; + samsung,uart-fifosize = <256>; + status = "disabled"; + }; + + spi_0: spi@10300000 { + compatible = "samsung,exynosautov9-spi"; + reg = <0x10300000 0x30>; + interrupts = <GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&spi0_bus &spi0_cs_func>; + clocks = <&cmu_peric0 CLK_GOUT_PERIC0_IPCLK_0>, + <&cmu_peric0 CLK_DOUT_PERIC0_USI00_USI>, + <&cmu_peric0 CLK_GOUT_PERIC0_PCLK_0>; + clock-names = "spi", "spi_busclk0", "spi_ioclk"; + samsung,spi-src-clk = <0>; + dmas = <&pdma0 1>, <&pdma0 0>; + dma-names = "tx", "rx"; + num-cs = <1>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + + hsi2c_0: i2c@10300000 { + compatible = "samsung,exynosautov9-hsi2c"; + reg = <0x10300000 0xc0>; + interrupts = <GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&hsi2c0_bus>; + clocks = <&cmu_peric0 CLK_GOUT_PERIC0_IPCLK_0>, + <&cmu_peric0 CLK_GOUT_PERIC0_PCLK_0>; + clock-names = "hsi2c", "hsi2c_pclk"; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + }; + + usi_i2c_0: usi@103100c0 { + compatible = "samsung,exynosautov9-usi", + "samsung,exynos850-usi"; + reg = <0x103100c0 0x20>; + samsung,sysreg = <&syscon_peric0 0x1004>; + samsung,mode = <USI_V2_I2C>; + #address-cells = <1>; + #size-cells = <1>; + ranges; + clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PCLK_1>, + <&cmu_peric0 CLK_GOUT_PERIC0_IPCLK_1>; + clock-names = "pclk", "ipclk"; + status = "disabled"; + + hsi2c_1: i2c@10310000 { + compatible = "samsung,exynosautov9-hsi2c"; + reg = <0x10310000 0xc0>; + interrupts = <GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&hsi2c1_bus>; + clocks = <&cmu_peric0 CLK_GOUT_PERIC0_IPCLK_1>, + <&cmu_peric0 CLK_GOUT_PERIC0_PCLK_1>; + clock-names = "hsi2c", "hsi2c_pclk"; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + }; + + usi_1: usi@103200c0 { + compatible = "samsung,exynosautov9-usi", + "samsung,exynos850-usi"; + reg = <0x103200c0 0x20>; + samsung,sysreg = <&syscon_peric0 0x1008>; + samsung,mode = <USI_V2_UART>; + #address-cells = <1>; + #size-cells = <1>; + ranges; + clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PCLK_2>, + <&cmu_peric0 CLK_GOUT_PERIC0_IPCLK_2>; + clock-names = "pclk", "ipclk"; + status = "disabled"; + + serial_1: serial@10320000 { + compatible = "samsung,exynosautov9-uart", + "samsung,exynos850-uart"; + reg = <0x10320000 0xc0>; + interrupts = <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&uart1_bus>; + clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PCLK_2>, + <&cmu_peric0 CLK_GOUT_PERIC0_IPCLK_2>; + clock-names = "uart", "clk_uart_baud0"; + samsung,uart-fifosize = <256>; + status = "disabled"; + }; + + spi_1: spi@10320000 { + compatible = "samsung,exynosautov9-spi"; + reg = <0x10320000 0x30>; + interrupts = <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&spi1_bus &spi1_cs_func>; + clocks = <&cmu_peric0 CLK_GOUT_PERIC0_IPCLK_2>, + <&cmu_peric0 CLK_DOUT_PERIC0_USI01_USI>, + <&cmu_peric0 CLK_GOUT_PERIC0_PCLK_2>; + clock-names = "spi", "spi_busclk0", "spi_ioclk"; + samsung,spi-src-clk = <0>; + dmas = <&pdma0 3>, <&pdma0 2>; + dma-names = "tx", "rx"; + num-cs = <1>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + + hsi2c_2: i2c@10320000 { + compatible = "samsung,exynosautov9-hsi2c"; + reg = <0x10320000 0xc0>; + interrupts = <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&hsi2c2_bus>; + clocks = <&cmu_peric0 CLK_GOUT_PERIC0_IPCLK_2>, + <&cmu_peric0 CLK_GOUT_PERIC0_PCLK_2>; + clock-names = "hsi2c", "hsi2c_pclk"; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + }; + + usi_i2c_1: usi@103300c0 { + compatible = "samsung,exynosautov9-usi", + "samsung,exynos850-usi"; + reg = <0x103300c0 0x20>; + samsung,sysreg = <&syscon_peric0 0x100c>; + samsung,mode = <USI_V2_I2C>; + #address-cells = <1>; + #size-cells = <1>; + ranges; + clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PCLK_3>, + <&cmu_peric0 CLK_GOUT_PERIC0_IPCLK_3>; + clock-names = "pclk", "ipclk"; + status = "disabled"; + + hsi2c_3: i2c@10330000 { + compatible = "samsung,exynosautov9-hsi2c"; + reg = <0x10330000 0xc0>; + interrupts = <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&hsi2c3_bus>; + clocks = <&cmu_peric0 CLK_GOUT_PERIC0_IPCLK_3>, + <&cmu_peric0 CLK_GOUT_PERIC0_PCLK_3>; + clock-names = "hsi2c", "hsi2c_pclk"; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + }; + + usi_2: usi@103400c0 { + compatible = "samsung,exynosautov9-usi", + "samsung,exynos850-usi"; + reg = <0x103400c0 0x20>; + samsung,sysreg = <&syscon_peric0 0x1010>; + samsung,mode = <USI_V2_UART>; + #address-cells = <1>; + #size-cells = <1>; + ranges; + clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PCLK_4>, + <&cmu_peric0 CLK_GOUT_PERIC0_IPCLK_4>; + clock-names = "pclk", "ipclk"; + status = "disabled"; + + serial_2: serial@10340000 { + compatible = "samsung,exynosautov9-uart", + "samsung,exynos850-uart"; + reg = <0x10340000 0xc0>; + interrupts = <GIC_SPI 349 IRQ_TYPE_LEVEL_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&uart2_bus>; + clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PCLK_4>, + <&cmu_peric0 CLK_GOUT_PERIC0_IPCLK_4>; + clock-names = "uart", "clk_uart_baud0"; + samsung,uart-fifosize = <64>; + status = "disabled"; + }; + + spi_2: spi@10340000 { + compatible = "samsung,exynosautov9-spi"; + reg = <0x10340000 0x30>; + interrupts = <GIC_SPI 349 IRQ_TYPE_LEVEL_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&spi2_bus &spi2_cs_func>; + clocks = <&cmu_peric0 CLK_GOUT_PERIC0_IPCLK_4>, + <&cmu_peric0 CLK_DOUT_PERIC0_USI02_USI>, + <&cmu_peric0 CLK_GOUT_PERIC0_PCLK_4>; + clock-names = "spi", "spi_busclk0", "spi_ioclk"; + samsung,spi-src-clk = <0>; + dmas = <&pdma0 5>, <&pdma0 4>; + dma-names = "tx", "rx"; + num-cs = <1>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + + hsi2c_4: i2c@10340000 { + compatible = "samsung,exynosautov9-hsi2c"; + reg = <0x10340000 0xc0>; + interrupts = <GIC_SPI 349 IRQ_TYPE_LEVEL_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&hsi2c4_bus>; + clocks = <&cmu_peric0 CLK_GOUT_PERIC0_IPCLK_4>, + <&cmu_peric0 CLK_GOUT_PERIC0_PCLK_4>; + clock-names = "hsi2c", "hsi2c_pclk"; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + }; + + usi_i2c_2: usi@103500c0 { + compatible = "samsung,exynosautov9-usi", + "samsung,exynos850-usi"; + reg = <0x103500c0 0x20>; + samsung,sysreg = <&syscon_peric0 0x1014>; + samsung,mode = <USI_V2_I2C>; + #address-cells = <1>; + #size-cells = <1>; + ranges; + clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PCLK_5>, + <&cmu_peric0 CLK_GOUT_PERIC0_IPCLK_5>; + clock-names = "pclk", "ipclk"; + status = "disabled"; + + hsi2c_5: i2c@10350000 { + compatible = "samsung,exynosautov9-hsi2c"; + reg = <0x10350000 0xc0>; + interrupts = <GIC_SPI 348 IRQ_TYPE_LEVEL_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&hsi2c5_bus>; + clocks = <&cmu_peric0 CLK_GOUT_PERIC0_IPCLK_5>, + <&cmu_peric0 CLK_GOUT_PERIC0_PCLK_5>; + clock-names = "hsi2c", "hsi2c_pclk"; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + }; + + usi_3: usi@103600c0 { + compatible = "samsung,exynosautov9-usi", + "samsung,exynos850-usi"; + reg = <0x103600c0 0x20>; + samsung,sysreg = <&syscon_peric0 0x1018>; + samsung,mode = <USI_V2_UART>; + #address-cells = <1>; + #size-cells = <1>; + ranges; + clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PCLK_6>, + <&cmu_peric0 CLK_GOUT_PERIC0_IPCLK_6>; + clock-names = "pclk", "ipclk"; + status = "disabled"; + + serial_3: serial@10360000 { + compatible = "samsung,exynosautov9-uart", + "samsung,exynos850-uart"; + reg = <0x10360000 0xc0>; + interrupts = <GIC_SPI 351 IRQ_TYPE_LEVEL_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&uart3_bus>; + clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PCLK_6>, + <&cmu_peric0 CLK_GOUT_PERIC0_IPCLK_6>; + clock-names = "uart", "clk_uart_baud0"; + samsung,uart-fifosize = <64>; + status = "disabled"; + }; + + spi_3: spi@10360000 { + compatible = "samsung,exynosautov9-spi"; + reg = <0x10360000 0x30>; + interrupts = <GIC_SPI 351 IRQ_TYPE_LEVEL_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&spi3_bus &spi3_cs_func>; + clocks = <&cmu_peric0 CLK_GOUT_PERIC0_IPCLK_6>, + <&cmu_peric0 CLK_DOUT_PERIC0_USI03_USI>, + <&cmu_peric0 CLK_GOUT_PERIC0_PCLK_6>; + clock-names = "spi", "spi_busclk0", "spi_ioclk"; + samsung,spi-src-clk = <0>; + dmas = <&pdma0 7>, <&pdma0 6>; + dma-names = "tx", "rx"; + num-cs = <1>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + + hsi2c_6: i2c@10360000 { + compatible = "samsung,exynosautov9-hsi2c"; + reg = <0x10360000 0xc0>; + interrupts = <GIC_SPI 351 IRQ_TYPE_LEVEL_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&hsi2c6_bus>; + clocks = <&cmu_peric0 CLK_GOUT_PERIC0_IPCLK_6>, + <&cmu_peric0 CLK_GOUT_PERIC0_PCLK_6>; + clock-names = "hsi2c", "hsi2c_pclk"; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + }; + + usi_i2c_3: usi@103700c0 { + compatible = "samsung,exynosautov9-usi", + "samsung,exynos850-usi"; + reg = <0x103700c0 0x20>; + samsung,sysreg = <&syscon_peric0 0x101c>; + samsung,mode = <USI_V2_I2C>; + #address-cells = <1>; + #size-cells = <1>; + ranges; + clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PCLK_7>, + <&cmu_peric0 CLK_GOUT_PERIC0_IPCLK_7>; + clock-names = "pclk", "ipclk"; + status = "disabled"; + + hsi2c_7: i2c@10370000 { + compatible = "samsung,exynosautov9-hsi2c"; + reg = <0x10370000 0xc0>; + interrupts = <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&hsi2c7_bus>; + clocks = <&cmu_peric0 CLK_GOUT_PERIC0_IPCLK_7>, + <&cmu_peric0 CLK_GOUT_PERIC0_PCLK_7>; + clock-names = "hsi2c", "hsi2c_pclk"; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + }; + + usi_4: usi@103800c0 { + compatible = "samsung,exynosautov9-usi", + "samsung,exynos850-usi"; + reg = <0x103800c0 0x20>; + samsung,sysreg = <&syscon_peric0 0x1020>; + samsung,mode = <USI_V2_UART>; + #address-cells = <1>; + #size-cells = <1>; + ranges; + clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PCLK_8>, + <&cmu_peric0 CLK_GOUT_PERIC0_IPCLK_8>; + clock-names = "pclk", "ipclk"; + status = "disabled"; + + serial_4: serial@10380000 { + compatible = "samsung,exynosautov9-uart", + "samsung,exynos850-uart"; + reg = <0x10380000 0xc0>; + interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&uart4_bus>; + clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PCLK_8>, + <&cmu_peric0 CLK_GOUT_PERIC0_IPCLK_8>; + clock-names = "uart", "clk_uart_baud0"; + samsung,uart-fifosize = <64>; + status = "disabled"; + }; + + spi_4: spi@10380000 { + compatible = "samsung,exynosautov9-spi"; + reg = <0x10380000 0x30>; + interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&spi4_bus &spi4_cs_func>; + clocks = <&cmu_peric0 CLK_GOUT_PERIC0_IPCLK_8>, + <&cmu_peric0 CLK_DOUT_PERIC0_USI04_USI>, + <&cmu_peric0 CLK_GOUT_PERIC0_PCLK_8>; + clock-names = "spi", "spi_busclk0", "spi_ioclk"; + samsung,spi-src-clk = <0>; + dmas = <&pdma0 9>, <&pdma0 8>; + dma-names = "tx", "rx"; + num-cs = <1>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + + hsi2c_8: i2c@10380000 { + compatible = "samsung,exynosautov9-hsi2c"; + reg = <0x10380000 0xc0>; + interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&hsi2c8_bus>; + clocks = <&cmu_peric0 CLK_GOUT_PERIC0_IPCLK_8>, + <&cmu_peric0 CLK_GOUT_PERIC0_PCLK_8>; + clock-names = "hsi2c", "hsi2c_pclk"; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + }; + + usi_i2c_4: usi@103900c0 { + compatible = "samsung,exynosautov9-usi", + "samsung,exynos850-usi"; + reg = <0x103900c0 0x20>; + samsung,sysreg = <&syscon_peric0 0x1024>; + samsung,mode = <USI_V2_I2C>; + #address-cells = <1>; + #size-cells = <1>; + ranges; + clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PCLK_9>, + <&cmu_peric0 CLK_GOUT_PERIC0_IPCLK_9>; + clock-names = "pclk", "ipclk"; + status = "disabled"; + + hsi2c_9: i2c@10390000 { + compatible = "samsung,exynosautov9-hsi2c"; + reg = <0x10390000 0xc0>; + interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&hsi2c9_bus>; + clocks = <&cmu_peric0 CLK_GOUT_PERIC0_IPCLK_9>, + <&cmu_peric0 CLK_GOUT_PERIC0_PCLK_9>; + clock-names = "hsi2c", "hsi2c_pclk"; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + }; + + usi_5: usi@103a00c0 { + compatible = "samsung,exynosautov9-usi", + "samsung,exynos850-usi"; + reg = <0x103a00c0 0x20>; + samsung,sysreg = <&syscon_peric0 0x1028>; + samsung,mode = <USI_V2_UART>; + #address-cells = <1>; + #size-cells = <1>; + ranges; + clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PCLK_10>, + <&cmu_peric0 CLK_GOUT_PERIC0_IPCLK_10>; + clock-names = "pclk", "ipclk"; + status = "disabled"; + + serial_5: serial@103a0000 { + compatible = "samsung,exynosautov9-uart", + "samsung,exynos850-uart"; + reg = <0x103a0000 0xc0>; + interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&uart5_bus>; + clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PCLK_10>, + <&cmu_peric0 CLK_GOUT_PERIC0_IPCLK_10>; + clock-names = "uart", "clk_uart_baud0"; + samsung,uart-fifosize = <64>; + status = "disabled"; + }; + + spi_5: spi@103a0000 { + compatible = "samsung,exynosautov9-spi"; + reg = <0x103a0000 0x30>; + interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&spi5_bus &spi5_cs_func>; + clocks = <&cmu_peric0 CLK_GOUT_PERIC0_IPCLK_10>, + <&cmu_peric0 CLK_DOUT_PERIC0_USI05_USI>, + <&cmu_peric0 CLK_GOUT_PERIC0_PCLK_10>; + clock-names = "spi", "spi_busclk0", "spi_ioclk"; + samsung,spi-src-clk = <0>; + dmas = <&pdma0 11>, <&pdma0 10>; + dma-names = "tx", "rx"; + num-cs = <1>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + + hsi2c_10: i2c@103a0000 { + compatible = "samsung,exynosautov9-hsi2c"; + reg = <0x103a0000 0xc0>; + interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&hsi2c10_bus>; + clocks = <&cmu_peric0 CLK_GOUT_PERIC0_IPCLK_10>, + <&cmu_peric0 CLK_GOUT_PERIC0_PCLK_10>; + clock-names = "hsi2c", "hsi2c_pclk"; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + }; + + usi_i2c_5: usi@103b00c0 { + compatible = "samsung,exynosautov9-usi", + "samsung,exynos850-usi"; + reg = <0x103b00c0 0x20>; + samsung,sysreg = <&syscon_peric0 0x102c>; + samsung,mode = <USI_V2_I2C>; + #address-cells = <1>; + #size-cells = <1>; + ranges; + clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PCLK_11>, + <&cmu_peric0 CLK_GOUT_PERIC0_IPCLK_11>; + clock-names = "pclk", "ipclk"; + status = "disabled"; + + hsi2c_11: i2c@103b0000 { + compatible = "samsung,exynosautov9-hsi2c"; + reg = <0x103b0000 0xc0>; + interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&hsi2c11_bus>; + clocks = <&cmu_peric0 CLK_GOUT_PERIC0_IPCLK_11>, + <&cmu_peric0 CLK_GOUT_PERIC0_PCLK_11>; + clock-names = "hsi2c", "hsi2c_pclk"; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + }; + + usi_6: usi@109000c0 { + compatible = "samsung,exynosautov9-usi", + "samsung,exynos850-usi"; + reg = <0x109000c0 0x20>; + samsung,sysreg = <&syscon_peric1 0x1000>; + samsung,mode = <USI_V2_UART>; + #address-cells = <1>; + #size-cells = <1>; + ranges; + clocks = <&cmu_peric1 CLK_GOUT_PERIC1_PCLK_0>, + <&cmu_peric1 CLK_GOUT_PERIC1_IPCLK_0>; + clock-names = "pclk", "ipclk"; + status = "disabled"; + + serial_6: serial@10900000 { + compatible = "samsung,exynosautov9-uart", + "samsung,exynos850-uart"; + reg = <0x10900000 0xc0>; + interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&uart6_bus>; + clocks = <&cmu_peric1 CLK_GOUT_PERIC1_PCLK_0>, + <&cmu_peric1 CLK_GOUT_PERIC1_IPCLK_0>; + clock-names = "uart", "clk_uart_baud0"; + samsung,uart-fifosize = <256>; + status = "disabled"; + }; + + spi_6: spi@10900000 { + compatible = "samsung,exynosautov9-spi"; + reg = <0x10900000 0x30>; + interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&spi6_bus &spi6_cs_func>; + clocks = <&cmu_peric1 CLK_GOUT_PERIC1_IPCLK_0>, + <&cmu_peric1 CLK_DOUT_PERIC1_USI06_USI>, + <&cmu_peric1 CLK_GOUT_PERIC1_PCLK_0>; + clock-names = "spi", "spi_busclk0", "spi_ioclk"; + samsung,spi-src-clk = <0>; + dmas = <&pdma0 13>, <&pdma0 12>; + dma-names = "tx", "rx"; + num-cs = <1>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + + hsi2c_12: i2c@10900000 { + compatible = "samsung,exynosautov9-hsi2c"; + reg = <0x10900000 0xc0>; + interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&hsi2c12_bus>; + clocks = <&cmu_peric1 CLK_GOUT_PERIC1_IPCLK_0>, + <&cmu_peric1 CLK_GOUT_PERIC1_PCLK_0>; + clock-names = "hsi2c", "hsi2c_pclk"; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + }; + + usi_i2c_6: usi@109100c0 { + compatible = "samsung,exynosautov9-usi", + "samsung,exynos850-usi"; + reg = <0x109100c0 0x20>; + samsung,sysreg = <&syscon_peric1 0x1004>; + samsung,mode = <USI_V2_I2C>; + #address-cells = <1>; + #size-cells = <1>; + ranges; + clocks = <&cmu_peric1 CLK_GOUT_PERIC1_PCLK_1>, + <&cmu_peric1 CLK_GOUT_PERIC1_IPCLK_1>; + clock-names = "pclk", "ipclk"; + status = "disabled"; + + hsi2c_13: i2c@10910000 { + compatible = "samsung,exynosautov9-hsi2c"; + reg = <0x10910000 0xc0>; + interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&hsi2c13_bus>; + clocks = <&cmu_peric1 CLK_GOUT_PERIC1_IPCLK_1>, + <&cmu_peric1 CLK_GOUT_PERIC1_PCLK_1>; + clock-names = "hsi2c", "hsi2c_pclk"; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + }; + + usi_7: usi@109200c0 { + compatible = "samsung,exynosautov9-usi", + "samsung,exynos850-usi"; + reg = <0x109200c0 0x20>; + samsung,sysreg = <&syscon_peric1 0x1008>; + samsung,mode = <USI_V2_UART>; + #address-cells = <1>; + #size-cells = <1>; + ranges; + clocks = <&cmu_peric1 CLK_GOUT_PERIC1_PCLK_2>, + <&cmu_peric1 CLK_GOUT_PERIC1_IPCLK_2>; + clock-names = "pclk", "ipclk"; + status = "disabled"; + + serial_7: serial@10920000 { + compatible = "samsung,exynosautov9-uart", + "samsung,exynos850-uart"; + reg = <0x10920000 0xc0>; + interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&uart7_bus>; + clocks = <&cmu_peric1 CLK_GOUT_PERIC1_PCLK_2>, + <&cmu_peric1 CLK_GOUT_PERIC1_IPCLK_2>; + clock-names = "uart", "clk_uart_baud0"; + samsung,uart-fifosize = <64>; + status = "disabled"; + }; + + spi_7: spi@10920000 { + compatible = "samsung,exynosautov9-spi"; + reg = <0x10920000 0x30>; + interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&spi7_bus &spi7_cs_func>; + clocks = <&cmu_peric1 CLK_GOUT_PERIC1_IPCLK_2>, + <&cmu_peric1 CLK_DOUT_PERIC1_USI07_USI>, + <&cmu_peric1 CLK_GOUT_PERIC1_PCLK_2>; + clock-names = "spi", "spi_busclk0", "spi_ioclk"; + samsung,spi-src-clk = <0>; + dmas = <&pdma0 15>, <&pdma0 14>; + dma-names = "tx", "rx"; + num-cs = <1>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + + hsi2c_14: i2c@10920000 { + compatible = "samsung,exynosautov9-hsi2c"; + reg = <0x10920000 0xc0>; + interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&hsi2c14_bus>; + clocks = <&cmu_peric1 CLK_GOUT_PERIC1_IPCLK_2>, + <&cmu_peric1 CLK_GOUT_PERIC1_PCLK_2>; + clock-names = "hsi2c", "hsi2c_pclk"; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + }; + + usi_i2c_7: usi@109300c0 { + compatible = "samsung,exynosautov9-usi", + "samsung,exynos850-usi"; + reg = <0x109300c0 0x20>; + samsung,sysreg = <&syscon_peric1 0x100c>; + samsung,mode = <USI_V2_I2C>; + #address-cells = <1>; + #size-cells = <1>; + ranges; + clocks = <&cmu_peric1 CLK_GOUT_PERIC1_PCLK_3>, + <&cmu_peric1 CLK_GOUT_PERIC1_IPCLK_3>; + clock-names = "pclk", "ipclk"; + status = "disabled"; + + hsi2c_15: i2c@10930000 { + compatible = "samsung,exynosautov9-hsi2c"; + reg = <0x10930000 0xc0>; + interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&hsi2c15_bus>; + clocks = <&cmu_peric1 CLK_GOUT_PERIC1_IPCLK_3>, + <&cmu_peric1 CLK_GOUT_PERIC1_PCLK_3>; + clock-names = "hsi2c", "hsi2c_pclk"; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + }; + + usi_8: usi@109400c0 { + compatible = "samsung,exynosautov9-usi", + "samsung,exynos850-usi"; + reg = <0x109400c0 0x20>; + samsung,sysreg = <&syscon_peric1 0x1010>; + samsung,mode = <USI_V2_UART>; + #address-cells = <1>; + #size-cells = <1>; + ranges; + clocks = <&cmu_peric1 CLK_GOUT_PERIC1_PCLK_4>, + <&cmu_peric1 CLK_GOUT_PERIC1_IPCLK_4>; + clock-names = "pclk", "ipclk"; + status = "disabled"; + + serial_8: serial@10940000 { + compatible = "samsung,exynosautov9-uart", + "samsung,exynos850-uart"; + reg = <0x10940000 0xc0>; + interrupts = <GIC_SPI 362 IRQ_TYPE_LEVEL_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&uart8_bus>; + clocks = <&cmu_peric1 CLK_GOUT_PERIC1_PCLK_4>, + <&cmu_peric1 CLK_GOUT_PERIC1_IPCLK_4>; + clock-names = "uart", "clk_uart_baud0"; + samsung,uart-fifosize = <64>; + status = "disabled"; + }; + + spi_8: spi@10940000 { + compatible = "samsung,exynosautov9-spi"; + reg = <0x10940000 0x30>; + interrupts = <GIC_SPI 362 IRQ_TYPE_LEVEL_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&spi8_bus &spi8_cs_func>; + clocks = <&cmu_peric1 CLK_GOUT_PERIC1_IPCLK_4>, + <&cmu_peric1 CLK_DOUT_PERIC1_USI08_USI>, + <&cmu_peric1 CLK_GOUT_PERIC1_PCLK_4>; + clock-names = "spi", "spi_busclk0", "spi_ioclk"; + samsung,spi-src-clk = <0>; + dmas = <&pdma0 17>, <&pdma0 16>; + dma-names = "tx", "rx"; + num-cs = <1>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + + hsi2c_16: i2c@10940000 { + compatible = "samsung,exynosautov9-hsi2c"; + reg = <0x10940000 0xc0>; + interrupts = <GIC_SPI 362 IRQ_TYPE_LEVEL_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&hsi2c16_bus>; + clocks = <&cmu_peric1 CLK_GOUT_PERIC1_IPCLK_4>, + <&cmu_peric1 CLK_GOUT_PERIC1_PCLK_4>; + clock-names = "hsi2c", "hsi2c_pclk"; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + }; + + usi_i2c_8: usi@109500c0 { + compatible = "samsung,exynosautov9-usi", + "samsung,exynos850-usi"; + reg = <0x109500c0 0x20>; + samsung,sysreg = <&syscon_peric1 0x1014>; + samsung,mode = <USI_V2_I2C>; + #address-cells = <1>; + #size-cells = <1>; + ranges; + clocks = <&cmu_peric1 CLK_GOUT_PERIC1_PCLK_5>, + <&cmu_peric1 CLK_GOUT_PERIC1_IPCLK_5>; + clock-names = "pclk", "ipclk"; + status = "disabled"; + + hsi2c_17: i2c@10950000 { + compatible = "samsung,exynosautov9-hsi2c"; + reg = <0x10950000 0xc0>; + interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&hsi2c17_bus>; + clocks = <&cmu_peric1 CLK_GOUT_PERIC1_IPCLK_5>, + <&cmu_peric1 CLK_GOUT_PERIC1_PCLK_5>; + clock-names = "hsi2c", "hsi2c_pclk"; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + }; + + usi_9: usi@109600c0 { + compatible = "samsung,exynosautov9-usi", + "samsung,exynos850-usi"; + reg = <0x109600c0 0x20>; + samsung,sysreg = <&syscon_peric1 0x1018>; + samsung,mode = <USI_V2_UART>; + #address-cells = <1>; + #size-cells = <1>; + ranges; + clocks = <&cmu_peric1 CLK_GOUT_PERIC1_PCLK_6>, + <&cmu_peric1 CLK_GOUT_PERIC1_IPCLK_6>; + clock-names = "pclk", "ipclk"; + status = "disabled"; + + serial_9: serial@10960000 { + compatible = "samsung,exynosautov9-uart", + "samsung,exynos850-uart"; + reg = <0x10960000 0xc0>; + interrupts = <GIC_SPI 364 IRQ_TYPE_LEVEL_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&uart9_bus>; + clocks = <&cmu_peric1 CLK_GOUT_PERIC1_PCLK_6>, + <&cmu_peric1 CLK_GOUT_PERIC1_IPCLK_6>; + clock-names = "uart", "clk_uart_baud0"; + samsung,uart-fifosize = <64>; + status = "disabled"; + }; + + spi_9: spi@10960000 { + compatible = "samsung,exynosautov9-spi"; + reg = <0x10960000 0x30>; + interrupts = <GIC_SPI 364 IRQ_TYPE_LEVEL_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&spi9_bus &spi9_cs_func>; + clocks = <&cmu_peric1 CLK_GOUT_PERIC1_IPCLK_6>, + <&cmu_peric1 CLK_DOUT_PERIC1_USI09_USI>, + <&cmu_peric1 CLK_GOUT_PERIC1_PCLK_6>; + clock-names = "spi", "spi_busclk0", "spi_ioclk"; + samsung,spi-src-clk = <0>; + dmas = <&pdma0 19>, <&pdma0 18>; + dma-names = "tx", "rx"; + num-cs = <1>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + + hsi2c_18: i2c@10960000 { + compatible = "samsung,exynosautov9-hsi2c"; + reg = <0x10960000 0xc0>; + interrupts = <GIC_SPI 364 IRQ_TYPE_LEVEL_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&hsi2c18_bus>; + clocks = <&cmu_peric1 CLK_GOUT_PERIC1_IPCLK_6>, + <&cmu_peric1 CLK_GOUT_PERIC1_PCLK_6>; + clock-names = "hsi2c", "hsi2c_pclk"; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + }; + + usi_i2c_9: usi@109700c0 { + compatible = "samsung,exynosautov9-usi", + "samsung,exynos850-usi"; + reg = <0x109700c0 0x20>; + samsung,sysreg = <&syscon_peric1 0x101c>; + samsung,mode = <USI_V2_I2C>; + #address-cells = <1>; + #size-cells = <1>; + ranges; + clocks = <&cmu_peric1 CLK_GOUT_PERIC1_PCLK_7>, + <&cmu_peric1 CLK_GOUT_PERIC1_IPCLK_7>; + clock-names = "pclk", "ipclk"; + status = "disabled"; + + hsi2c_19: i2c@10970000 { + compatible = "samsung,exynosautov9-hsi2c"; + reg = <0x10970000 0xc0>; + interrupts = <GIC_SPI 363 IRQ_TYPE_LEVEL_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&hsi2c19_bus>; + clocks = <&cmu_peric1 CLK_GOUT_PERIC1_IPCLK_7>, + <&cmu_peric1 CLK_GOUT_PERIC1_PCLK_7>; + clock-names = "hsi2c", "hsi2c_pclk"; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + }; + + usi_10: usi@109800c0 { + compatible = "samsung,exynosautov9-usi", + "samsung,exynos850-usi"; + reg = <0x109800c0 0x20>; + samsung,sysreg = <&syscon_peric1 0x1020>; + samsung,mode = <USI_V2_UART>; + #address-cells = <1>; + #size-cells = <1>; + ranges; + clocks = <&cmu_peric1 CLK_GOUT_PERIC1_PCLK_8>, + <&cmu_peric1 CLK_GOUT_PERIC1_IPCLK_8>; + clock-names = "pclk", "ipclk"; + status = "disabled"; + + serial_10: serial@10980000 { + compatible = "samsung,exynosautov9-uart", + "samsung,exynos850-uart"; + reg = <0x10980000 0xc0>; + interrupts = <GIC_SPI 366 IRQ_TYPE_LEVEL_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&uart10_bus>; + clocks = <&cmu_peric1 CLK_GOUT_PERIC1_PCLK_8>, + <&cmu_peric1 CLK_GOUT_PERIC1_IPCLK_8>; + clock-names = "uart", "clk_uart_baud0"; + samsung,uart-fifosize = <64>; + status = "disabled"; + }; + + spi_10: spi@10980000 { + compatible = "samsung,exynosautov9-spi"; + reg = <0x10980000 0x30>; + interrupts = <GIC_SPI 366 IRQ_TYPE_LEVEL_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&spi10_bus &spi10_cs_func>; + clocks = <&cmu_peric1 CLK_GOUT_PERIC1_IPCLK_8>, + <&cmu_peric1 CLK_DOUT_PERIC1_USI10_USI>, + <&cmu_peric1 CLK_GOUT_PERIC1_PCLK_8>; + clock-names = "spi", "spi_busclk0", "spi_ioclk"; + samsung,spi-src-clk = <0>; + dmas = <&pdma0 21>, <&pdma0 20>; + dma-names = "tx", "rx"; + num-cs = <1>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + + hsi2c_20: i2c@10980000 { + compatible = "samsung,exynosautov9-hsi2c"; + reg = <0x10980000 0xc0>; + interrupts = <GIC_SPI 366 IRQ_TYPE_LEVEL_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&hsi2c20_bus>; + clocks = <&cmu_peric1 CLK_GOUT_PERIC1_IPCLK_8>, + <&cmu_peric1 CLK_GOUT_PERIC1_PCLK_8>; + clock-names = "hsi2c", "hsi2c_pclk"; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + }; + + usi_i2c_10: usi@109900c0 { + compatible = "samsung,exynosautov9-usi", + "samsung,exynos850-usi"; + reg = <0x109900c0 0x20>; + samsung,sysreg = <&syscon_peric1 0x1024>; + samsung,mode = <USI_V2_I2C>; + #address-cells = <1>; + #size-cells = <1>; + ranges; + clocks = <&cmu_peric1 CLK_GOUT_PERIC1_PCLK_9>, + <&cmu_peric1 CLK_GOUT_PERIC1_IPCLK_9>; + clock-names = "pclk", "ipclk"; + status = "disabled"; + + hsi2c_21: i2c@10990000 { + compatible = "samsung,exynosautov9-hsi2c"; + reg = <0x10990000 0xc0>; + interrupts = <GIC_SPI 365 IRQ_TYPE_LEVEL_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&hsi2c21_bus>; + clocks = <&cmu_peric1 CLK_GOUT_PERIC1_IPCLK_9>, + <&cmu_peric1 CLK_GOUT_PERIC1_PCLK_9>; + clock-names = "hsi2c", "hsi2c_pclk"; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + }; + + usi_11: usi@109a00c0 { + compatible = "samsung,exynosautov9-usi", + "samsung,exynos850-usi"; + reg = <0x109a00c0 0x20>; + samsung,sysreg = <&syscon_peric1 0x1028>; + samsung,mode = <USI_V2_UART>; + #address-cells = <1>; + #size-cells = <1>; + ranges; + clocks = <&cmu_peric1 CLK_GOUT_PERIC1_PCLK_10>, + <&cmu_peric1 CLK_GOUT_PERIC1_IPCLK_10>; + clock-names = "pclk", "ipclk"; + status = "disabled"; + + serial_11: serial@109a0000 { + compatible = "samsung,exynosautov9-uart", + "samsung,exynos850-uart"; + reg = <0x109a0000 0xc0>; + interrupts = <GIC_SPI 368 IRQ_TYPE_LEVEL_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&uart11_bus>; + clocks = <&cmu_peric1 CLK_GOUT_PERIC1_PCLK_10>, + <&cmu_peric1 CLK_GOUT_PERIC1_IPCLK_10>; + clock-names = "uart", "clk_uart_baud0"; + samsung,uart-fifosize = <64>; + status = "disabled"; + }; + + spi_11: spi@109a0000 { + compatible = "samsung,exynosautov9-spi"; + reg = <0x109a0000 0x30>; + interrupts = <GIC_SPI 368 IRQ_TYPE_LEVEL_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&spi11_bus &spi11_cs_func>; + clocks = <&cmu_peric1 CLK_GOUT_PERIC1_IPCLK_10>, + <&cmu_peric1 CLK_DOUT_PERIC1_USI11_USI>, + <&cmu_peric1 CLK_GOUT_PERIC1_PCLK_10>; + clock-names = "spi", "spi_busclk0", "spi_ioclk"; + samsung,spi-src-clk = <0>; + num-cs = <1>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + + hsi2c_22: i2c@109a0000 { + compatible = "samsung,exynosautov9-hsi2c"; + reg = <0x109a0000 0xc0>; + pinctrl-names = "default"; + pinctrl-0 = <&hsi2c22_bus>; + interrupts = <GIC_SPI 368 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cmu_peric1 CLK_GOUT_PERIC1_IPCLK_10>, + <&cmu_peric1 CLK_GOUT_PERIC1_PCLK_10>; + clock-names = "hsi2c", "hsi2c_pclk"; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + }; + + usi_i2c_11: usi@109b00c0 { + compatible = "samsung,exynosautov9-usi", + "samsung,exynos850-usi"; + reg = <0x109b00c0 0x20>; + samsung,sysreg = <&syscon_peric1 0x102c>; + samsung,mode = <USI_V2_I2C>; + #address-cells = <1>; + #size-cells = <1>; + ranges; + clocks = <&cmu_peric1 CLK_GOUT_PERIC1_PCLK_11>, + <&cmu_peric1 CLK_GOUT_PERIC1_IPCLK_11>; + clock-names = "pclk", "ipclk"; + status = "disabled"; + + hsi2c_23: i2c@109b0000 { + compatible = "samsung,exynosautov9-hsi2c"; + reg = <0x109b0000 0xc0>; + interrupts = <GIC_SPI 367 IRQ_TYPE_LEVEL_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&hsi2c23_bus>; + clocks = <&cmu_peric1 CLK_GOUT_PERIC1_IPCLK_11>, + <&cmu_peric1 CLK_GOUT_PERIC1_PCLK_11>; + clock-names = "hsi2c", "hsi2c_pclk"; + #address-cells = <1>; + #size-cells = <0>; status = "disabled"; }; }; -- 2.36.1 ^ permalink raw reply related [flat|nested] 24+ messages in thread
* [PATCH v2 4/4] arm64: dts: exynosautov9: add usi device tree nodes @ 2022-06-30 2:16 ` Chanho Park 0 siblings, 0 replies; 24+ messages in thread From: Chanho Park @ 2022-06-30 2:16 UTC (permalink / raw) To: Krzysztof Kozlowski, Rob Herring Cc: Alim Akhtar, Sam Protsenko, Jaewon Kim, devicetree, linux-samsung-soc, linux-arm-kernel, Chanho Park Universal Serial Interface (USI) supports three types of serial interface such as Universal Asynchronous Receiver and Transmitter (UART), Serial Peripheral Interface (SPI), and Inter-Integrated Circuit (I2C). Each protocols can be working independently and configured as one of those using external configuration inputs. Exynos Auto v9 SoC support 12 USIs. When a USI uses two pins such as i2c and 3 wire uarts(RX/TX only), we can use remain two pins as i2c mode. So, we can define one USI node that includes serial/spi and hsi2c. usi_i2c nodes can be used only for i2c mode. We can have below combinations for one USI. 1) The usi node is used either 4 pin uart or 4 pin spi -> No usi_i2c can be used 2) The usi node is used 2 pin uart(RX/TX) and i2c(SDA/SCL) -> usi_i2c should be enabled to use the latter i2c 3) The usi node is used i2c(SDA/SCL) and i2c(SDA/SCL) -> usi_i2c should be enabled to use the latter i2c By default, all USIs are initially set to uart mode by below setting. samsung,mode = <USI_V2_UART>; You can change it either USI_V2_SPI or USI_V2_I2C. Signed-off-by: Chanho Park <chanho61.park@samsung.com> --- .../boot/dts/exynos/exynosautov9-sadk.dts | 2 + arch/arm64/boot/dts/exynos/exynosautov9.dtsi | 1077 ++++++++++++++++- 2 files changed, 1074 insertions(+), 5 deletions(-) diff --git a/arch/arm64/boot/dts/exynos/exynosautov9-sadk.dts b/arch/arm64/boot/dts/exynos/exynosautov9-sadk.dts index 2b30a7458297..eec3192c0631 100644 --- a/arch/arm64/boot/dts/exynos/exynosautov9-sadk.dts +++ b/arch/arm64/boot/dts/exynos/exynosautov9-sadk.dts @@ -50,6 +50,7 @@ ufs_1_fixed_vcc_reg: regulator-1 { }; &serial_0 { + pinctrl-0 = <&uart0_bus_dual>; status = "okay"; }; @@ -74,6 +75,7 @@ &ufs_1 { }; &usi_0 { + samsung,clkreq-on; /* needed for UART mode */ status = "okay"; }; diff --git a/arch/arm64/boot/dts/exynos/exynosautov9.dtsi b/arch/arm64/boot/dts/exynos/exynosautov9.dtsi index c4cfa93e4c2e..2013718532f3 100644 --- a/arch/arm64/boot/dts/exynos/exynosautov9.dtsi +++ b/arch/arm64/boot/dts/exynos/exynosautov9.dtsi @@ -351,12 +351,17 @@ syscon_peric0: syscon@10220000 { reg = <0x10220000 0x2000>; }; + syscon_peric1: syscon@10820000 { + compatible = "samsung,exynosautov9-sysreg", "syscon"; + reg = <0x10820000 0x2000>; + }; + usi_0: usi@103000c0 { - compatible = "samsung,exynos850-usi"; + compatible = "samsung,exynosautov9-usi", + "samsung,exynos850-usi"; reg = <0x103000c0 0x20>; samsung,sysreg = <&syscon_peric0 0x1000>; samsung,mode = <USI_V2_UART>; - samsung,clkreq-on; /* needed for UART mode */ #address-cells = <1>; #size-cells = <1>; ranges; @@ -365,16 +370,1078 @@ usi_0: usi@103000c0 { clock-names = "pclk", "ipclk"; status = "disabled"; - /* USI: UART */ serial_0: serial@10300000 { - compatible = "samsung,exynos850-uart"; + compatible = "samsung,exynosautov9-uart", + "samsung,exynos850-uart"; reg = <0x10300000 0xc0>; interrupts = <GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>; pinctrl-names = "default"; - pinctrl-0 = <&uart0_bus_dual>; + pinctrl-0 = <&uart0_bus>; clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PCLK_0>, <&cmu_peric0 CLK_GOUT_PERIC0_IPCLK_0>; clock-names = "uart", "clk_uart_baud0"; + samsung,uart-fifosize = <256>; + status = "disabled"; + }; + + spi_0: spi@10300000 { + compatible = "samsung,exynosautov9-spi"; + reg = <0x10300000 0x30>; + interrupts = <GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&spi0_bus &spi0_cs_func>; + clocks = <&cmu_peric0 CLK_GOUT_PERIC0_IPCLK_0>, + <&cmu_peric0 CLK_DOUT_PERIC0_USI00_USI>, + <&cmu_peric0 CLK_GOUT_PERIC0_PCLK_0>; + clock-names = "spi", "spi_busclk0", "spi_ioclk"; + samsung,spi-src-clk = <0>; + dmas = <&pdma0 1>, <&pdma0 0>; + dma-names = "tx", "rx"; + num-cs = <1>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + + hsi2c_0: i2c@10300000 { + compatible = "samsung,exynosautov9-hsi2c"; + reg = <0x10300000 0xc0>; + interrupts = <GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&hsi2c0_bus>; + clocks = <&cmu_peric0 CLK_GOUT_PERIC0_IPCLK_0>, + <&cmu_peric0 CLK_GOUT_PERIC0_PCLK_0>; + clock-names = "hsi2c", "hsi2c_pclk"; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + }; + + usi_i2c_0: usi@103100c0 { + compatible = "samsung,exynosautov9-usi", + "samsung,exynos850-usi"; + reg = <0x103100c0 0x20>; + samsung,sysreg = <&syscon_peric0 0x1004>; + samsung,mode = <USI_V2_I2C>; + #address-cells = <1>; + #size-cells = <1>; + ranges; + clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PCLK_1>, + <&cmu_peric0 CLK_GOUT_PERIC0_IPCLK_1>; + clock-names = "pclk", "ipclk"; + status = "disabled"; + + hsi2c_1: i2c@10310000 { + compatible = "samsung,exynosautov9-hsi2c"; + reg = <0x10310000 0xc0>; + interrupts = <GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&hsi2c1_bus>; + clocks = <&cmu_peric0 CLK_GOUT_PERIC0_IPCLK_1>, + <&cmu_peric0 CLK_GOUT_PERIC0_PCLK_1>; + clock-names = "hsi2c", "hsi2c_pclk"; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + }; + + usi_1: usi@103200c0 { + compatible = "samsung,exynosautov9-usi", + "samsung,exynos850-usi"; + reg = <0x103200c0 0x20>; + samsung,sysreg = <&syscon_peric0 0x1008>; + samsung,mode = <USI_V2_UART>; + #address-cells = <1>; + #size-cells = <1>; + ranges; + clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PCLK_2>, + <&cmu_peric0 CLK_GOUT_PERIC0_IPCLK_2>; + clock-names = "pclk", "ipclk"; + status = "disabled"; + + serial_1: serial@10320000 { + compatible = "samsung,exynosautov9-uart", + "samsung,exynos850-uart"; + reg = <0x10320000 0xc0>; + interrupts = <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&uart1_bus>; + clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PCLK_2>, + <&cmu_peric0 CLK_GOUT_PERIC0_IPCLK_2>; + clock-names = "uart", "clk_uart_baud0"; + samsung,uart-fifosize = <256>; + status = "disabled"; + }; + + spi_1: spi@10320000 { + compatible = "samsung,exynosautov9-spi"; + reg = <0x10320000 0x30>; + interrupts = <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&spi1_bus &spi1_cs_func>; + clocks = <&cmu_peric0 CLK_GOUT_PERIC0_IPCLK_2>, + <&cmu_peric0 CLK_DOUT_PERIC0_USI01_USI>, + <&cmu_peric0 CLK_GOUT_PERIC0_PCLK_2>; + clock-names = "spi", "spi_busclk0", "spi_ioclk"; + samsung,spi-src-clk = <0>; + dmas = <&pdma0 3>, <&pdma0 2>; + dma-names = "tx", "rx"; + num-cs = <1>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + + hsi2c_2: i2c@10320000 { + compatible = "samsung,exynosautov9-hsi2c"; + reg = <0x10320000 0xc0>; + interrupts = <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&hsi2c2_bus>; + clocks = <&cmu_peric0 CLK_GOUT_PERIC0_IPCLK_2>, + <&cmu_peric0 CLK_GOUT_PERIC0_PCLK_2>; + clock-names = "hsi2c", "hsi2c_pclk"; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + }; + + usi_i2c_1: usi@103300c0 { + compatible = "samsung,exynosautov9-usi", + "samsung,exynos850-usi"; + reg = <0x103300c0 0x20>; + samsung,sysreg = <&syscon_peric0 0x100c>; + samsung,mode = <USI_V2_I2C>; + #address-cells = <1>; + #size-cells = <1>; + ranges; + clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PCLK_3>, + <&cmu_peric0 CLK_GOUT_PERIC0_IPCLK_3>; + clock-names = "pclk", "ipclk"; + status = "disabled"; + + hsi2c_3: i2c@10330000 { + compatible = "samsung,exynosautov9-hsi2c"; + reg = <0x10330000 0xc0>; + interrupts = <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&hsi2c3_bus>; + clocks = <&cmu_peric0 CLK_GOUT_PERIC0_IPCLK_3>, + <&cmu_peric0 CLK_GOUT_PERIC0_PCLK_3>; + clock-names = "hsi2c", "hsi2c_pclk"; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + }; + + usi_2: usi@103400c0 { + compatible = "samsung,exynosautov9-usi", + "samsung,exynos850-usi"; + reg = <0x103400c0 0x20>; + samsung,sysreg = <&syscon_peric0 0x1010>; + samsung,mode = <USI_V2_UART>; + #address-cells = <1>; + #size-cells = <1>; + ranges; + clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PCLK_4>, + <&cmu_peric0 CLK_GOUT_PERIC0_IPCLK_4>; + clock-names = "pclk", "ipclk"; + status = "disabled"; + + serial_2: serial@10340000 { + compatible = "samsung,exynosautov9-uart", + "samsung,exynos850-uart"; + reg = <0x10340000 0xc0>; + interrupts = <GIC_SPI 349 IRQ_TYPE_LEVEL_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&uart2_bus>; + clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PCLK_4>, + <&cmu_peric0 CLK_GOUT_PERIC0_IPCLK_4>; + clock-names = "uart", "clk_uart_baud0"; + samsung,uart-fifosize = <64>; + status = "disabled"; + }; + + spi_2: spi@10340000 { + compatible = "samsung,exynosautov9-spi"; + reg = <0x10340000 0x30>; + interrupts = <GIC_SPI 349 IRQ_TYPE_LEVEL_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&spi2_bus &spi2_cs_func>; + clocks = <&cmu_peric0 CLK_GOUT_PERIC0_IPCLK_4>, + <&cmu_peric0 CLK_DOUT_PERIC0_USI02_USI>, + <&cmu_peric0 CLK_GOUT_PERIC0_PCLK_4>; + clock-names = "spi", "spi_busclk0", "spi_ioclk"; + samsung,spi-src-clk = <0>; + dmas = <&pdma0 5>, <&pdma0 4>; + dma-names = "tx", "rx"; + num-cs = <1>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + + hsi2c_4: i2c@10340000 { + compatible = "samsung,exynosautov9-hsi2c"; + reg = <0x10340000 0xc0>; + interrupts = <GIC_SPI 349 IRQ_TYPE_LEVEL_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&hsi2c4_bus>; + clocks = <&cmu_peric0 CLK_GOUT_PERIC0_IPCLK_4>, + <&cmu_peric0 CLK_GOUT_PERIC0_PCLK_4>; + clock-names = "hsi2c", "hsi2c_pclk"; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + }; + + usi_i2c_2: usi@103500c0 { + compatible = "samsung,exynosautov9-usi", + "samsung,exynos850-usi"; + reg = <0x103500c0 0x20>; + samsung,sysreg = <&syscon_peric0 0x1014>; + samsung,mode = <USI_V2_I2C>; + #address-cells = <1>; + #size-cells = <1>; + ranges; + clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PCLK_5>, + <&cmu_peric0 CLK_GOUT_PERIC0_IPCLK_5>; + clock-names = "pclk", "ipclk"; + status = "disabled"; + + hsi2c_5: i2c@10350000 { + compatible = "samsung,exynosautov9-hsi2c"; + reg = <0x10350000 0xc0>; + interrupts = <GIC_SPI 348 IRQ_TYPE_LEVEL_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&hsi2c5_bus>; + clocks = <&cmu_peric0 CLK_GOUT_PERIC0_IPCLK_5>, + <&cmu_peric0 CLK_GOUT_PERIC0_PCLK_5>; + clock-names = "hsi2c", "hsi2c_pclk"; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + }; + + usi_3: usi@103600c0 { + compatible = "samsung,exynosautov9-usi", + "samsung,exynos850-usi"; + reg = <0x103600c0 0x20>; + samsung,sysreg = <&syscon_peric0 0x1018>; + samsung,mode = <USI_V2_UART>; + #address-cells = <1>; + #size-cells = <1>; + ranges; + clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PCLK_6>, + <&cmu_peric0 CLK_GOUT_PERIC0_IPCLK_6>; + clock-names = "pclk", "ipclk"; + status = "disabled"; + + serial_3: serial@10360000 { + compatible = "samsung,exynosautov9-uart", + "samsung,exynos850-uart"; + reg = <0x10360000 0xc0>; + interrupts = <GIC_SPI 351 IRQ_TYPE_LEVEL_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&uart3_bus>; + clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PCLK_6>, + <&cmu_peric0 CLK_GOUT_PERIC0_IPCLK_6>; + clock-names = "uart", "clk_uart_baud0"; + samsung,uart-fifosize = <64>; + status = "disabled"; + }; + + spi_3: spi@10360000 { + compatible = "samsung,exynosautov9-spi"; + reg = <0x10360000 0x30>; + interrupts = <GIC_SPI 351 IRQ_TYPE_LEVEL_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&spi3_bus &spi3_cs_func>; + clocks = <&cmu_peric0 CLK_GOUT_PERIC0_IPCLK_6>, + <&cmu_peric0 CLK_DOUT_PERIC0_USI03_USI>, + <&cmu_peric0 CLK_GOUT_PERIC0_PCLK_6>; + clock-names = "spi", "spi_busclk0", "spi_ioclk"; + samsung,spi-src-clk = <0>; + dmas = <&pdma0 7>, <&pdma0 6>; + dma-names = "tx", "rx"; + num-cs = <1>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + + hsi2c_6: i2c@10360000 { + compatible = "samsung,exynosautov9-hsi2c"; + reg = <0x10360000 0xc0>; + interrupts = <GIC_SPI 351 IRQ_TYPE_LEVEL_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&hsi2c6_bus>; + clocks = <&cmu_peric0 CLK_GOUT_PERIC0_IPCLK_6>, + <&cmu_peric0 CLK_GOUT_PERIC0_PCLK_6>; + clock-names = "hsi2c", "hsi2c_pclk"; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + }; + + usi_i2c_3: usi@103700c0 { + compatible = "samsung,exynosautov9-usi", + "samsung,exynos850-usi"; + reg = <0x103700c0 0x20>; + samsung,sysreg = <&syscon_peric0 0x101c>; + samsung,mode = <USI_V2_I2C>; + #address-cells = <1>; + #size-cells = <1>; + ranges; + clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PCLK_7>, + <&cmu_peric0 CLK_GOUT_PERIC0_IPCLK_7>; + clock-names = "pclk", "ipclk"; + status = "disabled"; + + hsi2c_7: i2c@10370000 { + compatible = "samsung,exynosautov9-hsi2c"; + reg = <0x10370000 0xc0>; + interrupts = <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&hsi2c7_bus>; + clocks = <&cmu_peric0 CLK_GOUT_PERIC0_IPCLK_7>, + <&cmu_peric0 CLK_GOUT_PERIC0_PCLK_7>; + clock-names = "hsi2c", "hsi2c_pclk"; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + }; + + usi_4: usi@103800c0 { + compatible = "samsung,exynosautov9-usi", + "samsung,exynos850-usi"; + reg = <0x103800c0 0x20>; + samsung,sysreg = <&syscon_peric0 0x1020>; + samsung,mode = <USI_V2_UART>; + #address-cells = <1>; + #size-cells = <1>; + ranges; + clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PCLK_8>, + <&cmu_peric0 CLK_GOUT_PERIC0_IPCLK_8>; + clock-names = "pclk", "ipclk"; + status = "disabled"; + + serial_4: serial@10380000 { + compatible = "samsung,exynosautov9-uart", + "samsung,exynos850-uart"; + reg = <0x10380000 0xc0>; + interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&uart4_bus>; + clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PCLK_8>, + <&cmu_peric0 CLK_GOUT_PERIC0_IPCLK_8>; + clock-names = "uart", "clk_uart_baud0"; + samsung,uart-fifosize = <64>; + status = "disabled"; + }; + + spi_4: spi@10380000 { + compatible = "samsung,exynosautov9-spi"; + reg = <0x10380000 0x30>; + interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&spi4_bus &spi4_cs_func>; + clocks = <&cmu_peric0 CLK_GOUT_PERIC0_IPCLK_8>, + <&cmu_peric0 CLK_DOUT_PERIC0_USI04_USI>, + <&cmu_peric0 CLK_GOUT_PERIC0_PCLK_8>; + clock-names = "spi", "spi_busclk0", "spi_ioclk"; + samsung,spi-src-clk = <0>; + dmas = <&pdma0 9>, <&pdma0 8>; + dma-names = "tx", "rx"; + num-cs = <1>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + + hsi2c_8: i2c@10380000 { + compatible = "samsung,exynosautov9-hsi2c"; + reg = <0x10380000 0xc0>; + interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&hsi2c8_bus>; + clocks = <&cmu_peric0 CLK_GOUT_PERIC0_IPCLK_8>, + <&cmu_peric0 CLK_GOUT_PERIC0_PCLK_8>; + clock-names = "hsi2c", "hsi2c_pclk"; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + }; + + usi_i2c_4: usi@103900c0 { + compatible = "samsung,exynosautov9-usi", + "samsung,exynos850-usi"; + reg = <0x103900c0 0x20>; + samsung,sysreg = <&syscon_peric0 0x1024>; + samsung,mode = <USI_V2_I2C>; + #address-cells = <1>; + #size-cells = <1>; + ranges; + clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PCLK_9>, + <&cmu_peric0 CLK_GOUT_PERIC0_IPCLK_9>; + clock-names = "pclk", "ipclk"; + status = "disabled"; + + hsi2c_9: i2c@10390000 { + compatible = "samsung,exynosautov9-hsi2c"; + reg = <0x10390000 0xc0>; + interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&hsi2c9_bus>; + clocks = <&cmu_peric0 CLK_GOUT_PERIC0_IPCLK_9>, + <&cmu_peric0 CLK_GOUT_PERIC0_PCLK_9>; + clock-names = "hsi2c", "hsi2c_pclk"; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + }; + + usi_5: usi@103a00c0 { + compatible = "samsung,exynosautov9-usi", + "samsung,exynos850-usi"; + reg = <0x103a00c0 0x20>; + samsung,sysreg = <&syscon_peric0 0x1028>; + samsung,mode = <USI_V2_UART>; + #address-cells = <1>; + #size-cells = <1>; + ranges; + clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PCLK_10>, + <&cmu_peric0 CLK_GOUT_PERIC0_IPCLK_10>; + clock-names = "pclk", "ipclk"; + status = "disabled"; + + serial_5: serial@103a0000 { + compatible = "samsung,exynosautov9-uart", + "samsung,exynos850-uart"; + reg = <0x103a0000 0xc0>; + interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&uart5_bus>; + clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PCLK_10>, + <&cmu_peric0 CLK_GOUT_PERIC0_IPCLK_10>; + clock-names = "uart", "clk_uart_baud0"; + samsung,uart-fifosize = <64>; + status = "disabled"; + }; + + spi_5: spi@103a0000 { + compatible = "samsung,exynosautov9-spi"; + reg = <0x103a0000 0x30>; + interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&spi5_bus &spi5_cs_func>; + clocks = <&cmu_peric0 CLK_GOUT_PERIC0_IPCLK_10>, + <&cmu_peric0 CLK_DOUT_PERIC0_USI05_USI>, + <&cmu_peric0 CLK_GOUT_PERIC0_PCLK_10>; + clock-names = "spi", "spi_busclk0", "spi_ioclk"; + samsung,spi-src-clk = <0>; + dmas = <&pdma0 11>, <&pdma0 10>; + dma-names = "tx", "rx"; + num-cs = <1>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + + hsi2c_10: i2c@103a0000 { + compatible = "samsung,exynosautov9-hsi2c"; + reg = <0x103a0000 0xc0>; + interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&hsi2c10_bus>; + clocks = <&cmu_peric0 CLK_GOUT_PERIC0_IPCLK_10>, + <&cmu_peric0 CLK_GOUT_PERIC0_PCLK_10>; + clock-names = "hsi2c", "hsi2c_pclk"; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + }; + + usi_i2c_5: usi@103b00c0 { + compatible = "samsung,exynosautov9-usi", + "samsung,exynos850-usi"; + reg = <0x103b00c0 0x20>; + samsung,sysreg = <&syscon_peric0 0x102c>; + samsung,mode = <USI_V2_I2C>; + #address-cells = <1>; + #size-cells = <1>; + ranges; + clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PCLK_11>, + <&cmu_peric0 CLK_GOUT_PERIC0_IPCLK_11>; + clock-names = "pclk", "ipclk"; + status = "disabled"; + + hsi2c_11: i2c@103b0000 { + compatible = "samsung,exynosautov9-hsi2c"; + reg = <0x103b0000 0xc0>; + interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&hsi2c11_bus>; + clocks = <&cmu_peric0 CLK_GOUT_PERIC0_IPCLK_11>, + <&cmu_peric0 CLK_GOUT_PERIC0_PCLK_11>; + clock-names = "hsi2c", "hsi2c_pclk"; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + }; + + usi_6: usi@109000c0 { + compatible = "samsung,exynosautov9-usi", + "samsung,exynos850-usi"; + reg = <0x109000c0 0x20>; + samsung,sysreg = <&syscon_peric1 0x1000>; + samsung,mode = <USI_V2_UART>; + #address-cells = <1>; + #size-cells = <1>; + ranges; + clocks = <&cmu_peric1 CLK_GOUT_PERIC1_PCLK_0>, + <&cmu_peric1 CLK_GOUT_PERIC1_IPCLK_0>; + clock-names = "pclk", "ipclk"; + status = "disabled"; + + serial_6: serial@10900000 { + compatible = "samsung,exynosautov9-uart", + "samsung,exynos850-uart"; + reg = <0x10900000 0xc0>; + interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&uart6_bus>; + clocks = <&cmu_peric1 CLK_GOUT_PERIC1_PCLK_0>, + <&cmu_peric1 CLK_GOUT_PERIC1_IPCLK_0>; + clock-names = "uart", "clk_uart_baud0"; + samsung,uart-fifosize = <256>; + status = "disabled"; + }; + + spi_6: spi@10900000 { + compatible = "samsung,exynosautov9-spi"; + reg = <0x10900000 0x30>; + interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&spi6_bus &spi6_cs_func>; + clocks = <&cmu_peric1 CLK_GOUT_PERIC1_IPCLK_0>, + <&cmu_peric1 CLK_DOUT_PERIC1_USI06_USI>, + <&cmu_peric1 CLK_GOUT_PERIC1_PCLK_0>; + clock-names = "spi", "spi_busclk0", "spi_ioclk"; + samsung,spi-src-clk = <0>; + dmas = <&pdma0 13>, <&pdma0 12>; + dma-names = "tx", "rx"; + num-cs = <1>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + + hsi2c_12: i2c@10900000 { + compatible = "samsung,exynosautov9-hsi2c"; + reg = <0x10900000 0xc0>; + interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&hsi2c12_bus>; + clocks = <&cmu_peric1 CLK_GOUT_PERIC1_IPCLK_0>, + <&cmu_peric1 CLK_GOUT_PERIC1_PCLK_0>; + clock-names = "hsi2c", "hsi2c_pclk"; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + }; + + usi_i2c_6: usi@109100c0 { + compatible = "samsung,exynosautov9-usi", + "samsung,exynos850-usi"; + reg = <0x109100c0 0x20>; + samsung,sysreg = <&syscon_peric1 0x1004>; + samsung,mode = <USI_V2_I2C>; + #address-cells = <1>; + #size-cells = <1>; + ranges; + clocks = <&cmu_peric1 CLK_GOUT_PERIC1_PCLK_1>, + <&cmu_peric1 CLK_GOUT_PERIC1_IPCLK_1>; + clock-names = "pclk", "ipclk"; + status = "disabled"; + + hsi2c_13: i2c@10910000 { + compatible = "samsung,exynosautov9-hsi2c"; + reg = <0x10910000 0xc0>; + interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&hsi2c13_bus>; + clocks = <&cmu_peric1 CLK_GOUT_PERIC1_IPCLK_1>, + <&cmu_peric1 CLK_GOUT_PERIC1_PCLK_1>; + clock-names = "hsi2c", "hsi2c_pclk"; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + }; + + usi_7: usi@109200c0 { + compatible = "samsung,exynosautov9-usi", + "samsung,exynos850-usi"; + reg = <0x109200c0 0x20>; + samsung,sysreg = <&syscon_peric1 0x1008>; + samsung,mode = <USI_V2_UART>; + #address-cells = <1>; + #size-cells = <1>; + ranges; + clocks = <&cmu_peric1 CLK_GOUT_PERIC1_PCLK_2>, + <&cmu_peric1 CLK_GOUT_PERIC1_IPCLK_2>; + clock-names = "pclk", "ipclk"; + status = "disabled"; + + serial_7: serial@10920000 { + compatible = "samsung,exynosautov9-uart", + "samsung,exynos850-uart"; + reg = <0x10920000 0xc0>; + interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&uart7_bus>; + clocks = <&cmu_peric1 CLK_GOUT_PERIC1_PCLK_2>, + <&cmu_peric1 CLK_GOUT_PERIC1_IPCLK_2>; + clock-names = "uart", "clk_uart_baud0"; + samsung,uart-fifosize = <64>; + status = "disabled"; + }; + + spi_7: spi@10920000 { + compatible = "samsung,exynosautov9-spi"; + reg = <0x10920000 0x30>; + interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&spi7_bus &spi7_cs_func>; + clocks = <&cmu_peric1 CLK_GOUT_PERIC1_IPCLK_2>, + <&cmu_peric1 CLK_DOUT_PERIC1_USI07_USI>, + <&cmu_peric1 CLK_GOUT_PERIC1_PCLK_2>; + clock-names = "spi", "spi_busclk0", "spi_ioclk"; + samsung,spi-src-clk = <0>; + dmas = <&pdma0 15>, <&pdma0 14>; + dma-names = "tx", "rx"; + num-cs = <1>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + + hsi2c_14: i2c@10920000 { + compatible = "samsung,exynosautov9-hsi2c"; + reg = <0x10920000 0xc0>; + interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&hsi2c14_bus>; + clocks = <&cmu_peric1 CLK_GOUT_PERIC1_IPCLK_2>, + <&cmu_peric1 CLK_GOUT_PERIC1_PCLK_2>; + clock-names = "hsi2c", "hsi2c_pclk"; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + }; + + usi_i2c_7: usi@109300c0 { + compatible = "samsung,exynosautov9-usi", + "samsung,exynos850-usi"; + reg = <0x109300c0 0x20>; + samsung,sysreg = <&syscon_peric1 0x100c>; + samsung,mode = <USI_V2_I2C>; + #address-cells = <1>; + #size-cells = <1>; + ranges; + clocks = <&cmu_peric1 CLK_GOUT_PERIC1_PCLK_3>, + <&cmu_peric1 CLK_GOUT_PERIC1_IPCLK_3>; + clock-names = "pclk", "ipclk"; + status = "disabled"; + + hsi2c_15: i2c@10930000 { + compatible = "samsung,exynosautov9-hsi2c"; + reg = <0x10930000 0xc0>; + interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&hsi2c15_bus>; + clocks = <&cmu_peric1 CLK_GOUT_PERIC1_IPCLK_3>, + <&cmu_peric1 CLK_GOUT_PERIC1_PCLK_3>; + clock-names = "hsi2c", "hsi2c_pclk"; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + }; + + usi_8: usi@109400c0 { + compatible = "samsung,exynosautov9-usi", + "samsung,exynos850-usi"; + reg = <0x109400c0 0x20>; + samsung,sysreg = <&syscon_peric1 0x1010>; + samsung,mode = <USI_V2_UART>; + #address-cells = <1>; + #size-cells = <1>; + ranges; + clocks = <&cmu_peric1 CLK_GOUT_PERIC1_PCLK_4>, + <&cmu_peric1 CLK_GOUT_PERIC1_IPCLK_4>; + clock-names = "pclk", "ipclk"; + status = "disabled"; + + serial_8: serial@10940000 { + compatible = "samsung,exynosautov9-uart", + "samsung,exynos850-uart"; + reg = <0x10940000 0xc0>; + interrupts = <GIC_SPI 362 IRQ_TYPE_LEVEL_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&uart8_bus>; + clocks = <&cmu_peric1 CLK_GOUT_PERIC1_PCLK_4>, + <&cmu_peric1 CLK_GOUT_PERIC1_IPCLK_4>; + clock-names = "uart", "clk_uart_baud0"; + samsung,uart-fifosize = <64>; + status = "disabled"; + }; + + spi_8: spi@10940000 { + compatible = "samsung,exynosautov9-spi"; + reg = <0x10940000 0x30>; + interrupts = <GIC_SPI 362 IRQ_TYPE_LEVEL_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&spi8_bus &spi8_cs_func>; + clocks = <&cmu_peric1 CLK_GOUT_PERIC1_IPCLK_4>, + <&cmu_peric1 CLK_DOUT_PERIC1_USI08_USI>, + <&cmu_peric1 CLK_GOUT_PERIC1_PCLK_4>; + clock-names = "spi", "spi_busclk0", "spi_ioclk"; + samsung,spi-src-clk = <0>; + dmas = <&pdma0 17>, <&pdma0 16>; + dma-names = "tx", "rx"; + num-cs = <1>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + + hsi2c_16: i2c@10940000 { + compatible = "samsung,exynosautov9-hsi2c"; + reg = <0x10940000 0xc0>; + interrupts = <GIC_SPI 362 IRQ_TYPE_LEVEL_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&hsi2c16_bus>; + clocks = <&cmu_peric1 CLK_GOUT_PERIC1_IPCLK_4>, + <&cmu_peric1 CLK_GOUT_PERIC1_PCLK_4>; + clock-names = "hsi2c", "hsi2c_pclk"; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + }; + + usi_i2c_8: usi@109500c0 { + compatible = "samsung,exynosautov9-usi", + "samsung,exynos850-usi"; + reg = <0x109500c0 0x20>; + samsung,sysreg = <&syscon_peric1 0x1014>; + samsung,mode = <USI_V2_I2C>; + #address-cells = <1>; + #size-cells = <1>; + ranges; + clocks = <&cmu_peric1 CLK_GOUT_PERIC1_PCLK_5>, + <&cmu_peric1 CLK_GOUT_PERIC1_IPCLK_5>; + clock-names = "pclk", "ipclk"; + status = "disabled"; + + hsi2c_17: i2c@10950000 { + compatible = "samsung,exynosautov9-hsi2c"; + reg = <0x10950000 0xc0>; + interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&hsi2c17_bus>; + clocks = <&cmu_peric1 CLK_GOUT_PERIC1_IPCLK_5>, + <&cmu_peric1 CLK_GOUT_PERIC1_PCLK_5>; + clock-names = "hsi2c", "hsi2c_pclk"; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + }; + + usi_9: usi@109600c0 { + compatible = "samsung,exynosautov9-usi", + "samsung,exynos850-usi"; + reg = <0x109600c0 0x20>; + samsung,sysreg = <&syscon_peric1 0x1018>; + samsung,mode = <USI_V2_UART>; + #address-cells = <1>; + #size-cells = <1>; + ranges; + clocks = <&cmu_peric1 CLK_GOUT_PERIC1_PCLK_6>, + <&cmu_peric1 CLK_GOUT_PERIC1_IPCLK_6>; + clock-names = "pclk", "ipclk"; + status = "disabled"; + + serial_9: serial@10960000 { + compatible = "samsung,exynosautov9-uart", + "samsung,exynos850-uart"; + reg = <0x10960000 0xc0>; + interrupts = <GIC_SPI 364 IRQ_TYPE_LEVEL_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&uart9_bus>; + clocks = <&cmu_peric1 CLK_GOUT_PERIC1_PCLK_6>, + <&cmu_peric1 CLK_GOUT_PERIC1_IPCLK_6>; + clock-names = "uart", "clk_uart_baud0"; + samsung,uart-fifosize = <64>; + status = "disabled"; + }; + + spi_9: spi@10960000 { + compatible = "samsung,exynosautov9-spi"; + reg = <0x10960000 0x30>; + interrupts = <GIC_SPI 364 IRQ_TYPE_LEVEL_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&spi9_bus &spi9_cs_func>; + clocks = <&cmu_peric1 CLK_GOUT_PERIC1_IPCLK_6>, + <&cmu_peric1 CLK_DOUT_PERIC1_USI09_USI>, + <&cmu_peric1 CLK_GOUT_PERIC1_PCLK_6>; + clock-names = "spi", "spi_busclk0", "spi_ioclk"; + samsung,spi-src-clk = <0>; + dmas = <&pdma0 19>, <&pdma0 18>; + dma-names = "tx", "rx"; + num-cs = <1>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + + hsi2c_18: i2c@10960000 { + compatible = "samsung,exynosautov9-hsi2c"; + reg = <0x10960000 0xc0>; + interrupts = <GIC_SPI 364 IRQ_TYPE_LEVEL_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&hsi2c18_bus>; + clocks = <&cmu_peric1 CLK_GOUT_PERIC1_IPCLK_6>, + <&cmu_peric1 CLK_GOUT_PERIC1_PCLK_6>; + clock-names = "hsi2c", "hsi2c_pclk"; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + }; + + usi_i2c_9: usi@109700c0 { + compatible = "samsung,exynosautov9-usi", + "samsung,exynos850-usi"; + reg = <0x109700c0 0x20>; + samsung,sysreg = <&syscon_peric1 0x101c>; + samsung,mode = <USI_V2_I2C>; + #address-cells = <1>; + #size-cells = <1>; + ranges; + clocks = <&cmu_peric1 CLK_GOUT_PERIC1_PCLK_7>, + <&cmu_peric1 CLK_GOUT_PERIC1_IPCLK_7>; + clock-names = "pclk", "ipclk"; + status = "disabled"; + + hsi2c_19: i2c@10970000 { + compatible = "samsung,exynosautov9-hsi2c"; + reg = <0x10970000 0xc0>; + interrupts = <GIC_SPI 363 IRQ_TYPE_LEVEL_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&hsi2c19_bus>; + clocks = <&cmu_peric1 CLK_GOUT_PERIC1_IPCLK_7>, + <&cmu_peric1 CLK_GOUT_PERIC1_PCLK_7>; + clock-names = "hsi2c", "hsi2c_pclk"; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + }; + + usi_10: usi@109800c0 { + compatible = "samsung,exynosautov9-usi", + "samsung,exynos850-usi"; + reg = <0x109800c0 0x20>; + samsung,sysreg = <&syscon_peric1 0x1020>; + samsung,mode = <USI_V2_UART>; + #address-cells = <1>; + #size-cells = <1>; + ranges; + clocks = <&cmu_peric1 CLK_GOUT_PERIC1_PCLK_8>, + <&cmu_peric1 CLK_GOUT_PERIC1_IPCLK_8>; + clock-names = "pclk", "ipclk"; + status = "disabled"; + + serial_10: serial@10980000 { + compatible = "samsung,exynosautov9-uart", + "samsung,exynos850-uart"; + reg = <0x10980000 0xc0>; + interrupts = <GIC_SPI 366 IRQ_TYPE_LEVEL_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&uart10_bus>; + clocks = <&cmu_peric1 CLK_GOUT_PERIC1_PCLK_8>, + <&cmu_peric1 CLK_GOUT_PERIC1_IPCLK_8>; + clock-names = "uart", "clk_uart_baud0"; + samsung,uart-fifosize = <64>; + status = "disabled"; + }; + + spi_10: spi@10980000 { + compatible = "samsung,exynosautov9-spi"; + reg = <0x10980000 0x30>; + interrupts = <GIC_SPI 366 IRQ_TYPE_LEVEL_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&spi10_bus &spi10_cs_func>; + clocks = <&cmu_peric1 CLK_GOUT_PERIC1_IPCLK_8>, + <&cmu_peric1 CLK_DOUT_PERIC1_USI10_USI>, + <&cmu_peric1 CLK_GOUT_PERIC1_PCLK_8>; + clock-names = "spi", "spi_busclk0", "spi_ioclk"; + samsung,spi-src-clk = <0>; + dmas = <&pdma0 21>, <&pdma0 20>; + dma-names = "tx", "rx"; + num-cs = <1>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + + hsi2c_20: i2c@10980000 { + compatible = "samsung,exynosautov9-hsi2c"; + reg = <0x10980000 0xc0>; + interrupts = <GIC_SPI 366 IRQ_TYPE_LEVEL_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&hsi2c20_bus>; + clocks = <&cmu_peric1 CLK_GOUT_PERIC1_IPCLK_8>, + <&cmu_peric1 CLK_GOUT_PERIC1_PCLK_8>; + clock-names = "hsi2c", "hsi2c_pclk"; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + }; + + usi_i2c_10: usi@109900c0 { + compatible = "samsung,exynosautov9-usi", + "samsung,exynos850-usi"; + reg = <0x109900c0 0x20>; + samsung,sysreg = <&syscon_peric1 0x1024>; + samsung,mode = <USI_V2_I2C>; + #address-cells = <1>; + #size-cells = <1>; + ranges; + clocks = <&cmu_peric1 CLK_GOUT_PERIC1_PCLK_9>, + <&cmu_peric1 CLK_GOUT_PERIC1_IPCLK_9>; + clock-names = "pclk", "ipclk"; + status = "disabled"; + + hsi2c_21: i2c@10990000 { + compatible = "samsung,exynosautov9-hsi2c"; + reg = <0x10990000 0xc0>; + interrupts = <GIC_SPI 365 IRQ_TYPE_LEVEL_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&hsi2c21_bus>; + clocks = <&cmu_peric1 CLK_GOUT_PERIC1_IPCLK_9>, + <&cmu_peric1 CLK_GOUT_PERIC1_PCLK_9>; + clock-names = "hsi2c", "hsi2c_pclk"; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + }; + + usi_11: usi@109a00c0 { + compatible = "samsung,exynosautov9-usi", + "samsung,exynos850-usi"; + reg = <0x109a00c0 0x20>; + samsung,sysreg = <&syscon_peric1 0x1028>; + samsung,mode = <USI_V2_UART>; + #address-cells = <1>; + #size-cells = <1>; + ranges; + clocks = <&cmu_peric1 CLK_GOUT_PERIC1_PCLK_10>, + <&cmu_peric1 CLK_GOUT_PERIC1_IPCLK_10>; + clock-names = "pclk", "ipclk"; + status = "disabled"; + + serial_11: serial@109a0000 { + compatible = "samsung,exynosautov9-uart", + "samsung,exynos850-uart"; + reg = <0x109a0000 0xc0>; + interrupts = <GIC_SPI 368 IRQ_TYPE_LEVEL_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&uart11_bus>; + clocks = <&cmu_peric1 CLK_GOUT_PERIC1_PCLK_10>, + <&cmu_peric1 CLK_GOUT_PERIC1_IPCLK_10>; + clock-names = "uart", "clk_uart_baud0"; + samsung,uart-fifosize = <64>; + status = "disabled"; + }; + + spi_11: spi@109a0000 { + compatible = "samsung,exynosautov9-spi"; + reg = <0x109a0000 0x30>; + interrupts = <GIC_SPI 368 IRQ_TYPE_LEVEL_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&spi11_bus &spi11_cs_func>; + clocks = <&cmu_peric1 CLK_GOUT_PERIC1_IPCLK_10>, + <&cmu_peric1 CLK_DOUT_PERIC1_USI11_USI>, + <&cmu_peric1 CLK_GOUT_PERIC1_PCLK_10>; + clock-names = "spi", "spi_busclk0", "spi_ioclk"; + samsung,spi-src-clk = <0>; + num-cs = <1>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + + hsi2c_22: i2c@109a0000 { + compatible = "samsung,exynosautov9-hsi2c"; + reg = <0x109a0000 0xc0>; + pinctrl-names = "default"; + pinctrl-0 = <&hsi2c22_bus>; + interrupts = <GIC_SPI 368 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cmu_peric1 CLK_GOUT_PERIC1_IPCLK_10>, + <&cmu_peric1 CLK_GOUT_PERIC1_PCLK_10>; + clock-names = "hsi2c", "hsi2c_pclk"; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + }; + + usi_i2c_11: usi@109b00c0 { + compatible = "samsung,exynosautov9-usi", + "samsung,exynos850-usi"; + reg = <0x109b00c0 0x20>; + samsung,sysreg = <&syscon_peric1 0x102c>; + samsung,mode = <USI_V2_I2C>; + #address-cells = <1>; + #size-cells = <1>; + ranges; + clocks = <&cmu_peric1 CLK_GOUT_PERIC1_PCLK_11>, + <&cmu_peric1 CLK_GOUT_PERIC1_IPCLK_11>; + clock-names = "pclk", "ipclk"; + status = "disabled"; + + hsi2c_23: i2c@109b0000 { + compatible = "samsung,exynosautov9-hsi2c"; + reg = <0x109b0000 0xc0>; + interrupts = <GIC_SPI 367 IRQ_TYPE_LEVEL_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&hsi2c23_bus>; + clocks = <&cmu_peric1 CLK_GOUT_PERIC1_IPCLK_11>, + <&cmu_peric1 CLK_GOUT_PERIC1_PCLK_11>; + clock-names = "hsi2c", "hsi2c_pclk"; + #address-cells = <1>; + #size-cells = <0>; status = "disabled"; }; }; -- 2.36.1 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel ^ permalink raw reply related [flat|nested] 24+ messages in thread
* Re: [PATCH v2 4/4] arm64: dts: exynosautov9: add usi device tree nodes 2022-06-30 2:16 ` Chanho Park @ 2022-06-30 7:14 ` Krzysztof Kozlowski -1 siblings, 0 replies; 24+ messages in thread From: Krzysztof Kozlowski @ 2022-06-30 7:14 UTC (permalink / raw) To: Chanho Park, Krzysztof Kozlowski, Rob Herring Cc: Alim Akhtar, Sam Protsenko, Jaewon Kim, devicetree, linux-samsung-soc, linux-arm-kernel On 30/06/2022 04:16, Chanho Park wrote: > Universal Serial Interface (USI) supports three types of serial interface > such as Universal Asynchronous Receiver and Transmitter (UART), Serial > Peripheral Interface (SPI), and Inter-Integrated Circuit (I2C). > Each protocols can be working independently and configured as one of > those using external configuration inputs. > Exynos Auto v9 SoC support 12 USIs. When a USI uses two pins such as i2c > and 3 wire uarts(RX/TX only), we can use remain two pins as i2c mode. > So, we can define one USI node that includes serial/spi and hsi2c. > usi_i2c nodes can be used only for i2c mode. > > We can have below combinations for one USI. > 1) The usi node is used either 4 pin uart or 4 pin spi > -> No usi_i2c can be used > 2) The usi node is used 2 pin uart(RX/TX) and i2c(SDA/SCL) > -> usi_i2c should be enabled to use the latter i2c > 3) The usi node is used i2c(SDA/SCL) and i2c(SDA/SCL) > -> usi_i2c should be enabled to use the latter i2c > > By default, all USIs are initially set to uart mode by below setting. > samsung,mode = <USI_V2_UART>; > You can change it either USI_V2_SPI or USI_V2_I2C. > > Signed-off-by: Chanho Park <chanho61.park@samsung.com> > --- > .../boot/dts/exynos/exynosautov9-sadk.dts | 2 + > arch/arm64/boot/dts/exynos/exynosautov9.dtsi | 1077 ++++++++++++++++- > 2 files changed, 1074 insertions(+), 5 deletions(-) > > diff --git a/arch/arm64/boot/dts/exynos/exynosautov9-sadk.dts b/arch/arm64/boot/dts/exynos/exynosautov9-sadk.dts > index 2b30a7458297..eec3192c0631 100644 > --- a/arch/arm64/boot/dts/exynos/exynosautov9-sadk.dts > +++ b/arch/arm64/boot/dts/exynos/exynosautov9-sadk.dts > @@ -50,6 +50,7 @@ ufs_1_fixed_vcc_reg: regulator-1 { > }; > > &serial_0 { > + pinctrl-0 = <&uart0_bus_dual>; > status = "okay"; > }; > > @@ -74,6 +75,7 @@ &ufs_1 { > }; > > &usi_0 { > + samsung,clkreq-on; /* needed for UART mode */ > status = "okay"; > }; > > diff --git a/arch/arm64/boot/dts/exynos/exynosautov9.dtsi b/arch/arm64/boot/dts/exynos/exynosautov9.dtsi > index c4cfa93e4c2e..2013718532f3 100644 > --- a/arch/arm64/boot/dts/exynos/exynosautov9.dtsi > +++ b/arch/arm64/boot/dts/exynos/exynosautov9.dtsi > @@ -351,12 +351,17 @@ syscon_peric0: syscon@10220000 { > reg = <0x10220000 0x2000>; > }; > > + syscon_peric1: syscon@10820000 { > + compatible = "samsung,exynosautov9-sysreg", "syscon"; > + reg = <0x10820000 0x2000>; > + }; > + > usi_0: usi@103000c0 { > - compatible = "samsung,exynos850-usi"; > + compatible = "samsung,exynosautov9-usi", > + "samsung,exynos850-usi"; This change should be separate. > reg = <0x103000c0 0x20>; > samsung,sysreg = <&syscon_peric0 0x1000>; > samsung,mode = <USI_V2_UART>; > - samsung,clkreq-on; /* needed for UART mode */ > #address-cells = <1>; > #size-cells = <1>; > ranges; > @@ -365,16 +370,1078 @@ usi_0: usi@103000c0 { > clock-names = "pclk", "ipclk"; > status = "disabled"; > > - /* USI: UART */ > serial_0: serial@10300000 { > - compatible = "samsung,exynos850-uart"; > + compatible = "samsung,exynosautov9-uart", > + "samsung,exynos850-uart"; > reg = <0x10300000 0xc0>; As well. Best regards, Krzysztof ^ permalink raw reply [flat|nested] 24+ messages in thread
* Re: [PATCH v2 4/4] arm64: dts: exynosautov9: add usi device tree nodes @ 2022-06-30 7:14 ` Krzysztof Kozlowski 0 siblings, 0 replies; 24+ messages in thread From: Krzysztof Kozlowski @ 2022-06-30 7:14 UTC (permalink / raw) To: Chanho Park, Krzysztof Kozlowski, Rob Herring Cc: Alim Akhtar, Sam Protsenko, Jaewon Kim, devicetree, linux-samsung-soc, linux-arm-kernel On 30/06/2022 04:16, Chanho Park wrote: > Universal Serial Interface (USI) supports three types of serial interface > such as Universal Asynchronous Receiver and Transmitter (UART), Serial > Peripheral Interface (SPI), and Inter-Integrated Circuit (I2C). > Each protocols can be working independently and configured as one of > those using external configuration inputs. > Exynos Auto v9 SoC support 12 USIs. When a USI uses two pins such as i2c > and 3 wire uarts(RX/TX only), we can use remain two pins as i2c mode. > So, we can define one USI node that includes serial/spi and hsi2c. > usi_i2c nodes can be used only for i2c mode. > > We can have below combinations for one USI. > 1) The usi node is used either 4 pin uart or 4 pin spi > -> No usi_i2c can be used > 2) The usi node is used 2 pin uart(RX/TX) and i2c(SDA/SCL) > -> usi_i2c should be enabled to use the latter i2c > 3) The usi node is used i2c(SDA/SCL) and i2c(SDA/SCL) > -> usi_i2c should be enabled to use the latter i2c > > By default, all USIs are initially set to uart mode by below setting. > samsung,mode = <USI_V2_UART>; > You can change it either USI_V2_SPI or USI_V2_I2C. > > Signed-off-by: Chanho Park <chanho61.park@samsung.com> > --- > .../boot/dts/exynos/exynosautov9-sadk.dts | 2 + > arch/arm64/boot/dts/exynos/exynosautov9.dtsi | 1077 ++++++++++++++++- > 2 files changed, 1074 insertions(+), 5 deletions(-) > > diff --git a/arch/arm64/boot/dts/exynos/exynosautov9-sadk.dts b/arch/arm64/boot/dts/exynos/exynosautov9-sadk.dts > index 2b30a7458297..eec3192c0631 100644 > --- a/arch/arm64/boot/dts/exynos/exynosautov9-sadk.dts > +++ b/arch/arm64/boot/dts/exynos/exynosautov9-sadk.dts > @@ -50,6 +50,7 @@ ufs_1_fixed_vcc_reg: regulator-1 { > }; > > &serial_0 { > + pinctrl-0 = <&uart0_bus_dual>; > status = "okay"; > }; > > @@ -74,6 +75,7 @@ &ufs_1 { > }; > > &usi_0 { > + samsung,clkreq-on; /* needed for UART mode */ > status = "okay"; > }; > > diff --git a/arch/arm64/boot/dts/exynos/exynosautov9.dtsi b/arch/arm64/boot/dts/exynos/exynosautov9.dtsi > index c4cfa93e4c2e..2013718532f3 100644 > --- a/arch/arm64/boot/dts/exynos/exynosautov9.dtsi > +++ b/arch/arm64/boot/dts/exynos/exynosautov9.dtsi > @@ -351,12 +351,17 @@ syscon_peric0: syscon@10220000 { > reg = <0x10220000 0x2000>; > }; > > + syscon_peric1: syscon@10820000 { > + compatible = "samsung,exynosautov9-sysreg", "syscon"; > + reg = <0x10820000 0x2000>; > + }; > + > usi_0: usi@103000c0 { > - compatible = "samsung,exynos850-usi"; > + compatible = "samsung,exynosautov9-usi", > + "samsung,exynos850-usi"; This change should be separate. > reg = <0x103000c0 0x20>; > samsung,sysreg = <&syscon_peric0 0x1000>; > samsung,mode = <USI_V2_UART>; > - samsung,clkreq-on; /* needed for UART mode */ > #address-cells = <1>; > #size-cells = <1>; > ranges; > @@ -365,16 +370,1078 @@ usi_0: usi@103000c0 { > clock-names = "pclk", "ipclk"; > status = "disabled"; > > - /* USI: UART */ > serial_0: serial@10300000 { > - compatible = "samsung,exynos850-uart"; > + compatible = "samsung,exynosautov9-uart", > + "samsung,exynos850-uart"; > reg = <0x10300000 0xc0>; As well. Best regards, Krzysztof _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel ^ permalink raw reply [flat|nested] 24+ messages in thread
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[not found] <CGME20220630021951epcas2p3fb04daeddd98c74cbee3fed5044da6f9@epcas2p3.samsung.com>
2022-06-30 2:16 ` [PATCH v2 0/4] support USI for Exynos Auto v9 SoC Chanho Park
2022-06-30 2:16 ` Chanho Park
[not found] ` <CGME20220630021951epcas2p26cd4a554f01f9cb6e44acd813eee15fd@epcas2p2.samsung.com>
2022-06-30 2:16 ` [PATCH v2 1/4] dt-bindings: soc: samsung: usi: add exynosautov9-usi compatible Chanho Park
2022-06-30 2:16 ` Chanho Park
2022-06-30 5:59 ` Sam Protsenko
2022-06-30 5:59 ` Sam Protsenko
2022-06-30 7:11 ` Krzysztof Kozlowski
2022-06-30 7:11 ` Krzysztof Kozlowski
2022-06-30 7:58 ` Sam Protsenko
2022-06-30 7:58 ` Sam Protsenko
2022-06-30 7:13 ` Krzysztof Kozlowski
2022-06-30 7:13 ` Krzysztof Kozlowski
2022-06-30 7:59 ` Sam Protsenko
2022-06-30 7:59 ` Sam Protsenko
[not found] ` <CGME20220630021951epcas2p1d35e3e0b6d4267eccbe0468b15a558f0@epcas2p1.samsung.com>
2022-06-30 2:16 ` [PATCH v2 2/4] dt-bindings: serial: samsung: add exynosautov9-uart compatible Chanho Park
2022-06-30 2:16 ` Chanho Park
2022-06-30 7:16 ` Krzysztof Kozlowski
2022-06-30 7:16 ` Krzysztof Kozlowski
[not found] ` <CGME20220630021951epcas2p44f7b0f49a9d9209793e90cdc8ec0d536@epcas2p4.samsung.com>
2022-06-30 2:16 ` [PATCH v2 3/4] arm64: dts: exynosautov9: add pdma0 device tree node Chanho Park
2022-06-30 2:16 ` Chanho Park
[not found] ` <CGME20220630021951epcas2p27f839eead168052d03039c2e3efa3460@epcas2p2.samsung.com>
2022-06-30 2:16 ` [PATCH v2 4/4] arm64: dts: exynosautov9: add usi device tree nodes Chanho Park
2022-06-30 2:16 ` Chanho Park
2022-06-30 7:14 ` Krzysztof Kozlowski
2022-06-30 7:14 ` Krzysztof Kozlowski
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