[PATCH] xen/arm: Add arm Neoverse N1 processor

[PATCH] xen/arm: Add arm Neoverse N1 processor

[Bertrand Marquis]

Add MIDR and CPU part numbers for Arm Neoverse N1 processor

Signed-off-by: Bertrand Marquis <bertrand.marquis@arm.com>
---
 xen/include/asm-arm/processor.h | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/xen/include/asm-arm/processor.h b/xen/include/asm-arm/processor.h
index aa642e3ab2..3ca67f8157 100644
--- a/xen/include/asm-arm/processor.h
+++ b/xen/include/asm-arm/processor.h
@@ -58,6 +58,7 @@
 #define ARM_CPU_PART_CORTEX_A73     0xD09
 #define ARM_CPU_PART_CORTEX_A75     0xD0A
 #define ARM_CPU_PART_CORTEX_A76     0xD0B
+#define ARM_CPU_PART_NEOVERSE_N1    0xD0C
 
 #define MIDR_CORTEX_A12 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A12)
 #define MIDR_CORTEX_A17 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A17)
@@ -68,6 +69,7 @@
 #define MIDR_CORTEX_A73 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A73)
 #define MIDR_CORTEX_A75 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A75)
 #define MIDR_CORTEX_A76 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A76)
+#define MIDR_NEOVERSE_N1 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_NEOVERSE_N1)
 
 /* MPIDR Multiprocessor Affinity Register */
 #define _MPIDR_UP           (30)
-- 
2.17.1

Re: [PATCH] xen/arm: Add arm Neoverse N1 processor

[Julien Grall]

Hi Bertrand,

On 11/06/2020 12:54, Bertrand Marquis wrote:
> Add MIDR and CPU part numbers for Arm Neoverse N1 processor

The MIDR and CPU part listed are only there because we need to use them 
for errata. This is not the list of processors we support :).

So I would prefer to introduce the new macro when there is an actual use 
of it.

Cheers,

-- 
Julien Grall

Re: [PATCH] xen/arm: Add arm Neoverse N1 processor

[Bertrand Marquis]

> On 11 Jun 2020, at 14:09, Julien Grall <julien@xen.org> wrote:
> 
> Hi Bertrand,
> 
> On 11/06/2020 12:54, Bertrand Marquis wrote:
>> Add MIDR and CPU part numbers for Arm Neoverse N1 processor
> 
> The MIDR and CPU part listed are only there because we need to use them for errata. This is not the list of processors we support :).
> 
> So I would prefer to introduce the new macro when there is an actual use of it.

Understood.

Cheers
Bertrand