[Xen-devel] [PATCH] x86emul: correct far branch handling for 64-bit mode

[Xen-devel] [PATCH] x86emul: correct far branch handling for 64-bit mode

[Jan Beulich]

AMD and friends explicitly specify that 64-bit operands aren't possible
for these insns. Nevertheless REX.W isn't fully ignored: It still
cancels a possible operand size override (0x66). Intel otoh explicitly
provides for 64-bit operands on the respective insn page of the SDM.

Signed-off-by: Jan Beulich <jbeulich@suse.com>

--- a/xen/arch/x86/x86_emulate/x86_emulate.c
+++ b/xen/arch/x86/x86_emulate/x86_emulate.c
@@ -2519,9 +2519,16 @@ x86_decode_onebyte(
         case 6: /* push */
             if ( mode_64bit() && op_bytes == 4 )
                 op_bytes = 8;
-            /* fall through */
+            state->desc = DstNone | SrcMem | Mov;
+            break;
+
         case 3: /* call (far, absolute indirect) */
         case 5: /* jmp (far, absolute indirect) */
+            /* REX.W ignored on a vendor-dependent basis. */
+            if ( op_bytes == 8 &&
+                 (ctxt->cpuid->x86_vendor &
+                  (X86_VENDOR_AMD | X86_VENDOR_HYGON)) )
+                op_bytes = 4;
             state->desc = DstNone | SrcMem | Mov;
             break;
         }

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Re: [Xen-devel] [PATCH] x86emul: correct far branch handling for 64-bit mode

[Andrew Cooper]

On 13/12/2019 12:54, Jan Beulich wrote:
> AMD and friends explicitly specify that 64-bit operands aren't possible
> for these insns. Nevertheless REX.W isn't fully ignored: It still
> cancels a possible operand size override (0x66). Intel otoh explicitly
> provides for 64-bit operands on the respective insn page of the SDM.
>
> Signed-off-by: Jan Beulich <jbeulich@suse.com>

Reviewed-by: Andrew Cooper <andrew.cooper3@citrix.com>

>
> --- a/xen/arch/x86/x86_emulate/x86_emulate.c
> +++ b/xen/arch/x86/x86_emulate/x86_emulate.c
> @@ -2519,9 +2519,16 @@ x86_decode_onebyte(
>          case 6: /* push */
>              if ( mode_64bit() && op_bytes == 4 )
>                  op_bytes = 8;
> -            /* fall through */
> +            state->desc = DstNone | SrcMem | Mov;
> +            break;
> +
>          case 3: /* call (far, absolute indirect) */
>          case 5: /* jmp (far, absolute indirect) */
> +            /* REX.W ignored on a vendor-dependent basis. */
> +            if ( op_bytes == 8 &&
> +                 (ctxt->cpuid->x86_vendor &
> +                  (X86_VENDOR_AMD | X86_VENDOR_HYGON)) )

I'm wondering whether in general we want some amd_like() and
intel_like() predicates.  It is how almost all of the boundaries end up
falling.

~Andrew

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Re: [Xen-devel] [PATCH] x86emul: correct far branch handling for 64-bit mode

[Jan Beulich]

On 13.12.2019 14:01, Andrew Cooper wrote:
> On 13/12/2019 12:54, Jan Beulich wrote:
>> AMD and friends explicitly specify that 64-bit operands aren't possible
>> for these insns. Nevertheless REX.W isn't fully ignored: It still
>> cancels a possible operand size override (0x66). Intel otoh explicitly
>> provides for 64-bit operands on the respective insn page of the SDM.
>>
>> Signed-off-by: Jan Beulich <jbeulich@suse.com>
> 
> Reviewed-by: Andrew Cooper <andrew.cooper3@citrix.com>

Thanks.

>> --- a/xen/arch/x86/x86_emulate/x86_emulate.c
>> +++ b/xen/arch/x86/x86_emulate/x86_emulate.c
>> @@ -2519,9 +2519,16 @@ x86_decode_onebyte(
>>          case 6: /* push */
>>              if ( mode_64bit() && op_bytes == 4 )
>>                  op_bytes = 8;
>> -            /* fall through */
>> +            state->desc = DstNone | SrcMem | Mov;
>> +            break;
>> +
>>          case 3: /* call (far, absolute indirect) */
>>          case 5: /* jmp (far, absolute indirect) */
>> +            /* REX.W ignored on a vendor-dependent basis. */
>> +            if ( op_bytes == 8 &&
>> +                 (ctxt->cpuid->x86_vendor &
>> +                  (X86_VENDOR_AMD | X86_VENDOR_HYGON)) )
> 
> I'm wondering whether in general we want some amd_like() and
> intel_like() predicates.  It is how almost all of the boundaries end up
> falling.

I've been wondering the same, but didn't do so yet because while
for Hygon we can be pretty sure it's AMD-like, I'm not sure how
far we could go with covering other than Intel as Intel-like.
But yes, perhaps we could start with just amd_like() (I don't
particularly like this name, but I also can't think of anything
I would like better).

Jan

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