* [PATCH v12 0/9] Coresight: Add support for TPDM and TPDA
@ 2022-07-10 2:10 ` Mao Jinlong
0 siblings, 0 replies; 32+ messages in thread
From: Mao Jinlong @ 2022-07-10 2:10 UTC (permalink / raw)
To: Mathieu Poirier, Suzuki K Poulose, Alexander Shishkin,
Konrad Dybcio, Mike Leach, Andy Gross, Bjorn Andersson,
Rob Herring, Krzysztof Kozlowski
Cc: Mao Jinlong, Leo Yan, Greg Kroah-Hartman, coresight,
linux-arm-kernel, linux-kernel, devicetree, Tingwei Zhang,
Yuanfang Zhang, Tao Zhang, Trilok Soni, Hao Zhang, linux-arm-msm
This series adds support for the trace performance monitoring and
diagnostics hardware (TPDM and TPDA). It is composed of two major
elements.
a) Changes for original coresight framework to support for TPDM and TPDA.
b) Add driver code for TPDM and TPDA.
Introduction of changes for original coresight framework
Support TPDM as new coresight source.
Since only STM and ETM are supported as coresight source originally.
TPDM is a newly added coresight source. We need to change
the original way of saving coresight path to support more types source
for coresight driver.
The following patch is to add support more coresight sources.
coresight: core: Use IDR for non-cpu bound sources' paths.
Introduction of TPDM and TPDA
TPDM - The trace performance monitoring and diagnostics monitor or TPDM in
short serves as data collection component for various dataset types
specified in the QPMDA(Qualcomm performance monitoring and diagnostics
architecture) spec. The primary use case of the TPDM is to collect data
from different data sources and send it to a TPDA for packetization,
timestamping and funneling.
Coresight: Add coresight TPDM source driver
dt-bindings: arm: Adds CoreSight TPDM hardware definitions
coresight-tpdm: Add DSB dataset support
coresight-tpdm: Add integration test support
docs: sysfs: coresight: Add sysfs ABI documentation for TPDM
TPDA - The trace performance monitoring and diagnostics aggregator or
TPDA in short serves as an arbitration and packetization engine for the
performance monitoring and diagnostics network as specified in the QPMDA
(Qualcomm performance monitoring and diagnostics architecture)
specification. The primary use case of the TPDA is to provide
packetization, funneling and timestamping of Monitor data as specified
in the QPMDA specification.
The following patch is to add driver for TPDA.
Coresight: Add TPDA link driver
dt-bindings: arm: Adds CoreSight TPDA hardware definitions
The last patch of this series is a device tree modification, which add
the TPDM and TPDA configuration to device tree for validating.
ARM: dts: msm: Add coresight components for SM8250
ARM: dts: msm: Add tpdm mm/prng for sm8250
Once this series patches are applied properly, the tpdm and tpda nodes
should be observed at the coresight path /sys/bus/coresight/devices
e.g.
/sys/bus/coresight/devices # ls -l | grep tpd
tpda0 -> ../../../devices/platform/soc@0/6004000.tpda/tpda0
tpdm0 -> ../../../devices/platform/soc@0/6c08000.mm.tpdm/tpdm0
We can use the commands are similar to the below to validate TPDMs.
Enable coresight sink first.
echo 1 > /sys/bus/coresight/devices/tmc_etf0/enable_sink
echo 1 > /sys/bus/coresight/devices/tpdm0/enable_source
echo 1 > /sys/bus/coresight/devices/tpdm0/integration_test
echo 2 > /sys/bus/coresight/devices/tpdm0/integration_test
The test data will be collected in the coresight sink which is enabled.
If rwp register of the sink is keeping updating when do
integration_test (by cat tmc_etf0/mgmt/rwp), it means there is data
generated from TPDM to sink.
There must be a tpda between tpdm and the sink. When there are some
other trace event hw components in the same HW block with tpdm, tpdm
and these hw components will connect to the coresight funnel. When
there is only tpdm trace hw in the HW block, tpdm will connect to
tpda directly.
+---------------+ +-------------+
| tpdm@6c08000 | |tpdm@684C000 |
+-------|-------+ +------|------+
| |
+-------|-------+ |
| funnel@6c0b000| |
+-------|-------+ |
| |
+-------|-------+ |
|funnel@6c2d000 | |
+-------|-------+ |
| |
| +---------------+ |
+----- tpda@6004000 -----------+
+-------|-------+
|
+-------|-------+
|funnel@6005000 |
+---------------+
This patch series depends on patch series:
"[v2,00/13] coresight: Add new API to allocate trace source ID values"
https://patchwork.kernel.org/project/linux-arm-kernel/cover/20220704081149.16797-1-mike.leach@linaro.org/
Changes from V11:
1. Clear bits for atid before setting them and relese atid when tpda
remove. -- Suzuki K Poulose <suzuki.poulose@arm.com>
Mao Jinlong (9):
coresight: core: Use IDR for non-cpu bound sources' paths.
Coresight: Add coresight TPDM source driver
dt-bindings: arm: Adds CoreSight TPDM hardware definitions
coresight-tpdm: Add DSB dataset support
coresight-tpdm: Add integration test support
Coresight: Add TPDA link driver
dt-bindings: arm: Adds CoreSight TPDA hardware definitions
arm64: dts: qcom: sm8250: Add coresight components
arm64: dts: qcom: sm8250: Add tpdm mm/prng
.../testing/sysfs-bus-coresight-devices-tpdm | 13 +
.../bindings/arm/qcom,coresight-tpda.yaml | 111 +++
.../bindings/arm/qcom,coresight-tpdm.yaml | 93 +++
MAINTAINERS | 2 +
arch/arm64/boot/dts/qcom/sm8250.dtsi | 671 ++++++++++++++++++
drivers/hwtracing/coresight/Kconfig | 23 +
drivers/hwtracing/coresight/Makefile | 2 +
drivers/hwtracing/coresight/coresight-core.c | 42 +-
drivers/hwtracing/coresight/coresight-tpda.c | 208 ++++++
drivers/hwtracing/coresight/coresight-tpda.h | 35 +
drivers/hwtracing/coresight/coresight-tpdm.c | 259 +++++++
drivers/hwtracing/coresight/coresight-tpdm.h | 62 ++
include/linux/coresight.h | 1 +
13 files changed, 1510 insertions(+), 12 deletions(-)
create mode 100644 Documentation/ABI/testing/sysfs-bus-coresight-devices-tpdm
create mode 100644 Documentation/devicetree/bindings/arm/qcom,coresight-tpda.yaml
create mode 100644 Documentation/devicetree/bindings/arm/qcom,coresight-tpdm.yaml
create mode 100644 drivers/hwtracing/coresight/coresight-tpda.c
create mode 100644 drivers/hwtracing/coresight/coresight-tpda.h
create mode 100644 drivers/hwtracing/coresight/coresight-tpdm.c
create mode 100644 drivers/hwtracing/coresight/coresight-tpdm.h
--
2.17.1
^ permalink raw reply [flat|nested] 32+ messages in thread
* [PATCH v12 0/9] Coresight: Add support for TPDM and TPDA
@ 2022-07-10 2:10 ` Mao Jinlong
0 siblings, 0 replies; 32+ messages in thread
From: Mao Jinlong @ 2022-07-10 2:10 UTC (permalink / raw)
To: Mathieu Poirier, Suzuki K Poulose, Alexander Shishkin,
Konrad Dybcio, Mike Leach, Andy Gross, Bjorn Andersson,
Rob Herring, Krzysztof Kozlowski
Cc: Mao Jinlong, Leo Yan, Greg Kroah-Hartman, coresight,
linux-arm-kernel, linux-kernel, devicetree, Tingwei Zhang,
Yuanfang Zhang, Tao Zhang, Trilok Soni, Hao Zhang, linux-arm-msm
This series adds support for the trace performance monitoring and
diagnostics hardware (TPDM and TPDA). It is composed of two major
elements.
a) Changes for original coresight framework to support for TPDM and TPDA.
b) Add driver code for TPDM and TPDA.
Introduction of changes for original coresight framework
Support TPDM as new coresight source.
Since only STM and ETM are supported as coresight source originally.
TPDM is a newly added coresight source. We need to change
the original way of saving coresight path to support more types source
for coresight driver.
The following patch is to add support more coresight sources.
coresight: core: Use IDR for non-cpu bound sources' paths.
Introduction of TPDM and TPDA
TPDM - The trace performance monitoring and diagnostics monitor or TPDM in
short serves as data collection component for various dataset types
specified in the QPMDA(Qualcomm performance monitoring and diagnostics
architecture) spec. The primary use case of the TPDM is to collect data
from different data sources and send it to a TPDA for packetization,
timestamping and funneling.
Coresight: Add coresight TPDM source driver
dt-bindings: arm: Adds CoreSight TPDM hardware definitions
coresight-tpdm: Add DSB dataset support
coresight-tpdm: Add integration test support
docs: sysfs: coresight: Add sysfs ABI documentation for TPDM
TPDA - The trace performance monitoring and diagnostics aggregator or
TPDA in short serves as an arbitration and packetization engine for the
performance monitoring and diagnostics network as specified in the QPMDA
(Qualcomm performance monitoring and diagnostics architecture)
specification. The primary use case of the TPDA is to provide
packetization, funneling and timestamping of Monitor data as specified
in the QPMDA specification.
The following patch is to add driver for TPDA.
Coresight: Add TPDA link driver
dt-bindings: arm: Adds CoreSight TPDA hardware definitions
The last patch of this series is a device tree modification, which add
the TPDM and TPDA configuration to device tree for validating.
ARM: dts: msm: Add coresight components for SM8250
ARM: dts: msm: Add tpdm mm/prng for sm8250
Once this series patches are applied properly, the tpdm and tpda nodes
should be observed at the coresight path /sys/bus/coresight/devices
e.g.
/sys/bus/coresight/devices # ls -l | grep tpd
tpda0 -> ../../../devices/platform/soc@0/6004000.tpda/tpda0
tpdm0 -> ../../../devices/platform/soc@0/6c08000.mm.tpdm/tpdm0
We can use the commands are similar to the below to validate TPDMs.
Enable coresight sink first.
echo 1 > /sys/bus/coresight/devices/tmc_etf0/enable_sink
echo 1 > /sys/bus/coresight/devices/tpdm0/enable_source
echo 1 > /sys/bus/coresight/devices/tpdm0/integration_test
echo 2 > /sys/bus/coresight/devices/tpdm0/integration_test
The test data will be collected in the coresight sink which is enabled.
If rwp register of the sink is keeping updating when do
integration_test (by cat tmc_etf0/mgmt/rwp), it means there is data
generated from TPDM to sink.
There must be a tpda between tpdm and the sink. When there are some
other trace event hw components in the same HW block with tpdm, tpdm
and these hw components will connect to the coresight funnel. When
there is only tpdm trace hw in the HW block, tpdm will connect to
tpda directly.
+---------------+ +-------------+
| tpdm@6c08000 | |tpdm@684C000 |
+-------|-------+ +------|------+
| |
+-------|-------+ |
| funnel@6c0b000| |
+-------|-------+ |
| |
+-------|-------+ |
|funnel@6c2d000 | |
+-------|-------+ |
| |
| +---------------+ |
+----- tpda@6004000 -----------+
+-------|-------+
|
+-------|-------+
|funnel@6005000 |
+---------------+
This patch series depends on patch series:
"[v2,00/13] coresight: Add new API to allocate trace source ID values"
https://patchwork.kernel.org/project/linux-arm-kernel/cover/20220704081149.16797-1-mike.leach@linaro.org/
Changes from V11:
1. Clear bits for atid before setting them and relese atid when tpda
remove. -- Suzuki K Poulose <suzuki.poulose@arm.com>
Mao Jinlong (9):
coresight: core: Use IDR for non-cpu bound sources' paths.
Coresight: Add coresight TPDM source driver
dt-bindings: arm: Adds CoreSight TPDM hardware definitions
coresight-tpdm: Add DSB dataset support
coresight-tpdm: Add integration test support
Coresight: Add TPDA link driver
dt-bindings: arm: Adds CoreSight TPDA hardware definitions
arm64: dts: qcom: sm8250: Add coresight components
arm64: dts: qcom: sm8250: Add tpdm mm/prng
.../testing/sysfs-bus-coresight-devices-tpdm | 13 +
.../bindings/arm/qcom,coresight-tpda.yaml | 111 +++
.../bindings/arm/qcom,coresight-tpdm.yaml | 93 +++
MAINTAINERS | 2 +
arch/arm64/boot/dts/qcom/sm8250.dtsi | 671 ++++++++++++++++++
drivers/hwtracing/coresight/Kconfig | 23 +
drivers/hwtracing/coresight/Makefile | 2 +
drivers/hwtracing/coresight/coresight-core.c | 42 +-
drivers/hwtracing/coresight/coresight-tpda.c | 208 ++++++
drivers/hwtracing/coresight/coresight-tpda.h | 35 +
drivers/hwtracing/coresight/coresight-tpdm.c | 259 +++++++
drivers/hwtracing/coresight/coresight-tpdm.h | 62 ++
include/linux/coresight.h | 1 +
13 files changed, 1510 insertions(+), 12 deletions(-)
create mode 100644 Documentation/ABI/testing/sysfs-bus-coresight-devices-tpdm
create mode 100644 Documentation/devicetree/bindings/arm/qcom,coresight-tpda.yaml
create mode 100644 Documentation/devicetree/bindings/arm/qcom,coresight-tpdm.yaml
create mode 100644 drivers/hwtracing/coresight/coresight-tpda.c
create mode 100644 drivers/hwtracing/coresight/coresight-tpda.h
create mode 100644 drivers/hwtracing/coresight/coresight-tpdm.c
create mode 100644 drivers/hwtracing/coresight/coresight-tpdm.h
--
2.17.1
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 32+ messages in thread
* [PATCH v12 1/9] coresight: core: Use IDR for non-cpu bound sources' paths.
2022-07-10 2:10 ` Mao Jinlong
@ 2022-07-10 2:10 ` Mao Jinlong
-1 siblings, 0 replies; 32+ messages in thread
From: Mao Jinlong @ 2022-07-10 2:10 UTC (permalink / raw)
To: Mathieu Poirier, Suzuki K Poulose, Alexander Shishkin,
Konrad Dybcio, Mike Leach
Cc: Mao Jinlong, Leo Yan, Greg Kroah-Hartman, coresight,
linux-arm-kernel, linux-kernel, Tingwei Zhang, Yuanfang Zhang,
Tao Zhang, Trilok Soni, Hao Zhang, linux-arm-msm,
Bjorn Andersson
Except stm, there could be other sources which are not associated
with cpus. Use IDR to store and search these sources' paths.
Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Reviewed-by: Mike Leach <mike.leach@linaro.org>
Signed-off-by: Mao Jinlong <quic_jinlmao@quicinc.com>
---
drivers/hwtracing/coresight/coresight-core.c | 37 ++++++++++++++------
1 file changed, 26 insertions(+), 11 deletions(-)
diff --git a/drivers/hwtracing/coresight/coresight-core.c b/drivers/hwtracing/coresight/coresight-core.c
index d2b301b8a734..4d5867f87791 100644
--- a/drivers/hwtracing/coresight/coresight-core.c
+++ b/drivers/hwtracing/coresight/coresight-core.c
@@ -8,6 +8,7 @@
#include <linux/types.h>
#include <linux/device.h>
#include <linux/io.h>
+#include <linux/idr.h>
#include <linux/err.h>
#include <linux/export.h>
#include <linux/slab.h>
@@ -27,6 +28,13 @@
static DEFINE_MUTEX(coresight_mutex);
static DEFINE_PER_CPU(struct coresight_device *, csdev_sink);
+/*
+ * Use IDR to map the hash of the source's device name
+ * to the pointer of path for the source. The idr is for
+ * the sources which aren't associated with CPU.
+ */
+static DEFINE_IDR(path_idr);
+
/**
* struct coresight_node - elements of a path, from source to sink
* @csdev: Address of an element.
@@ -43,14 +51,6 @@ struct coresight_node {
*/
static DEFINE_PER_CPU(struct list_head *, tracer_path);
-/*
- * As of this writing only a single STM can be found in CS topologies. Since
- * there is no way to know if we'll ever see more and what kind of
- * configuration they will enact, for the time being only define a single path
- * for STM.
- */
-static struct list_head *stm_path;
-
/*
* When losing synchronisation a new barrier packet needs to be inserted at the
* beginning of the data collected in a buffer. That way the decoder knows that
@@ -1048,6 +1048,7 @@ int coresight_enable(struct coresight_device *csdev)
struct coresight_device *sink;
struct list_head *path;
enum coresight_dev_subtype_source subtype;
+ u32 hash;
subtype = csdev->subtype.source_subtype;
@@ -1102,7 +1103,14 @@ int coresight_enable(struct coresight_device *csdev)
per_cpu(tracer_path, cpu) = path;
break;
case CORESIGHT_DEV_SUBTYPE_SOURCE_SOFTWARE:
- stm_path = path;
+ /*
+ * Use the hash of source's device name as ID
+ * and map the ID to the pointer of the path.
+ */
+ hash = hashlen_hash(hashlen_string(NULL, dev_name(&csdev->dev)));
+ ret = idr_alloc_u32(&path_idr, path, &hash, hash, GFP_KERNEL);
+ if (ret)
+ goto err_source;
break;
default:
/* We can't be here */
@@ -1126,6 +1134,7 @@ void coresight_disable(struct coresight_device *csdev)
{
int cpu, ret;
struct list_head *path = NULL;
+ u32 hash;
mutex_lock(&coresight_mutex);
@@ -1143,14 +1152,20 @@ void coresight_disable(struct coresight_device *csdev)
per_cpu(tracer_path, cpu) = NULL;
break;
case CORESIGHT_DEV_SUBTYPE_SOURCE_SOFTWARE:
- path = stm_path;
- stm_path = NULL;
+ hash = hashlen_hash(hashlen_string(NULL, dev_name(&csdev->dev)));
+ /* Find the path by the hash. */
+ path = idr_find(&path_idr, hash);
+ if (path == NULL) {
+ pr_err("Path is not found for %s\n", dev_name(&csdev->dev));
+ goto out;
+ }
break;
default:
/* We can't be here */
break;
}
+ idr_remove(&path_idr, hash);
coresight_disable_path(path);
coresight_release_path(path);
--
2.17.1
^ permalink raw reply related [flat|nested] 32+ messages in thread
* [PATCH v12 1/9] coresight: core: Use IDR for non-cpu bound sources' paths.
@ 2022-07-10 2:10 ` Mao Jinlong
0 siblings, 0 replies; 32+ messages in thread
From: Mao Jinlong @ 2022-07-10 2:10 UTC (permalink / raw)
To: Mathieu Poirier, Suzuki K Poulose, Alexander Shishkin,
Konrad Dybcio, Mike Leach
Cc: Mao Jinlong, Leo Yan, Greg Kroah-Hartman, coresight,
linux-arm-kernel, linux-kernel, Tingwei Zhang, Yuanfang Zhang,
Tao Zhang, Trilok Soni, Hao Zhang, linux-arm-msm,
Bjorn Andersson
Except stm, there could be other sources which are not associated
with cpus. Use IDR to store and search these sources' paths.
Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Reviewed-by: Mike Leach <mike.leach@linaro.org>
Signed-off-by: Mao Jinlong <quic_jinlmao@quicinc.com>
---
drivers/hwtracing/coresight/coresight-core.c | 37 ++++++++++++++------
1 file changed, 26 insertions(+), 11 deletions(-)
diff --git a/drivers/hwtracing/coresight/coresight-core.c b/drivers/hwtracing/coresight/coresight-core.c
index d2b301b8a734..4d5867f87791 100644
--- a/drivers/hwtracing/coresight/coresight-core.c
+++ b/drivers/hwtracing/coresight/coresight-core.c
@@ -8,6 +8,7 @@
#include <linux/types.h>
#include <linux/device.h>
#include <linux/io.h>
+#include <linux/idr.h>
#include <linux/err.h>
#include <linux/export.h>
#include <linux/slab.h>
@@ -27,6 +28,13 @@
static DEFINE_MUTEX(coresight_mutex);
static DEFINE_PER_CPU(struct coresight_device *, csdev_sink);
+/*
+ * Use IDR to map the hash of the source's device name
+ * to the pointer of path for the source. The idr is for
+ * the sources which aren't associated with CPU.
+ */
+static DEFINE_IDR(path_idr);
+
/**
* struct coresight_node - elements of a path, from source to sink
* @csdev: Address of an element.
@@ -43,14 +51,6 @@ struct coresight_node {
*/
static DEFINE_PER_CPU(struct list_head *, tracer_path);
-/*
- * As of this writing only a single STM can be found in CS topologies. Since
- * there is no way to know if we'll ever see more and what kind of
- * configuration they will enact, for the time being only define a single path
- * for STM.
- */
-static struct list_head *stm_path;
-
/*
* When losing synchronisation a new barrier packet needs to be inserted at the
* beginning of the data collected in a buffer. That way the decoder knows that
@@ -1048,6 +1048,7 @@ int coresight_enable(struct coresight_device *csdev)
struct coresight_device *sink;
struct list_head *path;
enum coresight_dev_subtype_source subtype;
+ u32 hash;
subtype = csdev->subtype.source_subtype;
@@ -1102,7 +1103,14 @@ int coresight_enable(struct coresight_device *csdev)
per_cpu(tracer_path, cpu) = path;
break;
case CORESIGHT_DEV_SUBTYPE_SOURCE_SOFTWARE:
- stm_path = path;
+ /*
+ * Use the hash of source's device name as ID
+ * and map the ID to the pointer of the path.
+ */
+ hash = hashlen_hash(hashlen_string(NULL, dev_name(&csdev->dev)));
+ ret = idr_alloc_u32(&path_idr, path, &hash, hash, GFP_KERNEL);
+ if (ret)
+ goto err_source;
break;
default:
/* We can't be here */
@@ -1126,6 +1134,7 @@ void coresight_disable(struct coresight_device *csdev)
{
int cpu, ret;
struct list_head *path = NULL;
+ u32 hash;
mutex_lock(&coresight_mutex);
@@ -1143,14 +1152,20 @@ void coresight_disable(struct coresight_device *csdev)
per_cpu(tracer_path, cpu) = NULL;
break;
case CORESIGHT_DEV_SUBTYPE_SOURCE_SOFTWARE:
- path = stm_path;
- stm_path = NULL;
+ hash = hashlen_hash(hashlen_string(NULL, dev_name(&csdev->dev)));
+ /* Find the path by the hash. */
+ path = idr_find(&path_idr, hash);
+ if (path == NULL) {
+ pr_err("Path is not found for %s\n", dev_name(&csdev->dev));
+ goto out;
+ }
break;
default:
/* We can't be here */
break;
}
+ idr_remove(&path_idr, hash);
coresight_disable_path(path);
coresight_release_path(path);
--
2.17.1
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 32+ messages in thread
* [PATCH v12 2/9] Coresight: Add coresight TPDM source driver
2022-07-10 2:10 ` Mao Jinlong
@ 2022-07-10 2:10 ` Mao Jinlong
-1 siblings, 0 replies; 32+ messages in thread
From: Mao Jinlong @ 2022-07-10 2:10 UTC (permalink / raw)
To: Mathieu Poirier, Suzuki K Poulose, Alexander Shishkin,
Konrad Dybcio, Mike Leach
Cc: Mao Jinlong, Leo Yan, Greg Kroah-Hartman, coresight,
linux-arm-kernel, linux-kernel, Tingwei Zhang, Yuanfang Zhang,
Tao Zhang, Trilok Soni, Hao Zhang, linux-arm-msm,
Bjorn Andersson
Add driver to support Coresight device TPDM (Trace, Profiling and
Diagnostics Monitor). TPDM is a monitor to collect data from
different datasets. This change is to add probe/enable/disable
functions for tpdm source.
Signed-off-by: Tao Zhang <quic_taozha@quicinc.com>
Signed-off-by: Mao Jinlong <quic_jinlmao@quicinc.com>
---
drivers/hwtracing/coresight/Kconfig | 12 ++
drivers/hwtracing/coresight/Makefile | 1 +
drivers/hwtracing/coresight/coresight-core.c | 5 +-
drivers/hwtracing/coresight/coresight-tpdm.c | 149 +++++++++++++++++++
drivers/hwtracing/coresight/coresight-tpdm.h | 26 ++++
include/linux/coresight.h | 1 +
6 files changed, 193 insertions(+), 1 deletion(-)
create mode 100644 drivers/hwtracing/coresight/coresight-tpdm.c
create mode 100644 drivers/hwtracing/coresight/coresight-tpdm.h
diff --git a/drivers/hwtracing/coresight/Kconfig b/drivers/hwtracing/coresight/Kconfig
index 514a9b8086e3..b2b72a35e416 100644
--- a/drivers/hwtracing/coresight/Kconfig
+++ b/drivers/hwtracing/coresight/Kconfig
@@ -201,4 +201,16 @@ config CORESIGHT_TRBE
To compile this driver as a module, choose M here: the module will be
called coresight-trbe.
+
+config CORESIGHT_TPDM
+ tristate "CoreSight Trace, Profiling & Diagnostics Monitor driver"
+ select CORESIGHT_LINKS_AND_SINKS
+ help
+ This driver provides support for configuring monitor. Monitors are
+ primarily responsible for data set collection and support the
+ ability to collect any permutation of data set types.
+
+ To compile this driver as a module, choose M here: the module will be
+ called coresight-tpdm.
+
endif
diff --git a/drivers/hwtracing/coresight/Makefile b/drivers/hwtracing/coresight/Makefile
index 329a0c704b87..6bb9b1746bc7 100644
--- a/drivers/hwtracing/coresight/Makefile
+++ b/drivers/hwtracing/coresight/Makefile
@@ -25,5 +25,6 @@ obj-$(CONFIG_CORESIGHT_CPU_DEBUG) += coresight-cpu-debug.o
obj-$(CONFIG_CORESIGHT_CATU) += coresight-catu.o
obj-$(CONFIG_CORESIGHT_CTI) += coresight-cti.o
obj-$(CONFIG_CORESIGHT_TRBE) += coresight-trbe.o
+obj-$(CONFIG_CORESIGHT_TPDM) += coresight-tpdm.o
coresight-cti-y := coresight-cti-core.o coresight-cti-platform.o \
coresight-cti-sysfs.o
diff --git a/drivers/hwtracing/coresight/coresight-core.c b/drivers/hwtracing/coresight/coresight-core.c
index 4d5867f87791..f104073c4007 100644
--- a/drivers/hwtracing/coresight/coresight-core.c
+++ b/drivers/hwtracing/coresight/coresight-core.c
@@ -1034,7 +1034,8 @@ static int coresight_validate_source(struct coresight_device *csdev,
}
if (subtype != CORESIGHT_DEV_SUBTYPE_SOURCE_PROC &&
- subtype != CORESIGHT_DEV_SUBTYPE_SOURCE_SOFTWARE) {
+ subtype != CORESIGHT_DEV_SUBTYPE_SOURCE_SOFTWARE &&
+ subtype != CORESIGHT_DEV_SUBTYPE_SOURCE_OTHERS) {
dev_err(&csdev->dev, "wrong device subtype in %s\n", function);
return -EINVAL;
}
@@ -1103,6 +1104,7 @@ int coresight_enable(struct coresight_device *csdev)
per_cpu(tracer_path, cpu) = path;
break;
case CORESIGHT_DEV_SUBTYPE_SOURCE_SOFTWARE:
+ case CORESIGHT_DEV_SUBTYPE_SOURCE_OTHERS:
/*
* Use the hash of source's device name as ID
* and map the ID to the pointer of the path.
@@ -1152,6 +1154,7 @@ void coresight_disable(struct coresight_device *csdev)
per_cpu(tracer_path, cpu) = NULL;
break;
case CORESIGHT_DEV_SUBTYPE_SOURCE_SOFTWARE:
+ case CORESIGHT_DEV_SUBTYPE_SOURCE_OTHERS:
hash = hashlen_hash(hashlen_string(NULL, dev_name(&csdev->dev)));
/* Find the path by the hash. */
path = idr_find(&path_idr, hash);
diff --git a/drivers/hwtracing/coresight/coresight-tpdm.c b/drivers/hwtracing/coresight/coresight-tpdm.c
new file mode 100644
index 000000000000..6f9a136b2c3f
--- /dev/null
+++ b/drivers/hwtracing/coresight/coresight-tpdm.c
@@ -0,0 +1,149 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+
+#include <linux/amba/bus.h>
+#include <linux/bitmap.h>
+#include <linux/coresight.h>
+#include <linux/coresight-pmu.h>
+#include <linux/device.h>
+#include <linux/err.h>
+#include <linux/fs.h>
+#include <linux/io.h>
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/of.h>
+
+#include "coresight-priv.h"
+#include "coresight-tpdm.h"
+
+DEFINE_CORESIGHT_DEVLIST(tpdm_devs, "tpdm");
+
+/* TPDM enable operations */
+static int tpdm_enable(struct coresight_device *csdev,
+ struct perf_event *event, u32 mode)
+{
+ struct tpdm_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent);
+
+ spin_lock(&drvdata->spinlock);
+ if (drvdata->enable) {
+ spin_unlock(&drvdata->spinlock);
+ return -EBUSY;
+ }
+
+ drvdata->enable = true;
+ spin_unlock(&drvdata->spinlock);
+
+ dev_dbg(drvdata->dev, "TPDM tracing enabled\n");
+ return 0;
+}
+
+/* TPDM disable operations */
+static void tpdm_disable(struct coresight_device *csdev,
+ struct perf_event *event)
+{
+ struct tpdm_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent);
+
+ spin_lock(&drvdata->spinlock);
+ if (!drvdata->enable) {
+ spin_unlock(&drvdata->spinlock);
+ return;
+ }
+
+ drvdata->enable = false;
+ spin_unlock(&drvdata->spinlock);
+
+ dev_dbg(drvdata->dev, "TPDM tracing disabled\n");
+}
+
+static const struct coresight_ops_source tpdm_source_ops = {
+ .enable = tpdm_enable,
+ .disable = tpdm_disable,
+};
+
+static const struct coresight_ops tpdm_cs_ops = {
+ .source_ops = &tpdm_source_ops,
+};
+
+static int tpdm_probe(struct amba_device *adev, const struct amba_id *id)
+{
+ void __iomem *base;
+ struct device *dev = &adev->dev;
+ struct coresight_platform_data *pdata;
+ struct tpdm_drvdata *drvdata;
+ struct coresight_desc desc = { 0 };
+
+ pdata = coresight_get_platform_data(dev);
+ if (IS_ERR(pdata))
+ return PTR_ERR(pdata);
+ adev->dev.platform_data = pdata;
+
+ /* driver data*/
+ drvdata = devm_kzalloc(dev, sizeof(*drvdata), GFP_KERNEL);
+ if (!drvdata)
+ return -ENOMEM;
+ drvdata->dev = &adev->dev;
+ dev_set_drvdata(dev, drvdata);
+
+ base = devm_ioremap_resource(dev, &adev->res);
+ if (IS_ERR(base))
+ return PTR_ERR(base);
+
+ drvdata->base = base;
+
+ /* Set up coresight component description */
+ desc.name = coresight_alloc_device_name(&tpdm_devs, dev);
+ if (!desc.name)
+ return -ENOMEM;
+ desc.type = CORESIGHT_DEV_TYPE_SOURCE;
+ desc.subtype.source_subtype = CORESIGHT_DEV_SUBTYPE_SOURCE_OTHERS;
+ desc.ops = &tpdm_cs_ops;
+ desc.pdata = adev->dev.platform_data;
+ desc.dev = &adev->dev;
+ desc.access = CSDEV_ACCESS_IOMEM(base);
+ drvdata->csdev = coresight_register(&desc);
+ if (IS_ERR(drvdata->csdev))
+ return PTR_ERR(drvdata->csdev);
+
+ spin_lock_init(&drvdata->spinlock);
+ /* Decrease pm refcount when probe is done.*/
+ pm_runtime_put(&adev->dev);
+
+ return 0;
+}
+
+static void __exit tpdm_remove(struct amba_device *adev)
+{
+ struct tpdm_drvdata *drvdata = dev_get_drvdata(&adev->dev);
+
+ coresight_unregister(drvdata->csdev);
+}
+
+/*
+ * Different TPDM has different periph id.
+ * The difference is 0-7 bits' value. So ignore 0-7 bits.
+ */
+static struct amba_id tpdm_ids[] = {
+ {
+ .id = 0x000f0e00,
+ .mask = 0x000fff00,
+ },
+ { 0, 0},
+};
+
+static struct amba_driver tpdm_driver = {
+ .drv = {
+ .name = "coresight-tpdm",
+ .owner = THIS_MODULE,
+ .suppress_bind_attrs = true,
+ },
+ .probe = tpdm_probe,
+ .id_table = tpdm_ids,
+ .remove = tpdm_remove,
+};
+
+module_amba_driver(tpdm_driver);
+
+MODULE_LICENSE("GPL v2");
+MODULE_DESCRIPTION("Trace, Profiling & Diagnostic Monitor driver");
diff --git a/drivers/hwtracing/coresight/coresight-tpdm.h b/drivers/hwtracing/coresight/coresight-tpdm.h
new file mode 100644
index 000000000000..c87b982d963e
--- /dev/null
+++ b/drivers/hwtracing/coresight/coresight-tpdm.h
@@ -0,0 +1,26 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+
+#ifndef _CORESIGHT_CORESIGHT_TPDM_H
+#define _CORESIGHT_CORESIGHT_TPDM_H
+
+/**
+ * struct tpdm_drvdata - specifics associated to an TPDM component
+ * @base: memory mapped base address for this component.
+ * @dev: The device entity associated to this component.
+ * @csdev: component vitals needed by the framework.
+ * @spinlock: lock for the drvdata value.
+ * @enable: enable status of the component.
+ */
+
+struct tpdm_drvdata {
+ void __iomem *base;
+ struct device *dev;
+ struct coresight_device *csdev;
+ spinlock_t spinlock;
+ bool enable;
+};
+
+#endif /* _CORESIGHT_CORESIGHT_TPDM_H */
diff --git a/include/linux/coresight.h b/include/linux/coresight.h
index 247147c11231..738b66f4cc35 100644
--- a/include/linux/coresight.h
+++ b/include/linux/coresight.h
@@ -61,6 +61,7 @@ enum coresight_dev_subtype_source {
CORESIGHT_DEV_SUBTYPE_SOURCE_PROC,
CORESIGHT_DEV_SUBTYPE_SOURCE_BUS,
CORESIGHT_DEV_SUBTYPE_SOURCE_SOFTWARE,
+ CORESIGHT_DEV_SUBTYPE_SOURCE_OTHERS,
};
enum coresight_dev_subtype_helper {
--
2.17.1
^ permalink raw reply related [flat|nested] 32+ messages in thread
* [PATCH v12 2/9] Coresight: Add coresight TPDM source driver
@ 2022-07-10 2:10 ` Mao Jinlong
0 siblings, 0 replies; 32+ messages in thread
From: Mao Jinlong @ 2022-07-10 2:10 UTC (permalink / raw)
To: Mathieu Poirier, Suzuki K Poulose, Alexander Shishkin,
Konrad Dybcio, Mike Leach
Cc: Mao Jinlong, Leo Yan, Greg Kroah-Hartman, coresight,
linux-arm-kernel, linux-kernel, Tingwei Zhang, Yuanfang Zhang,
Tao Zhang, Trilok Soni, Hao Zhang, linux-arm-msm,
Bjorn Andersson
Add driver to support Coresight device TPDM (Trace, Profiling and
Diagnostics Monitor). TPDM is a monitor to collect data from
different datasets. This change is to add probe/enable/disable
functions for tpdm source.
Signed-off-by: Tao Zhang <quic_taozha@quicinc.com>
Signed-off-by: Mao Jinlong <quic_jinlmao@quicinc.com>
---
drivers/hwtracing/coresight/Kconfig | 12 ++
drivers/hwtracing/coresight/Makefile | 1 +
drivers/hwtracing/coresight/coresight-core.c | 5 +-
drivers/hwtracing/coresight/coresight-tpdm.c | 149 +++++++++++++++++++
drivers/hwtracing/coresight/coresight-tpdm.h | 26 ++++
include/linux/coresight.h | 1 +
6 files changed, 193 insertions(+), 1 deletion(-)
create mode 100644 drivers/hwtracing/coresight/coresight-tpdm.c
create mode 100644 drivers/hwtracing/coresight/coresight-tpdm.h
diff --git a/drivers/hwtracing/coresight/Kconfig b/drivers/hwtracing/coresight/Kconfig
index 514a9b8086e3..b2b72a35e416 100644
--- a/drivers/hwtracing/coresight/Kconfig
+++ b/drivers/hwtracing/coresight/Kconfig
@@ -201,4 +201,16 @@ config CORESIGHT_TRBE
To compile this driver as a module, choose M here: the module will be
called coresight-trbe.
+
+config CORESIGHT_TPDM
+ tristate "CoreSight Trace, Profiling & Diagnostics Monitor driver"
+ select CORESIGHT_LINKS_AND_SINKS
+ help
+ This driver provides support for configuring monitor. Monitors are
+ primarily responsible for data set collection and support the
+ ability to collect any permutation of data set types.
+
+ To compile this driver as a module, choose M here: the module will be
+ called coresight-tpdm.
+
endif
diff --git a/drivers/hwtracing/coresight/Makefile b/drivers/hwtracing/coresight/Makefile
index 329a0c704b87..6bb9b1746bc7 100644
--- a/drivers/hwtracing/coresight/Makefile
+++ b/drivers/hwtracing/coresight/Makefile
@@ -25,5 +25,6 @@ obj-$(CONFIG_CORESIGHT_CPU_DEBUG) += coresight-cpu-debug.o
obj-$(CONFIG_CORESIGHT_CATU) += coresight-catu.o
obj-$(CONFIG_CORESIGHT_CTI) += coresight-cti.o
obj-$(CONFIG_CORESIGHT_TRBE) += coresight-trbe.o
+obj-$(CONFIG_CORESIGHT_TPDM) += coresight-tpdm.o
coresight-cti-y := coresight-cti-core.o coresight-cti-platform.o \
coresight-cti-sysfs.o
diff --git a/drivers/hwtracing/coresight/coresight-core.c b/drivers/hwtracing/coresight/coresight-core.c
index 4d5867f87791..f104073c4007 100644
--- a/drivers/hwtracing/coresight/coresight-core.c
+++ b/drivers/hwtracing/coresight/coresight-core.c
@@ -1034,7 +1034,8 @@ static int coresight_validate_source(struct coresight_device *csdev,
}
if (subtype != CORESIGHT_DEV_SUBTYPE_SOURCE_PROC &&
- subtype != CORESIGHT_DEV_SUBTYPE_SOURCE_SOFTWARE) {
+ subtype != CORESIGHT_DEV_SUBTYPE_SOURCE_SOFTWARE &&
+ subtype != CORESIGHT_DEV_SUBTYPE_SOURCE_OTHERS) {
dev_err(&csdev->dev, "wrong device subtype in %s\n", function);
return -EINVAL;
}
@@ -1103,6 +1104,7 @@ int coresight_enable(struct coresight_device *csdev)
per_cpu(tracer_path, cpu) = path;
break;
case CORESIGHT_DEV_SUBTYPE_SOURCE_SOFTWARE:
+ case CORESIGHT_DEV_SUBTYPE_SOURCE_OTHERS:
/*
* Use the hash of source's device name as ID
* and map the ID to the pointer of the path.
@@ -1152,6 +1154,7 @@ void coresight_disable(struct coresight_device *csdev)
per_cpu(tracer_path, cpu) = NULL;
break;
case CORESIGHT_DEV_SUBTYPE_SOURCE_SOFTWARE:
+ case CORESIGHT_DEV_SUBTYPE_SOURCE_OTHERS:
hash = hashlen_hash(hashlen_string(NULL, dev_name(&csdev->dev)));
/* Find the path by the hash. */
path = idr_find(&path_idr, hash);
diff --git a/drivers/hwtracing/coresight/coresight-tpdm.c b/drivers/hwtracing/coresight/coresight-tpdm.c
new file mode 100644
index 000000000000..6f9a136b2c3f
--- /dev/null
+++ b/drivers/hwtracing/coresight/coresight-tpdm.c
@@ -0,0 +1,149 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+
+#include <linux/amba/bus.h>
+#include <linux/bitmap.h>
+#include <linux/coresight.h>
+#include <linux/coresight-pmu.h>
+#include <linux/device.h>
+#include <linux/err.h>
+#include <linux/fs.h>
+#include <linux/io.h>
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/of.h>
+
+#include "coresight-priv.h"
+#include "coresight-tpdm.h"
+
+DEFINE_CORESIGHT_DEVLIST(tpdm_devs, "tpdm");
+
+/* TPDM enable operations */
+static int tpdm_enable(struct coresight_device *csdev,
+ struct perf_event *event, u32 mode)
+{
+ struct tpdm_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent);
+
+ spin_lock(&drvdata->spinlock);
+ if (drvdata->enable) {
+ spin_unlock(&drvdata->spinlock);
+ return -EBUSY;
+ }
+
+ drvdata->enable = true;
+ spin_unlock(&drvdata->spinlock);
+
+ dev_dbg(drvdata->dev, "TPDM tracing enabled\n");
+ return 0;
+}
+
+/* TPDM disable operations */
+static void tpdm_disable(struct coresight_device *csdev,
+ struct perf_event *event)
+{
+ struct tpdm_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent);
+
+ spin_lock(&drvdata->spinlock);
+ if (!drvdata->enable) {
+ spin_unlock(&drvdata->spinlock);
+ return;
+ }
+
+ drvdata->enable = false;
+ spin_unlock(&drvdata->spinlock);
+
+ dev_dbg(drvdata->dev, "TPDM tracing disabled\n");
+}
+
+static const struct coresight_ops_source tpdm_source_ops = {
+ .enable = tpdm_enable,
+ .disable = tpdm_disable,
+};
+
+static const struct coresight_ops tpdm_cs_ops = {
+ .source_ops = &tpdm_source_ops,
+};
+
+static int tpdm_probe(struct amba_device *adev, const struct amba_id *id)
+{
+ void __iomem *base;
+ struct device *dev = &adev->dev;
+ struct coresight_platform_data *pdata;
+ struct tpdm_drvdata *drvdata;
+ struct coresight_desc desc = { 0 };
+
+ pdata = coresight_get_platform_data(dev);
+ if (IS_ERR(pdata))
+ return PTR_ERR(pdata);
+ adev->dev.platform_data = pdata;
+
+ /* driver data*/
+ drvdata = devm_kzalloc(dev, sizeof(*drvdata), GFP_KERNEL);
+ if (!drvdata)
+ return -ENOMEM;
+ drvdata->dev = &adev->dev;
+ dev_set_drvdata(dev, drvdata);
+
+ base = devm_ioremap_resource(dev, &adev->res);
+ if (IS_ERR(base))
+ return PTR_ERR(base);
+
+ drvdata->base = base;
+
+ /* Set up coresight component description */
+ desc.name = coresight_alloc_device_name(&tpdm_devs, dev);
+ if (!desc.name)
+ return -ENOMEM;
+ desc.type = CORESIGHT_DEV_TYPE_SOURCE;
+ desc.subtype.source_subtype = CORESIGHT_DEV_SUBTYPE_SOURCE_OTHERS;
+ desc.ops = &tpdm_cs_ops;
+ desc.pdata = adev->dev.platform_data;
+ desc.dev = &adev->dev;
+ desc.access = CSDEV_ACCESS_IOMEM(base);
+ drvdata->csdev = coresight_register(&desc);
+ if (IS_ERR(drvdata->csdev))
+ return PTR_ERR(drvdata->csdev);
+
+ spin_lock_init(&drvdata->spinlock);
+ /* Decrease pm refcount when probe is done.*/
+ pm_runtime_put(&adev->dev);
+
+ return 0;
+}
+
+static void __exit tpdm_remove(struct amba_device *adev)
+{
+ struct tpdm_drvdata *drvdata = dev_get_drvdata(&adev->dev);
+
+ coresight_unregister(drvdata->csdev);
+}
+
+/*
+ * Different TPDM has different periph id.
+ * The difference is 0-7 bits' value. So ignore 0-7 bits.
+ */
+static struct amba_id tpdm_ids[] = {
+ {
+ .id = 0x000f0e00,
+ .mask = 0x000fff00,
+ },
+ { 0, 0},
+};
+
+static struct amba_driver tpdm_driver = {
+ .drv = {
+ .name = "coresight-tpdm",
+ .owner = THIS_MODULE,
+ .suppress_bind_attrs = true,
+ },
+ .probe = tpdm_probe,
+ .id_table = tpdm_ids,
+ .remove = tpdm_remove,
+};
+
+module_amba_driver(tpdm_driver);
+
+MODULE_LICENSE("GPL v2");
+MODULE_DESCRIPTION("Trace, Profiling & Diagnostic Monitor driver");
diff --git a/drivers/hwtracing/coresight/coresight-tpdm.h b/drivers/hwtracing/coresight/coresight-tpdm.h
new file mode 100644
index 000000000000..c87b982d963e
--- /dev/null
+++ b/drivers/hwtracing/coresight/coresight-tpdm.h
@@ -0,0 +1,26 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+
+#ifndef _CORESIGHT_CORESIGHT_TPDM_H
+#define _CORESIGHT_CORESIGHT_TPDM_H
+
+/**
+ * struct tpdm_drvdata - specifics associated to an TPDM component
+ * @base: memory mapped base address for this component.
+ * @dev: The device entity associated to this component.
+ * @csdev: component vitals needed by the framework.
+ * @spinlock: lock for the drvdata value.
+ * @enable: enable status of the component.
+ */
+
+struct tpdm_drvdata {
+ void __iomem *base;
+ struct device *dev;
+ struct coresight_device *csdev;
+ spinlock_t spinlock;
+ bool enable;
+};
+
+#endif /* _CORESIGHT_CORESIGHT_TPDM_H */
diff --git a/include/linux/coresight.h b/include/linux/coresight.h
index 247147c11231..738b66f4cc35 100644
--- a/include/linux/coresight.h
+++ b/include/linux/coresight.h
@@ -61,6 +61,7 @@ enum coresight_dev_subtype_source {
CORESIGHT_DEV_SUBTYPE_SOURCE_PROC,
CORESIGHT_DEV_SUBTYPE_SOURCE_BUS,
CORESIGHT_DEV_SUBTYPE_SOURCE_SOFTWARE,
+ CORESIGHT_DEV_SUBTYPE_SOURCE_OTHERS,
};
enum coresight_dev_subtype_helper {
--
2.17.1
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 32+ messages in thread
* [PATCH v12 3/9] dt-bindings: arm: Adds CoreSight TPDM hardware definitions
2022-07-10 2:10 ` Mao Jinlong
@ 2022-07-10 2:10 ` Mao Jinlong
-1 siblings, 0 replies; 32+ messages in thread
From: Mao Jinlong @ 2022-07-10 2:10 UTC (permalink / raw)
To: Mathieu Poirier, Suzuki K Poulose, Alexander Shishkin,
Konrad Dybcio, Mike Leach, Rob Herring, Krzysztof Kozlowski
Cc: Mao Jinlong, Leo Yan, Greg Kroah-Hartman, coresight,
linux-arm-kernel, linux-kernel, devicetree, Tingwei Zhang,
Yuanfang Zhang, Tao Zhang, Trilok Soni, Hao Zhang, linux-arm-msm,
Bjorn Andersson
Adds new coresight-tpdm.yaml file describing the bindings required
to define tpdm in the device trees.
Acked-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Reviewed-by: Mike Leach <mike.leach@linaro.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Tao Zhang <quic_taozha@quicinc.com>
Signed-off-by: Mao Jinlong <quic_jinlmao@quicinc.com>
---
.../bindings/arm/qcom,coresight-tpdm.yaml | 93 +++++++++++++++++++
MAINTAINERS | 1 +
2 files changed, 94 insertions(+)
create mode 100644 Documentation/devicetree/bindings/arm/qcom,coresight-tpdm.yaml
diff --git a/Documentation/devicetree/bindings/arm/qcom,coresight-tpdm.yaml b/Documentation/devicetree/bindings/arm/qcom,coresight-tpdm.yaml
new file mode 100644
index 000000000000..5881cb41da70
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/qcom,coresight-tpdm.yaml
@@ -0,0 +1,93 @@
+# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause
+# Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved.
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/arm/qcom,coresight-tpdm.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Trace, Profiling and Diagnostics Monitor - TPDM
+
+description: |
+ The TPDM or Monitor serves as data collection component for various dataset
+ types specified in the QPMDA spec. It covers Implementation defined ((ImplDef),
+ Basic Counts (BC), Tenure Counts (TC), Continuous Multi-Bit (CMB), and Discrete
+ Single Bit (DSB). It performs data collection in the data producing clock
+ domain and transfers it to the data collection time domain, generally ATB
+ clock domain.
+
+ The primary use case of the TPDM is to collect data from different data
+ sources and send it to a TPDA for packetization, timestamping, and funneling.
+
+maintainers:
+ - Mao Jinlong <quic_jinlmao@quicinc.com>
+ - Tao Zhang <quic_taozha@quicinc.com>
+
+# Need a custom select here or 'arm,primecell' will match on lots of nodes
+select:
+ properties:
+ compatible:
+ contains:
+ enum:
+ - qcom,coresight-tpdm
+ required:
+ - compatible
+
+properties:
+ $nodename:
+ pattern: "^tpdm(@[0-9a-f]+)$"
+ compatible:
+ items:
+ - const: qcom,coresight-tpdm
+ - const: arm,primecell
+
+ reg:
+ minItems: 1
+ maxItems: 2
+
+ clocks:
+ maxItems: 1
+
+ clock-names:
+ items:
+ - const: apb_pclk
+
+ out-ports:
+ description: |
+ Output connections from the TPDM to coresight funnel/TPDA.
+ $ref: /schemas/graph.yaml#/properties/ports
+
+ properties:
+ port:
+ description: Output connection from the TPDM to coresight
+ funnel/TPDA.
+ $ref: /schemas/graph.yaml#/properties/port
+
+required:
+ - compatible
+ - reg
+ - clocks
+ - clock-names
+
+additionalProperties: false
+
+examples:
+ # minimum TPDM definition. TPDM connect to coresight TPDA.
+ - |
+ tpdm@684c000 {
+ compatible = "qcom,coresight-tpdm", "arm,primecell";
+ reg = <0x0684c000 0x1000>;
+
+ clocks = <&aoss_qmp>;
+ clock-names = "apb_pclk";
+
+ out-ports {
+ port {
+ tpdm_prng_out_tpda_qdss: endpoint {
+ remote-endpoint =
+ <&tpda_qdss_in_tpdm_prng>;
+ };
+ };
+ };
+ };
+
+...
diff --git a/MAINTAINERS b/MAINTAINERS
index 926bdf8ac096..db7f70be6850 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -1985,6 +1985,7 @@ T: git git://git.kernel.org/pub/scm/linux/kernel/git/coresight/linux.git
F: Documentation/ABI/testing/sysfs-bus-coresight-devices-*
F: Documentation/devicetree/bindings/arm/coresight-cpu-debug.txt
F: Documentation/devicetree/bindings/arm/coresight-cti.yaml
+F: Documentation/devicetree/bindings/arm/qcom,coresight-tpdm.yaml
F: Documentation/devicetree/bindings/arm/coresight.txt
F: Documentation/devicetree/bindings/arm/ete.yaml
F: Documentation/devicetree/bindings/arm/trbe.yaml
--
2.17.1
^ permalink raw reply related [flat|nested] 32+ messages in thread
* [PATCH v12 3/9] dt-bindings: arm: Adds CoreSight TPDM hardware definitions
@ 2022-07-10 2:10 ` Mao Jinlong
0 siblings, 0 replies; 32+ messages in thread
From: Mao Jinlong @ 2022-07-10 2:10 UTC (permalink / raw)
To: Mathieu Poirier, Suzuki K Poulose, Alexander Shishkin,
Konrad Dybcio, Mike Leach, Rob Herring, Krzysztof Kozlowski
Cc: Mao Jinlong, Leo Yan, Greg Kroah-Hartman, coresight,
linux-arm-kernel, linux-kernel, devicetree, Tingwei Zhang,
Yuanfang Zhang, Tao Zhang, Trilok Soni, Hao Zhang, linux-arm-msm,
Bjorn Andersson
Adds new coresight-tpdm.yaml file describing the bindings required
to define tpdm in the device trees.
Acked-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Reviewed-by: Mike Leach <mike.leach@linaro.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Tao Zhang <quic_taozha@quicinc.com>
Signed-off-by: Mao Jinlong <quic_jinlmao@quicinc.com>
---
.../bindings/arm/qcom,coresight-tpdm.yaml | 93 +++++++++++++++++++
MAINTAINERS | 1 +
2 files changed, 94 insertions(+)
create mode 100644 Documentation/devicetree/bindings/arm/qcom,coresight-tpdm.yaml
diff --git a/Documentation/devicetree/bindings/arm/qcom,coresight-tpdm.yaml b/Documentation/devicetree/bindings/arm/qcom,coresight-tpdm.yaml
new file mode 100644
index 000000000000..5881cb41da70
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/qcom,coresight-tpdm.yaml
@@ -0,0 +1,93 @@
+# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause
+# Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved.
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/arm/qcom,coresight-tpdm.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Trace, Profiling and Diagnostics Monitor - TPDM
+
+description: |
+ The TPDM or Monitor serves as data collection component for various dataset
+ types specified in the QPMDA spec. It covers Implementation defined ((ImplDef),
+ Basic Counts (BC), Tenure Counts (TC), Continuous Multi-Bit (CMB), and Discrete
+ Single Bit (DSB). It performs data collection in the data producing clock
+ domain and transfers it to the data collection time domain, generally ATB
+ clock domain.
+
+ The primary use case of the TPDM is to collect data from different data
+ sources and send it to a TPDA for packetization, timestamping, and funneling.
+
+maintainers:
+ - Mao Jinlong <quic_jinlmao@quicinc.com>
+ - Tao Zhang <quic_taozha@quicinc.com>
+
+# Need a custom select here or 'arm,primecell' will match on lots of nodes
+select:
+ properties:
+ compatible:
+ contains:
+ enum:
+ - qcom,coresight-tpdm
+ required:
+ - compatible
+
+properties:
+ $nodename:
+ pattern: "^tpdm(@[0-9a-f]+)$"
+ compatible:
+ items:
+ - const: qcom,coresight-tpdm
+ - const: arm,primecell
+
+ reg:
+ minItems: 1
+ maxItems: 2
+
+ clocks:
+ maxItems: 1
+
+ clock-names:
+ items:
+ - const: apb_pclk
+
+ out-ports:
+ description: |
+ Output connections from the TPDM to coresight funnel/TPDA.
+ $ref: /schemas/graph.yaml#/properties/ports
+
+ properties:
+ port:
+ description: Output connection from the TPDM to coresight
+ funnel/TPDA.
+ $ref: /schemas/graph.yaml#/properties/port
+
+required:
+ - compatible
+ - reg
+ - clocks
+ - clock-names
+
+additionalProperties: false
+
+examples:
+ # minimum TPDM definition. TPDM connect to coresight TPDA.
+ - |
+ tpdm@684c000 {
+ compatible = "qcom,coresight-tpdm", "arm,primecell";
+ reg = <0x0684c000 0x1000>;
+
+ clocks = <&aoss_qmp>;
+ clock-names = "apb_pclk";
+
+ out-ports {
+ port {
+ tpdm_prng_out_tpda_qdss: endpoint {
+ remote-endpoint =
+ <&tpda_qdss_in_tpdm_prng>;
+ };
+ };
+ };
+ };
+
+...
diff --git a/MAINTAINERS b/MAINTAINERS
index 926bdf8ac096..db7f70be6850 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -1985,6 +1985,7 @@ T: git git://git.kernel.org/pub/scm/linux/kernel/git/coresight/linux.git
F: Documentation/ABI/testing/sysfs-bus-coresight-devices-*
F: Documentation/devicetree/bindings/arm/coresight-cpu-debug.txt
F: Documentation/devicetree/bindings/arm/coresight-cti.yaml
+F: Documentation/devicetree/bindings/arm/qcom,coresight-tpdm.yaml
F: Documentation/devicetree/bindings/arm/coresight.txt
F: Documentation/devicetree/bindings/arm/ete.yaml
F: Documentation/devicetree/bindings/arm/trbe.yaml
--
2.17.1
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 32+ messages in thread
* [PATCH v12 4/9] coresight-tpdm: Add DSB dataset support
2022-07-10 2:10 ` Mao Jinlong
@ 2022-07-10 2:10 ` Mao Jinlong
-1 siblings, 0 replies; 32+ messages in thread
From: Mao Jinlong @ 2022-07-10 2:10 UTC (permalink / raw)
To: Mathieu Poirier, Suzuki K Poulose, Alexander Shishkin,
Konrad Dybcio, Mike Leach
Cc: Mao Jinlong, Leo Yan, Greg Kroah-Hartman, coresight,
linux-arm-kernel, linux-kernel, Tingwei Zhang, Yuanfang Zhang,
Tao Zhang, Trilok Soni, Hao Zhang, linux-arm-msm,
Bjorn Andersson
TPDM serves as data collection component for various dataset types.
DSB(Discrete Single Bit) is one of the dataset types. DSB subunit
can be enabled for data collection by writing 1 to the first bit of
DSB_CR register. This change is to add enable/disable function for
DSB dataset by writing DSB_CR register.
Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Signed-off-by: Tao Zhang <quic_taozha@quicinc.com>
Signed-off-by: Mao Jinlong <quic_jinlmao@quicinc.com>
---
drivers/hwtracing/coresight/coresight-tpdm.c | 56 ++++++++++++++++++++
drivers/hwtracing/coresight/coresight-tpdm.h | 22 ++++++++
2 files changed, 78 insertions(+)
diff --git a/drivers/hwtracing/coresight/coresight-tpdm.c b/drivers/hwtracing/coresight/coresight-tpdm.c
index 6f9a136b2c3f..f6d653a45c99 100644
--- a/drivers/hwtracing/coresight/coresight-tpdm.c
+++ b/drivers/hwtracing/coresight/coresight-tpdm.c
@@ -20,7 +20,28 @@
DEFINE_CORESIGHT_DEVLIST(tpdm_devs, "tpdm");
+static void tpdm_enable_dsb(struct tpdm_drvdata *drvdata)
+{
+ u32 val;
+
+ /* Set the enable bit of DSB control register to 1 */
+ val = readl_relaxed(drvdata->base + TPDM_DSB_CR);
+ val |= TPDM_DSB_CR_ENA;
+ writel_relaxed(val, drvdata->base + TPDM_DSB_CR);
+}
+
/* TPDM enable operations */
+static void __tpdm_enable(struct tpdm_drvdata *drvdata)
+{
+ CS_UNLOCK(drvdata->base);
+
+ /* Check if DSB datasets is present for TPDM. */
+ if (drvdata->datasets & TPDM_PIDR0_DS_DSB)
+ tpdm_enable_dsb(drvdata);
+
+ CS_LOCK(drvdata->base);
+}
+
static int tpdm_enable(struct coresight_device *csdev,
struct perf_event *event, u32 mode)
{
@@ -32,6 +53,7 @@ static int tpdm_enable(struct coresight_device *csdev,
return -EBUSY;
}
+ __tpdm_enable(drvdata);
drvdata->enable = true;
spin_unlock(&drvdata->spinlock);
@@ -39,7 +61,28 @@ static int tpdm_enable(struct coresight_device *csdev,
return 0;
}
+static void tpdm_disable_dsb(struct tpdm_drvdata *drvdata)
+{
+ u32 val;
+
+ /* Set the enable bit of DSB control register to 0 */
+ val = readl_relaxed(drvdata->base + TPDM_DSB_CR);
+ val &= ~TPDM_DSB_CR_ENA;
+ writel_relaxed(val, drvdata->base + TPDM_DSB_CR);
+}
+
/* TPDM disable operations */
+static void __tpdm_disable(struct tpdm_drvdata *drvdata)
+{
+ CS_UNLOCK(drvdata->base);
+
+ /* Check if DSB datasets is present for TPDM. */
+ if (drvdata->datasets & TPDM_PIDR0_DS_DSB)
+ tpdm_disable_dsb(drvdata);
+
+ CS_LOCK(drvdata->base);
+}
+
static void tpdm_disable(struct coresight_device *csdev,
struct perf_event *event)
{
@@ -51,6 +94,7 @@ static void tpdm_disable(struct coresight_device *csdev,
return;
}
+ __tpdm_disable(drvdata);
drvdata->enable = false;
spin_unlock(&drvdata->spinlock);
@@ -66,6 +110,17 @@ static const struct coresight_ops tpdm_cs_ops = {
.source_ops = &tpdm_source_ops,
};
+static void tpdm_init_default_data(struct tpdm_drvdata *drvdata)
+{
+ u32 pidr;
+
+ CS_UNLOCK(drvdata->base);
+ /* Get the datasets present on the TPDM. */
+ pidr = readl_relaxed(drvdata->base + CORESIGHT_PERIPHIDR0);
+ drvdata->datasets |= pidr & GENMASK(TPDM_DATASETS - 1, 0);
+ CS_LOCK(drvdata->base);
+}
+
static int tpdm_probe(struct amba_device *adev, const struct amba_id *id)
{
void __iomem *base;
@@ -107,6 +162,7 @@ static int tpdm_probe(struct amba_device *adev, const struct amba_id *id)
return PTR_ERR(drvdata->csdev);
spin_lock_init(&drvdata->spinlock);
+ tpdm_init_default_data(drvdata);
/* Decrease pm refcount when probe is done.*/
pm_runtime_put(&adev->dev);
diff --git a/drivers/hwtracing/coresight/coresight-tpdm.h b/drivers/hwtracing/coresight/coresight-tpdm.h
index c87b982d963e..c8a101cbb4c7 100644
--- a/drivers/hwtracing/coresight/coresight-tpdm.h
+++ b/drivers/hwtracing/coresight/coresight-tpdm.h
@@ -6,6 +6,26 @@
#ifndef _CORESIGHT_CORESIGHT_TPDM_H
#define _CORESIGHT_CORESIGHT_TPDM_H
+/* The max number of the datasets that TPDM supports */
+#define TPDM_DATASETS 7
+
+/* DSB Subunit Registers */
+#define TPDM_DSB_CR (0x780)
+/* Enable bit for DSB subunit */
+#define TPDM_DSB_CR_ENA BIT(0)
+
+/**
+ * The bits of PERIPHIDR0 register.
+ * The fields [6:0] of PERIPHIDR0 are used to determine what
+ * interfaces and subunits are present on a given TPDM.
+ *
+ * PERIPHIDR0[0] : Fix to 1 if ImplDef subunit present, else 0
+ * PERIPHIDR0[1] : Fix to 1 if DSB subunit present, else 0
+ */
+
+#define TPDM_PIDR0_DS_IMPDEF BIT(0)
+#define TPDM_PIDR0_DS_DSB BIT(1)
+
/**
* struct tpdm_drvdata - specifics associated to an TPDM component
* @base: memory mapped base address for this component.
@@ -13,6 +33,7 @@
* @csdev: component vitals needed by the framework.
* @spinlock: lock for the drvdata value.
* @enable: enable status of the component.
+ * @datasets: The datasets types present of the TPDM.
*/
struct tpdm_drvdata {
@@ -21,6 +42,7 @@ struct tpdm_drvdata {
struct coresight_device *csdev;
spinlock_t spinlock;
bool enable;
+ unsigned long datasets;
};
#endif /* _CORESIGHT_CORESIGHT_TPDM_H */
--
2.17.1
^ permalink raw reply related [flat|nested] 32+ messages in thread
* [PATCH v12 4/9] coresight-tpdm: Add DSB dataset support
@ 2022-07-10 2:10 ` Mao Jinlong
0 siblings, 0 replies; 32+ messages in thread
From: Mao Jinlong @ 2022-07-10 2:10 UTC (permalink / raw)
To: Mathieu Poirier, Suzuki K Poulose, Alexander Shishkin,
Konrad Dybcio, Mike Leach
Cc: Mao Jinlong, Leo Yan, Greg Kroah-Hartman, coresight,
linux-arm-kernel, linux-kernel, Tingwei Zhang, Yuanfang Zhang,
Tao Zhang, Trilok Soni, Hao Zhang, linux-arm-msm,
Bjorn Andersson
TPDM serves as data collection component for various dataset types.
DSB(Discrete Single Bit) is one of the dataset types. DSB subunit
can be enabled for data collection by writing 1 to the first bit of
DSB_CR register. This change is to add enable/disable function for
DSB dataset by writing DSB_CR register.
Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Signed-off-by: Tao Zhang <quic_taozha@quicinc.com>
Signed-off-by: Mao Jinlong <quic_jinlmao@quicinc.com>
---
drivers/hwtracing/coresight/coresight-tpdm.c | 56 ++++++++++++++++++++
drivers/hwtracing/coresight/coresight-tpdm.h | 22 ++++++++
2 files changed, 78 insertions(+)
diff --git a/drivers/hwtracing/coresight/coresight-tpdm.c b/drivers/hwtracing/coresight/coresight-tpdm.c
index 6f9a136b2c3f..f6d653a45c99 100644
--- a/drivers/hwtracing/coresight/coresight-tpdm.c
+++ b/drivers/hwtracing/coresight/coresight-tpdm.c
@@ -20,7 +20,28 @@
DEFINE_CORESIGHT_DEVLIST(tpdm_devs, "tpdm");
+static void tpdm_enable_dsb(struct tpdm_drvdata *drvdata)
+{
+ u32 val;
+
+ /* Set the enable bit of DSB control register to 1 */
+ val = readl_relaxed(drvdata->base + TPDM_DSB_CR);
+ val |= TPDM_DSB_CR_ENA;
+ writel_relaxed(val, drvdata->base + TPDM_DSB_CR);
+}
+
/* TPDM enable operations */
+static void __tpdm_enable(struct tpdm_drvdata *drvdata)
+{
+ CS_UNLOCK(drvdata->base);
+
+ /* Check if DSB datasets is present for TPDM. */
+ if (drvdata->datasets & TPDM_PIDR0_DS_DSB)
+ tpdm_enable_dsb(drvdata);
+
+ CS_LOCK(drvdata->base);
+}
+
static int tpdm_enable(struct coresight_device *csdev,
struct perf_event *event, u32 mode)
{
@@ -32,6 +53,7 @@ static int tpdm_enable(struct coresight_device *csdev,
return -EBUSY;
}
+ __tpdm_enable(drvdata);
drvdata->enable = true;
spin_unlock(&drvdata->spinlock);
@@ -39,7 +61,28 @@ static int tpdm_enable(struct coresight_device *csdev,
return 0;
}
+static void tpdm_disable_dsb(struct tpdm_drvdata *drvdata)
+{
+ u32 val;
+
+ /* Set the enable bit of DSB control register to 0 */
+ val = readl_relaxed(drvdata->base + TPDM_DSB_CR);
+ val &= ~TPDM_DSB_CR_ENA;
+ writel_relaxed(val, drvdata->base + TPDM_DSB_CR);
+}
+
/* TPDM disable operations */
+static void __tpdm_disable(struct tpdm_drvdata *drvdata)
+{
+ CS_UNLOCK(drvdata->base);
+
+ /* Check if DSB datasets is present for TPDM. */
+ if (drvdata->datasets & TPDM_PIDR0_DS_DSB)
+ tpdm_disable_dsb(drvdata);
+
+ CS_LOCK(drvdata->base);
+}
+
static void tpdm_disable(struct coresight_device *csdev,
struct perf_event *event)
{
@@ -51,6 +94,7 @@ static void tpdm_disable(struct coresight_device *csdev,
return;
}
+ __tpdm_disable(drvdata);
drvdata->enable = false;
spin_unlock(&drvdata->spinlock);
@@ -66,6 +110,17 @@ static const struct coresight_ops tpdm_cs_ops = {
.source_ops = &tpdm_source_ops,
};
+static void tpdm_init_default_data(struct tpdm_drvdata *drvdata)
+{
+ u32 pidr;
+
+ CS_UNLOCK(drvdata->base);
+ /* Get the datasets present on the TPDM. */
+ pidr = readl_relaxed(drvdata->base + CORESIGHT_PERIPHIDR0);
+ drvdata->datasets |= pidr & GENMASK(TPDM_DATASETS - 1, 0);
+ CS_LOCK(drvdata->base);
+}
+
static int tpdm_probe(struct amba_device *adev, const struct amba_id *id)
{
void __iomem *base;
@@ -107,6 +162,7 @@ static int tpdm_probe(struct amba_device *adev, const struct amba_id *id)
return PTR_ERR(drvdata->csdev);
spin_lock_init(&drvdata->spinlock);
+ tpdm_init_default_data(drvdata);
/* Decrease pm refcount when probe is done.*/
pm_runtime_put(&adev->dev);
diff --git a/drivers/hwtracing/coresight/coresight-tpdm.h b/drivers/hwtracing/coresight/coresight-tpdm.h
index c87b982d963e..c8a101cbb4c7 100644
--- a/drivers/hwtracing/coresight/coresight-tpdm.h
+++ b/drivers/hwtracing/coresight/coresight-tpdm.h
@@ -6,6 +6,26 @@
#ifndef _CORESIGHT_CORESIGHT_TPDM_H
#define _CORESIGHT_CORESIGHT_TPDM_H
+/* The max number of the datasets that TPDM supports */
+#define TPDM_DATASETS 7
+
+/* DSB Subunit Registers */
+#define TPDM_DSB_CR (0x780)
+/* Enable bit for DSB subunit */
+#define TPDM_DSB_CR_ENA BIT(0)
+
+/**
+ * The bits of PERIPHIDR0 register.
+ * The fields [6:0] of PERIPHIDR0 are used to determine what
+ * interfaces and subunits are present on a given TPDM.
+ *
+ * PERIPHIDR0[0] : Fix to 1 if ImplDef subunit present, else 0
+ * PERIPHIDR0[1] : Fix to 1 if DSB subunit present, else 0
+ */
+
+#define TPDM_PIDR0_DS_IMPDEF BIT(0)
+#define TPDM_PIDR0_DS_DSB BIT(1)
+
/**
* struct tpdm_drvdata - specifics associated to an TPDM component
* @base: memory mapped base address for this component.
@@ -13,6 +33,7 @@
* @csdev: component vitals needed by the framework.
* @spinlock: lock for the drvdata value.
* @enable: enable status of the component.
+ * @datasets: The datasets types present of the TPDM.
*/
struct tpdm_drvdata {
@@ -21,6 +42,7 @@ struct tpdm_drvdata {
struct coresight_device *csdev;
spinlock_t spinlock;
bool enable;
+ unsigned long datasets;
};
#endif /* _CORESIGHT_CORESIGHT_TPDM_H */
--
2.17.1
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 32+ messages in thread
* [PATCH v12 5/9] coresight-tpdm: Add integration test support
2022-07-10 2:10 ` Mao Jinlong
@ 2022-07-10 2:10 ` Mao Jinlong
-1 siblings, 0 replies; 32+ messages in thread
From: Mao Jinlong @ 2022-07-10 2:10 UTC (permalink / raw)
To: Mathieu Poirier, Suzuki K Poulose, Alexander Shishkin,
Konrad Dybcio, Mike Leach
Cc: Mao Jinlong, Leo Yan, Greg Kroah-Hartman, coresight,
linux-arm-kernel, linux-kernel, Tingwei Zhang, Yuanfang Zhang,
Tao Zhang, Trilok Soni, Hao Zhang, linux-arm-msm,
Bjorn Andersson
Integration test for tpdm can help to generate the data for
verification of the topology during TPDM software bring up.
Sample:
echo 1 > /sys/bus/coresight/devices/tmc_etf0/enable_sink
echo 1 > /sys/bus/coresight/devices/tpdm0/enable_source
echo 1 > /sys/bus/coresight/devices/tpdm0/integration_test
echo 2 > /sys/bus/coresight/devices/tpdm0/integration_test
cat /dev/tmc_etf0 > /data/etf-tpdm0.bin
Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Signed-off-by: Tao Zhang <quic_taozha@quicinc.com>
Signed-off-by: Mao Jinlong <quic_jinlmao@quicinc.com>
---
.../testing/sysfs-bus-coresight-devices-tpdm | 13 +++++
drivers/hwtracing/coresight/coresight-tpdm.c | 54 +++++++++++++++++++
drivers/hwtracing/coresight/coresight-tpdm.h | 14 +++++
3 files changed, 81 insertions(+)
create mode 100644 Documentation/ABI/testing/sysfs-bus-coresight-devices-tpdm
diff --git a/Documentation/ABI/testing/sysfs-bus-coresight-devices-tpdm b/Documentation/ABI/testing/sysfs-bus-coresight-devices-tpdm
new file mode 100644
index 000000000000..e1c2b5a59cb4
--- /dev/null
+++ b/Documentation/ABI/testing/sysfs-bus-coresight-devices-tpdm
@@ -0,0 +1,13 @@
+What: /sys/bus/coresight/devices/<tpdm-name>/integration_test
+Date: June 2022
+KernelVersion 5.20
+Contact: Jinlong Mao (QUIC) <quic_jinlmao@quicinc.com>, Tao Zhang (QUIC) <quic_taozha@quicinc.com>
+Description:
+ (Write) Run integration test for tpdm. Integration test
+ will generate test data for tpdm. It can help to make
+ sure that the trace path is enabled and the link configurations
+ are fine.
+
+ Accepts only one of the 2 values - 1 or 2.
+ 1 : Generate 64 bits data
+ 2 : Generate 32 bits data
diff --git a/drivers/hwtracing/coresight/coresight-tpdm.c b/drivers/hwtracing/coresight/coresight-tpdm.c
index f6d653a45c99..88df3e687ce2 100644
--- a/drivers/hwtracing/coresight/coresight-tpdm.c
+++ b/drivers/hwtracing/coresight/coresight-tpdm.c
@@ -121,6 +121,59 @@ static void tpdm_init_default_data(struct tpdm_drvdata *drvdata)
CS_LOCK(drvdata->base);
}
+/*
+ * value 1: 64 bits test data
+ * value 2: 32 bits test data
+ */
+static ssize_t integration_test_store(struct device *dev,
+ struct device_attribute *attr,
+ const char *buf,
+ size_t size)
+{
+ int i, ret = 0;
+ unsigned long val;
+ struct tpdm_drvdata *drvdata = dev_get_drvdata(dev->parent);
+
+ ret = kstrtoul(buf, 10, &val);
+ if (ret)
+ return ret;
+
+ if (val != 1 && val != 2)
+ return -EINVAL;
+
+ if (!drvdata->enable)
+ return -EINVAL;
+
+ if (val == 1)
+ val = ATBCNTRL_VAL_64;
+ else
+ val = ATBCNTRL_VAL_32;
+ CS_UNLOCK(drvdata->base);
+ writel_relaxed(0x1, drvdata->base + TPDM_ITCNTRL);
+
+ for (i = 0; i < INTEGRATION_TEST_CYCLE; i++)
+ writel_relaxed(val, drvdata->base + TPDM_ITATBCNTRL);
+
+ writel_relaxed(0, drvdata->base + TPDM_ITCNTRL);
+ CS_LOCK(drvdata->base);
+ return size;
+}
+static DEVICE_ATTR_WO(integration_test);
+
+static struct attribute *tpdm_attrs[] = {
+ &dev_attr_integration_test.attr,
+ NULL,
+};
+
+static struct attribute_group tpdm_attr_grp = {
+ .attrs = tpdm_attrs,
+};
+
+static const struct attribute_group *tpdm_attr_grps[] = {
+ &tpdm_attr_grp,
+ NULL,
+};
+
static int tpdm_probe(struct amba_device *adev, const struct amba_id *id)
{
void __iomem *base;
@@ -157,6 +210,7 @@ static int tpdm_probe(struct amba_device *adev, const struct amba_id *id)
desc.pdata = adev->dev.platform_data;
desc.dev = &adev->dev;
desc.access = CSDEV_ACCESS_IOMEM(base);
+ desc.groups = tpdm_attr_grps;
drvdata->csdev = coresight_register(&desc);
if (IS_ERR(drvdata->csdev))
return PTR_ERR(drvdata->csdev);
diff --git a/drivers/hwtracing/coresight/coresight-tpdm.h b/drivers/hwtracing/coresight/coresight-tpdm.h
index c8a101cbb4c7..d808fa1e8d4a 100644
--- a/drivers/hwtracing/coresight/coresight-tpdm.h
+++ b/drivers/hwtracing/coresight/coresight-tpdm.h
@@ -14,6 +14,20 @@
/* Enable bit for DSB subunit */
#define TPDM_DSB_CR_ENA BIT(0)
+/* TPDM integration test registers */
+#define TPDM_ITATBCNTRL (0xEF0)
+#define TPDM_ITCNTRL (0xF00)
+
+/* Register value for integration test */
+#define ATBCNTRL_VAL_32 0xC00F1409
+#define ATBCNTRL_VAL_64 0xC01F1409
+
+/*
+ * Number of cycles to write value when
+ * integration test.
+ */
+#define INTEGRATION_TEST_CYCLE 10
+
/**
* The bits of PERIPHIDR0 register.
* The fields [6:0] of PERIPHIDR0 are used to determine what
--
2.17.1
^ permalink raw reply related [flat|nested] 32+ messages in thread
* [PATCH v12 5/9] coresight-tpdm: Add integration test support
@ 2022-07-10 2:10 ` Mao Jinlong
0 siblings, 0 replies; 32+ messages in thread
From: Mao Jinlong @ 2022-07-10 2:10 UTC (permalink / raw)
To: Mathieu Poirier, Suzuki K Poulose, Alexander Shishkin,
Konrad Dybcio, Mike Leach
Cc: Mao Jinlong, Leo Yan, Greg Kroah-Hartman, coresight,
linux-arm-kernel, linux-kernel, Tingwei Zhang, Yuanfang Zhang,
Tao Zhang, Trilok Soni, Hao Zhang, linux-arm-msm,
Bjorn Andersson
Integration test for tpdm can help to generate the data for
verification of the topology during TPDM software bring up.
Sample:
echo 1 > /sys/bus/coresight/devices/tmc_etf0/enable_sink
echo 1 > /sys/bus/coresight/devices/tpdm0/enable_source
echo 1 > /sys/bus/coresight/devices/tpdm0/integration_test
echo 2 > /sys/bus/coresight/devices/tpdm0/integration_test
cat /dev/tmc_etf0 > /data/etf-tpdm0.bin
Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Signed-off-by: Tao Zhang <quic_taozha@quicinc.com>
Signed-off-by: Mao Jinlong <quic_jinlmao@quicinc.com>
---
.../testing/sysfs-bus-coresight-devices-tpdm | 13 +++++
drivers/hwtracing/coresight/coresight-tpdm.c | 54 +++++++++++++++++++
drivers/hwtracing/coresight/coresight-tpdm.h | 14 +++++
3 files changed, 81 insertions(+)
create mode 100644 Documentation/ABI/testing/sysfs-bus-coresight-devices-tpdm
diff --git a/Documentation/ABI/testing/sysfs-bus-coresight-devices-tpdm b/Documentation/ABI/testing/sysfs-bus-coresight-devices-tpdm
new file mode 100644
index 000000000000..e1c2b5a59cb4
--- /dev/null
+++ b/Documentation/ABI/testing/sysfs-bus-coresight-devices-tpdm
@@ -0,0 +1,13 @@
+What: /sys/bus/coresight/devices/<tpdm-name>/integration_test
+Date: June 2022
+KernelVersion 5.20
+Contact: Jinlong Mao (QUIC) <quic_jinlmao@quicinc.com>, Tao Zhang (QUIC) <quic_taozha@quicinc.com>
+Description:
+ (Write) Run integration test for tpdm. Integration test
+ will generate test data for tpdm. It can help to make
+ sure that the trace path is enabled and the link configurations
+ are fine.
+
+ Accepts only one of the 2 values - 1 or 2.
+ 1 : Generate 64 bits data
+ 2 : Generate 32 bits data
diff --git a/drivers/hwtracing/coresight/coresight-tpdm.c b/drivers/hwtracing/coresight/coresight-tpdm.c
index f6d653a45c99..88df3e687ce2 100644
--- a/drivers/hwtracing/coresight/coresight-tpdm.c
+++ b/drivers/hwtracing/coresight/coresight-tpdm.c
@@ -121,6 +121,59 @@ static void tpdm_init_default_data(struct tpdm_drvdata *drvdata)
CS_LOCK(drvdata->base);
}
+/*
+ * value 1: 64 bits test data
+ * value 2: 32 bits test data
+ */
+static ssize_t integration_test_store(struct device *dev,
+ struct device_attribute *attr,
+ const char *buf,
+ size_t size)
+{
+ int i, ret = 0;
+ unsigned long val;
+ struct tpdm_drvdata *drvdata = dev_get_drvdata(dev->parent);
+
+ ret = kstrtoul(buf, 10, &val);
+ if (ret)
+ return ret;
+
+ if (val != 1 && val != 2)
+ return -EINVAL;
+
+ if (!drvdata->enable)
+ return -EINVAL;
+
+ if (val == 1)
+ val = ATBCNTRL_VAL_64;
+ else
+ val = ATBCNTRL_VAL_32;
+ CS_UNLOCK(drvdata->base);
+ writel_relaxed(0x1, drvdata->base + TPDM_ITCNTRL);
+
+ for (i = 0; i < INTEGRATION_TEST_CYCLE; i++)
+ writel_relaxed(val, drvdata->base + TPDM_ITATBCNTRL);
+
+ writel_relaxed(0, drvdata->base + TPDM_ITCNTRL);
+ CS_LOCK(drvdata->base);
+ return size;
+}
+static DEVICE_ATTR_WO(integration_test);
+
+static struct attribute *tpdm_attrs[] = {
+ &dev_attr_integration_test.attr,
+ NULL,
+};
+
+static struct attribute_group tpdm_attr_grp = {
+ .attrs = tpdm_attrs,
+};
+
+static const struct attribute_group *tpdm_attr_grps[] = {
+ &tpdm_attr_grp,
+ NULL,
+};
+
static int tpdm_probe(struct amba_device *adev, const struct amba_id *id)
{
void __iomem *base;
@@ -157,6 +210,7 @@ static int tpdm_probe(struct amba_device *adev, const struct amba_id *id)
desc.pdata = adev->dev.platform_data;
desc.dev = &adev->dev;
desc.access = CSDEV_ACCESS_IOMEM(base);
+ desc.groups = tpdm_attr_grps;
drvdata->csdev = coresight_register(&desc);
if (IS_ERR(drvdata->csdev))
return PTR_ERR(drvdata->csdev);
diff --git a/drivers/hwtracing/coresight/coresight-tpdm.h b/drivers/hwtracing/coresight/coresight-tpdm.h
index c8a101cbb4c7..d808fa1e8d4a 100644
--- a/drivers/hwtracing/coresight/coresight-tpdm.h
+++ b/drivers/hwtracing/coresight/coresight-tpdm.h
@@ -14,6 +14,20 @@
/* Enable bit for DSB subunit */
#define TPDM_DSB_CR_ENA BIT(0)
+/* TPDM integration test registers */
+#define TPDM_ITATBCNTRL (0xEF0)
+#define TPDM_ITCNTRL (0xF00)
+
+/* Register value for integration test */
+#define ATBCNTRL_VAL_32 0xC00F1409
+#define ATBCNTRL_VAL_64 0xC01F1409
+
+/*
+ * Number of cycles to write value when
+ * integration test.
+ */
+#define INTEGRATION_TEST_CYCLE 10
+
/**
* The bits of PERIPHIDR0 register.
* The fields [6:0] of PERIPHIDR0 are used to determine what
--
2.17.1
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 32+ messages in thread
* [PATCH v12 6/9] Coresight: Add TPDA link driver
2022-07-10 2:10 ` Mao Jinlong
@ 2022-07-10 2:10 ` Mao Jinlong
-1 siblings, 0 replies; 32+ messages in thread
From: Mao Jinlong @ 2022-07-10 2:10 UTC (permalink / raw)
To: Mathieu Poirier, Suzuki K Poulose, Alexander Shishkin,
Konrad Dybcio, Mike Leach
Cc: Mao Jinlong, Leo Yan, Greg Kroah-Hartman, coresight,
linux-arm-kernel, linux-kernel, Tingwei Zhang, Yuanfang Zhang,
Tao Zhang, Trilok Soni, Hao Zhang, linux-arm-msm,
Bjorn Andersson
TPDA(Trace, Profiling and Diagnostics Aggregator) is
to provide packetization, funneling and timestamping of
TPDM data. Multiple monitors are connected to different
input ports of TPDA.This change is to add tpda
enable/disable/probe functions for coresight tpda driver.
- - - - - - - - - - - -
| TPDM 0| | TPDM 1 | | TPDM 2|
- - - - - - - - - - - -
| | |
|_ _ _ _ _ _ | _ _ _ _ |
| | |
| | |
------------------
| TPDA |
------------------
Signed-off-by: Tao Zhang <quic_taozha@quicinc.com>
Signed-off-by: Mao Jinlong <quic_jinlmao@quicinc.com>
---
drivers/hwtracing/coresight/Kconfig | 11 +
drivers/hwtracing/coresight/Makefile | 1 +
drivers/hwtracing/coresight/coresight-tpda.c | 208 +++++++++++++++++++
drivers/hwtracing/coresight/coresight-tpda.h | 35 ++++
4 files changed, 255 insertions(+)
create mode 100644 drivers/hwtracing/coresight/coresight-tpda.c
create mode 100644 drivers/hwtracing/coresight/coresight-tpda.h
diff --git a/drivers/hwtracing/coresight/Kconfig b/drivers/hwtracing/coresight/Kconfig
index b2b72a35e416..0cbebfd0d23e 100644
--- a/drivers/hwtracing/coresight/Kconfig
+++ b/drivers/hwtracing/coresight/Kconfig
@@ -205,6 +205,7 @@ config CORESIGHT_TRBE
config CORESIGHT_TPDM
tristate "CoreSight Trace, Profiling & Diagnostics Monitor driver"
select CORESIGHT_LINKS_AND_SINKS
+ select CORESIGHT_TPDA
help
This driver provides support for configuring monitor. Monitors are
primarily responsible for data set collection and support the
@@ -213,4 +214,14 @@ config CORESIGHT_TPDM
To compile this driver as a module, choose M here: the module will be
called coresight-tpdm.
+config CORESIGHT_TPDA
+ tristate "CoreSight Trace, Profiling & Diagnostics Aggregator driver"
+ help
+ This driver provides support for configuring aggregator. This is
+ primarily useful for pulling the data sets from one or more
+ attached monitors and pushing the resultant data out. Multiple
+ monitors are connected on different input ports of TPDA.
+
+ To compile this driver as a module, choose M here: the module will be
+ called coresight-tpda.
endif
diff --git a/drivers/hwtracing/coresight/Makefile b/drivers/hwtracing/coresight/Makefile
index 6bb9b1746bc7..1712d82e7260 100644
--- a/drivers/hwtracing/coresight/Makefile
+++ b/drivers/hwtracing/coresight/Makefile
@@ -26,5 +26,6 @@ obj-$(CONFIG_CORESIGHT_CATU) += coresight-catu.o
obj-$(CONFIG_CORESIGHT_CTI) += coresight-cti.o
obj-$(CONFIG_CORESIGHT_TRBE) += coresight-trbe.o
obj-$(CONFIG_CORESIGHT_TPDM) += coresight-tpdm.o
+obj-$(CONFIG_CORESIGHT_TPDA) += coresight-tpda.o
coresight-cti-y := coresight-cti-core.o coresight-cti-platform.o \
coresight-cti-sysfs.o
diff --git a/drivers/hwtracing/coresight/coresight-tpda.c b/drivers/hwtracing/coresight/coresight-tpda.c
new file mode 100644
index 000000000000..c8bbc75b5187
--- /dev/null
+++ b/drivers/hwtracing/coresight/coresight-tpda.c
@@ -0,0 +1,208 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+
+#include <linux/amba/bus.h>
+#include <linux/bitfield.h>
+#include <linux/coresight.h>
+#include <linux/device.h>
+#include <linux/err.h>
+#include <linux/fs.h>
+#include <linux/io.h>
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/of.h>
+#include <linux/platform_device.h>
+
+#include "coresight-priv.h"
+#include "coresight-tpda.h"
+#include "coresight-trace-id.h"
+
+DEFINE_CORESIGHT_DEVLIST(tpda_devs, "tpda");
+
+/* Settings pre enabling port control register */
+static void tpda_enable_pre_port(struct tpda_drvdata *drvdata)
+{
+ u32 val;
+
+ val = readl_relaxed(drvdata->base + TPDA_CR);
+ val &= ~TPDA_CR_ATID;
+ val |= FIELD_PREP(TPDA_CR_ATID, drvdata->atid);
+ writel_relaxed(val, drvdata->base + TPDA_CR);
+}
+
+static void tpda_enable_port(struct tpda_drvdata *drvdata, int port)
+{
+ u32 val;
+
+ val = readl_relaxed(drvdata->base + TPDA_Pn_CR(port));
+ /* Enable the port */
+ val |= TPDA_Pn_CR_ENA;
+ writel_relaxed(val, drvdata->base + TPDA_Pn_CR(port));
+}
+
+static void __tpda_enable(struct tpda_drvdata *drvdata, int port)
+{
+ CS_UNLOCK(drvdata->base);
+
+ if (!drvdata->csdev->enable)
+ tpda_enable_pre_port(drvdata);
+
+ tpda_enable_port(drvdata, port);
+
+ CS_LOCK(drvdata->base);
+}
+
+static int tpda_enable(struct coresight_device *csdev, int inport, int outport)
+{
+ struct tpda_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent);
+
+ spin_lock(&drvdata->spinlock);
+ if (atomic_read(&csdev->refcnt[inport]) == 0)
+ __tpda_enable(drvdata, inport);
+
+ atomic_inc(&csdev->refcnt[inport]);
+ spin_unlock(&drvdata->spinlock);
+
+ dev_dbg(drvdata->dev, "TPDA inport %d enabled.\n", inport);
+ return 0;
+}
+
+static void __tpda_disable(struct tpda_drvdata *drvdata, int port)
+{
+ u32 val;
+
+ CS_UNLOCK(drvdata->base);
+
+ val = readl_relaxed(drvdata->base + TPDA_Pn_CR(port));
+ val &= ~TPDA_Pn_CR_ENA;
+ writel_relaxed(val, drvdata->base + TPDA_Pn_CR(port));
+
+ CS_LOCK(drvdata->base);
+}
+
+static void tpda_disable(struct coresight_device *csdev, int inport,
+ int outport)
+{
+ struct tpda_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent);
+
+ spin_lock(&drvdata->spinlock);
+ if (atomic_dec_return(&csdev->refcnt[inport]) == 0)
+ __tpda_disable(drvdata, inport);
+
+ spin_unlock(&drvdata->spinlock);
+
+ dev_dbg(drvdata->dev, "TPDA inport %d disabled\n", inport);
+}
+
+static const struct coresight_ops_link tpda_link_ops = {
+ .enable = tpda_enable,
+ .disable = tpda_disable,
+};
+
+static const struct coresight_ops tpda_cs_ops = {
+ .link_ops = &tpda_link_ops,
+};
+
+static int tpda_init_default_data(struct tpda_drvdata *drvdata)
+{
+ int atid;
+ /*
+ * TPDA must has a unique atid. This atid can uniquely
+ * identify the TPDM trace source connected to the TPDA.
+ */
+ atid = coresight_trace_id_get_system_id();
+ if (atid < 0)
+ return atid;
+
+ drvdata->atid = atid;
+ return 0;
+}
+
+static int tpda_probe(struct amba_device *adev, const struct amba_id *id)
+{
+ int ret;
+ struct device *dev = &adev->dev;
+ struct coresight_platform_data *pdata;
+ struct tpda_drvdata *drvdata;
+ struct coresight_desc desc = { 0 };
+ void __iomem *base;
+
+ pdata = coresight_get_platform_data(dev);
+ if (IS_ERR(pdata))
+ return PTR_ERR(pdata);
+ adev->dev.platform_data = pdata;
+
+ drvdata = devm_kzalloc(dev, sizeof(*drvdata), GFP_KERNEL);
+ if (!drvdata)
+ return -ENOMEM;
+
+ drvdata->dev = &adev->dev;
+ dev_set_drvdata(dev, drvdata);
+
+ base = devm_ioremap_resource(dev, &adev->res);
+ if (!base)
+ return -ENOMEM;
+ drvdata->base = base;
+
+ spin_lock_init(&drvdata->spinlock);
+
+ ret = tpda_init_default_data(drvdata);
+ if (ret)
+ return ret;
+
+ desc.name = coresight_alloc_device_name(&tpda_devs, dev);
+ if (!desc.name)
+ return -ENOMEM;
+ desc.type = CORESIGHT_DEV_TYPE_LINK;
+ desc.subtype.link_subtype = CORESIGHT_DEV_SUBTYPE_LINK_MERG;
+ desc.ops = &tpda_cs_ops;
+ desc.pdata = adev->dev.platform_data;
+ desc.dev = &adev->dev;
+ desc.access = CSDEV_ACCESS_IOMEM(base);
+ drvdata->csdev = coresight_register(&desc);
+ if (IS_ERR(drvdata->csdev))
+ return PTR_ERR(drvdata->csdev);
+
+ pm_runtime_put(&adev->dev);
+
+ dev_dbg(drvdata->dev, "TPDA initialized\n");
+ return 0;
+}
+
+static void __exit tpda_remove(struct amba_device *adev)
+{
+ struct tpda_drvdata *drvdata = dev_get_drvdata(&adev->dev);
+
+ coresight_trace_id_put_system_id(drvdata->atid);
+ coresight_unregister(drvdata->csdev);
+}
+
+/*
+ * Different TPDA has different periph id.
+ * The difference is 0-7 bits' value. So ignore 0-7 bits.
+ */
+static struct amba_id tpda_ids[] = {
+ {
+ .id = 0x000f0f00,
+ .mask = 0x000fff00,
+ },
+ { 0, 0},
+};
+
+static struct amba_driver tpda_driver = {
+ .drv = {
+ .name = "coresight-tpda",
+ .owner = THIS_MODULE,
+ .suppress_bind_attrs = true,
+ },
+ .probe = tpda_probe,
+ .remove = tpda_remove,
+ .id_table = tpda_ids,
+};
+
+module_amba_driver(tpda_driver);
+
+MODULE_LICENSE("GPL v2");
+MODULE_DESCRIPTION("Trace, Profiling & Diagnostic Aggregator driver");
diff --git a/drivers/hwtracing/coresight/coresight-tpda.h b/drivers/hwtracing/coresight/coresight-tpda.h
new file mode 100644
index 000000000000..4beb33263c96
--- /dev/null
+++ b/drivers/hwtracing/coresight/coresight-tpda.h
@@ -0,0 +1,35 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+
+#ifndef _CORESIGHT_CORESIGHT_TPDA_H
+#define _CORESIGHT_CORESIGHT_TPDA_H
+
+#define TPDA_CR (0x000)
+#define TPDA_Pn_CR(n) (0x004 + (n * 4))
+/* Aggregator port enable bit */
+#define TPDA_Pn_CR_ENA BIT(0)
+
+#define TPDA_MAX_INPORTS 32
+
+/* Bits 6 ~ 12 is for atid value */
+#define TPDA_CR_ATID GENMASK(12, 6)
+
+/**
+ * struct tpda_drvdata - specifics associated to an TPDA component
+ * @base: memory mapped base address for this component.
+ * @dev: The device entity associated to this component.
+ * @csdev: component vitals needed by the framework.
+ * @spinlock: lock for the drvdata value.
+ * @enable: enable status of the component.
+ */
+struct tpda_drvdata {
+ void __iomem *base;
+ struct device *dev;
+ struct coresight_device *csdev;
+ spinlock_t spinlock;
+ u8 atid;
+};
+
+#endif /* _CORESIGHT_CORESIGHT_TPDA_H */
--
2.17.1
^ permalink raw reply related [flat|nested] 32+ messages in thread
* [PATCH v12 6/9] Coresight: Add TPDA link driver
@ 2022-07-10 2:10 ` Mao Jinlong
0 siblings, 0 replies; 32+ messages in thread
From: Mao Jinlong @ 2022-07-10 2:10 UTC (permalink / raw)
To: Mathieu Poirier, Suzuki K Poulose, Alexander Shishkin,
Konrad Dybcio, Mike Leach
Cc: Mao Jinlong, Leo Yan, Greg Kroah-Hartman, coresight,
linux-arm-kernel, linux-kernel, Tingwei Zhang, Yuanfang Zhang,
Tao Zhang, Trilok Soni, Hao Zhang, linux-arm-msm,
Bjorn Andersson
TPDA(Trace, Profiling and Diagnostics Aggregator) is
to provide packetization, funneling and timestamping of
TPDM data. Multiple monitors are connected to different
input ports of TPDA.This change is to add tpda
enable/disable/probe functions for coresight tpda driver.
- - - - - - - - - - - -
| TPDM 0| | TPDM 1 | | TPDM 2|
- - - - - - - - - - - -
| | |
|_ _ _ _ _ _ | _ _ _ _ |
| | |
| | |
------------------
| TPDA |
------------------
Signed-off-by: Tao Zhang <quic_taozha@quicinc.com>
Signed-off-by: Mao Jinlong <quic_jinlmao@quicinc.com>
---
drivers/hwtracing/coresight/Kconfig | 11 +
drivers/hwtracing/coresight/Makefile | 1 +
drivers/hwtracing/coresight/coresight-tpda.c | 208 +++++++++++++++++++
drivers/hwtracing/coresight/coresight-tpda.h | 35 ++++
4 files changed, 255 insertions(+)
create mode 100644 drivers/hwtracing/coresight/coresight-tpda.c
create mode 100644 drivers/hwtracing/coresight/coresight-tpda.h
diff --git a/drivers/hwtracing/coresight/Kconfig b/drivers/hwtracing/coresight/Kconfig
index b2b72a35e416..0cbebfd0d23e 100644
--- a/drivers/hwtracing/coresight/Kconfig
+++ b/drivers/hwtracing/coresight/Kconfig
@@ -205,6 +205,7 @@ config CORESIGHT_TRBE
config CORESIGHT_TPDM
tristate "CoreSight Trace, Profiling & Diagnostics Monitor driver"
select CORESIGHT_LINKS_AND_SINKS
+ select CORESIGHT_TPDA
help
This driver provides support for configuring monitor. Monitors are
primarily responsible for data set collection and support the
@@ -213,4 +214,14 @@ config CORESIGHT_TPDM
To compile this driver as a module, choose M here: the module will be
called coresight-tpdm.
+config CORESIGHT_TPDA
+ tristate "CoreSight Trace, Profiling & Diagnostics Aggregator driver"
+ help
+ This driver provides support for configuring aggregator. This is
+ primarily useful for pulling the data sets from one or more
+ attached monitors and pushing the resultant data out. Multiple
+ monitors are connected on different input ports of TPDA.
+
+ To compile this driver as a module, choose M here: the module will be
+ called coresight-tpda.
endif
diff --git a/drivers/hwtracing/coresight/Makefile b/drivers/hwtracing/coresight/Makefile
index 6bb9b1746bc7..1712d82e7260 100644
--- a/drivers/hwtracing/coresight/Makefile
+++ b/drivers/hwtracing/coresight/Makefile
@@ -26,5 +26,6 @@ obj-$(CONFIG_CORESIGHT_CATU) += coresight-catu.o
obj-$(CONFIG_CORESIGHT_CTI) += coresight-cti.o
obj-$(CONFIG_CORESIGHT_TRBE) += coresight-trbe.o
obj-$(CONFIG_CORESIGHT_TPDM) += coresight-tpdm.o
+obj-$(CONFIG_CORESIGHT_TPDA) += coresight-tpda.o
coresight-cti-y := coresight-cti-core.o coresight-cti-platform.o \
coresight-cti-sysfs.o
diff --git a/drivers/hwtracing/coresight/coresight-tpda.c b/drivers/hwtracing/coresight/coresight-tpda.c
new file mode 100644
index 000000000000..c8bbc75b5187
--- /dev/null
+++ b/drivers/hwtracing/coresight/coresight-tpda.c
@@ -0,0 +1,208 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+
+#include <linux/amba/bus.h>
+#include <linux/bitfield.h>
+#include <linux/coresight.h>
+#include <linux/device.h>
+#include <linux/err.h>
+#include <linux/fs.h>
+#include <linux/io.h>
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/of.h>
+#include <linux/platform_device.h>
+
+#include "coresight-priv.h"
+#include "coresight-tpda.h"
+#include "coresight-trace-id.h"
+
+DEFINE_CORESIGHT_DEVLIST(tpda_devs, "tpda");
+
+/* Settings pre enabling port control register */
+static void tpda_enable_pre_port(struct tpda_drvdata *drvdata)
+{
+ u32 val;
+
+ val = readl_relaxed(drvdata->base + TPDA_CR);
+ val &= ~TPDA_CR_ATID;
+ val |= FIELD_PREP(TPDA_CR_ATID, drvdata->atid);
+ writel_relaxed(val, drvdata->base + TPDA_CR);
+}
+
+static void tpda_enable_port(struct tpda_drvdata *drvdata, int port)
+{
+ u32 val;
+
+ val = readl_relaxed(drvdata->base + TPDA_Pn_CR(port));
+ /* Enable the port */
+ val |= TPDA_Pn_CR_ENA;
+ writel_relaxed(val, drvdata->base + TPDA_Pn_CR(port));
+}
+
+static void __tpda_enable(struct tpda_drvdata *drvdata, int port)
+{
+ CS_UNLOCK(drvdata->base);
+
+ if (!drvdata->csdev->enable)
+ tpda_enable_pre_port(drvdata);
+
+ tpda_enable_port(drvdata, port);
+
+ CS_LOCK(drvdata->base);
+}
+
+static int tpda_enable(struct coresight_device *csdev, int inport, int outport)
+{
+ struct tpda_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent);
+
+ spin_lock(&drvdata->spinlock);
+ if (atomic_read(&csdev->refcnt[inport]) == 0)
+ __tpda_enable(drvdata, inport);
+
+ atomic_inc(&csdev->refcnt[inport]);
+ spin_unlock(&drvdata->spinlock);
+
+ dev_dbg(drvdata->dev, "TPDA inport %d enabled.\n", inport);
+ return 0;
+}
+
+static void __tpda_disable(struct tpda_drvdata *drvdata, int port)
+{
+ u32 val;
+
+ CS_UNLOCK(drvdata->base);
+
+ val = readl_relaxed(drvdata->base + TPDA_Pn_CR(port));
+ val &= ~TPDA_Pn_CR_ENA;
+ writel_relaxed(val, drvdata->base + TPDA_Pn_CR(port));
+
+ CS_LOCK(drvdata->base);
+}
+
+static void tpda_disable(struct coresight_device *csdev, int inport,
+ int outport)
+{
+ struct tpda_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent);
+
+ spin_lock(&drvdata->spinlock);
+ if (atomic_dec_return(&csdev->refcnt[inport]) == 0)
+ __tpda_disable(drvdata, inport);
+
+ spin_unlock(&drvdata->spinlock);
+
+ dev_dbg(drvdata->dev, "TPDA inport %d disabled\n", inport);
+}
+
+static const struct coresight_ops_link tpda_link_ops = {
+ .enable = tpda_enable,
+ .disable = tpda_disable,
+};
+
+static const struct coresight_ops tpda_cs_ops = {
+ .link_ops = &tpda_link_ops,
+};
+
+static int tpda_init_default_data(struct tpda_drvdata *drvdata)
+{
+ int atid;
+ /*
+ * TPDA must has a unique atid. This atid can uniquely
+ * identify the TPDM trace source connected to the TPDA.
+ */
+ atid = coresight_trace_id_get_system_id();
+ if (atid < 0)
+ return atid;
+
+ drvdata->atid = atid;
+ return 0;
+}
+
+static int tpda_probe(struct amba_device *adev, const struct amba_id *id)
+{
+ int ret;
+ struct device *dev = &adev->dev;
+ struct coresight_platform_data *pdata;
+ struct tpda_drvdata *drvdata;
+ struct coresight_desc desc = { 0 };
+ void __iomem *base;
+
+ pdata = coresight_get_platform_data(dev);
+ if (IS_ERR(pdata))
+ return PTR_ERR(pdata);
+ adev->dev.platform_data = pdata;
+
+ drvdata = devm_kzalloc(dev, sizeof(*drvdata), GFP_KERNEL);
+ if (!drvdata)
+ return -ENOMEM;
+
+ drvdata->dev = &adev->dev;
+ dev_set_drvdata(dev, drvdata);
+
+ base = devm_ioremap_resource(dev, &adev->res);
+ if (!base)
+ return -ENOMEM;
+ drvdata->base = base;
+
+ spin_lock_init(&drvdata->spinlock);
+
+ ret = tpda_init_default_data(drvdata);
+ if (ret)
+ return ret;
+
+ desc.name = coresight_alloc_device_name(&tpda_devs, dev);
+ if (!desc.name)
+ return -ENOMEM;
+ desc.type = CORESIGHT_DEV_TYPE_LINK;
+ desc.subtype.link_subtype = CORESIGHT_DEV_SUBTYPE_LINK_MERG;
+ desc.ops = &tpda_cs_ops;
+ desc.pdata = adev->dev.platform_data;
+ desc.dev = &adev->dev;
+ desc.access = CSDEV_ACCESS_IOMEM(base);
+ drvdata->csdev = coresight_register(&desc);
+ if (IS_ERR(drvdata->csdev))
+ return PTR_ERR(drvdata->csdev);
+
+ pm_runtime_put(&adev->dev);
+
+ dev_dbg(drvdata->dev, "TPDA initialized\n");
+ return 0;
+}
+
+static void __exit tpda_remove(struct amba_device *adev)
+{
+ struct tpda_drvdata *drvdata = dev_get_drvdata(&adev->dev);
+
+ coresight_trace_id_put_system_id(drvdata->atid);
+ coresight_unregister(drvdata->csdev);
+}
+
+/*
+ * Different TPDA has different periph id.
+ * The difference is 0-7 bits' value. So ignore 0-7 bits.
+ */
+static struct amba_id tpda_ids[] = {
+ {
+ .id = 0x000f0f00,
+ .mask = 0x000fff00,
+ },
+ { 0, 0},
+};
+
+static struct amba_driver tpda_driver = {
+ .drv = {
+ .name = "coresight-tpda",
+ .owner = THIS_MODULE,
+ .suppress_bind_attrs = true,
+ },
+ .probe = tpda_probe,
+ .remove = tpda_remove,
+ .id_table = tpda_ids,
+};
+
+module_amba_driver(tpda_driver);
+
+MODULE_LICENSE("GPL v2");
+MODULE_DESCRIPTION("Trace, Profiling & Diagnostic Aggregator driver");
diff --git a/drivers/hwtracing/coresight/coresight-tpda.h b/drivers/hwtracing/coresight/coresight-tpda.h
new file mode 100644
index 000000000000..4beb33263c96
--- /dev/null
+++ b/drivers/hwtracing/coresight/coresight-tpda.h
@@ -0,0 +1,35 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+
+#ifndef _CORESIGHT_CORESIGHT_TPDA_H
+#define _CORESIGHT_CORESIGHT_TPDA_H
+
+#define TPDA_CR (0x000)
+#define TPDA_Pn_CR(n) (0x004 + (n * 4))
+/* Aggregator port enable bit */
+#define TPDA_Pn_CR_ENA BIT(0)
+
+#define TPDA_MAX_INPORTS 32
+
+/* Bits 6 ~ 12 is for atid value */
+#define TPDA_CR_ATID GENMASK(12, 6)
+
+/**
+ * struct tpda_drvdata - specifics associated to an TPDA component
+ * @base: memory mapped base address for this component.
+ * @dev: The device entity associated to this component.
+ * @csdev: component vitals needed by the framework.
+ * @spinlock: lock for the drvdata value.
+ * @enable: enable status of the component.
+ */
+struct tpda_drvdata {
+ void __iomem *base;
+ struct device *dev;
+ struct coresight_device *csdev;
+ spinlock_t spinlock;
+ u8 atid;
+};
+
+#endif /* _CORESIGHT_CORESIGHT_TPDA_H */
--
2.17.1
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 32+ messages in thread
* [PATCH v12 7/9] dt-bindings: arm: Adds CoreSight TPDA hardware definitions
2022-07-10 2:10 ` Mao Jinlong
@ 2022-07-10 2:10 ` Mao Jinlong
-1 siblings, 0 replies; 32+ messages in thread
From: Mao Jinlong @ 2022-07-10 2:10 UTC (permalink / raw)
To: Mathieu Poirier, Suzuki K Poulose, Alexander Shishkin,
Konrad Dybcio, Mike Leach, Rob Herring, Krzysztof Kozlowski
Cc: Mao Jinlong, Leo Yan, Greg Kroah-Hartman, coresight,
linux-arm-kernel, linux-kernel, devicetree, Tingwei Zhang,
Yuanfang Zhang, Tao Zhang, Trilok Soni, Hao Zhang, linux-arm-msm,
Bjorn Andersson
Adds new coresight-tpda.yaml file describing the bindings required
to define tpda in the device trees.
Acked-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Reviewed-by: Mike Leach <mike.leach@linaro.org>
Signed-off-by: Tao Zhang <quic_taozha@quicinc.com>
Signed-off-by: Mao Jinlong <quic_jinlmao@quicinc.com>
---
.../bindings/arm/qcom,coresight-tpda.yaml | 111 ++++++++++++++++++
MAINTAINERS | 1 +
2 files changed, 112 insertions(+)
create mode 100644 Documentation/devicetree/bindings/arm/qcom,coresight-tpda.yaml
diff --git a/Documentation/devicetree/bindings/arm/qcom,coresight-tpda.yaml b/Documentation/devicetree/bindings/arm/qcom,coresight-tpda.yaml
new file mode 100644
index 000000000000..eb9bfc5f93a2
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/qcom,coresight-tpda.yaml
@@ -0,0 +1,111 @@
+# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause
+# Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved.
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/arm/qcom,coresight-tpda.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Trace, Profiling and Diagnostics Aggregator - TPDA
+
+description: |
+ TPDAs are responsible for packetization and timestamping of data sets
+ utilizing the MIPI STPv2 packet protocol. Pulling data sets from one or
+ more attached TPDM and pushing the resultant (packetized) data out a
+ master ATB interface. Performing an arbitrated ATB interleaving (funneling)
+ task for free-flowing data from TPDM (i.e. CMB and DSB data set flows).
+
+maintainers:
+ - Mao Jinlong <quic_jinlmao@quicinc.com>
+ - Tao Zhang <quic_taozha@quicinc.com>
+
+# Need a custom select here or 'arm,primecell' will match on lots of nodes
+select:
+ properties:
+ compatible:
+ contains:
+ enum:
+ - qcom,coresight-tpda
+ required:
+ - compatible
+
+properties:
+ $nodename:
+ pattern: "^tpda(@[0-9a-f]+)$"
+ compatible:
+ items:
+ - const: qcom,coresight-tpda
+ - const: arm,primecell
+
+ reg:
+ minItems: 1
+ maxItems: 2
+
+ clocks:
+ maxItems: 1
+
+ clock-names:
+ items:
+ - const: apb_pclk
+
+ in-ports:
+ type: object
+ description: |
+ Input connections from TPDM to TPDA
+ $ref: /schemas/graph.yaml#/properties/ports
+
+ out-ports:
+ type: object
+ description: |
+ Output connections from the TPDA to legacy CoreSight trace bus.
+ $ref: /schemas/graph.yaml#/properties/ports
+
+ properties:
+ port:
+ description:
+ Output connection from the TPDA to legacy CoreSight Trace bus.
+ $ref: /schemas/graph.yaml#/properties/port
+
+required:
+ - compatible
+ - reg
+ - clocks
+ - clock-names
+ - in-ports
+ - out-ports
+
+additionalProperties: false
+
+examples:
+ # minimum tpda definition.
+ - |
+ tpda@6004000 {
+ compatible = "qcom,coresight-tpda", "arm,primecell";
+ reg = <0x6004000 0x1000>;
+
+ clocks = <&aoss_qmp>;
+ clock-names = "apb_pclk";
+
+ in-ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+ tpda_qdss_0_in_tpdm_dcc: endpoint {
+ remote-endpoint =
+ <&tpdm_dcc_out_tpda_qdss_0>;
+ };
+ };
+ };
+
+ out-ports {
+ port {
+ tpda_qdss_out_funnel_in0: endpoint {
+ remote-endpoint =
+ <&funnel_in0_in_tpda_qdss>;
+ };
+ };
+ };
+ };
+
+...
diff --git a/MAINTAINERS b/MAINTAINERS
index db7f70be6850..271465616b0b 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -1985,6 +1985,7 @@ T: git git://git.kernel.org/pub/scm/linux/kernel/git/coresight/linux.git
F: Documentation/ABI/testing/sysfs-bus-coresight-devices-*
F: Documentation/devicetree/bindings/arm/coresight-cpu-debug.txt
F: Documentation/devicetree/bindings/arm/coresight-cti.yaml
+F: Documentation/devicetree/bindings/arm/qcom,coresight-tpda.yaml
F: Documentation/devicetree/bindings/arm/qcom,coresight-tpdm.yaml
F: Documentation/devicetree/bindings/arm/coresight.txt
F: Documentation/devicetree/bindings/arm/ete.yaml
--
2.17.1
^ permalink raw reply related [flat|nested] 32+ messages in thread
* [PATCH v12 7/9] dt-bindings: arm: Adds CoreSight TPDA hardware definitions
@ 2022-07-10 2:10 ` Mao Jinlong
0 siblings, 0 replies; 32+ messages in thread
From: Mao Jinlong @ 2022-07-10 2:10 UTC (permalink / raw)
To: Mathieu Poirier, Suzuki K Poulose, Alexander Shishkin,
Konrad Dybcio, Mike Leach, Rob Herring, Krzysztof Kozlowski
Cc: Mao Jinlong, Leo Yan, Greg Kroah-Hartman, coresight,
linux-arm-kernel, linux-kernel, devicetree, Tingwei Zhang,
Yuanfang Zhang, Tao Zhang, Trilok Soni, Hao Zhang, linux-arm-msm,
Bjorn Andersson
Adds new coresight-tpda.yaml file describing the bindings required
to define tpda in the device trees.
Acked-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Reviewed-by: Mike Leach <mike.leach@linaro.org>
Signed-off-by: Tao Zhang <quic_taozha@quicinc.com>
Signed-off-by: Mao Jinlong <quic_jinlmao@quicinc.com>
---
.../bindings/arm/qcom,coresight-tpda.yaml | 111 ++++++++++++++++++
MAINTAINERS | 1 +
2 files changed, 112 insertions(+)
create mode 100644 Documentation/devicetree/bindings/arm/qcom,coresight-tpda.yaml
diff --git a/Documentation/devicetree/bindings/arm/qcom,coresight-tpda.yaml b/Documentation/devicetree/bindings/arm/qcom,coresight-tpda.yaml
new file mode 100644
index 000000000000..eb9bfc5f93a2
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/qcom,coresight-tpda.yaml
@@ -0,0 +1,111 @@
+# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause
+# Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved.
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/arm/qcom,coresight-tpda.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Trace, Profiling and Diagnostics Aggregator - TPDA
+
+description: |
+ TPDAs are responsible for packetization and timestamping of data sets
+ utilizing the MIPI STPv2 packet protocol. Pulling data sets from one or
+ more attached TPDM and pushing the resultant (packetized) data out a
+ master ATB interface. Performing an arbitrated ATB interleaving (funneling)
+ task for free-flowing data from TPDM (i.e. CMB and DSB data set flows).
+
+maintainers:
+ - Mao Jinlong <quic_jinlmao@quicinc.com>
+ - Tao Zhang <quic_taozha@quicinc.com>
+
+# Need a custom select here or 'arm,primecell' will match on lots of nodes
+select:
+ properties:
+ compatible:
+ contains:
+ enum:
+ - qcom,coresight-tpda
+ required:
+ - compatible
+
+properties:
+ $nodename:
+ pattern: "^tpda(@[0-9a-f]+)$"
+ compatible:
+ items:
+ - const: qcom,coresight-tpda
+ - const: arm,primecell
+
+ reg:
+ minItems: 1
+ maxItems: 2
+
+ clocks:
+ maxItems: 1
+
+ clock-names:
+ items:
+ - const: apb_pclk
+
+ in-ports:
+ type: object
+ description: |
+ Input connections from TPDM to TPDA
+ $ref: /schemas/graph.yaml#/properties/ports
+
+ out-ports:
+ type: object
+ description: |
+ Output connections from the TPDA to legacy CoreSight trace bus.
+ $ref: /schemas/graph.yaml#/properties/ports
+
+ properties:
+ port:
+ description:
+ Output connection from the TPDA to legacy CoreSight Trace bus.
+ $ref: /schemas/graph.yaml#/properties/port
+
+required:
+ - compatible
+ - reg
+ - clocks
+ - clock-names
+ - in-ports
+ - out-ports
+
+additionalProperties: false
+
+examples:
+ # minimum tpda definition.
+ - |
+ tpda@6004000 {
+ compatible = "qcom,coresight-tpda", "arm,primecell";
+ reg = <0x6004000 0x1000>;
+
+ clocks = <&aoss_qmp>;
+ clock-names = "apb_pclk";
+
+ in-ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+ tpda_qdss_0_in_tpdm_dcc: endpoint {
+ remote-endpoint =
+ <&tpdm_dcc_out_tpda_qdss_0>;
+ };
+ };
+ };
+
+ out-ports {
+ port {
+ tpda_qdss_out_funnel_in0: endpoint {
+ remote-endpoint =
+ <&funnel_in0_in_tpda_qdss>;
+ };
+ };
+ };
+ };
+
+...
diff --git a/MAINTAINERS b/MAINTAINERS
index db7f70be6850..271465616b0b 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -1985,6 +1985,7 @@ T: git git://git.kernel.org/pub/scm/linux/kernel/git/coresight/linux.git
F: Documentation/ABI/testing/sysfs-bus-coresight-devices-*
F: Documentation/devicetree/bindings/arm/coresight-cpu-debug.txt
F: Documentation/devicetree/bindings/arm/coresight-cti.yaml
+F: Documentation/devicetree/bindings/arm/qcom,coresight-tpda.yaml
F: Documentation/devicetree/bindings/arm/qcom,coresight-tpdm.yaml
F: Documentation/devicetree/bindings/arm/coresight.txt
F: Documentation/devicetree/bindings/arm/ete.yaml
--
2.17.1
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 32+ messages in thread
* [PATCH v12 8/9] arm64: dts: qcom: sm8250: Add coresight components
2022-07-10 2:10 ` Mao Jinlong
@ 2022-07-10 2:10 ` Mao Jinlong
-1 siblings, 0 replies; 32+ messages in thread
From: Mao Jinlong @ 2022-07-10 2:10 UTC (permalink / raw)
To: Mathieu Poirier, Suzuki K Poulose, Alexander Shishkin,
Konrad Dybcio, Mike Leach, Andy Gross, Bjorn Andersson,
Rob Herring, Krzysztof Kozlowski
Cc: Mao Jinlong, Leo Yan, Greg Kroah-Hartman, coresight,
linux-arm-kernel, linux-kernel, devicetree, Tingwei Zhang,
Yuanfang Zhang, Tao Zhang, Trilok Soni, Hao Zhang, linux-arm-msm
Add coresight components for sm8250. STM/ETM are added.
Signed-off-by: Tao Zhang <quic_taozha@quicinc.com>
Signed-off-by: Mao Jinlong <quic_jinlmao@quicinc.com>
---
arch/arm64/boot/dts/qcom/sm8250.dtsi | 498 +++++++++++++++++++++++++++
1 file changed, 498 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sm8250.dtsi b/arch/arm64/boot/dts/qcom/sm8250.dtsi
index cf0c97bd5ad3..d6bcbf7667b6 100644
--- a/arch/arm64/boot/dts/qcom/sm8250.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8250.dtsi
@@ -2713,6 +2713,504 @@
};
};
+ stm@6002000 {
+ compatible = "arm,coresight-stm", "arm,primecell";
+ reg = <0 0x06002000 0 0x1000>, <0 0x16280000 0 0x180000>;
+ reg-names = "stm-base", "stm-stimulus-base";
+
+ clocks = <&aoss_qmp>;
+ clock-names = "apb_pclk";
+
+ out-ports {
+ port {
+ stm_out: endpoint {
+ remote-endpoint = <&funnel0_in7>;
+ };
+ };
+ };
+ };
+
+ funnel@6041000 {
+ compatible = "arm,coresight-dynamic-funnel", "arm,primecell";
+ reg = <0 0x06041000 0 0x1000>;
+
+ clocks = <&aoss_qmp>;
+ clock-names = "apb_pclk";
+
+ out-ports {
+ port {
+ funnel_in0_out_funnel_merg: endpoint {
+ remote-endpoint = <&funnel_merg_in_funnel_in0>;
+ };
+ };
+ };
+
+ in-ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@7 {
+ reg = <7>;
+ funnel0_in7: endpoint {
+ remote-endpoint = <&stm_out>;
+ };
+ };
+ };
+ };
+
+ funnel@6042000 {
+ compatible = "arm,coresight-dynamic-funnel", "arm,primecell";
+ reg = <0 0x06042000 0 0x1000>;
+
+ clocks = <&aoss_qmp>;
+ clock-names = "apb_pclk";
+
+ out-ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+ funnel_in1_out_funnel_merg: endpoint {
+ remote-endpoint = <&funnel_merg_in_funnel_in1>;
+ };
+ };
+ };
+
+ in-ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@4 {
+ reg = <4>;
+ funnel_in1_in_funnel_apss_merg: endpoint {
+ remote-endpoint = <&funnel_apss_merg_out_funnel_in1>;
+ };
+ };
+ };
+ };
+
+ funnel@6045000 {
+ compatible = "arm,coresight-dynamic-funnel", "arm,primecell";
+ reg = <0 0x06045000 0 0x1000>;
+
+ clocks = <&aoss_qmp>;
+ clock-names = "apb_pclk";
+
+ out-ports {
+ port {
+ funnel_merg_out_funnel_swao: endpoint {
+ remote-endpoint = <&funnel_swao_in_funnel_merg>;
+ };
+ };
+ };
+
+ in-ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+ funnel_merg_in_funnel_in0: endpoint {
+ remote-endpoint = <&funnel_in0_out_funnel_merg>;
+ };
+ };
+
+ port@1 {
+ reg = <1>;
+ funnel_merg_in_funnel_in1: endpoint {
+ remote-endpoint = <&funnel_in1_out_funnel_merg>;
+ };
+ };
+ };
+ };
+
+ replicator@6046000 {
+ compatible = "arm,coresight-dynamic-replicator", "arm,primecell";
+ reg = <0 0x06046000 0 0x1000>;
+
+
+ clocks = <&aoss_qmp>;
+ clock-names = "apb_pclk";
+
+ out-ports {
+ port {
+ replicator_out: endpoint {
+ remote-endpoint = <&etr_in>;
+ };
+ };
+ };
+
+ in-ports {
+ port {
+ replicator_cx_in_swao_out: endpoint {
+ remote-endpoint = <&replicator_swao_out_cx_in>;
+ };
+ };
+ };
+ };
+
+ etr@6048000 {
+ compatible = "arm,coresight-tmc", "arm,primecell";
+ reg = <0 0x06048000 0 0x1000>;
+
+ clocks = <&aoss_qmp>;
+ clock-names = "apb_pclk";
+ arm,scatter-gather;
+
+ in-ports {
+ port {
+ etr_in: endpoint {
+ remote-endpoint = <&replicator_out>;
+ };
+ };
+ };
+ };
+
+ funnel@6b04000 {
+ compatible = "arm,coresight-dynamic-funnel", "arm,primecell";
+ arm,primecell-periphid = <0x000bb908>;
+
+ reg = <0 0x06b04000 0 0x1000>;
+ reg-names = "funnel-base";
+
+ clocks = <&aoss_qmp>;
+ clock-names = "apb_pclk";
+
+ out-ports {
+ port {
+ funnel_swao_out_etf: endpoint {
+ remote-endpoint = <&etf_in_funnel_swao_out>;
+ };
+ };
+ };
+
+ in-ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@7 {
+ reg = <7>;
+ funnel_swao_in_funnel_merg: endpoint {
+ remote-endpoint= <&funnel_merg_out_funnel_swao>;
+ };
+ };
+ };
+
+ };
+
+ etf@6b05000 {
+ compatible = "arm,coresight-tmc", "arm,primecell";
+ reg = <0 0x06b05000 0 0x1000>;
+
+ clocks = <&aoss_qmp>;
+ clock-names = "apb_pclk";
+
+ out-ports {
+ port {
+ etf_out: endpoint {
+ remote-endpoint = <&replicator_in>;
+ };
+ };
+ };
+
+ in-ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+ etf_in_funnel_swao_out: endpoint {
+ remote-endpoint = <&funnel_swao_out_etf>;
+ };
+ };
+ };
+ };
+
+ replicator@6b06000 {
+ compatible = "arm,coresight-dynamic-replicator", "arm,primecell";
+ reg = <0 0x06b06000 0 0x1000>;
+
+ clocks = <&aoss_qmp>;
+ clock-names = "apb_pclk";
+
+ out-ports {
+ port {
+ replicator_swao_out_cx_in: endpoint {
+ remote-endpoint = <&replicator_cx_in_swao_out>;
+ };
+ };
+ };
+
+ in-ports {
+ port {
+ replicator_in: endpoint {
+ remote-endpoint = <&etf_out>;
+ };
+ };
+ };
+ };
+
+ etm@7040000 {
+ compatible = "arm,coresight-etm4x", "arm,primecell";
+ reg = <0 0x07040000 0 0x1000>;
+
+ cpu = <&CPU0>;
+
+ clocks = <&aoss_qmp>;
+ clock-names = "apb_pclk";
+ arm,coresight-loses-context-with-cpu;
+
+ out-ports {
+ port {
+ etm0_out: endpoint {
+ remote-endpoint = <&apss_funnel_in0>;
+ };
+ };
+ };
+ };
+
+ etm@7140000 {
+ compatible = "arm,coresight-etm4x", "arm,primecell";
+ reg = <0 0x07140000 0 0x1000>;
+
+ cpu = <&CPU1>;
+
+ clocks = <&aoss_qmp>;
+ clock-names = "apb_pclk";
+ arm,coresight-loses-context-with-cpu;
+
+ out-ports {
+ port {
+ etm1_out: endpoint {
+ remote-endpoint = <&apss_funnel_in1>;
+ };
+ };
+ };
+ };
+
+ etm@7240000 {
+ compatible = "arm,coresight-etm4x", "arm,primecell";
+ reg = <0 0x07240000 0 0x1000>;
+
+ cpu = <&CPU2>;
+
+ clocks = <&aoss_qmp>;
+ clock-names = "apb_pclk";
+ arm,coresight-loses-context-with-cpu;
+
+ out-ports {
+ port {
+ etm2_out: endpoint {
+ remote-endpoint = <&apss_funnel_in2>;
+ };
+ };
+ };
+ };
+
+ etm@7340000 {
+ compatible = "arm,coresight-etm4x", "arm,primecell";
+ reg = <0 0x07340000 0 0x1000>;
+
+ cpu = <&CPU3>;
+
+ clocks = <&aoss_qmp>;
+ clock-names = "apb_pclk";
+ arm,coresight-loses-context-with-cpu;
+
+ out-ports {
+ port {
+ etm3_out: endpoint {
+ remote-endpoint = <&apss_funnel_in3>;
+ };
+ };
+ };
+ };
+
+ etm@7440000 {
+ compatible = "arm,coresight-etm4x", "arm,primecell";
+ reg = <0 0x07440000 0 0x1000>;
+
+ cpu = <&CPU4>;
+
+ clocks = <&aoss_qmp>;
+ clock-names = "apb_pclk";
+ arm,coresight-loses-context-with-cpu;
+
+ out-ports {
+ port {
+ etm4_out: endpoint {
+ remote-endpoint = <&apss_funnel_in4>;
+ };
+ };
+ };
+ };
+
+ etm@7540000 {
+ compatible = "arm,coresight-etm4x", "arm,primecell";
+ reg = <0 0x07540000 0 0x1000>;
+
+ cpu = <&CPU5>;
+
+ clocks = <&aoss_qmp>;
+ clock-names = "apb_pclk";
+ arm,coresight-loses-context-with-cpu;
+
+ out-ports {
+ port {
+ etm5_out: endpoint {
+ remote-endpoint = <&apss_funnel_in5>;
+ };
+ };
+ };
+ };
+
+ etm@7640000 {
+ compatible = "arm,coresight-etm4x", "arm,primecell";
+ reg = <0 0x07640000 0 0x1000>;
+
+ cpu = <&CPU6>;
+
+ clocks = <&aoss_qmp>;
+ clock-names = "apb_pclk";
+ arm,coresight-loses-context-with-cpu;
+
+ out-ports {
+ port {
+ etm6_out: endpoint {
+ remote-endpoint = <&apss_funnel_in6>;
+ };
+ };
+ };
+ };
+
+ etm@7740000 {
+ compatible = "arm,coresight-etm4x", "arm,primecell";
+ reg = <0 0x07740000 0 0x1000>;
+
+ cpu = <&CPU7>;
+
+ clocks = <&aoss_qmp>;
+ clock-names = "apb_pclk";
+ arm,coresight-loses-context-with-cpu;
+
+ out-ports {
+ port {
+ etm7_out: endpoint {
+ remote-endpoint = <&apss_funnel_in7>;
+ };
+ };
+ };
+ };
+
+ funnel@7800000 {
+ compatible = "arm,coresight-dynamic-funnel", "arm,primecell";
+ reg = <0 0x07800000 0 0x1000>;
+
+ clocks = <&aoss_qmp>;
+ clock-names = "apb_pclk";
+
+ out-ports {
+ port {
+ funnel_apss_out_funnel_apss_merg: endpoint {
+ remote-endpoint = <&funnel_apss_merg_in_funnel_apss>;
+ };
+ };
+ };
+
+ in-ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+ apss_funnel_in0: endpoint {
+ remote-endpoint = <&etm0_out>;
+ };
+ };
+
+ port@1 {
+ reg = <1>;
+ apss_funnel_in1: endpoint {
+ remote-endpoint = <&etm1_out>;
+ };
+ };
+
+ port@2 {
+ reg = <2>;
+ apss_funnel_in2: endpoint {
+ remote-endpoint = <&etm2_out>;
+ };
+ };
+
+ port@3 {
+ reg = <3>;
+ apss_funnel_in3: endpoint {
+ remote-endpoint = <&etm3_out>;
+ };
+ };
+
+ port@4 {
+ reg = <4>;
+ apss_funnel_in4: endpoint {
+ remote-endpoint = <&etm4_out>;
+ };
+ };
+
+ port@5 {
+ reg = <5>;
+ apss_funnel_in5: endpoint {
+ remote-endpoint = <&etm5_out>;
+ };
+ };
+
+ port@6 {
+ reg = <6>;
+ apss_funnel_in6: endpoint {
+ remote-endpoint = <&etm6_out>;
+ };
+ };
+
+ port@7 {
+ reg = <7>;
+ apss_funnel_in7: endpoint {
+ remote-endpoint = <&etm7_out>;
+ };
+ };
+ };
+ };
+
+ funnel@7810000 {
+ compatible = "arm,coresight-dynamic-funnel", "arm,primecell";
+ reg = <0 0x07810000 0 0x1000>;
+
+ clocks = <&aoss_qmp>;
+ clock-names = "apb_pclk";
+
+ out-ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port {
+ funnel_apss_merg_out_funnel_in1: endpoint {
+ remote-endpoint = <&funnel_in1_in_funnel_apss_merg>;
+ };
+ };
+ };
+
+ in-ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+ funnel_apss_merg_in_funnel_apss: endpoint {
+ remote-endpoint = <&funnel_apss_out_funnel_apss_merg>;
+ };
+ };
+ };
+ };
+
cdsp: remoteproc@8300000 {
compatible = "qcom,sm8250-cdsp-pas";
reg = <0 0x08300000 0 0x10000>;
--
2.17.1
^ permalink raw reply related [flat|nested] 32+ messages in thread
* [PATCH v12 8/9] arm64: dts: qcom: sm8250: Add coresight components
@ 2022-07-10 2:10 ` Mao Jinlong
0 siblings, 0 replies; 32+ messages in thread
From: Mao Jinlong @ 2022-07-10 2:10 UTC (permalink / raw)
To: Mathieu Poirier, Suzuki K Poulose, Alexander Shishkin,
Konrad Dybcio, Mike Leach, Andy Gross, Bjorn Andersson,
Rob Herring, Krzysztof Kozlowski
Cc: Mao Jinlong, Leo Yan, Greg Kroah-Hartman, coresight,
linux-arm-kernel, linux-kernel, devicetree, Tingwei Zhang,
Yuanfang Zhang, Tao Zhang, Trilok Soni, Hao Zhang, linux-arm-msm
Add coresight components for sm8250. STM/ETM are added.
Signed-off-by: Tao Zhang <quic_taozha@quicinc.com>
Signed-off-by: Mao Jinlong <quic_jinlmao@quicinc.com>
---
arch/arm64/boot/dts/qcom/sm8250.dtsi | 498 +++++++++++++++++++++++++++
1 file changed, 498 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sm8250.dtsi b/arch/arm64/boot/dts/qcom/sm8250.dtsi
index cf0c97bd5ad3..d6bcbf7667b6 100644
--- a/arch/arm64/boot/dts/qcom/sm8250.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8250.dtsi
@@ -2713,6 +2713,504 @@
};
};
+ stm@6002000 {
+ compatible = "arm,coresight-stm", "arm,primecell";
+ reg = <0 0x06002000 0 0x1000>, <0 0x16280000 0 0x180000>;
+ reg-names = "stm-base", "stm-stimulus-base";
+
+ clocks = <&aoss_qmp>;
+ clock-names = "apb_pclk";
+
+ out-ports {
+ port {
+ stm_out: endpoint {
+ remote-endpoint = <&funnel0_in7>;
+ };
+ };
+ };
+ };
+
+ funnel@6041000 {
+ compatible = "arm,coresight-dynamic-funnel", "arm,primecell";
+ reg = <0 0x06041000 0 0x1000>;
+
+ clocks = <&aoss_qmp>;
+ clock-names = "apb_pclk";
+
+ out-ports {
+ port {
+ funnel_in0_out_funnel_merg: endpoint {
+ remote-endpoint = <&funnel_merg_in_funnel_in0>;
+ };
+ };
+ };
+
+ in-ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@7 {
+ reg = <7>;
+ funnel0_in7: endpoint {
+ remote-endpoint = <&stm_out>;
+ };
+ };
+ };
+ };
+
+ funnel@6042000 {
+ compatible = "arm,coresight-dynamic-funnel", "arm,primecell";
+ reg = <0 0x06042000 0 0x1000>;
+
+ clocks = <&aoss_qmp>;
+ clock-names = "apb_pclk";
+
+ out-ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+ funnel_in1_out_funnel_merg: endpoint {
+ remote-endpoint = <&funnel_merg_in_funnel_in1>;
+ };
+ };
+ };
+
+ in-ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@4 {
+ reg = <4>;
+ funnel_in1_in_funnel_apss_merg: endpoint {
+ remote-endpoint = <&funnel_apss_merg_out_funnel_in1>;
+ };
+ };
+ };
+ };
+
+ funnel@6045000 {
+ compatible = "arm,coresight-dynamic-funnel", "arm,primecell";
+ reg = <0 0x06045000 0 0x1000>;
+
+ clocks = <&aoss_qmp>;
+ clock-names = "apb_pclk";
+
+ out-ports {
+ port {
+ funnel_merg_out_funnel_swao: endpoint {
+ remote-endpoint = <&funnel_swao_in_funnel_merg>;
+ };
+ };
+ };
+
+ in-ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+ funnel_merg_in_funnel_in0: endpoint {
+ remote-endpoint = <&funnel_in0_out_funnel_merg>;
+ };
+ };
+
+ port@1 {
+ reg = <1>;
+ funnel_merg_in_funnel_in1: endpoint {
+ remote-endpoint = <&funnel_in1_out_funnel_merg>;
+ };
+ };
+ };
+ };
+
+ replicator@6046000 {
+ compatible = "arm,coresight-dynamic-replicator", "arm,primecell";
+ reg = <0 0x06046000 0 0x1000>;
+
+
+ clocks = <&aoss_qmp>;
+ clock-names = "apb_pclk";
+
+ out-ports {
+ port {
+ replicator_out: endpoint {
+ remote-endpoint = <&etr_in>;
+ };
+ };
+ };
+
+ in-ports {
+ port {
+ replicator_cx_in_swao_out: endpoint {
+ remote-endpoint = <&replicator_swao_out_cx_in>;
+ };
+ };
+ };
+ };
+
+ etr@6048000 {
+ compatible = "arm,coresight-tmc", "arm,primecell";
+ reg = <0 0x06048000 0 0x1000>;
+
+ clocks = <&aoss_qmp>;
+ clock-names = "apb_pclk";
+ arm,scatter-gather;
+
+ in-ports {
+ port {
+ etr_in: endpoint {
+ remote-endpoint = <&replicator_out>;
+ };
+ };
+ };
+ };
+
+ funnel@6b04000 {
+ compatible = "arm,coresight-dynamic-funnel", "arm,primecell";
+ arm,primecell-periphid = <0x000bb908>;
+
+ reg = <0 0x06b04000 0 0x1000>;
+ reg-names = "funnel-base";
+
+ clocks = <&aoss_qmp>;
+ clock-names = "apb_pclk";
+
+ out-ports {
+ port {
+ funnel_swao_out_etf: endpoint {
+ remote-endpoint = <&etf_in_funnel_swao_out>;
+ };
+ };
+ };
+
+ in-ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@7 {
+ reg = <7>;
+ funnel_swao_in_funnel_merg: endpoint {
+ remote-endpoint= <&funnel_merg_out_funnel_swao>;
+ };
+ };
+ };
+
+ };
+
+ etf@6b05000 {
+ compatible = "arm,coresight-tmc", "arm,primecell";
+ reg = <0 0x06b05000 0 0x1000>;
+
+ clocks = <&aoss_qmp>;
+ clock-names = "apb_pclk";
+
+ out-ports {
+ port {
+ etf_out: endpoint {
+ remote-endpoint = <&replicator_in>;
+ };
+ };
+ };
+
+ in-ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+ etf_in_funnel_swao_out: endpoint {
+ remote-endpoint = <&funnel_swao_out_etf>;
+ };
+ };
+ };
+ };
+
+ replicator@6b06000 {
+ compatible = "arm,coresight-dynamic-replicator", "arm,primecell";
+ reg = <0 0x06b06000 0 0x1000>;
+
+ clocks = <&aoss_qmp>;
+ clock-names = "apb_pclk";
+
+ out-ports {
+ port {
+ replicator_swao_out_cx_in: endpoint {
+ remote-endpoint = <&replicator_cx_in_swao_out>;
+ };
+ };
+ };
+
+ in-ports {
+ port {
+ replicator_in: endpoint {
+ remote-endpoint = <&etf_out>;
+ };
+ };
+ };
+ };
+
+ etm@7040000 {
+ compatible = "arm,coresight-etm4x", "arm,primecell";
+ reg = <0 0x07040000 0 0x1000>;
+
+ cpu = <&CPU0>;
+
+ clocks = <&aoss_qmp>;
+ clock-names = "apb_pclk";
+ arm,coresight-loses-context-with-cpu;
+
+ out-ports {
+ port {
+ etm0_out: endpoint {
+ remote-endpoint = <&apss_funnel_in0>;
+ };
+ };
+ };
+ };
+
+ etm@7140000 {
+ compatible = "arm,coresight-etm4x", "arm,primecell";
+ reg = <0 0x07140000 0 0x1000>;
+
+ cpu = <&CPU1>;
+
+ clocks = <&aoss_qmp>;
+ clock-names = "apb_pclk";
+ arm,coresight-loses-context-with-cpu;
+
+ out-ports {
+ port {
+ etm1_out: endpoint {
+ remote-endpoint = <&apss_funnel_in1>;
+ };
+ };
+ };
+ };
+
+ etm@7240000 {
+ compatible = "arm,coresight-etm4x", "arm,primecell";
+ reg = <0 0x07240000 0 0x1000>;
+
+ cpu = <&CPU2>;
+
+ clocks = <&aoss_qmp>;
+ clock-names = "apb_pclk";
+ arm,coresight-loses-context-with-cpu;
+
+ out-ports {
+ port {
+ etm2_out: endpoint {
+ remote-endpoint = <&apss_funnel_in2>;
+ };
+ };
+ };
+ };
+
+ etm@7340000 {
+ compatible = "arm,coresight-etm4x", "arm,primecell";
+ reg = <0 0x07340000 0 0x1000>;
+
+ cpu = <&CPU3>;
+
+ clocks = <&aoss_qmp>;
+ clock-names = "apb_pclk";
+ arm,coresight-loses-context-with-cpu;
+
+ out-ports {
+ port {
+ etm3_out: endpoint {
+ remote-endpoint = <&apss_funnel_in3>;
+ };
+ };
+ };
+ };
+
+ etm@7440000 {
+ compatible = "arm,coresight-etm4x", "arm,primecell";
+ reg = <0 0x07440000 0 0x1000>;
+
+ cpu = <&CPU4>;
+
+ clocks = <&aoss_qmp>;
+ clock-names = "apb_pclk";
+ arm,coresight-loses-context-with-cpu;
+
+ out-ports {
+ port {
+ etm4_out: endpoint {
+ remote-endpoint = <&apss_funnel_in4>;
+ };
+ };
+ };
+ };
+
+ etm@7540000 {
+ compatible = "arm,coresight-etm4x", "arm,primecell";
+ reg = <0 0x07540000 0 0x1000>;
+
+ cpu = <&CPU5>;
+
+ clocks = <&aoss_qmp>;
+ clock-names = "apb_pclk";
+ arm,coresight-loses-context-with-cpu;
+
+ out-ports {
+ port {
+ etm5_out: endpoint {
+ remote-endpoint = <&apss_funnel_in5>;
+ };
+ };
+ };
+ };
+
+ etm@7640000 {
+ compatible = "arm,coresight-etm4x", "arm,primecell";
+ reg = <0 0x07640000 0 0x1000>;
+
+ cpu = <&CPU6>;
+
+ clocks = <&aoss_qmp>;
+ clock-names = "apb_pclk";
+ arm,coresight-loses-context-with-cpu;
+
+ out-ports {
+ port {
+ etm6_out: endpoint {
+ remote-endpoint = <&apss_funnel_in6>;
+ };
+ };
+ };
+ };
+
+ etm@7740000 {
+ compatible = "arm,coresight-etm4x", "arm,primecell";
+ reg = <0 0x07740000 0 0x1000>;
+
+ cpu = <&CPU7>;
+
+ clocks = <&aoss_qmp>;
+ clock-names = "apb_pclk";
+ arm,coresight-loses-context-with-cpu;
+
+ out-ports {
+ port {
+ etm7_out: endpoint {
+ remote-endpoint = <&apss_funnel_in7>;
+ };
+ };
+ };
+ };
+
+ funnel@7800000 {
+ compatible = "arm,coresight-dynamic-funnel", "arm,primecell";
+ reg = <0 0x07800000 0 0x1000>;
+
+ clocks = <&aoss_qmp>;
+ clock-names = "apb_pclk";
+
+ out-ports {
+ port {
+ funnel_apss_out_funnel_apss_merg: endpoint {
+ remote-endpoint = <&funnel_apss_merg_in_funnel_apss>;
+ };
+ };
+ };
+
+ in-ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+ apss_funnel_in0: endpoint {
+ remote-endpoint = <&etm0_out>;
+ };
+ };
+
+ port@1 {
+ reg = <1>;
+ apss_funnel_in1: endpoint {
+ remote-endpoint = <&etm1_out>;
+ };
+ };
+
+ port@2 {
+ reg = <2>;
+ apss_funnel_in2: endpoint {
+ remote-endpoint = <&etm2_out>;
+ };
+ };
+
+ port@3 {
+ reg = <3>;
+ apss_funnel_in3: endpoint {
+ remote-endpoint = <&etm3_out>;
+ };
+ };
+
+ port@4 {
+ reg = <4>;
+ apss_funnel_in4: endpoint {
+ remote-endpoint = <&etm4_out>;
+ };
+ };
+
+ port@5 {
+ reg = <5>;
+ apss_funnel_in5: endpoint {
+ remote-endpoint = <&etm5_out>;
+ };
+ };
+
+ port@6 {
+ reg = <6>;
+ apss_funnel_in6: endpoint {
+ remote-endpoint = <&etm6_out>;
+ };
+ };
+
+ port@7 {
+ reg = <7>;
+ apss_funnel_in7: endpoint {
+ remote-endpoint = <&etm7_out>;
+ };
+ };
+ };
+ };
+
+ funnel@7810000 {
+ compatible = "arm,coresight-dynamic-funnel", "arm,primecell";
+ reg = <0 0x07810000 0 0x1000>;
+
+ clocks = <&aoss_qmp>;
+ clock-names = "apb_pclk";
+
+ out-ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port {
+ funnel_apss_merg_out_funnel_in1: endpoint {
+ remote-endpoint = <&funnel_in1_in_funnel_apss_merg>;
+ };
+ };
+ };
+
+ in-ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+ funnel_apss_merg_in_funnel_apss: endpoint {
+ remote-endpoint = <&funnel_apss_out_funnel_apss_merg>;
+ };
+ };
+ };
+ };
+
cdsp: remoteproc@8300000 {
compatible = "qcom,sm8250-cdsp-pas";
reg = <0 0x08300000 0 0x10000>;
--
2.17.1
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 32+ messages in thread
* [PATCH v12 9/9] arm64: dts: qcom: sm8250: Add tpdm mm/prng
2022-07-10 2:10 ` Mao Jinlong
@ 2022-07-10 2:10 ` Mao Jinlong
-1 siblings, 0 replies; 32+ messages in thread
From: Mao Jinlong @ 2022-07-10 2:10 UTC (permalink / raw)
To: Mathieu Poirier, Suzuki K Poulose, Alexander Shishkin,
Konrad Dybcio, Mike Leach, Andy Gross, Bjorn Andersson,
Rob Herring, Krzysztof Kozlowski
Cc: Mao Jinlong, Leo Yan, Greg Kroah-Hartman, coresight,
linux-arm-kernel, linux-kernel, devicetree, Tingwei Zhang,
Yuanfang Zhang, Tao Zhang, Trilok Soni, Hao Zhang, linux-arm-msm
Add tpdm mm and tpdm prng for sm8250.
+---------------+ +-------------+
| tpdm@6c08000 | |tpdm@684C000 |
+-------|-------+ +------|------+
| |
+-------|-------+ |
| funnel@6c0b000| |
+-------|-------+ |
| |
+-------|-------+ |
|funnel@6c2d000 | |
+-------|-------+ |
| |
| +---------------+ |
+----- tpda@6004000 -----------+
+-------|-------+
|
+-------|-------+
|funnel@6005000 |
+---------------+
Signed-off-by: Mao Jinlong <quic_jinlmao@quicinc.com>
---
arch/arm64/boot/dts/qcom/sm8250.dtsi | 173 +++++++++++++++++++++++++++
1 file changed, 173 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sm8250.dtsi b/arch/arm64/boot/dts/qcom/sm8250.dtsi
index d6bcbf7667b6..9c1aed51ce81 100644
--- a/arch/arm64/boot/dts/qcom/sm8250.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8250.dtsi
@@ -2730,6 +2730,76 @@
};
};
+ tpda@6004000 {
+ compatible = "arm,primecell";
+ reg = <0 0x06004000 0 0x1000>;
+ reg-names = "tpda-base";
+
+ clocks = <&aoss_qmp>;
+ clock-names = "apb_pclk";
+
+ out-ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+ tpda_out_funnel_qatb: endpoint {
+ remote-endpoint = <&funnel_qatb_in_tpda>;
+ };
+ };
+ };
+
+ in-ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@9 {
+ reg = <9>;
+ tpda_9_in_tpdm_mm: endpoint {
+ remote-endpoint = <&tpdm_mm_out_tpda9>;
+ };
+ };
+
+ port@17 {
+ reg = <23>;
+ tpda_23_in_tpdm_prng: endpoint {
+ remote-endpoint = <&tpdm_prng_out_tpda_23>;
+ };
+ };
+ };
+ };
+
+ funnel@6005000 {
+ compatible = "arm,primecell";
+
+ reg = <0 0x06005000 0 0x1000>;
+ reg-names = "funnel-base";
+
+ clocks = <&aoss_qmp>;
+ clock-names = "apb_pclk";
+
+ out-ports {
+ port {
+ funnel_qatb_out_funnel_in0: endpoint {
+ remote-endpoint = <&funnel_in0_in_funnel_qatb>;
+ };
+ };
+ };
+
+ in-ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+ funnel_qatb_in_tpda: endpoint {
+ remote-endpoint = <&tpda_out_funnel_qatb>;
+ };
+ };
+ };
+ };
+
funnel@6041000 {
compatible = "arm,coresight-dynamic-funnel", "arm,primecell";
reg = <0 0x06041000 0 0x1000>;
@@ -2749,6 +2819,13 @@
#address-cells = <1>;
#size-cells = <0>;
+ port@6 {
+ reg = <6>;
+ funnel_in0_in_funnel_qatb: endpoint {
+ remote-endpoint = <&funnel_qatb_out_funnel_in0>;
+ };
+ };
+
port@7 {
reg = <7>;
funnel0_in7: endpoint {
@@ -2867,6 +2944,23 @@
};
};
+ tpdm@684c000 {
+ compatible = "arm,primecell";
+ reg = <0 0x0684c000 0 0x1000>;
+ reg-names = "tpdm-base";
+
+ clocks = <&aoss_qmp>;
+ clock-names = "apb_pclk";
+
+ out-ports {
+ port {
+ tpdm_prng_out_tpda_23: endpoint {
+ remote-endpoint = <&tpda_23_in_tpdm_prng>;
+ };
+ };
+ };
+ };
+
funnel@6b04000 {
compatible = "arm,coresight-dynamic-funnel", "arm,primecell";
arm,primecell-periphid = <0x000bb908>;
@@ -2951,6 +3045,85 @@
};
};
+ tpdm@6c08000 {
+ compatible = "arm,primecell";
+ reg = <0 0x06c08000 0 0x1000>;
+ reg-names = "tpdm-base";
+
+ clocks = <&aoss_qmp>;
+ clock-names = "apb_pclk";
+
+ out-ports {
+ port {
+ tpdm_mm_out_funnel_dl_mm: endpoint {
+ remote-endpoint = <&funnel_dl_mm_in_tpdm_mm>;
+ };
+ };
+ };
+ };
+
+ funnel@6c0b000 {
+ compatible = "arm,coresight-dynamic-funnel", "arm,primecell";
+
+ reg = <0 0x06c0b000 0 0x1000>;
+ reg-names = "funnel-base";
+
+ clocks = <&aoss_qmp>;
+ clock-names = "apb_pclk";
+
+ out-ports {
+ port {
+ funnel_dl_mm_out_funnel_dl_center: endpoint {
+ remote-endpoint = <&funnel_dl_center_in_funnel_dl_mm>;
+ };
+ };
+ };
+
+ in-ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@3 {
+ reg = <3>;
+ funnel_dl_mm_in_tpdm_mm: endpoint {
+ remote-endpoint = <&tpdm_mm_out_funnel_dl_mm>;
+ };
+ };
+ };
+ };
+
+ funnel@6c2d000 {
+ compatible = "arm,coresight-dynamic-funnel", "arm,primecell";
+
+ reg = <0 0x06c2d000 0 0x1000>;
+ reg-names = "funnel-base";
+
+ clocks = <&aoss_qmp>;
+ clock-names = "apb_pclk";
+
+ out-ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ port {
+ tpdm_mm_out_tpda9: endpoint {
+ remote-endpoint = <&tpda_9_in_tpdm_mm>;
+ };
+ };
+ };
+
+ in-ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@2 {
+ reg = <2>;
+ funnel_dl_center_in_funnel_dl_mm: endpoint {
+ remote-endpoint = <&funnel_dl_mm_out_funnel_dl_center>;
+ };
+ };
+ };
+ };
+
etm@7040000 {
compatible = "arm,coresight-etm4x", "arm,primecell";
reg = <0 0x07040000 0 0x1000>;
--
2.17.1
^ permalink raw reply related [flat|nested] 32+ messages in thread
* [PATCH v12 9/9] arm64: dts: qcom: sm8250: Add tpdm mm/prng
@ 2022-07-10 2:10 ` Mao Jinlong
0 siblings, 0 replies; 32+ messages in thread
From: Mao Jinlong @ 2022-07-10 2:10 UTC (permalink / raw)
To: Mathieu Poirier, Suzuki K Poulose, Alexander Shishkin,
Konrad Dybcio, Mike Leach, Andy Gross, Bjorn Andersson,
Rob Herring, Krzysztof Kozlowski
Cc: Mao Jinlong, Leo Yan, Greg Kroah-Hartman, coresight,
linux-arm-kernel, linux-kernel, devicetree, Tingwei Zhang,
Yuanfang Zhang, Tao Zhang, Trilok Soni, Hao Zhang, linux-arm-msm
Add tpdm mm and tpdm prng for sm8250.
+---------------+ +-------------+
| tpdm@6c08000 | |tpdm@684C000 |
+-------|-------+ +------|------+
| |
+-------|-------+ |
| funnel@6c0b000| |
+-------|-------+ |
| |
+-------|-------+ |
|funnel@6c2d000 | |
+-------|-------+ |
| |
| +---------------+ |
+----- tpda@6004000 -----------+
+-------|-------+
|
+-------|-------+
|funnel@6005000 |
+---------------+
Signed-off-by: Mao Jinlong <quic_jinlmao@quicinc.com>
---
arch/arm64/boot/dts/qcom/sm8250.dtsi | 173 +++++++++++++++++++++++++++
1 file changed, 173 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sm8250.dtsi b/arch/arm64/boot/dts/qcom/sm8250.dtsi
index d6bcbf7667b6..9c1aed51ce81 100644
--- a/arch/arm64/boot/dts/qcom/sm8250.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8250.dtsi
@@ -2730,6 +2730,76 @@
};
};
+ tpda@6004000 {
+ compatible = "arm,primecell";
+ reg = <0 0x06004000 0 0x1000>;
+ reg-names = "tpda-base";
+
+ clocks = <&aoss_qmp>;
+ clock-names = "apb_pclk";
+
+ out-ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+ tpda_out_funnel_qatb: endpoint {
+ remote-endpoint = <&funnel_qatb_in_tpda>;
+ };
+ };
+ };
+
+ in-ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@9 {
+ reg = <9>;
+ tpda_9_in_tpdm_mm: endpoint {
+ remote-endpoint = <&tpdm_mm_out_tpda9>;
+ };
+ };
+
+ port@17 {
+ reg = <23>;
+ tpda_23_in_tpdm_prng: endpoint {
+ remote-endpoint = <&tpdm_prng_out_tpda_23>;
+ };
+ };
+ };
+ };
+
+ funnel@6005000 {
+ compatible = "arm,primecell";
+
+ reg = <0 0x06005000 0 0x1000>;
+ reg-names = "funnel-base";
+
+ clocks = <&aoss_qmp>;
+ clock-names = "apb_pclk";
+
+ out-ports {
+ port {
+ funnel_qatb_out_funnel_in0: endpoint {
+ remote-endpoint = <&funnel_in0_in_funnel_qatb>;
+ };
+ };
+ };
+
+ in-ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+ funnel_qatb_in_tpda: endpoint {
+ remote-endpoint = <&tpda_out_funnel_qatb>;
+ };
+ };
+ };
+ };
+
funnel@6041000 {
compatible = "arm,coresight-dynamic-funnel", "arm,primecell";
reg = <0 0x06041000 0 0x1000>;
@@ -2749,6 +2819,13 @@
#address-cells = <1>;
#size-cells = <0>;
+ port@6 {
+ reg = <6>;
+ funnel_in0_in_funnel_qatb: endpoint {
+ remote-endpoint = <&funnel_qatb_out_funnel_in0>;
+ };
+ };
+
port@7 {
reg = <7>;
funnel0_in7: endpoint {
@@ -2867,6 +2944,23 @@
};
};
+ tpdm@684c000 {
+ compatible = "arm,primecell";
+ reg = <0 0x0684c000 0 0x1000>;
+ reg-names = "tpdm-base";
+
+ clocks = <&aoss_qmp>;
+ clock-names = "apb_pclk";
+
+ out-ports {
+ port {
+ tpdm_prng_out_tpda_23: endpoint {
+ remote-endpoint = <&tpda_23_in_tpdm_prng>;
+ };
+ };
+ };
+ };
+
funnel@6b04000 {
compatible = "arm,coresight-dynamic-funnel", "arm,primecell";
arm,primecell-periphid = <0x000bb908>;
@@ -2951,6 +3045,85 @@
};
};
+ tpdm@6c08000 {
+ compatible = "arm,primecell";
+ reg = <0 0x06c08000 0 0x1000>;
+ reg-names = "tpdm-base";
+
+ clocks = <&aoss_qmp>;
+ clock-names = "apb_pclk";
+
+ out-ports {
+ port {
+ tpdm_mm_out_funnel_dl_mm: endpoint {
+ remote-endpoint = <&funnel_dl_mm_in_tpdm_mm>;
+ };
+ };
+ };
+ };
+
+ funnel@6c0b000 {
+ compatible = "arm,coresight-dynamic-funnel", "arm,primecell";
+
+ reg = <0 0x06c0b000 0 0x1000>;
+ reg-names = "funnel-base";
+
+ clocks = <&aoss_qmp>;
+ clock-names = "apb_pclk";
+
+ out-ports {
+ port {
+ funnel_dl_mm_out_funnel_dl_center: endpoint {
+ remote-endpoint = <&funnel_dl_center_in_funnel_dl_mm>;
+ };
+ };
+ };
+
+ in-ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@3 {
+ reg = <3>;
+ funnel_dl_mm_in_tpdm_mm: endpoint {
+ remote-endpoint = <&tpdm_mm_out_funnel_dl_mm>;
+ };
+ };
+ };
+ };
+
+ funnel@6c2d000 {
+ compatible = "arm,coresight-dynamic-funnel", "arm,primecell";
+
+ reg = <0 0x06c2d000 0 0x1000>;
+ reg-names = "funnel-base";
+
+ clocks = <&aoss_qmp>;
+ clock-names = "apb_pclk";
+
+ out-ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ port {
+ tpdm_mm_out_tpda9: endpoint {
+ remote-endpoint = <&tpda_9_in_tpdm_mm>;
+ };
+ };
+ };
+
+ in-ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@2 {
+ reg = <2>;
+ funnel_dl_center_in_funnel_dl_mm: endpoint {
+ remote-endpoint = <&funnel_dl_mm_out_funnel_dl_center>;
+ };
+ };
+ };
+ };
+
etm@7040000 {
compatible = "arm,coresight-etm4x", "arm,primecell";
reg = <0 0x07040000 0 0x1000>;
--
2.17.1
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 32+ messages in thread
* Re: [PATCH v12 0/9] Coresight: Add support for TPDM and TPDA
2022-07-10 2:10 ` Mao Jinlong
@ 2022-07-21 15:30 ` Jinlong Mao
-1 siblings, 0 replies; 32+ messages in thread
From: Jinlong Mao @ 2022-07-21 15:30 UTC (permalink / raw)
To: Mathieu Poirier, Suzuki K Poulose, Alexander Shishkin,
Konrad Dybcio, Mike Leach, Andy Gross, Bjorn Andersson,
Rob Herring, Krzysztof Kozlowski
Cc: Leo Yan, Greg Kroah-Hartman, coresight, linux-arm-kernel,
linux-kernel, devicetree, Tingwei Zhang, Yuanfang Zhang,
Tao Zhang, Trilok Soni, Hao Zhang, linux-arm-msm
Hi all,
Please help to review V12 patches.
Thanks
Jinlong Mao
On 7/10/2022 10:10 AM, Mao Jinlong wrote:
> This series adds support for the trace performance monitoring and
> diagnostics hardware (TPDM and TPDA). It is composed of two major
> elements.
> a) Changes for original coresight framework to support for TPDM and TPDA.
> b) Add driver code for TPDM and TPDA.
>
> Introduction of changes for original coresight framework
> Support TPDM as new coresight source.
> Since only STM and ETM are supported as coresight source originally.
> TPDM is a newly added coresight source. We need to change
> the original way of saving coresight path to support more types source
> for coresight driver.
> The following patch is to add support more coresight sources.
> coresight: core: Use IDR for non-cpu bound sources' paths.
>
> Introduction of TPDM and TPDA
> TPDM - The trace performance monitoring and diagnostics monitor or TPDM in
> short serves as data collection component for various dataset types
> specified in the QPMDA(Qualcomm performance monitoring and diagnostics
> architecture) spec. The primary use case of the TPDM is to collect data
> from different data sources and send it to a TPDA for packetization,
> timestamping and funneling.
> Coresight: Add coresight TPDM source driver
> dt-bindings: arm: Adds CoreSight TPDM hardware definitions
> coresight-tpdm: Add DSB dataset support
> coresight-tpdm: Add integration test support
> docs: sysfs: coresight: Add sysfs ABI documentation for TPDM
>
> TPDA - The trace performance monitoring and diagnostics aggregator or
> TPDA in short serves as an arbitration and packetization engine for the
> performance monitoring and diagnostics network as specified in the QPMDA
> (Qualcomm performance monitoring and diagnostics architecture)
> specification. The primary use case of the TPDA is to provide
> packetization, funneling and timestamping of Monitor data as specified
> in the QPMDA specification.
> The following patch is to add driver for TPDA.
> Coresight: Add TPDA link driver
> dt-bindings: arm: Adds CoreSight TPDA hardware definitions
>
> The last patch of this series is a device tree modification, which add
> the TPDM and TPDA configuration to device tree for validating.
> ARM: dts: msm: Add coresight components for SM8250
> ARM: dts: msm: Add tpdm mm/prng for sm8250
>
> Once this series patches are applied properly, the tpdm and tpda nodes
> should be observed at the coresight path /sys/bus/coresight/devices
> e.g.
> /sys/bus/coresight/devices # ls -l | grep tpd
> tpda0 -> ../../../devices/platform/soc@0/6004000.tpda/tpda0
> tpdm0 -> ../../../devices/platform/soc@0/6c08000.mm.tpdm/tpdm0
>
> We can use the commands are similar to the below to validate TPDMs.
> Enable coresight sink first.
>
> echo 1 > /sys/bus/coresight/devices/tmc_etf0/enable_sink
> echo 1 > /sys/bus/coresight/devices/tpdm0/enable_source
> echo 1 > /sys/bus/coresight/devices/tpdm0/integration_test
> echo 2 > /sys/bus/coresight/devices/tpdm0/integration_test
> The test data will be collected in the coresight sink which is enabled.
> If rwp register of the sink is keeping updating when do
> integration_test (by cat tmc_etf0/mgmt/rwp), it means there is data
> generated from TPDM to sink.
>
> There must be a tpda between tpdm and the sink. When there are some
> other trace event hw components in the same HW block with tpdm, tpdm
> and these hw components will connect to the coresight funnel. When
> there is only tpdm trace hw in the HW block, tpdm will connect to
> tpda directly.
>
> +---------------+ +-------------+
> | tpdm@6c08000 | |tpdm@684C000 |
> +-------|-------+ +------|------+
> | |
> +-------|-------+ |
> | funnel@6c0b000| |
> +-------|-------+ |
> | |
> +-------|-------+ |
> |funnel@6c2d000 | |
> +-------|-------+ |
> | |
> | +---------------+ |
> +----- tpda@6004000 -----------+
> +-------|-------+
> |
> +-------|-------+
> |funnel@6005000 |
> +---------------+
>
> This patch series depends on patch series:
> "[v2,00/13] coresight: Add new API to allocate trace source ID values"
> https://patchwork.kernel.org/project/linux-arm-kernel/cover/20220704081149.16797-1-mike.leach@linaro.org/
>
> Changes from V11:
> 1. Clear bits for atid before setting them and relese atid when tpda
> remove. -- Suzuki K Poulose <suzuki.poulose@arm.com>
>
> Mao Jinlong (9):
> coresight: core: Use IDR for non-cpu bound sources' paths.
> Coresight: Add coresight TPDM source driver
> dt-bindings: arm: Adds CoreSight TPDM hardware definitions
> coresight-tpdm: Add DSB dataset support
> coresight-tpdm: Add integration test support
> Coresight: Add TPDA link driver
> dt-bindings: arm: Adds CoreSight TPDA hardware definitions
> arm64: dts: qcom: sm8250: Add coresight components
> arm64: dts: qcom: sm8250: Add tpdm mm/prng
>
> .../testing/sysfs-bus-coresight-devices-tpdm | 13 +
> .../bindings/arm/qcom,coresight-tpda.yaml | 111 +++
> .../bindings/arm/qcom,coresight-tpdm.yaml | 93 +++
> MAINTAINERS | 2 +
> arch/arm64/boot/dts/qcom/sm8250.dtsi | 671 ++++++++++++++++++
> drivers/hwtracing/coresight/Kconfig | 23 +
> drivers/hwtracing/coresight/Makefile | 2 +
> drivers/hwtracing/coresight/coresight-core.c | 42 +-
> drivers/hwtracing/coresight/coresight-tpda.c | 208 ++++++
> drivers/hwtracing/coresight/coresight-tpda.h | 35 +
> drivers/hwtracing/coresight/coresight-tpdm.c | 259 +++++++
> drivers/hwtracing/coresight/coresight-tpdm.h | 62 ++
> include/linux/coresight.h | 1 +
> 13 files changed, 1510 insertions(+), 12 deletions(-)
> create mode 100644 Documentation/ABI/testing/sysfs-bus-coresight-devices-tpdm
> create mode 100644 Documentation/devicetree/bindings/arm/qcom,coresight-tpda.yaml
> create mode 100644 Documentation/devicetree/bindings/arm/qcom,coresight-tpdm.yaml
> create mode 100644 drivers/hwtracing/coresight/coresight-tpda.c
> create mode 100644 drivers/hwtracing/coresight/coresight-tpda.h
> create mode 100644 drivers/hwtracing/coresight/coresight-tpdm.c
> create mode 100644 drivers/hwtracing/coresight/coresight-tpdm.h
>
^ permalink raw reply [flat|nested] 32+ messages in thread
* Re: [PATCH v12 0/9] Coresight: Add support for TPDM and TPDA
@ 2022-07-21 15:30 ` Jinlong Mao
0 siblings, 0 replies; 32+ messages in thread
From: Jinlong Mao @ 2022-07-21 15:30 UTC (permalink / raw)
To: Mathieu Poirier, Suzuki K Poulose, Alexander Shishkin,
Konrad Dybcio, Mike Leach, Andy Gross, Bjorn Andersson,
Rob Herring, Krzysztof Kozlowski
Cc: Leo Yan, Greg Kroah-Hartman, coresight, linux-arm-kernel,
linux-kernel, devicetree, Tingwei Zhang, Yuanfang Zhang,
Tao Zhang, Trilok Soni, Hao Zhang, linux-arm-msm
Hi all,
Please help to review V12 patches.
Thanks
Jinlong Mao
On 7/10/2022 10:10 AM, Mao Jinlong wrote:
> This series adds support for the trace performance monitoring and
> diagnostics hardware (TPDM and TPDA). It is composed of two major
> elements.
> a) Changes for original coresight framework to support for TPDM and TPDA.
> b) Add driver code for TPDM and TPDA.
>
> Introduction of changes for original coresight framework
> Support TPDM as new coresight source.
> Since only STM and ETM are supported as coresight source originally.
> TPDM is a newly added coresight source. We need to change
> the original way of saving coresight path to support more types source
> for coresight driver.
> The following patch is to add support more coresight sources.
> coresight: core: Use IDR for non-cpu bound sources' paths.
>
> Introduction of TPDM and TPDA
> TPDM - The trace performance monitoring and diagnostics monitor or TPDM in
> short serves as data collection component for various dataset types
> specified in the QPMDA(Qualcomm performance monitoring and diagnostics
> architecture) spec. The primary use case of the TPDM is to collect data
> from different data sources and send it to a TPDA for packetization,
> timestamping and funneling.
> Coresight: Add coresight TPDM source driver
> dt-bindings: arm: Adds CoreSight TPDM hardware definitions
> coresight-tpdm: Add DSB dataset support
> coresight-tpdm: Add integration test support
> docs: sysfs: coresight: Add sysfs ABI documentation for TPDM
>
> TPDA - The trace performance monitoring and diagnostics aggregator or
> TPDA in short serves as an arbitration and packetization engine for the
> performance monitoring and diagnostics network as specified in the QPMDA
> (Qualcomm performance monitoring and diagnostics architecture)
> specification. The primary use case of the TPDA is to provide
> packetization, funneling and timestamping of Monitor data as specified
> in the QPMDA specification.
> The following patch is to add driver for TPDA.
> Coresight: Add TPDA link driver
> dt-bindings: arm: Adds CoreSight TPDA hardware definitions
>
> The last patch of this series is a device tree modification, which add
> the TPDM and TPDA configuration to device tree for validating.
> ARM: dts: msm: Add coresight components for SM8250
> ARM: dts: msm: Add tpdm mm/prng for sm8250
>
> Once this series patches are applied properly, the tpdm and tpda nodes
> should be observed at the coresight path /sys/bus/coresight/devices
> e.g.
> /sys/bus/coresight/devices # ls -l | grep tpd
> tpda0 -> ../../../devices/platform/soc@0/6004000.tpda/tpda0
> tpdm0 -> ../../../devices/platform/soc@0/6c08000.mm.tpdm/tpdm0
>
> We can use the commands are similar to the below to validate TPDMs.
> Enable coresight sink first.
>
> echo 1 > /sys/bus/coresight/devices/tmc_etf0/enable_sink
> echo 1 > /sys/bus/coresight/devices/tpdm0/enable_source
> echo 1 > /sys/bus/coresight/devices/tpdm0/integration_test
> echo 2 > /sys/bus/coresight/devices/tpdm0/integration_test
> The test data will be collected in the coresight sink which is enabled.
> If rwp register of the sink is keeping updating when do
> integration_test (by cat tmc_etf0/mgmt/rwp), it means there is data
> generated from TPDM to sink.
>
> There must be a tpda between tpdm and the sink. When there are some
> other trace event hw components in the same HW block with tpdm, tpdm
> and these hw components will connect to the coresight funnel. When
> there is only tpdm trace hw in the HW block, tpdm will connect to
> tpda directly.
>
> +---------------+ +-------------+
> | tpdm@6c08000 | |tpdm@684C000 |
> +-------|-------+ +------|------+
> | |
> +-------|-------+ |
> | funnel@6c0b000| |
> +-------|-------+ |
> | |
> +-------|-------+ |
> |funnel@6c2d000 | |
> +-------|-------+ |
> | |
> | +---------------+ |
> +----- tpda@6004000 -----------+
> +-------|-------+
> |
> +-------|-------+
> |funnel@6005000 |
> +---------------+
>
> This patch series depends on patch series:
> "[v2,00/13] coresight: Add new API to allocate trace source ID values"
> https://patchwork.kernel.org/project/linux-arm-kernel/cover/20220704081149.16797-1-mike.leach@linaro.org/
>
> Changes from V11:
> 1. Clear bits for atid before setting them and relese atid when tpda
> remove. -- Suzuki K Poulose <suzuki.poulose@arm.com>
>
> Mao Jinlong (9):
> coresight: core: Use IDR for non-cpu bound sources' paths.
> Coresight: Add coresight TPDM source driver
> dt-bindings: arm: Adds CoreSight TPDM hardware definitions
> coresight-tpdm: Add DSB dataset support
> coresight-tpdm: Add integration test support
> Coresight: Add TPDA link driver
> dt-bindings: arm: Adds CoreSight TPDA hardware definitions
> arm64: dts: qcom: sm8250: Add coresight components
> arm64: dts: qcom: sm8250: Add tpdm mm/prng
>
> .../testing/sysfs-bus-coresight-devices-tpdm | 13 +
> .../bindings/arm/qcom,coresight-tpda.yaml | 111 +++
> .../bindings/arm/qcom,coresight-tpdm.yaml | 93 +++
> MAINTAINERS | 2 +
> arch/arm64/boot/dts/qcom/sm8250.dtsi | 671 ++++++++++++++++++
> drivers/hwtracing/coresight/Kconfig | 23 +
> drivers/hwtracing/coresight/Makefile | 2 +
> drivers/hwtracing/coresight/coresight-core.c | 42 +-
> drivers/hwtracing/coresight/coresight-tpda.c | 208 ++++++
> drivers/hwtracing/coresight/coresight-tpda.h | 35 +
> drivers/hwtracing/coresight/coresight-tpdm.c | 259 +++++++
> drivers/hwtracing/coresight/coresight-tpdm.h | 62 ++
> include/linux/coresight.h | 1 +
> 13 files changed, 1510 insertions(+), 12 deletions(-)
> create mode 100644 Documentation/ABI/testing/sysfs-bus-coresight-devices-tpdm
> create mode 100644 Documentation/devicetree/bindings/arm/qcom,coresight-tpda.yaml
> create mode 100644 Documentation/devicetree/bindings/arm/qcom,coresight-tpdm.yaml
> create mode 100644 drivers/hwtracing/coresight/coresight-tpda.c
> create mode 100644 drivers/hwtracing/coresight/coresight-tpda.h
> create mode 100644 drivers/hwtracing/coresight/coresight-tpdm.c
> create mode 100644 drivers/hwtracing/coresight/coresight-tpdm.h
>
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 32+ messages in thread
* Re: [PATCH v12 0/9] Coresight: Add support for TPDM and TPDA
2022-07-21 15:30 ` Jinlong Mao
@ 2022-08-02 14:43 ` Jinlong Mao
-1 siblings, 0 replies; 32+ messages in thread
From: Jinlong Mao @ 2022-08-02 14:43 UTC (permalink / raw)
To: Mathieu Poirier, Suzuki K Poulose, Alexander Shishkin,
Konrad Dybcio, Mike Leach, Andy Gross, Bjorn Andersson,
Rob Herring, Krzysztof Kozlowski
Cc: Leo Yan, Greg Kroah-Hartman, coresight, linux-arm-kernel,
linux-kernel, devicetree, Tingwei Zhang, Yuanfang Zhang,
Tao Zhang, Trilok Soni, Hao Zhang, linux-arm-msm
Hi Reviewers,
Please help to review V12 series of TPDM/TPDA patches.
Thanks
Jinlong Mao
On 7/21/2022 11:30 PM, Jinlong Mao wrote:
> Hi all,
>
> Please help to review V12 patches.
>
> Thanks
>
> Jinlong Mao
>
> On 7/10/2022 10:10 AM, Mao Jinlong wrote:
>> This series adds support for the trace performance monitoring and
>> diagnostics hardware (TPDM and TPDA). It is composed of two major
>> elements.
>> a) Changes for original coresight framework to support for TPDM and
>> TPDA.
>> b) Add driver code for TPDM and TPDA.
>>
>> Introduction of changes for original coresight framework
>> Support TPDM as new coresight source.
>> Since only STM and ETM are supported as coresight source originally.
>> TPDM is a newly added coresight source. We need to change
>> the original way of saving coresight path to support more types source
>> for coresight driver.
>> The following patch is to add support more coresight sources.
>> coresight: core: Use IDR for non-cpu bound sources' paths.
>>
>> Introduction of TPDM and TPDA
>> TPDM - The trace performance monitoring and diagnostics monitor or
>> TPDM in
>> short serves as data collection component for various dataset types
>> specified in the QPMDA(Qualcomm performance monitoring and diagnostics
>> architecture) spec. The primary use case of the TPDM is to collect data
>> from different data sources and send it to a TPDA for packetization,
>> timestamping and funneling.
>> Coresight: Add coresight TPDM source driver
>> dt-bindings: arm: Adds CoreSight TPDM hardware definitions
>> coresight-tpdm: Add DSB dataset support
>> coresight-tpdm: Add integration test support
>> docs: sysfs: coresight: Add sysfs ABI documentation for TPDM
>>
>> TPDA - The trace performance monitoring and diagnostics aggregator or
>> TPDA in short serves as an arbitration and packetization engine for the
>> performance monitoring and diagnostics network as specified in the QPMDA
>> (Qualcomm performance monitoring and diagnostics architecture)
>> specification. The primary use case of the TPDA is to provide
>> packetization, funneling and timestamping of Monitor data as specified
>> in the QPMDA specification.
>> The following patch is to add driver for TPDA.
>> Coresight: Add TPDA link driver
>> dt-bindings: arm: Adds CoreSight TPDA hardware definitions
>>
>> The last patch of this series is a device tree modification, which add
>> the TPDM and TPDA configuration to device tree for validating.
>> ARM: dts: msm: Add coresight components for SM8250
>> ARM: dts: msm: Add tpdm mm/prng for sm8250
>>
>> Once this series patches are applied properly, the tpdm and tpda nodes
>> should be observed at the coresight path /sys/bus/coresight/devices
>> e.g.
>> /sys/bus/coresight/devices # ls -l | grep tpd
>> tpda0 -> ../../../devices/platform/soc@0/6004000.tpda/tpda0
>> tpdm0 -> ../../../devices/platform/soc@0/6c08000.mm.tpdm/tpdm0
>>
>> We can use the commands are similar to the below to validate TPDMs.
>> Enable coresight sink first.
>>
>> echo 1 > /sys/bus/coresight/devices/tmc_etf0/enable_sink
>> echo 1 > /sys/bus/coresight/devices/tpdm0/enable_source
>> echo 1 > /sys/bus/coresight/devices/tpdm0/integration_test
>> echo 2 > /sys/bus/coresight/devices/tpdm0/integration_test
>> The test data will be collected in the coresight sink which is enabled.
>> If rwp register of the sink is keeping updating when do
>> integration_test (by cat tmc_etf0/mgmt/rwp), it means there is data
>> generated from TPDM to sink.
>>
>> There must be a tpda between tpdm and the sink. When there are some
>> other trace event hw components in the same HW block with tpdm, tpdm
>> and these hw components will connect to the coresight funnel. When
>> there is only tpdm trace hw in the HW block, tpdm will connect to
>> tpda directly.
>> +---------------+ +-------------+
>> | tpdm@6c08000 | |tpdm@684C000 |
>> +-------|-------+ +------|------+
>> | |
>> +-------|-------+ |
>> | funnel@6c0b000| |
>> +-------|-------+ |
>> | |
>> +-------|-------+ |
>> |funnel@6c2d000 | |
>> +-------|-------+ |
>> | |
>> | +---------------+ |
>> +----- tpda@6004000 -----------+
>> +-------|-------+
>> |
>> +-------|-------+
>> |funnel@6005000 |
>> +---------------+
>>
>> This patch series depends on patch series:
>> "[v2,00/13] coresight: Add new API to allocate trace source ID values"
>> https://patchwork.kernel.org/project/linux-arm-kernel/cover/20220704081149.16797-1-mike.leach@linaro.org/
>>
>>
>> Changes from V11:
>> 1. Clear bits for atid before setting them and relese atid when tpda
>> remove. -- Suzuki K Poulose <suzuki.poulose@arm.com>
>>
>> Mao Jinlong (9):
>> coresight: core: Use IDR for non-cpu bound sources' paths.
>> Coresight: Add coresight TPDM source driver
>> dt-bindings: arm: Adds CoreSight TPDM hardware definitions
>> coresight-tpdm: Add DSB dataset support
>> coresight-tpdm: Add integration test support
>> Coresight: Add TPDA link driver
>> dt-bindings: arm: Adds CoreSight TPDA hardware definitions
>> arm64: dts: qcom: sm8250: Add coresight components
>> arm64: dts: qcom: sm8250: Add tpdm mm/prng
>>
>> .../testing/sysfs-bus-coresight-devices-tpdm | 13 +
>> .../bindings/arm/qcom,coresight-tpda.yaml | 111 +++
>> .../bindings/arm/qcom,coresight-tpdm.yaml | 93 +++
>> MAINTAINERS | 2 +
>> arch/arm64/boot/dts/qcom/sm8250.dtsi | 671 ++++++++++++++++++
>> drivers/hwtracing/coresight/Kconfig | 23 +
>> drivers/hwtracing/coresight/Makefile | 2 +
>> drivers/hwtracing/coresight/coresight-core.c | 42 +-
>> drivers/hwtracing/coresight/coresight-tpda.c | 208 ++++++
>> drivers/hwtracing/coresight/coresight-tpda.h | 35 +
>> drivers/hwtracing/coresight/coresight-tpdm.c | 259 +++++++
>> drivers/hwtracing/coresight/coresight-tpdm.h | 62 ++
>> include/linux/coresight.h | 1 +
>> 13 files changed, 1510 insertions(+), 12 deletions(-)
>> create mode 100644
>> Documentation/ABI/testing/sysfs-bus-coresight-devices-tpdm
>> create mode 100644
>> Documentation/devicetree/bindings/arm/qcom,coresight-tpda.yaml
>> create mode 100644
>> Documentation/devicetree/bindings/arm/qcom,coresight-tpdm.yaml
>> create mode 100644 drivers/hwtracing/coresight/coresight-tpda.c
>> create mode 100644 drivers/hwtracing/coresight/coresight-tpda.h
>> create mode 100644 drivers/hwtracing/coresight/coresight-tpdm.c
>> create mode 100644 drivers/hwtracing/coresight/coresight-tpdm.h
>>
^ permalink raw reply [flat|nested] 32+ messages in thread
* Re: [PATCH v12 0/9] Coresight: Add support for TPDM and TPDA
@ 2022-08-02 14:43 ` Jinlong Mao
0 siblings, 0 replies; 32+ messages in thread
From: Jinlong Mao @ 2022-08-02 14:43 UTC (permalink / raw)
To: Mathieu Poirier, Suzuki K Poulose, Alexander Shishkin,
Konrad Dybcio, Mike Leach, Andy Gross, Bjorn Andersson,
Rob Herring, Krzysztof Kozlowski
Cc: Leo Yan, Greg Kroah-Hartman, coresight, linux-arm-kernel,
linux-kernel, devicetree, Tingwei Zhang, Yuanfang Zhang,
Tao Zhang, Trilok Soni, Hao Zhang, linux-arm-msm
Hi Reviewers,
Please help to review V12 series of TPDM/TPDA patches.
Thanks
Jinlong Mao
On 7/21/2022 11:30 PM, Jinlong Mao wrote:
> Hi all,
>
> Please help to review V12 patches.
>
> Thanks
>
> Jinlong Mao
>
> On 7/10/2022 10:10 AM, Mao Jinlong wrote:
>> This series adds support for the trace performance monitoring and
>> diagnostics hardware (TPDM and TPDA). It is composed of two major
>> elements.
>> a) Changes for original coresight framework to support for TPDM and
>> TPDA.
>> b) Add driver code for TPDM and TPDA.
>>
>> Introduction of changes for original coresight framework
>> Support TPDM as new coresight source.
>> Since only STM and ETM are supported as coresight source originally.
>> TPDM is a newly added coresight source. We need to change
>> the original way of saving coresight path to support more types source
>> for coresight driver.
>> The following patch is to add support more coresight sources.
>> coresight: core: Use IDR for non-cpu bound sources' paths.
>>
>> Introduction of TPDM and TPDA
>> TPDM - The trace performance monitoring and diagnostics monitor or
>> TPDM in
>> short serves as data collection component for various dataset types
>> specified in the QPMDA(Qualcomm performance monitoring and diagnostics
>> architecture) spec. The primary use case of the TPDM is to collect data
>> from different data sources and send it to a TPDA for packetization,
>> timestamping and funneling.
>> Coresight: Add coresight TPDM source driver
>> dt-bindings: arm: Adds CoreSight TPDM hardware definitions
>> coresight-tpdm: Add DSB dataset support
>> coresight-tpdm: Add integration test support
>> docs: sysfs: coresight: Add sysfs ABI documentation for TPDM
>>
>> TPDA - The trace performance monitoring and diagnostics aggregator or
>> TPDA in short serves as an arbitration and packetization engine for the
>> performance monitoring and diagnostics network as specified in the QPMDA
>> (Qualcomm performance monitoring and diagnostics architecture)
>> specification. The primary use case of the TPDA is to provide
>> packetization, funneling and timestamping of Monitor data as specified
>> in the QPMDA specification.
>> The following patch is to add driver for TPDA.
>> Coresight: Add TPDA link driver
>> dt-bindings: arm: Adds CoreSight TPDA hardware definitions
>>
>> The last patch of this series is a device tree modification, which add
>> the TPDM and TPDA configuration to device tree for validating.
>> ARM: dts: msm: Add coresight components for SM8250
>> ARM: dts: msm: Add tpdm mm/prng for sm8250
>>
>> Once this series patches are applied properly, the tpdm and tpda nodes
>> should be observed at the coresight path /sys/bus/coresight/devices
>> e.g.
>> /sys/bus/coresight/devices # ls -l | grep tpd
>> tpda0 -> ../../../devices/platform/soc@0/6004000.tpda/tpda0
>> tpdm0 -> ../../../devices/platform/soc@0/6c08000.mm.tpdm/tpdm0
>>
>> We can use the commands are similar to the below to validate TPDMs.
>> Enable coresight sink first.
>>
>> echo 1 > /sys/bus/coresight/devices/tmc_etf0/enable_sink
>> echo 1 > /sys/bus/coresight/devices/tpdm0/enable_source
>> echo 1 > /sys/bus/coresight/devices/tpdm0/integration_test
>> echo 2 > /sys/bus/coresight/devices/tpdm0/integration_test
>> The test data will be collected in the coresight sink which is enabled.
>> If rwp register of the sink is keeping updating when do
>> integration_test (by cat tmc_etf0/mgmt/rwp), it means there is data
>> generated from TPDM to sink.
>>
>> There must be a tpda between tpdm and the sink. When there are some
>> other trace event hw components in the same HW block with tpdm, tpdm
>> and these hw components will connect to the coresight funnel. When
>> there is only tpdm trace hw in the HW block, tpdm will connect to
>> tpda directly.
>> +---------------+ +-------------+
>> | tpdm@6c08000 | |tpdm@684C000 |
>> +-------|-------+ +------|------+
>> | |
>> +-------|-------+ |
>> | funnel@6c0b000| |
>> +-------|-------+ |
>> | |
>> +-------|-------+ |
>> |funnel@6c2d000 | |
>> +-------|-------+ |
>> | |
>> | +---------------+ |
>> +----- tpda@6004000 -----------+
>> +-------|-------+
>> |
>> +-------|-------+
>> |funnel@6005000 |
>> +---------------+
>>
>> This patch series depends on patch series:
>> "[v2,00/13] coresight: Add new API to allocate trace source ID values"
>> https://patchwork.kernel.org/project/linux-arm-kernel/cover/20220704081149.16797-1-mike.leach@linaro.org/
>>
>>
>> Changes from V11:
>> 1. Clear bits for atid before setting them and relese atid when tpda
>> remove. -- Suzuki K Poulose <suzuki.poulose@arm.com>
>>
>> Mao Jinlong (9):
>> coresight: core: Use IDR for non-cpu bound sources' paths.
>> Coresight: Add coresight TPDM source driver
>> dt-bindings: arm: Adds CoreSight TPDM hardware definitions
>> coresight-tpdm: Add DSB dataset support
>> coresight-tpdm: Add integration test support
>> Coresight: Add TPDA link driver
>> dt-bindings: arm: Adds CoreSight TPDA hardware definitions
>> arm64: dts: qcom: sm8250: Add coresight components
>> arm64: dts: qcom: sm8250: Add tpdm mm/prng
>>
>> .../testing/sysfs-bus-coresight-devices-tpdm | 13 +
>> .../bindings/arm/qcom,coresight-tpda.yaml | 111 +++
>> .../bindings/arm/qcom,coresight-tpdm.yaml | 93 +++
>> MAINTAINERS | 2 +
>> arch/arm64/boot/dts/qcom/sm8250.dtsi | 671 ++++++++++++++++++
>> drivers/hwtracing/coresight/Kconfig | 23 +
>> drivers/hwtracing/coresight/Makefile | 2 +
>> drivers/hwtracing/coresight/coresight-core.c | 42 +-
>> drivers/hwtracing/coresight/coresight-tpda.c | 208 ++++++
>> drivers/hwtracing/coresight/coresight-tpda.h | 35 +
>> drivers/hwtracing/coresight/coresight-tpdm.c | 259 +++++++
>> drivers/hwtracing/coresight/coresight-tpdm.h | 62 ++
>> include/linux/coresight.h | 1 +
>> 13 files changed, 1510 insertions(+), 12 deletions(-)
>> create mode 100644
>> Documentation/ABI/testing/sysfs-bus-coresight-devices-tpdm
>> create mode 100644
>> Documentation/devicetree/bindings/arm/qcom,coresight-tpda.yaml
>> create mode 100644
>> Documentation/devicetree/bindings/arm/qcom,coresight-tpdm.yaml
>> create mode 100644 drivers/hwtracing/coresight/coresight-tpda.c
>> create mode 100644 drivers/hwtracing/coresight/coresight-tpda.h
>> create mode 100644 drivers/hwtracing/coresight/coresight-tpdm.c
>> create mode 100644 drivers/hwtracing/coresight/coresight-tpdm.h
>>
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 32+ messages in thread
* Re: [PATCH v12 0/9] Coresight: Add support for TPDM and TPDA
2022-08-02 14:43 ` Jinlong Mao
@ 2022-08-02 17:33 ` Trilok Soni
-1 siblings, 0 replies; 32+ messages in thread
From: Trilok Soni @ 2022-08-02 17:33 UTC (permalink / raw)
To: Jinlong Mao, Mathieu Poirier, Suzuki K Poulose,
Alexander Shishkin, Konrad Dybcio, Mike Leach, Andy Gross,
Bjorn Andersson, Rob Herring, Krzysztof Kozlowski
Cc: Leo Yan, Greg Kroah-Hartman, coresight, linux-arm-kernel,
linux-kernel, devicetree, Tingwei Zhang, Yuanfang Zhang,
Tao Zhang, Hao Zhang, linux-arm-msm
On 8/2/2022 7:43 AM, Jinlong Mao wrote:
> Hi Reviewers,
>
> Please help to review V12 series of TPDM/TPDA patches.
>
> Thanks
>
Suzuki and Mathieu, we are almost there it seems in getting the
acceptance of these patches, so I hope you find the time to review these
patches. I guess it is almost a year now for these patches and had a
good amount of reviews and revisions :)
---Trilok Soni
^ permalink raw reply [flat|nested] 32+ messages in thread
* Re: [PATCH v12 0/9] Coresight: Add support for TPDM and TPDA
@ 2022-08-02 17:33 ` Trilok Soni
0 siblings, 0 replies; 32+ messages in thread
From: Trilok Soni @ 2022-08-02 17:33 UTC (permalink / raw)
To: Jinlong Mao, Mathieu Poirier, Suzuki K Poulose,
Alexander Shishkin, Konrad Dybcio, Mike Leach, Andy Gross,
Bjorn Andersson, Rob Herring, Krzysztof Kozlowski
Cc: Leo Yan, Greg Kroah-Hartman, coresight, linux-arm-kernel,
linux-kernel, devicetree, Tingwei Zhang, Yuanfang Zhang,
Tao Zhang, Hao Zhang, linux-arm-msm
On 8/2/2022 7:43 AM, Jinlong Mao wrote:
> Hi Reviewers,
>
> Please help to review V12 series of TPDM/TPDA patches.
>
> Thanks
>
Suzuki and Mathieu, we are almost there it seems in getting the
acceptance of these patches, so I hope you find the time to review these
patches. I guess it is almost a year now for these patches and had a
good amount of reviews and revisions :)
---Trilok Soni
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 32+ messages in thread
* Re: [PATCH v12 0/9] Coresight: Add support for TPDM and TPDA
2022-08-02 17:33 ` Trilok Soni
@ 2022-08-02 17:43 ` Suzuki K Poulose
-1 siblings, 0 replies; 32+ messages in thread
From: Suzuki K Poulose @ 2022-08-02 17:43 UTC (permalink / raw)
To: Trilok Soni, Jinlong Mao, Mathieu Poirier, Alexander Shishkin,
Konrad Dybcio, Mike Leach, Andy Gross, Bjorn Andersson,
Rob Herring, Krzysztof Kozlowski
Cc: Leo Yan, Greg Kroah-Hartman, coresight, linux-arm-kernel,
linux-kernel, devicetree, Tingwei Zhang, Yuanfang Zhang,
Tao Zhang, Hao Zhang, linux-arm-msm
Hi Trilok,
On 02/08/2022 18:33, Trilok Soni wrote:
>
>
> On 8/2/2022 7:43 AM, Jinlong Mao wrote:
>> Hi Reviewers,
>>
>> Please help to review V12 series of TPDM/TPDA patches.
>>
>> Thanks
>>
>
> Suzuki and Mathieu, we are almost there it seems in getting the
> acceptance of these patches, so I hope you find the time to review these
> patches. I guess it is almost a year now for these patches and had a
> good amount of reviews and revisions :)
This series has been reviewed for the previous versions (which is why
we have it in v12) and this one depends on a series worked on by Mike
Leach. We cannot push this without the dynamic Trace ID allocation
scheme, which is clearly mentioned in the cover letter for this
series.
As such this series is in a good shape, assuming all the comments
in the previous version has been addressed. So, we would rather
get Mike's work priority and pull that in, so that we can eventually
get this upstream.
Kind regards
Suzuki
>
> ---Trilok Soni
^ permalink raw reply [flat|nested] 32+ messages in thread
* Re: [PATCH v12 0/9] Coresight: Add support for TPDM and TPDA
@ 2022-08-02 17:43 ` Suzuki K Poulose
0 siblings, 0 replies; 32+ messages in thread
From: Suzuki K Poulose @ 2022-08-02 17:43 UTC (permalink / raw)
To: Trilok Soni, Jinlong Mao, Mathieu Poirier, Alexander Shishkin,
Konrad Dybcio, Mike Leach, Andy Gross, Bjorn Andersson,
Rob Herring, Krzysztof Kozlowski
Cc: Leo Yan, Greg Kroah-Hartman, coresight, linux-arm-kernel,
linux-kernel, devicetree, Tingwei Zhang, Yuanfang Zhang,
Tao Zhang, Hao Zhang, linux-arm-msm
Hi Trilok,
On 02/08/2022 18:33, Trilok Soni wrote:
>
>
> On 8/2/2022 7:43 AM, Jinlong Mao wrote:
>> Hi Reviewers,
>>
>> Please help to review V12 series of TPDM/TPDA patches.
>>
>> Thanks
>>
>
> Suzuki and Mathieu, we are almost there it seems in getting the
> acceptance of these patches, so I hope you find the time to review these
> patches. I guess it is almost a year now for these patches and had a
> good amount of reviews and revisions :)
This series has been reviewed for the previous versions (which is why
we have it in v12) and this one depends on a series worked on by Mike
Leach. We cannot push this without the dynamic Trace ID allocation
scheme, which is clearly mentioned in the cover letter for this
series.
As such this series is in a good shape, assuming all the comments
in the previous version has been addressed. So, we would rather
get Mike's work priority and pull that in, so that we can eventually
get this upstream.
Kind regards
Suzuki
>
> ---Trilok Soni
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 32+ messages in thread
* Re: [PATCH v12 0/9] Coresight: Add support for TPDM and TPDA
2022-08-02 17:43 ` Suzuki K Poulose
@ 2022-08-02 18:09 ` Trilok Soni
-1 siblings, 0 replies; 32+ messages in thread
From: Trilok Soni @ 2022-08-02 18:09 UTC (permalink / raw)
To: Suzuki K Poulose, Jinlong Mao, Mathieu Poirier,
Alexander Shishkin, Konrad Dybcio, Mike Leach, Andy Gross,
Bjorn Andersson, Rob Herring, Krzysztof Kozlowski
Cc: Leo Yan, Greg Kroah-Hartman, coresight, linux-arm-kernel,
linux-kernel, devicetree, Tingwei Zhang, Yuanfang Zhang,
Tao Zhang, Hao Zhang, linux-arm-msm
Hi Suzuki,
On 8/2/2022 10:43 AM, Suzuki K Poulose wrote:
> Hi Trilok,
>
> On 02/08/2022 18:33, Trilok Soni wrote:
>>
>>
>> On 8/2/2022 7:43 AM, Jinlong Mao wrote:
>>> Hi Reviewers,
>>>
>>> Please help to review V12 series of TPDM/TPDA patches.
>>>
>>> Thanks
>>>
>>
>> Suzuki and Mathieu, we are almost there it seems in getting the
>> acceptance of these patches, so I hope you find the time to review
>> these patches. I guess it is almost a year now for these patches and
>> had a good amount of reviews and revisions :)
>
> This series has been reviewed for the previous versions (which is why
> we have it in v12) and this one depends on a series worked on by Mike
> Leach. We cannot push this without the dynamic Trace ID allocation
> scheme, which is clearly mentioned in the cover letter for this
> series.
>
> As such this series is in a good shape, assuming all the comments
> in the previous version has been addressed. So, we would rather
> get Mike's work priority and pull that in, so that we can eventually
> get this upstream.
>
>
I believe we have addressed all the comments in v12. Are you ok, if we
post additional features series (around ~2k to ~3k SLOC)? I just want to
make sure we are not creating flood of patches w/ features.
---Trilok Soni
^ permalink raw reply [flat|nested] 32+ messages in thread
* Re: [PATCH v12 0/9] Coresight: Add support for TPDM and TPDA
@ 2022-08-02 18:09 ` Trilok Soni
0 siblings, 0 replies; 32+ messages in thread
From: Trilok Soni @ 2022-08-02 18:09 UTC (permalink / raw)
To: Suzuki K Poulose, Jinlong Mao, Mathieu Poirier,
Alexander Shishkin, Konrad Dybcio, Mike Leach, Andy Gross,
Bjorn Andersson, Rob Herring, Krzysztof Kozlowski
Cc: Leo Yan, Greg Kroah-Hartman, coresight, linux-arm-kernel,
linux-kernel, devicetree, Tingwei Zhang, Yuanfang Zhang,
Tao Zhang, Hao Zhang, linux-arm-msm
Hi Suzuki,
On 8/2/2022 10:43 AM, Suzuki K Poulose wrote:
> Hi Trilok,
>
> On 02/08/2022 18:33, Trilok Soni wrote:
>>
>>
>> On 8/2/2022 7:43 AM, Jinlong Mao wrote:
>>> Hi Reviewers,
>>>
>>> Please help to review V12 series of TPDM/TPDA patches.
>>>
>>> Thanks
>>>
>>
>> Suzuki and Mathieu, we are almost there it seems in getting the
>> acceptance of these patches, so I hope you find the time to review
>> these patches. I guess it is almost a year now for these patches and
>> had a good amount of reviews and revisions :)
>
> This series has been reviewed for the previous versions (which is why
> we have it in v12) and this one depends on a series worked on by Mike
> Leach. We cannot push this without the dynamic Trace ID allocation
> scheme, which is clearly mentioned in the cover letter for this
> series.
>
> As such this series is in a good shape, assuming all the comments
> in the previous version has been addressed. So, we would rather
> get Mike's work priority and pull that in, so that we can eventually
> get this upstream.
>
>
I believe we have addressed all the comments in v12. Are you ok, if we
post additional features series (around ~2k to ~3k SLOC)? I just want to
make sure we are not creating flood of patches w/ features.
---Trilok Soni
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 32+ messages in thread
* Re: [PATCH v12 0/9] Coresight: Add support for TPDM and TPDA
2022-08-02 18:09 ` Trilok Soni
@ 2022-08-03 9:05 ` Suzuki K Poulose
-1 siblings, 0 replies; 32+ messages in thread
From: Suzuki K Poulose @ 2022-08-03 9:05 UTC (permalink / raw)
To: Trilok Soni, Jinlong Mao, Mathieu Poirier, Alexander Shishkin,
Konrad Dybcio, Mike Leach, Andy Gross, Bjorn Andersson,
Rob Herring, Krzysztof Kozlowski
Cc: Leo Yan, Greg Kroah-Hartman, coresight, linux-arm-kernel,
linux-kernel, devicetree, Tingwei Zhang, Yuanfang Zhang,
Tao Zhang, Hao Zhang, linux-arm-msm
On 02/08/2022 19:09, Trilok Soni wrote:
> Hi Suzuki,
>
> On 8/2/2022 10:43 AM, Suzuki K Poulose wrote:
>> Hi Trilok,
>>
>> On 02/08/2022 18:33, Trilok Soni wrote:
>>>
>>>
>>> On 8/2/2022 7:43 AM, Jinlong Mao wrote:
>>>> Hi Reviewers,
>>>>
>>>> Please help to review V12 series of TPDM/TPDA patches.
>>>>
>>>> Thanks
>>>>
>>>
>>> Suzuki and Mathieu, we are almost there it seems in getting the
>>> acceptance of these patches, so I hope you find the time to review
>>> these patches. I guess it is almost a year now for these patches and
>>> had a good amount of reviews and revisions :)
>>
>> This series has been reviewed for the previous versions (which is why
>> we have it in v12) and this one depends on a series worked on by Mike
>> Leach. We cannot push this without the dynamic Trace ID allocation
>> scheme, which is clearly mentioned in the cover letter for this
>> series.
>>
>> As such this series is in a good shape, assuming all the comments
>> in the previous version has been addressed. So, we would rather
>> get Mike's work priority and pull that in, so that we can eventually
>> get this upstream.
>>
>>
>
> I believe we have addressed all the comments in v12. Are you ok, if we
> post additional features series (around ~2k to ~3k SLOC)? I just want to
> make sure we are not creating flood of patches w/ features.
You are free to post the patches, as long as you clearly mention the
dependencies in the cover letter. Please be mindful about the merge window.
Suzuki
^ permalink raw reply [flat|nested] 32+ messages in thread
* Re: [PATCH v12 0/9] Coresight: Add support for TPDM and TPDA
@ 2022-08-03 9:05 ` Suzuki K Poulose
0 siblings, 0 replies; 32+ messages in thread
From: Suzuki K Poulose @ 2022-08-03 9:05 UTC (permalink / raw)
To: Trilok Soni, Jinlong Mao, Mathieu Poirier, Alexander Shishkin,
Konrad Dybcio, Mike Leach, Andy Gross, Bjorn Andersson,
Rob Herring, Krzysztof Kozlowski
Cc: Leo Yan, Greg Kroah-Hartman, coresight, linux-arm-kernel,
linux-kernel, devicetree, Tingwei Zhang, Yuanfang Zhang,
Tao Zhang, Hao Zhang, linux-arm-msm
On 02/08/2022 19:09, Trilok Soni wrote:
> Hi Suzuki,
>
> On 8/2/2022 10:43 AM, Suzuki K Poulose wrote:
>> Hi Trilok,
>>
>> On 02/08/2022 18:33, Trilok Soni wrote:
>>>
>>>
>>> On 8/2/2022 7:43 AM, Jinlong Mao wrote:
>>>> Hi Reviewers,
>>>>
>>>> Please help to review V12 series of TPDM/TPDA patches.
>>>>
>>>> Thanks
>>>>
>>>
>>> Suzuki and Mathieu, we are almost there it seems in getting the
>>> acceptance of these patches, so I hope you find the time to review
>>> these patches. I guess it is almost a year now for these patches and
>>> had a good amount of reviews and revisions :)
>>
>> This series has been reviewed for the previous versions (which is why
>> we have it in v12) and this one depends on a series worked on by Mike
>> Leach. We cannot push this without the dynamic Trace ID allocation
>> scheme, which is clearly mentioned in the cover letter for this
>> series.
>>
>> As such this series is in a good shape, assuming all the comments
>> in the previous version has been addressed. So, we would rather
>> get Mike's work priority and pull that in, so that we can eventually
>> get this upstream.
>>
>>
>
> I believe we have addressed all the comments in v12. Are you ok, if we
> post additional features series (around ~2k to ~3k SLOC)? I just want to
> make sure we are not creating flood of patches w/ features.
You are free to post the patches, as long as you clearly mention the
dependencies in the cover letter. Please be mindful about the merge window.
Suzuki
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 32+ messages in thread
end of thread, other threads:[~2022-08-03 9:06 UTC | newest]
Thread overview: 32+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2022-07-10 2:10 [PATCH v12 0/9] Coresight: Add support for TPDM and TPDA Mao Jinlong
2022-07-10 2:10 ` Mao Jinlong
2022-07-10 2:10 ` [PATCH v12 1/9] coresight: core: Use IDR for non-cpu bound sources' paths Mao Jinlong
2022-07-10 2:10 ` Mao Jinlong
2022-07-10 2:10 ` [PATCH v12 2/9] Coresight: Add coresight TPDM source driver Mao Jinlong
2022-07-10 2:10 ` Mao Jinlong
2022-07-10 2:10 ` [PATCH v12 3/9] dt-bindings: arm: Adds CoreSight TPDM hardware definitions Mao Jinlong
2022-07-10 2:10 ` Mao Jinlong
2022-07-10 2:10 ` [PATCH v12 4/9] coresight-tpdm: Add DSB dataset support Mao Jinlong
2022-07-10 2:10 ` Mao Jinlong
2022-07-10 2:10 ` [PATCH v12 5/9] coresight-tpdm: Add integration test support Mao Jinlong
2022-07-10 2:10 ` Mao Jinlong
2022-07-10 2:10 ` [PATCH v12 6/9] Coresight: Add TPDA link driver Mao Jinlong
2022-07-10 2:10 ` Mao Jinlong
2022-07-10 2:10 ` [PATCH v12 7/9] dt-bindings: arm: Adds CoreSight TPDA hardware definitions Mao Jinlong
2022-07-10 2:10 ` Mao Jinlong
2022-07-10 2:10 ` [PATCH v12 8/9] arm64: dts: qcom: sm8250: Add coresight components Mao Jinlong
2022-07-10 2:10 ` Mao Jinlong
2022-07-10 2:10 ` [PATCH v12 9/9] arm64: dts: qcom: sm8250: Add tpdm mm/prng Mao Jinlong
2022-07-10 2:10 ` Mao Jinlong
2022-07-21 15:30 ` [PATCH v12 0/9] Coresight: Add support for TPDM and TPDA Jinlong Mao
2022-07-21 15:30 ` Jinlong Mao
2022-08-02 14:43 ` Jinlong Mao
2022-08-02 14:43 ` Jinlong Mao
2022-08-02 17:33 ` Trilok Soni
2022-08-02 17:33 ` Trilok Soni
2022-08-02 17:43 ` Suzuki K Poulose
2022-08-02 17:43 ` Suzuki K Poulose
2022-08-02 18:09 ` Trilok Soni
2022-08-02 18:09 ` Trilok Soni
2022-08-03 9:05 ` Suzuki K Poulose
2022-08-03 9:05 ` Suzuki K Poulose
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