From: <Claudiu.Beznea@microchip.com> To: <Kavyasree.Kotagiri@microchip.com>, <krzysztof.kozlowski@linaro.org>, <robh+dt@kernel.org>, <Nicolas.Ferre@microchip.com>, <krzysztof.kozlowski+dt@linaro.org> Cc: <UNGLinuxDriver@microchip.com>, <devicetree@vger.kernel.org>, <linux-arm-kernel@lists.infradead.org>, <linux-kernel@vger.kernel.org> Subject: Re: [PATCH v5 3/3] mfd: atmel-flexcom: Add support for lan966x flexcom chip-select configuration Date: Mon, 27 Jun 2022 10:34:51 +0000 [thread overview] Message-ID: <7110531a-36bd-3904-dc54-4697fd6a7316@microchip.com> (raw) In-Reply-To: <20220620144634.25464-4-kavyasree.kotagiri@microchip.com> On 20.06.2022 17:46, Kavyasree Kotagiri wrote: > LAN966x SoC have 5 flexcoms. Each flexcom has 2 chip-selects > which are optional I/O lines. For each chip select of each > flexcom there is a configuration register FLEXCOM_SHARED[0-4]:SS_MASK[0-1]. > The width of configuration register is 21 because there are > 21 shared pins on each of which the chip select can be mapped. > Each bit of the register represents a different FLEXCOM_SHARED pin. > > Signed-off-by: Kavyasree Kotagiri <kavyasree.kotagiri@microchip.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> > --- > v4 -> v5: > - No changes. > > v3 -> v4: > - Add condition for a flexcom whether to configure chip-select lines > or not, based on "microchip,flx-shrd-pins" property existence because > chip-select lines are optional. > > v2 -> v3: > - used goto label for clk_disable in error cases. > > v1 -> v2: > - use GENMASK for mask, macros for maximum allowed values. > - use u32 values for flexcom chipselects instead of strings. > - disable clock in case of errors. > > drivers/mfd/atmel-flexcom.c | 94 ++++++++++++++++++++++++++++++++++++- > 1 file changed, 93 insertions(+), 1 deletion(-) > > diff --git a/drivers/mfd/atmel-flexcom.c b/drivers/mfd/atmel-flexcom.c > index 33caa4fba6af..430b6783b5a7 100644 > --- a/drivers/mfd/atmel-flexcom.c > +++ b/drivers/mfd/atmel-flexcom.c > @@ -28,15 +28,68 @@ > #define FLEX_MR_OPMODE(opmode) (((opmode) << FLEX_MR_OPMODE_OFFSET) & \ > FLEX_MR_OPMODE_MASK) > > +/* LAN966x flexcom shared register offsets */ > +#define FLEX_SHRD_SS_MASK_0 0x0 > +#define FLEX_SHRD_SS_MASK_1 0x4 > +#define FLEX_SHRD_PIN_MAX 20 > +#define FLEX_CS_MAX 1 > +#define FLEX_SHRD_MASK GENMASK(20, 0) > + > +struct atmel_flex_caps { > + bool has_flx_cs; > +}; > + > struct atmel_flexcom { > void __iomem *base; > + void __iomem *flexcom_shared_base; > u32 opmode; > struct clk *clk; > }; > > +static int atmel_flexcom_lan966x_cs_config(struct platform_device *pdev) > +{ > + struct atmel_flexcom *ddata = dev_get_drvdata(&pdev->dev); > + struct device_node *np = pdev->dev.of_node; > + u32 flx_shrd_pins[2], flx_cs[2], val; > + int err, i, count; > + > + count = of_property_count_u32_elems(np, "microchip,flx-shrd-pins"); > + if (count <= 0 || count > 2) { > + dev_err(&pdev->dev, "Invalid %s property (%d)\n", "flx-shrd-pins", > + count); > + return -EINVAL; > + } > + > + err = of_property_read_u32_array(np, "microchip,flx-shrd-pins", flx_shrd_pins, count); > + if (err) > + return err; > + > + err = of_property_read_u32_array(np, "microchip,flx-cs", flx_cs, count); > + if (err) > + return err; > + > + for (i = 0; i < count; i++) { > + if (flx_shrd_pins[i] > FLEX_SHRD_PIN_MAX) > + return -EINVAL; > + > + if (flx_cs[i] > FLEX_CS_MAX) > + return -EINVAL; > + > + val = ~(1 << flx_shrd_pins[i]) & FLEX_SHRD_MASK; > + > + if (flx_cs[i] == 0) > + writel(val, ddata->flexcom_shared_base + FLEX_SHRD_SS_MASK_0); > + else > + writel(val, ddata->flexcom_shared_base + FLEX_SHRD_SS_MASK_1); > + } > + > + return 0; > +} > + > static int atmel_flexcom_probe(struct platform_device *pdev) > { > struct device_node *np = pdev->dev.of_node; > + const struct atmel_flex_caps *caps; > struct resource *res; > struct atmel_flexcom *ddata; > int err; > @@ -76,13 +129,52 @@ static int atmel_flexcom_probe(struct platform_device *pdev) > */ > writel(FLEX_MR_OPMODE(ddata->opmode), ddata->base + FLEX_MR); > > + caps = of_device_get_match_data(&pdev->dev); > + if (!caps) { > + dev_err(&pdev->dev, "Could not retrieve flexcom caps\n"); > + err = -EINVAL; > + goto clk_disable; > + } > + > + if (caps->has_flx_cs && of_property_read_bool(np, "microchip,flx-shrd-pins")) { > + ddata->flexcom_shared_base = devm_platform_get_and_ioremap_resource(pdev, 1, NULL); > + if (IS_ERR(ddata->flexcom_shared_base)) { > + err = dev_err_probe(&pdev->dev, > + PTR_ERR(ddata->flexcom_shared_base), > + "failed to get flexcom shared base address\n"); > + goto clk_disable; > + } > + > + err = atmel_flexcom_lan966x_cs_config(pdev); > + if (err) > + goto clk_disable; > + } > + > +clk_disable: > clk_disable_unprepare(ddata->clk); > + if (err) > + return err; > > return devm_of_platform_populate(&pdev->dev); > } > > +static const struct atmel_flex_caps atmel_flexcom_caps = {}; > + > +static const struct atmel_flex_caps lan966x_flexcom_caps = { > + .has_flx_cs = true, > +}; > + > static const struct of_device_id atmel_flexcom_of_match[] = { > - { .compatible = "atmel,sama5d2-flexcom" }, > + { > + .compatible = "atmel,sama5d2-flexcom", > + .data = &atmel_flexcom_caps, > + }, > + > + { > + .compatible = "microchip,lan966x-flexcom", > + .data = &lan966x_flexcom_caps, > + }, > + > { /* sentinel */ } > }; > MODULE_DEVICE_TABLE(of, atmel_flexcom_of_match);
WARNING: multiple messages have this Message-ID (diff)
From: <Claudiu.Beznea@microchip.com> To: <Kavyasree.Kotagiri@microchip.com>, <krzysztof.kozlowski@linaro.org>, <robh+dt@kernel.org>, <Nicolas.Ferre@microchip.com>, <krzysztof.kozlowski+dt@linaro.org> Cc: <UNGLinuxDriver@microchip.com>, <devicetree@vger.kernel.org>, <linux-arm-kernel@lists.infradead.org>, <linux-kernel@vger.kernel.org> Subject: Re: [PATCH v5 3/3] mfd: atmel-flexcom: Add support for lan966x flexcom chip-select configuration Date: Mon, 27 Jun 2022 10:34:51 +0000 [thread overview] Message-ID: <7110531a-36bd-3904-dc54-4697fd6a7316@microchip.com> (raw) In-Reply-To: <20220620144634.25464-4-kavyasree.kotagiri@microchip.com> On 20.06.2022 17:46, Kavyasree Kotagiri wrote: > LAN966x SoC have 5 flexcoms. Each flexcom has 2 chip-selects > which are optional I/O lines. For each chip select of each > flexcom there is a configuration register FLEXCOM_SHARED[0-4]:SS_MASK[0-1]. > The width of configuration register is 21 because there are > 21 shared pins on each of which the chip select can be mapped. > Each bit of the register represents a different FLEXCOM_SHARED pin. > > Signed-off-by: Kavyasree Kotagiri <kavyasree.kotagiri@microchip.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> > --- > v4 -> v5: > - No changes. > > v3 -> v4: > - Add condition for a flexcom whether to configure chip-select lines > or not, based on "microchip,flx-shrd-pins" property existence because > chip-select lines are optional. > > v2 -> v3: > - used goto label for clk_disable in error cases. > > v1 -> v2: > - use GENMASK for mask, macros for maximum allowed values. > - use u32 values for flexcom chipselects instead of strings. > - disable clock in case of errors. > > drivers/mfd/atmel-flexcom.c | 94 ++++++++++++++++++++++++++++++++++++- > 1 file changed, 93 insertions(+), 1 deletion(-) > > diff --git a/drivers/mfd/atmel-flexcom.c b/drivers/mfd/atmel-flexcom.c > index 33caa4fba6af..430b6783b5a7 100644 > --- a/drivers/mfd/atmel-flexcom.c > +++ b/drivers/mfd/atmel-flexcom.c > @@ -28,15 +28,68 @@ > #define FLEX_MR_OPMODE(opmode) (((opmode) << FLEX_MR_OPMODE_OFFSET) & \ > FLEX_MR_OPMODE_MASK) > > +/* LAN966x flexcom shared register offsets */ > +#define FLEX_SHRD_SS_MASK_0 0x0 > +#define FLEX_SHRD_SS_MASK_1 0x4 > +#define FLEX_SHRD_PIN_MAX 20 > +#define FLEX_CS_MAX 1 > +#define FLEX_SHRD_MASK GENMASK(20, 0) > + > +struct atmel_flex_caps { > + bool has_flx_cs; > +}; > + > struct atmel_flexcom { > void __iomem *base; > + void __iomem *flexcom_shared_base; > u32 opmode; > struct clk *clk; > }; > > +static int atmel_flexcom_lan966x_cs_config(struct platform_device *pdev) > +{ > + struct atmel_flexcom *ddata = dev_get_drvdata(&pdev->dev); > + struct device_node *np = pdev->dev.of_node; > + u32 flx_shrd_pins[2], flx_cs[2], val; > + int err, i, count; > + > + count = of_property_count_u32_elems(np, "microchip,flx-shrd-pins"); > + if (count <= 0 || count > 2) { > + dev_err(&pdev->dev, "Invalid %s property (%d)\n", "flx-shrd-pins", > + count); > + return -EINVAL; > + } > + > + err = of_property_read_u32_array(np, "microchip,flx-shrd-pins", flx_shrd_pins, count); > + if (err) > + return err; > + > + err = of_property_read_u32_array(np, "microchip,flx-cs", flx_cs, count); > + if (err) > + return err; > + > + for (i = 0; i < count; i++) { > + if (flx_shrd_pins[i] > FLEX_SHRD_PIN_MAX) > + return -EINVAL; > + > + if (flx_cs[i] > FLEX_CS_MAX) > + return -EINVAL; > + > + val = ~(1 << flx_shrd_pins[i]) & FLEX_SHRD_MASK; > + > + if (flx_cs[i] == 0) > + writel(val, ddata->flexcom_shared_base + FLEX_SHRD_SS_MASK_0); > + else > + writel(val, ddata->flexcom_shared_base + FLEX_SHRD_SS_MASK_1); > + } > + > + return 0; > +} > + > static int atmel_flexcom_probe(struct platform_device *pdev) > { > struct device_node *np = pdev->dev.of_node; > + const struct atmel_flex_caps *caps; > struct resource *res; > struct atmel_flexcom *ddata; > int err; > @@ -76,13 +129,52 @@ static int atmel_flexcom_probe(struct platform_device *pdev) > */ > writel(FLEX_MR_OPMODE(ddata->opmode), ddata->base + FLEX_MR); > > + caps = of_device_get_match_data(&pdev->dev); > + if (!caps) { > + dev_err(&pdev->dev, "Could not retrieve flexcom caps\n"); > + err = -EINVAL; > + goto clk_disable; > + } > + > + if (caps->has_flx_cs && of_property_read_bool(np, "microchip,flx-shrd-pins")) { > + ddata->flexcom_shared_base = devm_platform_get_and_ioremap_resource(pdev, 1, NULL); > + if (IS_ERR(ddata->flexcom_shared_base)) { > + err = dev_err_probe(&pdev->dev, > + PTR_ERR(ddata->flexcom_shared_base), > + "failed to get flexcom shared base address\n"); > + goto clk_disable; > + } > + > + err = atmel_flexcom_lan966x_cs_config(pdev); > + if (err) > + goto clk_disable; > + } > + > +clk_disable: > clk_disable_unprepare(ddata->clk); > + if (err) > + return err; > > return devm_of_platform_populate(&pdev->dev); > } > > +static const struct atmel_flex_caps atmel_flexcom_caps = {}; > + > +static const struct atmel_flex_caps lan966x_flexcom_caps = { > + .has_flx_cs = true, > +}; > + > static const struct of_device_id atmel_flexcom_of_match[] = { > - { .compatible = "atmel,sama5d2-flexcom" }, > + { > + .compatible = "atmel,sama5d2-flexcom", > + .data = &atmel_flexcom_caps, > + }, > + > + { > + .compatible = "microchip,lan966x-flexcom", > + .data = &lan966x_flexcom_caps, > + }, > + > { /* sentinel */ } > }; > MODULE_DEVICE_TABLE(of, atmel_flexcom_of_match); _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2022-06-27 10:35 UTC|newest] Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top 2022-06-20 14:46 [PATCH v5 0/3] Add support for lan966x flexcom chip-select configuration Kavyasree Kotagiri 2022-06-20 14:46 ` Kavyasree Kotagiri 2022-06-20 14:46 ` [PATCH v5 1/3] dt-bindings: mfd: atmel,flexcom: Convert to json-schema Kavyasree Kotagiri 2022-06-20 14:46 ` Kavyasree Kotagiri 2022-06-21 7:16 ` Krzysztof Kozlowski 2022-06-21 7:16 ` Krzysztof Kozlowski 2022-06-20 14:46 ` [PATCH v5 2/3] dt-bindings: mfd: atmel,flexcom: Add new compatible string for lan966x Kavyasree Kotagiri 2022-06-20 14:46 ` Kavyasree Kotagiri 2022-06-21 7:19 ` Krzysztof Kozlowski 2022-06-21 7:19 ` Krzysztof Kozlowski 2022-06-20 14:46 ` [PATCH v5 3/3] mfd: atmel-flexcom: Add support for lan966x flexcom chip-select configuration Kavyasree Kotagiri 2022-06-20 14:46 ` Kavyasree Kotagiri 2022-06-27 10:34 ` Claudiu.Beznea [this message] 2022-06-27 10:34 ` Claudiu.Beznea
Reply instructions: You may reply publicly to this message via plain-text email using any one of the following methods: * Save the following mbox file, import it into your mail client, and reply-to-all from there: mbox Avoid top-posting and favor interleaved quoting: https://en.wikipedia.org/wiki/Posting_style#Interleaved_style * Reply using the --to, --cc, and --in-reply-to switches of git-send-email(1): git send-email \ --in-reply-to=7110531a-36bd-3904-dc54-4697fd6a7316@microchip.com \ --to=claudiu.beznea@microchip.com \ --cc=Kavyasree.Kotagiri@microchip.com \ --cc=Nicolas.Ferre@microchip.com \ --cc=UNGLinuxDriver@microchip.com \ --cc=devicetree@vger.kernel.org \ --cc=krzysztof.kozlowski+dt@linaro.org \ --cc=krzysztof.kozlowski@linaro.org \ --cc=linux-arm-kernel@lists.infradead.org \ --cc=linux-kernel@vger.kernel.org \ --cc=robh+dt@kernel.org \ /path/to/YOUR_REPLY https://kernel.org/pub/software/scm/git/docs/git-send-email.html * If your mail client supports setting the In-Reply-To header via mailto: links, try the mailto: linkBe sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes, see mirroring instructions on how to clone and mirror all data and code used by this external index.