From: "Teres Alexis, Alan Previn" <alan.previn.teres.alexis@intel.com> To: "intel-gfx@lists.freedesktop.org" <intel-gfx@lists.freedesktop.org> Cc: "justonli@chromium.org" <justonli@chromium.org>, "Ceraolo Spurio, Daniele" <daniele.ceraolospurio@intel.com>, "dri-devel@lists.freedesktop.org" <dri-devel@lists.freedesktop.org> Subject: Re: [PATCH v5 3/8] drm/i915/pxp: Add MTL helpers to submit Heci-Cmd-Packet to GSC Date: Wed, 22 Feb 2023 23:41:38 +0000 [thread overview] Message-ID: <7121c77d434c0495ac23e0d8b0c3fb7d2130a906.camel@intel.com> (raw) In-Reply-To: <20230214213844.2890382-4-alan.previn.teres.alexis@intel.com> On Tue, 2023-02-14 at 13:38 -0800, Teres Alexis, Alan Previn wrote: > Add helper functions into a new file for heci-packet-submission. > The helpers will handle generating the MTL GSC-CS Memory-Header > and submission of the Heci-Cmd-Packet instructions to the engine. > > NOTE1: These common functions for heci-packet-submission will be used > by different i915 callers: > 1- GSC-SW-Proxy: This is pending upstream publication awaiting > a few remaining opens > 2- MTL-HDCP: An equivalent patch has also been published at: > https://patchwork.freedesktop.org/series/111876/. (Patch 1) > 3- PXP: This series. > > NOTE2: A difference in this patch vs what is appearing is in bullet 2 > above is that HDCP (and SW-Proxy) will be using priveleged submission > (GGTT and common gsc-uc-context) while PXP will be using non-priveleged > PPGTT, context and batch buffer. Therefore this patch will only slightly > overlap with the MTL-HDCP patches despite have very similar function > names (emit_foo vs emit_nonpriv_foo). This is because HECI_CMD_PKT > instructions require different flows and hw-specific code when done > via PPGTT based submission (not different from other engines). MTL-HDCP > contains the same intel_gsc_mtl_header_t structures as this but the > helpers there are different. Both add the same new file names. > alan: snip > +int > +intel_gsc_uc_heci_cmd_submit_nonpriv(struct intel_gsc_uc *gsc, > + struct intel_context *ce, > + struct intel_gsc_heci_non_priv_pkt *pkt, > + u32 *cmd, int timeout_ms) > +{ > + struct intel_engine_cs *eng; > + struct i915_request *rq; > + int err; > + > + rq = intel_context_create_request(ce); alan: i need to this to below the vma-lock-unlock pairs below to avoid any kind of lockdep warning because of expected primed ordering of calls across driver > + if (IS_ERR(rq)) > + return PTR_ERR(rq); > + > + emit_gsc_heci_pkt_nonpriv(cmd, pkt); > + > + i915_vma_lock(pkt->bb_vma); > + err = i915_vma_move_to_active(pkt->bb_vma, rq, EXEC_OBJECT_WRITE); > + i915_vma_unlock(pkt->bb_vma); > + if (err) > + return err; > + > + i915_vma_lock(pkt->heci_pkt_vma); > + err = i915_vma_move_to_active(pkt->heci_pkt_vma, rq, EXEC_OBJECT_WRITE); > + i915_vma_unlock(pkt->heci_pkt_vma); > + if (err) > + return err; > + > + eng = rq->context->engine; > + if (eng->emit_init_breadcrumb) { > + err = eng->emit_init_breadcrumb(rq); > + if (err) > + goto out_rq; > + } alan: snip
WARNING: multiple messages have this Message-ID (diff)
From: "Teres Alexis, Alan Previn" <alan.previn.teres.alexis@intel.com> To: "intel-gfx@lists.freedesktop.org" <intel-gfx@lists.freedesktop.org> Cc: "dri-devel@lists.freedesktop.org" <dri-devel@lists.freedesktop.org> Subject: Re: [Intel-gfx] [PATCH v5 3/8] drm/i915/pxp: Add MTL helpers to submit Heci-Cmd-Packet to GSC Date: Wed, 22 Feb 2023 23:41:38 +0000 [thread overview] Message-ID: <7121c77d434c0495ac23e0d8b0c3fb7d2130a906.camel@intel.com> (raw) In-Reply-To: <20230214213844.2890382-4-alan.previn.teres.alexis@intel.com> On Tue, 2023-02-14 at 13:38 -0800, Teres Alexis, Alan Previn wrote: > Add helper functions into a new file for heci-packet-submission. > The helpers will handle generating the MTL GSC-CS Memory-Header > and submission of the Heci-Cmd-Packet instructions to the engine. > > NOTE1: These common functions for heci-packet-submission will be used > by different i915 callers: > 1- GSC-SW-Proxy: This is pending upstream publication awaiting > a few remaining opens > 2- MTL-HDCP: An equivalent patch has also been published at: > https://patchwork.freedesktop.org/series/111876/. (Patch 1) > 3- PXP: This series. > > NOTE2: A difference in this patch vs what is appearing is in bullet 2 > above is that HDCP (and SW-Proxy) will be using priveleged submission > (GGTT and common gsc-uc-context) while PXP will be using non-priveleged > PPGTT, context and batch buffer. Therefore this patch will only slightly > overlap with the MTL-HDCP patches despite have very similar function > names (emit_foo vs emit_nonpriv_foo). This is because HECI_CMD_PKT > instructions require different flows and hw-specific code when done > via PPGTT based submission (not different from other engines). MTL-HDCP > contains the same intel_gsc_mtl_header_t structures as this but the > helpers there are different. Both add the same new file names. > alan: snip > +int > +intel_gsc_uc_heci_cmd_submit_nonpriv(struct intel_gsc_uc *gsc, > + struct intel_context *ce, > + struct intel_gsc_heci_non_priv_pkt *pkt, > + u32 *cmd, int timeout_ms) > +{ > + struct intel_engine_cs *eng; > + struct i915_request *rq; > + int err; > + > + rq = intel_context_create_request(ce); alan: i need to this to below the vma-lock-unlock pairs below to avoid any kind of lockdep warning because of expected primed ordering of calls across driver > + if (IS_ERR(rq)) > + return PTR_ERR(rq); > + > + emit_gsc_heci_pkt_nonpriv(cmd, pkt); > + > + i915_vma_lock(pkt->bb_vma); > + err = i915_vma_move_to_active(pkt->bb_vma, rq, EXEC_OBJECT_WRITE); > + i915_vma_unlock(pkt->bb_vma); > + if (err) > + return err; > + > + i915_vma_lock(pkt->heci_pkt_vma); > + err = i915_vma_move_to_active(pkt->heci_pkt_vma, rq, EXEC_OBJECT_WRITE); > + i915_vma_unlock(pkt->heci_pkt_vma); > + if (err) > + return err; > + > + eng = rq->context->engine; > + if (eng->emit_init_breadcrumb) { > + err = eng->emit_init_breadcrumb(rq); > + if (err) > + goto out_rq; > + } alan: snip
next prev parent reply other threads:[~2023-02-22 23:41 UTC|newest] Thread overview: 32+ messages / expand[flat|nested] mbox.gz Atom feed top 2023-02-14 21:38 [Intel-gfx] [PATCH v5 0/8] drm/i915/pxp: Add MTL PXP Support Alan Previn 2023-02-14 21:38 ` Alan Previn 2023-02-14 21:38 ` [PATCH v5 1/8] drm/i915/pxp: Add GSC-CS back-end resource init and cleanup Alan Previn 2023-02-14 21:38 ` [Intel-gfx] " Alan Previn 2023-02-14 21:38 ` [Intel-gfx] [PATCH v5 2/8] drm/i915/pxp: Add MTL hw-plumbing enabling for KCR operation Alan Previn 2023-02-14 21:38 ` Alan Previn 2023-02-14 21:38 ` [PATCH v5 3/8] drm/i915/pxp: Add MTL helpers to submit Heci-Cmd-Packet to GSC Alan Previn 2023-02-14 21:38 ` [Intel-gfx] " Alan Previn 2023-02-22 23:41 ` Teres Alexis, Alan Previn [this message] 2023-02-22 23:41 ` Teres Alexis, Alan Previn 2023-02-14 21:38 ` [PATCH v5 4/8] drm/i915/pxp: Add GSC-CS backend to send GSC fw messages Alan Previn 2023-02-14 21:38 ` [Intel-gfx] " Alan Previn 2023-02-15 19:58 ` Teres Alexis, Alan Previn 2023-02-15 19:58 ` [Intel-gfx] " Teres Alexis, Alan Previn 2023-02-14 21:38 ` [PATCH v5 5/8] drm/i915/pxp: Add ARB session creation and cleanup Alan Previn 2023-02-14 21:38 ` [Intel-gfx] " Alan Previn 2023-02-17 3:12 ` Teres Alexis, Alan Previn 2023-02-17 3:12 ` [Intel-gfx] " Teres Alexis, Alan Previn 2023-02-23 23:27 ` Teres Alexis, Alan Previn 2023-02-23 22:39 ` Teres Alexis, Alan Previn 2023-02-23 22:39 ` Teres Alexis, Alan Previn 2023-02-14 21:38 ` [PATCH v5 6/8] drm/i915/pxp: MTL-KCR interrupt ctrl's are in GT-0 Alan Previn 2023-02-14 21:38 ` [Intel-gfx] " Alan Previn 2023-02-14 21:38 ` [PATCH v5 7/8] drm/i915/pxp: On MTL, KCR enabling doesn't wait on tee component Alan Previn 2023-02-14 21:38 ` [Intel-gfx] " Alan Previn 2023-02-14 21:38 ` [PATCH v5 8/8] drm/i915/pxp: Enable PXP with MTL-GSC-CS Alan Previn 2023-02-14 21:38 ` [Intel-gfx] " Alan Previn 2023-02-18 17:31 ` Teres Alexis, Alan Previn 2023-02-18 17:31 ` [Intel-gfx] " Teres Alexis, Alan Previn 2023-02-14 23:01 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/pxp: Add MTL PXP Support (rev5) Patchwork 2023-02-14 23:27 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork 2023-02-15 10:20 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
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