* [PATCH v4] hw/net/imx_fec: write TGSR and TCSR3 in imx_enet_write()
@ 2020-03-13 12:32 Chen Qun
2020-03-13 14:28 ` Peter Maydell
0 siblings, 1 reply; 3+ messages in thread
From: Chen Qun @ 2020-03-13 12:32 UTC (permalink / raw)
To: qemu-devel, qemu-trivial
Cc: Peter Maydell, zhang.zhanghailiang, Jason Wang, Peter Chubb,
Euler Robot, Chen Qun
The current code causes clang static code analyzer generate warning:
hw/net/imx_fec.c:858:9: warning: Value stored to 'value' is never read
value = value & 0x0000000f;
^ ~~~~~~~~~~~~~~~~~~
hw/net/imx_fec.c:864:9: warning: Value stored to 'value' is never read
value = value & 0x000000fd;
^ ~~~~~~~~~~~~~~~~~~
According to the definition of the function, the two “value” assignments
should be written to registers.
Reported-by: Euler Robot <euler.robot@huawei.com>
Signed-off-by: Chen Qun <kuhn.chenqun@huawei.com>
---
Cc: Peter Maydell <peter.maydell@linaro.org>
Cc: Jason Wang <jasowang@redhat.com>
Cc: Peter Chubb <peter.chubb@nicta.com.au>
v1->v2:
The register 'ENET_TGSR' write-1-to-clear timer flag.
The register 'ENET_TCSRn' 7bit(TF) write-1-to-clear timer flag.
v2->v3:
Optimize code style, based on discussions with Peter.
v3->v4:
Delete reserved bits write zero(Base on Peter's comments).
---
hw/net/imx_fec.c | 6 ++++--
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/hw/net/imx_fec.c b/hw/net/imx_fec.c
index 6a124a154a..5c145a8197 100644
--- a/hw/net/imx_fec.c
+++ b/hw/net/imx_fec.c
@@ -855,13 +855,15 @@ static void imx_enet_write(IMXFECState *s, uint32_t index, uint32_t value)
break;
case ENET_TGSR:
/* implement clear timer flag */
- value = value & 0x0000000f;
+ s->regs[index] &= ~(value & 0x0000000f); /* all bits W1C */
break;
case ENET_TCSR0:
case ENET_TCSR1:
case ENET_TCSR2:
case ENET_TCSR3:
- value = value & 0x000000fd;
+ s->regs[index] &= ~(value & 0x00000080); /* W1C bits */
+ s->regs[index] &= ~0x0000007d; /* writable fields */
+ s->regs[index] |= (value & 0x0000007d);
break;
case ENET_TCCR0:
case ENET_TCCR1:
--
2.23.0
^ permalink raw reply related [flat|nested] 3+ messages in thread
* Re: [PATCH v4] hw/net/imx_fec: write TGSR and TCSR3 in imx_enet_write()
2020-03-13 12:32 [PATCH v4] hw/net/imx_fec: write TGSR and TCSR3 in imx_enet_write() Chen Qun
@ 2020-03-13 14:28 ` Peter Maydell
2020-03-14 3:15 ` Chenqun (kuhn)
0 siblings, 1 reply; 3+ messages in thread
From: Peter Maydell @ 2020-03-13 14:28 UTC (permalink / raw)
To: Chen Qun
Cc: zhanghailiang, QEMU Trivial, Jason Wang, QEMU Developers,
Peter Chubb, Euler Robot
On Fri, 13 Mar 2020 at 12:33, Chen Qun <kuhn.chenqun@huawei.com> wrote:
>
> The current code causes clang static code analyzer generate warning:
> hw/net/imx_fec.c:858:9: warning: Value stored to 'value' is never read
> value = value & 0x0000000f;
> ^ ~~~~~~~~~~~~~~~~~~
> hw/net/imx_fec.c:864:9: warning: Value stored to 'value' is never read
> value = value & 0x000000fd;
> ^ ~~~~~~~~~~~~~~~~~~
>
> According to the definition of the function, the two “value” assignments
> should be written to registers.
>
> Reported-by: Euler Robot <euler.robot@huawei.com>
> Signed-off-by: Chen Qun <kuhn.chenqun@huawei.com>
Applied to target-arm.next; thanks for working through the code
review process.
-- PMM
^ permalink raw reply [flat|nested] 3+ messages in thread
* RE: [PATCH v4] hw/net/imx_fec: write TGSR and TCSR3 in imx_enet_write()
2020-03-13 14:28 ` Peter Maydell
@ 2020-03-14 3:15 ` Chenqun (kuhn)
0 siblings, 0 replies; 3+ messages in thread
From: Chenqun (kuhn) @ 2020-03-14 3:15 UTC (permalink / raw)
To: Peter Maydell
Cc: Zhanghailiang, QEMU Trivial, Jason Wang, QEMU Developers,
Peter Chubb, Euler Robot
>-----Original Message-----
>From: Peter Maydell [mailto:peter.maydell@linaro.org]
>Sent: Friday, March 13, 2020 10:29 PM
>To: Chenqun (kuhn) <kuhn.chenqun@huawei.com>
>Cc: QEMU Developers <qemu-devel@nongnu.org>; QEMU Trivial <qemu-
>trivial@nongnu.org>; Zhanghailiang <zhang.zhanghailiang@huawei.com>;
>Euler Robot <euler.robot@huawei.com>; Jason Wang
><jasowang@redhat.com>; Peter Chubb <peter.chubb@nicta.com.au>
>Subject: Re: [PATCH v4] hw/net/imx_fec: write TGSR and TCSR3 in
>imx_enet_write()
>
>On Fri, 13 Mar 2020 at 12:33, Chen Qun <kuhn.chenqun@huawei.com> wrote:
>>
>> The current code causes clang static code analyzer generate warning:
>> hw/net/imx_fec.c:858:9: warning: Value stored to 'value' is never read
>> value = value & 0x0000000f;
>> ^ ~~~~~~~~~~~~~~~~~~
>> hw/net/imx_fec.c:864:9: warning: Value stored to 'value' is never read
>> value = value & 0x000000fd;
>> ^ ~~~~~~~~~~~~~~~~~~
>>
>> According to the definition of the function, the two “value”
>> assignments should be written to registers.
>>
>> Reported-by: Euler Robot <euler.robot@huawei.com>
>> Signed-off-by: Chen Qun <kuhn.chenqun@huawei.com>
>
>
>Applied to target-arm.next; thanks for working through the code review
>process.
>
Thank you for your detailed review and effective suggestions, too.
^ permalink raw reply [flat|nested] 3+ messages in thread
end of thread, other threads:[~2020-03-14 3:16 UTC | newest]
Thread overview: 3+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2020-03-13 12:32 [PATCH v4] hw/net/imx_fec: write TGSR and TCSR3 in imx_enet_write() Chen Qun
2020-03-13 14:28 ` Peter Maydell
2020-03-14 3:15 ` Chenqun (kuhn)
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.