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From: Greg Ungerer <gerg@kernel.org>
To: Brett Neumeier <bneumeier@gmail.com>,
	Sergio Paracuellos <sergio.paracuellos@gmail.com>
Cc: NeilBrown <neil@brown.name>, driverdev-devel@linuxdriverproject.org
Subject: Re: staging: mt7621-pci: factor out 'mt7621_pcie_enable_port' function
Date: Mon, 17 Jun 2019 13:57:22 +1000	[thread overview]
Message-ID: <756385e8-55be-c5dc-a5d2-440cb1a5208c@kernel.org> (raw)
In-Reply-To: <CAGSetNsFiGZ_xCJFzYDhmZhPZPu90nTH7EDUHOQt1g-ZzxLw5A@mail.gmail.com>

Hi Brett,

On 15/6/19 11:53 pm, Brett Neumeier wrote:
[snip]
> For what it's worth -- possibly nothing? -- I grabbed the most recent six versions of the patch from this thread, including the one here, and did test boots of all of them on both a GnuBee PC1 and PC2 (based on 5.1.7). There were no perfect results, which is probably not surprising. Here I'm referring to different versions of the patch based on the date of the email where it was attached, I don't know if there's a better approach.
> 
> 2019-05-29: 9 success, 1 hang
> 2019-05-31: 8 success, 2 hang
> 2019-06-03: 7 success, 3 hang
> 2019-06-04: 8 success, 2 hang
> 2019-06-05: 6 success, 4 hang
> 2019-06-06: 7 success, 3 hang

That is valuable feedback, thanks for taking the time to run
through those variations.

Your results pretty much mirror what I see. Very inconsistent
booting behavior. Sometimes boots, sometimes doesn't. When it
doesn't it is always somewhere in the PCI startup.

Regards
Greg



> I've put all the boot message logs (for both successes and hangs) at https://repo.freesa.org/gnubee/ in case they are interesting. There are a few different common sequences of boot messages before the hangs occur, which I'll summarize here:
> 
> This happened 10 times:
> 
> [    9.056069] mt7621-pci 1e140000.pcie: Error applying setting, reverse things back
> [   10.187679] mt7621-pci-phy 1e149000.pcie-phy: Xtal is 40MHz
> [   10.198796] mt7621-pci 1e140000.pcie: Port 454043648 N_FTS = 0
> [   10.327667] mt7621-pci-phy 1e149000.pcie-phy: Xtal is 40MHz
> [   10.338771] mt7621-pci 1e140000.pcie: Port 454043648 N_FTS = 1
> [   10.467668] mt7621-pci-phy 1e14a000.pcie-phy: Xtal is 40MHz
> [   10.480904] mt7621-pci 1e140000.pcie: Port 454043648 N_FTS = 2
> [   11.556073] mt7621-pci 1e140000.pcie: PCIE0 enabled
> [   11.565784] mt7621-pci 1e140000.pcie: PCIE0 enabled
> [   11.575497] mt7621-pci 1e140000.pcie: PCIE0 enabled
> [   11.585244] mt7621-pci 1e140000.pcie: PCI coherence region base: 0x60000000, mask/settings: 0xf0000002
> [   11.603982] mt7621-pci 1e140000.pcie: PCI host bridge to bus 0000:00
> [   11.616664] pci_bus 0000:00: root bus resource [io  0xffffffff]
> [   11.628457] pci_bus 0000:00: root bus resource [mem 0x60000000-0x6fffffff]
> [   11.642155] pci_bus 0000:00: root bus resource [bus 00-ff]
> [   11.655286] pci 0000:00:00.0: bridge configuration invalid ([bus 00-00]), reconfiguring
> [   11.671259] pci 0000:00:01.0: bridge configuration invalid ([bus 00-00]), reconfiguring
> [   11.687206] pci 0000:00:02.0: bridge configuration invalid ([bus 00-00]), reconfiguring
> 
> This happened 4 times, but only when using the 2019-06-04 and 2019-06-05 patches:
> 
> [    9.071852] mt7621-pci 1e140000.pcie: Error applying setting, reverse things back
> [   10.197138] mt7621-pci-phy 1e149000.pcie-phy: Xtal is 40MHz
> [   10.208254] mt7621-pci 1e140000.pcie: Port 0 N_FTS = 1b102800
> [   10.337129] mt7621-pci-phy 1e149000.pcie-phy: Xtal is 40MHz
> [   10.348232] mt7621-pci 1e140000.pcie: Port 1 N_FTS = 1b102800
> [   10.477129] mt7621-pci-phy 1e14a000.pcie-phy: Xtal is 40MHz
> [   10.490365] mt7621-pci 1e140000.pcie: Port 2 N_FTS = 1b102800
> [   11.565525] mt7621-pci 1e140000.pcie: pcie0 no card, disable it (RST & CLK)
> [   11.579392] mt7621-pci 1e140000.pcie: PCIE0 enabled
> [   11.589105] mt7621-pci 1e140000.pcie: PCIE0 enabled
> [   11.598853] mt7621-pci 1e140000.pcie: PCI coherence region base: 0x60000000, mask/settings: 0xf0000002
> [   11.617590] mt7621-pci 1e140000.pcie: PCI host bridge to bus 0000:00
> [   11.630266] pci_bus 0000:00: root bus resource [io  0xffffffff]
> [   11.642059] pci_bus 0000:00: root bus resource [mem 0x60000000-0x6fffffff]
> [   11.655757] pci_bus 0000:00: root bus resource [bus 00-ff]
> [   11.668437] pci 0000:00:00.0: bridge configuration invalid ([bus 00-00]), reconfiguring
> [   11.684402] pci 0000:00:01.0: bridge configuration invalid ([bus 00-00]), reconfiguring
> [   11.700805] pci 0000:01:00.0: 2.000 Gb/s available PCIe bandwidth, limited by 2.5 GT/s x1 link at 0000:00:00.0 (capable of 4.000
> Gb/s with 5 GT/s x1 link)
> [   11.729362] pci 0000:00:00.0: PCI bridge to [bus 01-ff]
> [   11.740320] pci 0000:02:00.0: 2.000 Gb/s available PCIe bandwidth, limited by 2.5 GT/s x1 link at 0000:00:01.0 (capable of 4.000
> Gb/s with 5 GT/s x1 link)
> [   11.768887] pci 0000:00:01.0: PCI bridge to [bus 02-ff]
> [   11.779414] pci 0000:00:01.0: BAR 0: no space for [mem size 0x80000000]
> [   11.792587] pci 0000:00:01.0: BAR 0: failed to assign [mem size 0x80000000]
> [   11.806461] pci 0000:00:00.0: BAR 0: assigned [mem 0x60000000-0x61ffffff]
> [   11.819988] pci 0000:00:00.0: BAR 8: assigned [mem 0x62000000-0x620fffff]
> [   11.833516] pci 0000:00:00.0: BAR 9: assigned [mem 0x62100000-0x621fffff pref]
> [   11.847902] pci 0000:00:01.0: BAR 8: assigned [mem 0x62200000-0x622fffff]
> [   11.861431] pci 0000:00:01.0: BAR 9: assigned [mem 0x62300000-0x623fffff pref]
> [   11.875819] pci 0000:00:00.0: BAR 1: assigned [mem 0x62400000-0x6240ffff]
> [   11.889350] pci 0000:00:01.0: BAR 1: assigned [mem 0x62410000-0x6241ffff]
> [   11.902884] pci 0000:00:00.0: BAR 7: no space for [io  size 0x1000]
> [   11.915364] pci 0000:00:00.0: BAR 7: failed to assign [io  size 0x1000]
> [   11.928541] pci 0000:00:01.0: BAR 7: no space for [io  size 0x1000]
> [   11.941026] pci 0000:00:01.0: BAR 7: failed to assign [io  size 0x1000]
> [   11.954211] pci 0000:01:00.0: BAR 5: assigned [mem 0x62000000-0x620001ff]
> [   11.967737] pci 0000:01:00.0: BAR 4: no space for [io  size 0x0010]
> [   11.980222] pci 0000:01:00.0: BAR 4: failed to assign [io  size 0x0010]
> [   11.993395] pci 0000:01:00.0: BAR 0: no space for [io  size 0x0008]
> [   12.005879] pci 0000:01:00.0: BAR 0: failed to assign [io  size 0x0008]
> [   12.019052] pci 0000:01:00.0: BAR 2: no space for [io  size 0x0008]
> [   12.031543] pci 0000:01:00.0: BAR 2: failed to assign [io  size 0x0008]
> [   12.044717] pci 0000:01:00.0: BAR 1: no space for [io  size 0x0004]
> [   12.057199] pci 0000:01:00.0: BAR 1: failed to assign [io  size 0x0004]
> [   12.070378] pci 0000:01:00.0: BAR 3: no space for [io  size 0x0004]
> [   12.082858] pci 0000:01:00.0: BAR 3: failed to assign [io  size 0x0004]
> [   12.096036] pci 0000:00:00.0: PCI bridge to [bus 01]
> [   12.105930] pci 0000:00:00.0:   bridge window [mem 0x62000000-0x620fffff]
> [   12.119452] pci 0000:00:00.0:   bridge window [mem 0x62100000-0x621fffff pref]
> [   12.133850] pci 0000:02:00.0: BAR 5: assigned [mem 0x62200000-0x622001ff]
> [   12.147381] pci 0000:02:00.0: BAR 4: no space for [io  size 0x0010]
> [   12.159872] pci 0000:02:00.0: BAR 4: failed to assign [io  size 0x0010]
> [   12.173045] pci 0000:02:00.0: BAR 0: no space for [io  size 0x0008]
> [   12.185528] pci 0000:02:00.0: BAR 0: failed to assign [io  size 0x0008]
> [   12.198701] pci 0000:02:00.0: BAR 2: no space for [io  size 0x0008]
> [   12.211186] pci 0000:02:00.0: BAR 2: failed to assign [io  size 0x0008]
> [   12.224359] pci 0000:02:00.0: BAR 1: no space for [io  size 0x0004]
> [   12.236844] pci 0000:02:00.0: BAR 1: failed to assign [io  size 0x0004]
> [   12.250016] pci 0000:02:00.0: BAR 3: no space for [io  size 0x0004]
> [   12.262501] pci 0000:02:00.0: BAR 3: failed to assign [io  size 0x0004]
> [   12.275675] pci 0000:00:01.0: PCI bridge to [bus 02]
> [   12.285570] pci 0000:00:01.0:   bridge window [mem 0x62200000-0x622fffff]
> [   12.299095] pci 0000:00:01.0:   bridge window [mem 0x62300000-0x623fffff pref]
> [   12.313830] pci 0000:00:00.0: enabling device (0000 -> 0002)
> [   12.325116] ahci 0000:01:00.0: enabling device (0000 -> 0002)
> I have no idea how to do any debugging of this stuff, I'm afraid, but if there is anything else I can do to help please let me know!
> 
> 
> -- 
> Brett Neumeier (bneumeier@gmail.com <mailto:bneumeier@gmail.com>)
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  parent reply	other threads:[~2019-06-17  3:57 UTC|newest]

Thread overview: 35+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-05-21  6:44 staging: mt7621-pci: factor out 'mt7621_pcie_enable_port' function Greg Ungerer
2019-05-21  8:14 ` Sergio Paracuellos
2019-05-22  0:20   ` Greg Ungerer
2019-05-22  6:27     ` Sergio Paracuellos
2019-05-23  2:11       ` Greg Ungerer
2019-05-23  5:26         ` Sergio Paracuellos
2019-05-24  0:35           ` Greg Ungerer
2019-05-24  5:35             ` Sergio Paracuellos
2019-05-27  4:36               ` Greg Ungerer
2019-05-27  6:35                 ` Sergio Paracuellos
2019-05-27  7:29                   ` Greg Ungerer
2019-05-27  8:02                     ` Sergio Paracuellos
2019-05-29  7:11                       ` Greg Ungerer
2019-05-29  8:08                         ` Sergio Paracuellos
2019-05-30  0:44                           ` Greg Ungerer
2019-05-30  1:46                             ` Greg Ungerer
2019-05-31 12:37                               ` Sergio Paracuellos
2019-05-31 12:47                                 ` Greg Ungerer
2019-06-03  1:25                                 ` Greg Ungerer
2019-06-03  5:34                                   ` Sergio Paracuellos
2019-06-03 12:31                                     ` Greg Ungerer
2019-06-03 19:59                                       ` Sergio Paracuellos
2019-06-04  1:31                                         ` Greg Ungerer
2019-06-04  5:06                                           ` Sergio Paracuellos
2019-06-04  7:14                                             ` Greg Ungerer
2019-06-04  9:36                                               ` Sergio Paracuellos
2019-06-05  4:01                                                 ` Greg Ungerer
2019-06-05  5:47                                                   ` Sergio Paracuellos
2019-06-05 12:28                                                     ` Sergio Paracuellos
2019-06-06  3:06                                                       ` Greg Ungerer
2019-06-06  5:07                                                         ` Sergio Paracuellos
2019-06-06  6:47                                                           ` Greg Ungerer
     [not found]                                                           ` <CAGSetNsFiGZ_xCJFzYDhmZhPZPu90nTH7EDUHOQt1g-ZzxLw5A@mail.gmail.com>
2019-06-17  3:57                                                             ` Greg Ungerer [this message]
2019-06-19  5:28                                                               ` Sergio Paracuellos
     [not found]                           ` <CAGSetNvkNQpqo+F7BRbbh4tdr7FpAU28iyydV5eBCXztNPoFyQ@mail.gmail.com>
2019-05-30  0:47                             ` Greg Ungerer

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