[PATCH] drm/nv50/disp: use correct register to determine DP display bpp

[PATCH] drm/nv50/disp: use correct register to determine DP display bpp

[Ilia Mirkin]

Commit 0a0afd282f ("drm/nv50-/disp: move DP link training to core and
train from supervisor") added code that uses the wrong register for
computing the display bpp, used for bandwidth calculation. Adjust to use
the same register as used by exec_clkcmp and nv50_disp_intr_unk20_2_dp.

Reported-by: Torsten Wagner <torsten.wagner-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
Reported-by: Michael Gulick <mgulick-I5WecO5yM8GakBO8gow8eQ@public.gmane.org>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=67628
Cc: stable-u79uwXL29TY76Z2rM5mHXA@public.gmane.org # 3.9+
Signed-off-by: Ilia Mirkin <imirkin-FrUbXkNCsVf2fBVCVOL8/A@public.gmane.org>
---

Ben did a quick test that makes it seem like this is the right thing to
do. And it makes sense based on the surrounding code, and the way in which the
regression manifests itself.

 drivers/gpu/drm/nouveau/core/engine/disp/nv50.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/nouveau/core/engine/disp/nv50.c b/drivers/gpu/drm/nouveau/core/engine/disp/nv50.c
index 940eaa5..9ad722e 100644
--- a/drivers/gpu/drm/nouveau/core/engine/disp/nv50.c
+++ b/drivers/gpu/drm/nouveau/core/engine/disp/nv50.c
@@ -1142,7 +1142,7 @@ nv50_disp_intr_unk20_2(struct nv50_disp_priv *priv, int head)
 	if (conf != ~0) {
 		if (outp.location == 0 && outp.type == DCB_OUTPUT_DP) {
 			u32 soff = (ffs(outp.or) - 1) * 0x08;
-			u32 ctrl = nv_rd32(priv, 0x610798 + soff);
+			u32 ctrl = nv_rd32(priv, 0x610794 + soff);
 			u32 datarate;
 
 			switch ((ctrl & 0x000f0000) >> 16) {
-- 
1.8.3.2

Re: [PATCH] drm/nv50/disp: use correct register to determine DP display bpp

[Torsten Wagner]

Works !!!

I applied this patch against the current linux kernel of the Arch
Linux distro (3.12.9-2) including all there magic during package
build, just to see it works downstream. (had to recreate the patch but
the actual changes were not changed).

After applying this patch the bug was gone.

One want to make sure that the address was the culprit and not the
variable soff, which could just be wrong leading to the same problem.

If that is worked out to be ok. I would be happy to see this patch
upstream soon.

Thanks a lot for all the hard work and searching. And sorry for the
hash, have no idea what went wrong during the bug report.

RE: [PATCH] drm/nv50/disp: use correct register to determine DP display bpp

[Mike Gulick]

Yes, this works for me as well.  I tested against 3.14-rc2 as well as the latest 3.10 stable series (3.10.30).  I tested on the both the quadro 400 (gt216gl), and the quadro 600 (gf108gl), and displayport works as expected.  Also tested on quadro k600 (gk107), which was working without this patch, just the make sure it was unaffected.

Thanks for the quick turnaround with this patch.  Hopefully this will get applied to both 3.14 and the 3.10 stable series.

-Mike
________________________________________
From: Torsten Wagner <torsten.wagner@gmail.com>
Sent: Friday, February 14, 2014 5:25 AM
To: Ilia Mirkin
Cc: Ben Skeggs; nouveau@lists.freedesktop.org; dri-devel@lists.freedesktop.org; Mike Gulick; # 3.9+
Subject: Re: [PATCH] drm/nv50/disp: use correct register to determine DP display bpp

Works !!!

I applied this patch against the current linux kernel of the Arch
Linux distro (3.12.9-2) including all there magic during package
build, just to see it works downstream. (had to recreate the patch but
the actual changes were not changed).

After applying this patch the bug was gone.

One want to make sure that the address was the culprit and not the
variable soff, which could just be wrong leading to the same problem.

If that is worked out to be ok. I would be happy to see this patch
upstream soon.

Thanks a lot for all the hard work and searching. And sorry for the
hash, have no idea what went wrong during the bug report.