* [PATCH 1/5] iommu/intel: Use bitfields for DMAR capabilities
2021-05-30 7:50 [PATCH 0/5] Short cleanups around DMAR Parav Pandit
@ 2021-05-30 7:50 ` Parav Pandit
2021-05-30 7:50 ` [PATCH 2/5] iommu/intel: Removed unused iommu_count in dmar domain Parav Pandit
` (4 subsequent siblings)
5 siblings, 0 replies; 7+ messages in thread
From: Parav Pandit @ 2021-05-30 7:50 UTC (permalink / raw)
To: dwmw2, baolu.lu, iommu; +Cc: will
IOTLB device presence, iommu coherency and snooping are boolean
capabilities. Use them as bits and keep them adjacent.
Structure layout before the reorg.
$ pahole -C dmar_domain drivers/iommu/intel/dmar.o
struct dmar_domain {
int nid; /* 0 4 */
unsigned int iommu_refcnt[128]; /* 4 512 */
/* --- cacheline 8 boundary (512 bytes) was 4 bytes ago --- */
u16 iommu_did[128]; /* 516 256 */
/* --- cacheline 12 boundary (768 bytes) was 4 bytes ago --- */
bool has_iotlb_device; /* 772 1 */
/* XXX 3 bytes hole, try to pack */
struct list_head devices; /* 776 16 */
struct list_head subdevices; /* 792 16 */
struct iova_domain iovad __attribute__((__aligned__(8))); /* 808 2320 */
/* --- cacheline 48 boundary (3072 bytes) was 56 bytes ago --- */
struct dma_pte * pgd; /* 3128 8 */
/* --- cacheline 49 boundary (3136 bytes) --- */
int gaw; /* 3136 4 */
int agaw; /* 3140 4 */
int flags; /* 3144 4 */
int iommu_coherency; /* 3148 4 */
int iommu_snooping; /* 3152 4 */
int iommu_count; /* 3156 4 */
int iommu_superpage; /* 3160 4 */
/* XXX 4 bytes hole, try to pack */
u64 max_addr; /* 3168 8 */
u32 default_pasid; /* 3176 4 */
/* XXX 4 bytes hole, try to pack */
struct iommu_domain domain; /* 3184 72 */
/* size: 3256, cachelines: 51, members: 18 */
/* sum members: 3245, holes: 3, sum holes: 11 */
/* forced alignments: 1 */
/* last cacheline: 56 bytes */
} __attribute__((__aligned__(8)));
After arranging it for natural padding and to make flags as u8 bits, it
saves 8 bytes for the struct.
struct dmar_domain {
int nid; /* 0 4 */
unsigned int iommu_refcnt[128]; /* 4 512 */
/* --- cacheline 8 boundary (512 bytes) was 4 bytes ago --- */
u16 iommu_did[128]; /* 516 256 */
/* --- cacheline 12 boundary (768 bytes) was 4 bytes ago --- */
u8 has_iotlb_device:1; /* 772: 0 1 */
u8 iommu_coherency:1; /* 772: 1 1 */
u8 iommu_snooping:1; /* 772: 2 1 */
/* XXX 5 bits hole, try to pack */
/* XXX 3 bytes hole, try to pack */
struct list_head devices; /* 776 16 */
struct list_head subdevices; /* 792 16 */
struct iova_domain iovad __attribute__((__aligned__(8))); /* 808 2320 */
/* --- cacheline 48 boundary (3072 bytes) was 56 bytes ago --- */
struct dma_pte * pgd; /* 3128 8 */
/* --- cacheline 49 boundary (3136 bytes) --- */
int gaw; /* 3136 4 */
int agaw; /* 3140 4 */
int flags; /* 3144 4 */
int iommu_count; /* 3148 4 */
int iommu_superpage; /* 3152 4 */
/* XXX 4 bytes hole, try to pack */
u64 max_addr; /* 3160 8 */
u32 default_pasid; /* 3168 4 */
/* XXX 4 bytes hole, try to pack */
struct iommu_domain domain; /* 3176 72 */
/* size: 3248, cachelines: 51, members: 18 */
/* sum members: 3236, holes: 3, sum holes: 11 */
/* sum bitfield members: 3 bits, bit holes: 1, sum bit holes: 5 bits */
/* forced alignments: 1 */
/* last cacheline: 48 bytes */
} __attribute__((__aligned__(8)));
Signed-off-by: Parav Pandit <parav@nvidia.com>
---
drivers/iommu/intel/iommu.c | 18 +++++++++---------
include/linux/intel-iommu.h | 8 ++++----
2 files changed, 13 insertions(+), 13 deletions(-)
diff --git a/drivers/iommu/intel/iommu.c b/drivers/iommu/intel/iommu.c
index 708f430af1c4..cdbf4513df9d 100644
--- a/drivers/iommu/intel/iommu.c
+++ b/drivers/iommu/intel/iommu.c
@@ -625,12 +625,12 @@ static void domain_update_iommu_coherency(struct dmar_domain *domain)
bool found = false;
int i;
- domain->iommu_coherency = 1;
+ domain->iommu_coherency = true;
for_each_domain_iommu(i, domain) {
found = true;
if (!iommu_paging_structure_coherency(g_iommus[i])) {
- domain->iommu_coherency = 0;
+ domain->iommu_coherency = false;
break;
}
}
@@ -641,18 +641,18 @@ static void domain_update_iommu_coherency(struct dmar_domain *domain)
rcu_read_lock();
for_each_active_iommu(iommu, drhd) {
if (!iommu_paging_structure_coherency(iommu)) {
- domain->iommu_coherency = 0;
+ domain->iommu_coherency = false;
break;
}
}
rcu_read_unlock();
}
-static int domain_update_iommu_snooping(struct intel_iommu *skip)
+static bool domain_update_iommu_snooping(struct intel_iommu *skip)
{
struct dmar_drhd_unit *drhd;
struct intel_iommu *iommu;
- int ret = 1;
+ bool ret = true;
rcu_read_lock();
for_each_active_iommu(iommu, drhd) {
@@ -665,7 +665,7 @@ static int domain_update_iommu_snooping(struct intel_iommu *skip)
*/
if (!sm_supported(iommu) &&
!ecap_sc_support(iommu->ecap)) {
- ret = 0;
+ ret = false;
break;
}
}
@@ -4508,8 +4508,8 @@ static int md_domain_init(struct dmar_domain *domain, int guest_width)
adjust_width = guestwidth_to_adjustwidth(guest_width);
domain->agaw = width_to_agaw(adjust_width);
- domain->iommu_coherency = 0;
- domain->iommu_snooping = 0;
+ domain->iommu_coherency = false;
+ domain->iommu_snooping = false;
domain->iommu_superpage = 0;
domain->max_addr = 0;
@@ -5124,7 +5124,7 @@ static phys_addr_t intel_iommu_iova_to_phys(struct iommu_domain *domain,
static bool intel_iommu_capable(enum iommu_cap cap)
{
if (cap == IOMMU_CAP_CACHE_COHERENCY)
- return domain_update_iommu_snooping(NULL) == 1;
+ return domain_update_iommu_snooping(NULL);
if (cap == IOMMU_CAP_INTR_REMAP)
return irq_remapping_enabled == 1;
diff --git a/include/linux/intel-iommu.h b/include/linux/intel-iommu.h
index 03faf20a6817..2153c6cbef7e 100644
--- a/include/linux/intel-iommu.h
+++ b/include/linux/intel-iommu.h
@@ -546,7 +546,10 @@ struct dmar_domain {
* domain ids are 16 bit wide according
* to VT-d spec, section 9.3 */
- bool has_iotlb_device;
+ u8 has_iotlb_device: 1;
+ u8 iommu_coherency: 1; /* indicate coherency of iommu access */
+ u8 iommu_snooping: 1; /* indicate snooping control feature */
+
struct list_head devices; /* all devices' list */
struct list_head subdevices; /* all subdevices' list */
struct iova_domain iovad; /* iova's that belong to this domain */
@@ -558,9 +561,6 @@ struct dmar_domain {
int agaw;
int flags; /* flags to find out type of domain */
-
- int iommu_coherency;/* indicate coherency of iommu access */
- int iommu_snooping; /* indicate snooping control feature*/
int iommu_count; /* reference count of iommu */
int iommu_superpage;/* Level of superpages supported:
0 == 4KiB (no superpages), 1 == 2MiB,
--
2.26.2
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* [PATCH 2/5] iommu/intel: Removed unused iommu_count in dmar domain
2021-05-30 7:50 [PATCH 0/5] Short cleanups around DMAR Parav Pandit
2021-05-30 7:50 ` [PATCH 1/5] iommu/intel: Use bitfields for DMAR capabilities Parav Pandit
@ 2021-05-30 7:50 ` Parav Pandit
2021-05-30 7:50 ` [PATCH 3/5] iommu/intel: Remove unnecessary braces Parav Pandit
` (3 subsequent siblings)
5 siblings, 0 replies; 7+ messages in thread
From: Parav Pandit @ 2021-05-30 7:50 UTC (permalink / raw)
To: dwmw2, baolu.lu, iommu; +Cc: will
DMAR domain uses per DMAR refcount. It is indexed by iommu seq_id.
Older iommu_count is only incremented and decremented but no decisions
are taken based on this refcount. This is not of much use.
Hence, remove iommu_count and further simplify domain_detach_iommu()
by returning void.
Signed-off-by: Parav Pandit <parav@nvidia.com>
---
drivers/iommu/intel/iommu.c | 11 +++--------
include/linux/intel-iommu.h | 1 -
2 files changed, 3 insertions(+), 9 deletions(-)
diff --git a/drivers/iommu/intel/iommu.c b/drivers/iommu/intel/iommu.c
index cdbf4513df9d..51be77c48108 100644
--- a/drivers/iommu/intel/iommu.c
+++ b/drivers/iommu/intel/iommu.c
@@ -1919,7 +1919,6 @@ static int domain_attach_iommu(struct dmar_domain *domain,
assert_spin_locked(&iommu->lock);
domain->iommu_refcnt[iommu->seq_id] += 1;
- domain->iommu_count += 1;
if (domain->iommu_refcnt[iommu->seq_id] == 1) {
ndomains = cap_ndoms(iommu->cap);
num = find_first_zero_bit(iommu->domain_ids, ndomains);
@@ -1927,7 +1926,6 @@ static int domain_attach_iommu(struct dmar_domain *domain,
if (num >= ndomains) {
pr_err("%s: No free domain ids\n", iommu->name);
domain->iommu_refcnt[iommu->seq_id] -= 1;
- domain->iommu_count -= 1;
return -ENOSPC;
}
@@ -1943,16 +1941,15 @@ static int domain_attach_iommu(struct dmar_domain *domain,
return 0;
}
-static int domain_detach_iommu(struct dmar_domain *domain,
- struct intel_iommu *iommu)
+static void domain_detach_iommu(struct dmar_domain *domain,
+ struct intel_iommu *iommu)
{
- int num, count;
+ int num;
assert_spin_locked(&device_domain_lock);
assert_spin_locked(&iommu->lock);
domain->iommu_refcnt[iommu->seq_id] -= 1;
- count = --domain->iommu_count;
if (domain->iommu_refcnt[iommu->seq_id] == 0) {
num = domain->iommu_did[iommu->seq_id];
clear_bit(num, iommu->domain_ids);
@@ -1961,8 +1958,6 @@ static int domain_detach_iommu(struct dmar_domain *domain,
domain_update_iommu_cap(domain);
domain->iommu_did[iommu->seq_id] = 0;
}
-
- return count;
}
static inline int guestwidth_to_adjustwidth(int gaw)
diff --git a/include/linux/intel-iommu.h b/include/linux/intel-iommu.h
index 2153c6cbef7e..50a006cc8c05 100644
--- a/include/linux/intel-iommu.h
+++ b/include/linux/intel-iommu.h
@@ -561,7 +561,6 @@ struct dmar_domain {
int agaw;
int flags; /* flags to find out type of domain */
- int iommu_count; /* reference count of iommu */
int iommu_superpage;/* Level of superpages supported:
0 == 4KiB (no superpages), 1 == 2MiB,
2 == 1GiB, 3 == 512GiB, 4 == 1TiB */
--
2.26.2
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* [PATCH 3/5] iommu/intel: Remove unnecessary braces
2021-05-30 7:50 [PATCH 0/5] Short cleanups around DMAR Parav Pandit
2021-05-30 7:50 ` [PATCH 1/5] iommu/intel: Use bitfields for DMAR capabilities Parav Pandit
2021-05-30 7:50 ` [PATCH 2/5] iommu/intel: Removed unused iommu_count in dmar domain Parav Pandit
@ 2021-05-30 7:50 ` Parav Pandit
2021-05-30 7:50 ` [PATCH 4/5] iommu/intel: Define counter explicitly as unsigned int Parav Pandit
` (2 subsequent siblings)
5 siblings, 0 replies; 7+ messages in thread
From: Parav Pandit @ 2021-05-30 7:50 UTC (permalink / raw)
To: dwmw2, baolu.lu, iommu; +Cc: will
No need for braces for single line statement under if() block.
Signed-off-by: Parav Pandit <parav@nvidia.com>
---
drivers/iommu/intel/iommu.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/drivers/iommu/intel/iommu.c b/drivers/iommu/intel/iommu.c
index 51be77c48108..6788d10d0ff6 100644
--- a/drivers/iommu/intel/iommu.c
+++ b/drivers/iommu/intel/iommu.c
@@ -682,9 +682,8 @@ static int domain_update_iommu_superpage(struct dmar_domain *domain,
struct intel_iommu *iommu;
int mask = 0x3;
- if (!intel_iommu_superpage) {
+ if (!intel_iommu_superpage)
return 0;
- }
/* set iommu_superpage to the smallest common denominator */
rcu_read_lock();
--
2.26.2
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* [PATCH 4/5] iommu/intel: Define counter explicitly as unsigned int
2021-05-30 7:50 [PATCH 0/5] Short cleanups around DMAR Parav Pandit
` (2 preceding siblings ...)
2021-05-30 7:50 ` [PATCH 3/5] iommu/intel: Remove unnecessary braces Parav Pandit
@ 2021-05-30 7:50 ` Parav Pandit
2021-05-30 7:50 ` [PATCH 5/5] iommu/intel: No need to typecast Parav Pandit
2021-06-09 7:43 ` [PATCH 0/5] Short cleanups around DMAR Lu Baolu
5 siblings, 0 replies; 7+ messages in thread
From: Parav Pandit @ 2021-05-30 7:50 UTC (permalink / raw)
To: dwmw2, baolu.lu, iommu; +Cc: will
Avoid below checkpatch warning.
WARNING: Prefer 'unsigned int' to bare use of 'unsigned'
+ unsigned iommu_refcnt[DMAR_UNITS_SUPPORTED];
Fixes: 29a27719abaa ("iommu/vt-d: Replace iommu_bmp with a refcount")
Signed-off-by: Parav Pandit <parav@nvidia.com>
---
include/linux/intel-iommu.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/include/linux/intel-iommu.h b/include/linux/intel-iommu.h
index 50a006cc8c05..1b3c22e030c9 100644
--- a/include/linux/intel-iommu.h
+++ b/include/linux/intel-iommu.h
@@ -537,7 +537,7 @@ struct context_entry {
struct dmar_domain {
int nid; /* node id */
- unsigned iommu_refcnt[DMAR_UNITS_SUPPORTED];
+ unsigned int iommu_refcnt[DMAR_UNITS_SUPPORTED];
/* Refcount of devices per iommu */
--
2.26.2
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* [PATCH 5/5] iommu/intel: No need to typecast
2021-05-30 7:50 [PATCH 0/5] Short cleanups around DMAR Parav Pandit
` (3 preceding siblings ...)
2021-05-30 7:50 ` [PATCH 4/5] iommu/intel: Define counter explicitly as unsigned int Parav Pandit
@ 2021-05-30 7:50 ` Parav Pandit
2021-06-09 7:43 ` [PATCH 0/5] Short cleanups around DMAR Lu Baolu
5 siblings, 0 replies; 7+ messages in thread
From: Parav Pandit @ 2021-05-30 7:50 UTC (permalink / raw)
To: dwmw2, baolu.lu, iommu; +Cc: will
Page directory assignment by alloc_pgtable_page() or phys_to_virt()
doesn't need typecasting as both routines return void*.
Hence, remove typecasting from both the calls.
Signed-off-by: Parav Pandit <parav@nvidia.com>
---
drivers/iommu/intel/iommu.c | 5 ++---
1 file changed, 2 insertions(+), 3 deletions(-)
diff --git a/drivers/iommu/intel/iommu.c b/drivers/iommu/intel/iommu.c
index 6788d10d0ff6..b3d006eb8c49 100644
--- a/drivers/iommu/intel/iommu.c
+++ b/drivers/iommu/intel/iommu.c
@@ -4508,7 +4508,7 @@ static int md_domain_init(struct dmar_domain *domain, int guest_width)
domain->max_addr = 0;
/* always allocate the top pgd */
- domain->pgd = (struct dma_pte *)alloc_pgtable_page(domain->nid);
+ domain->pgd = alloc_pgtable_page(domain->nid);
if (!domain->pgd)
return -ENOMEM;
domain_flush_cache(domain, domain->pgd, PAGE_SIZE);
@@ -4767,8 +4767,7 @@ static int prepare_domain_attach_device(struct iommu_domain *domain,
pte = dmar_domain->pgd;
if (dma_pte_present(pte)) {
- dmar_domain->pgd = (struct dma_pte *)
- phys_to_virt(dma_pte_addr(pte));
+ dmar_domain->pgd = phys_to_virt(dma_pte_addr(pte));
free_pgtable_page(pte);
}
dmar_domain->agaw--;
--
2.26.2
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* Re: [PATCH 0/5] Short cleanups around DMAR
2021-05-30 7:50 [PATCH 0/5] Short cleanups around DMAR Parav Pandit
` (4 preceding siblings ...)
2021-05-30 7:50 ` [PATCH 5/5] iommu/intel: No need to typecast Parav Pandit
@ 2021-06-09 7:43 ` Lu Baolu
5 siblings, 0 replies; 7+ messages in thread
From: Lu Baolu @ 2021-06-09 7:43 UTC (permalink / raw)
To: Parav Pandit, dwmw2, iommu; +Cc: will
On 5/30/21 3:50 PM, Parav Pandit wrote:
> Hi David, Lu,
>
> This short series contains small cleanup patches for Intel iommu
> in DMAR area.
>
> Patch summary:
> Patch-1 uses bitfields for few DMAR capabilities
> Patch-2 removes unused iommu_count
> Patch-3 removed unnecessary braces
> Patch-4 define count data type explicitly as unsigned int
> Patch-5 removes unnecessary typecasting
>
>
> Parav Pandit (5):
> iommu/intel: Use bitfields for DMAR capabilities
> iommu/intel: Removed unused iommu_count in dmar domain
> iommu/intel: Remove unnecessary braces
> iommu/intel: Define counter explicitly as unsigned int
> iommu/intel: No need to typecast
All patches queued for v5.14. Thanks!
Best regards,
baolu
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