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From: Robin Murphy <robin.murphy@arm.com>
To: djw@t-chip.com.cn, linux-rockchip@lists.infradead.org
Cc: Mark Rutland <mark.rutland@arm.com>,
	devicetree@vger.kernel.org, Wayne Chou <zxf@t-chip.com.cn>,
	Heiko Stuebner <heiko@sntech.de>, Arnd Bergmann <arnd@arndb.de>,
	Catalin Marinas <catalin.marinas@arm.com>,
	Will Deacon <will.deacon@arm.com>,
	linux-kernel@vger.kernel.org,
	Sugar Zhang <sugar.zhang@rock-chips.com>,
	Rob Herring <robh+dt@kernel.org>,
	Finley Xiao <finley.xiao@rock-chips.com>,
	David Wu <david.wu@rock-chips.com>,
	William Wu <william.wu@rock-chips.com>,
	Rocky Hao <rocky.hao@rock-chips.com>,
	linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH v1 3/5] arm64: dts: rockchip: Add gpio-syscon10 to rk3328
Date: Thu, 10 May 2018 13:50:47 +0100	[thread overview]
Message-ID: <76f2bbde-e158-a186-f136-9fb610a810c5@arm.com> (raw)
In-Reply-To: <1525943800-14095-4-git-send-email-djw@t-chip.com.cn>

On 10/05/18 10:16, djw@t-chip.com.cn wrote:
> From: Levin Du <djw@t-chip.com.cn>
> 
> Adding a new gpio controller named "gpio-syscon10" to rk3328, providing
> access to the pins defined in the syscon GRF_SOC_CON10.

This is the GPIO_MUTE pin, right? The public TRM is rather vague, but 
cross-referencing against the datasheet and schematics implies that it's 
the "gpiomut_*" part of the GRF bit names which is most significant.

It might be worth using a more descriptive name here, since "syscon10" 
is pretty much meaningless at the board level.

Robin.

> Boards using these special pins to control regulators or LEDs, can now
> utilize existing drivers like gpio-regulator and leds-gpio.
> 
> Signed-off-by: Levin Du <djw@t-chip.com.cn>
> 
> ---
> 
> Changes in v1:
> - Split from V0 and add to rk3328.dtsi for general use.
> 
>   arch/arm64/boot/dts/rockchip/rk3328.dtsi | 6 ++++++
>   1 file changed, 6 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/rockchip/rk3328.dtsi b/arch/arm64/boot/dts/rockchip/rk3328.dtsi
> index b8e9da1..73a822d 100644
> --- a/arch/arm64/boot/dts/rockchip/rk3328.dtsi
> +++ b/arch/arm64/boot/dts/rockchip/rk3328.dtsi
> @@ -309,6 +309,12 @@
>   			mode-loader = <BOOT_BL_DOWNLOAD>;
>   		};
>   
> +		gpio_syscon10: gpio-syscon10 {
> +			compatible = "rockchip,gpio-syscon";
> +			gpio-controller;
> +			#gpio-cells = <2>;
> +			gpio,syscon-dev = <0 0x0428 0>;
> +		};
>   	};
>   
>   	uart0: serial@ff110000 {
> 

WARNING: multiple messages have this Message-ID (diff)
From: robin.murphy@arm.com (Robin Murphy)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v1 3/5] arm64: dts: rockchip: Add gpio-syscon10 to rk3328
Date: Thu, 10 May 2018 13:50:47 +0100	[thread overview]
Message-ID: <76f2bbde-e158-a186-f136-9fb610a810c5@arm.com> (raw)
In-Reply-To: <1525943800-14095-4-git-send-email-djw@t-chip.com.cn>

On 10/05/18 10:16, djw at t-chip.com.cn wrote:
> From: Levin Du <djw@t-chip.com.cn>
> 
> Adding a new gpio controller named "gpio-syscon10" to rk3328, providing
> access to the pins defined in the syscon GRF_SOC_CON10.

This is the GPIO_MUTE pin, right? The public TRM is rather vague, but 
cross-referencing against the datasheet and schematics implies that it's 
the "gpiomut_*" part of the GRF bit names which is most significant.

It might be worth using a more descriptive name here, since "syscon10" 
is pretty much meaningless at the board level.

Robin.

> Boards using these special pins to control regulators or LEDs, can now
> utilize existing drivers like gpio-regulator and leds-gpio.
> 
> Signed-off-by: Levin Du <djw@t-chip.com.cn>
> 
> ---
> 
> Changes in v1:
> - Split from V0 and add to rk3328.dtsi for general use.
> 
>   arch/arm64/boot/dts/rockchip/rk3328.dtsi | 6 ++++++
>   1 file changed, 6 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/rockchip/rk3328.dtsi b/arch/arm64/boot/dts/rockchip/rk3328.dtsi
> index b8e9da1..73a822d 100644
> --- a/arch/arm64/boot/dts/rockchip/rk3328.dtsi
> +++ b/arch/arm64/boot/dts/rockchip/rk3328.dtsi
> @@ -309,6 +309,12 @@
>   			mode-loader = <BOOT_BL_DOWNLOAD>;
>   		};
>   
> +		gpio_syscon10: gpio-syscon10 {
> +			compatible = "rockchip,gpio-syscon";
> +			gpio-controller;
> +			#gpio-cells = <2>;
> +			gpio,syscon-dev = <0 0x0428 0>;
> +		};
>   	};
>   
>   	uart0: serial at ff110000 {
> 

  reply	other threads:[~2018-05-10 12:50 UTC|newest]

Thread overview: 29+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-05-10  9:16 [PATCH v1 0/5] Add sdmmc UHS support to ROC-RK3328-CC board djw
2018-05-10  9:16 ` djw at t-chip.com.cn
2018-05-10  9:16 ` [PATCH v1 1/5] gpio: syscon: allow fetching syscon from parent node djw
2018-05-10  9:16 ` [PATCH v1 2/5] gpio: syscon: Add gpio-syscon for rockchip djw
2018-05-10  9:16   ` djw at t-chip.com.cn
2018-05-10 14:56   ` Robin Murphy
2018-05-10 14:56     ` Robin Murphy
2018-05-11  2:16     ` Levin Du
2018-05-11  2:16       ` Levin Du
2018-05-10  9:16 ` [PATCH v1 3/5] arm64: dts: rockchip: Add gpio-syscon10 to rk3328 djw
2018-05-10  9:16   ` djw at t-chip.com.cn
2018-05-10 12:50   ` Robin Murphy [this message]
2018-05-10 12:50     ` Robin Murphy
2018-05-11  3:45     ` Levin Du
2018-05-11  3:45       ` Levin Du
2018-05-11 12:24       ` Rob Herring
2018-05-11 12:24         ` Rob Herring
2018-05-14  1:28         ` Levin Du
2018-05-14  1:28           ` Levin Du
2018-05-11 12:22   ` Rob Herring
2018-05-11 12:22     ` Rob Herring
2018-05-14  1:22     ` Levin Du
2018-05-14  1:22       ` Levin Du
2018-05-10  9:16 ` [PATCH v1 4/5] arm64: dts: rockchip: Add io-domain to roc-rk3328-cc djw
2018-05-10  9:16   ` djw at t-chip.com.cn
2018-05-10  9:27 ` djw
2018-05-10  9:27   ` djw at t-chip.com.cn
2018-05-10  9:28 ` [PATCH v1 5/5] arm64: dts: rockchip: Add sdmmc UHS support for roc-rk3328-cc djw
2018-05-10  9:28   ` djw at t-chip.com.cn

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