* [PATCH v3 0/3] arm64: bcmbca: add bcm4912 SoC support
@ 2022-06-01 20:17 ` William Zhang
0 siblings, 0 replies; 15+ messages in thread
From: William Zhang @ 2022-06-01 20:17 UTC (permalink / raw)
To: Linux ARM List
Cc: dan.beygelman, philippe.reynes, joel.peshkin, anand.gore,
florian.fainelli, kursad.oney, tomer.yacoby, samyon.furman,
William Zhang, Broadcom internal kernel review list,
Krzysztof Kozlowski, Rob Herring, devicetree, linux-kernel
[-- Attachment #1: Type: text/plain, Size: 1128 bytes --]
This change adds the basic support for Broadcom's ARMv8 based
Broadband SoC BCM4912. The initial support includes a bare-bone dts
for quad core Broadcom B53 with a Broadcom uart.
Changes in v3:
- Change internal bus address and size cells from 2 to 1
Changes in v2:
- Simplify dt-bindings patch subject line
- Fix pmu compatible string
- Remove unnecessary cpu_on and cpu_off properties from psci node
- Add the missing gic registers and interrupts property to gic node
William Zhang (3):
dt-bindings: arm64: add bcm4912 SoC
arm64: dts: add dts files for bcmbca SoC bcm4912
MAINTAINERS: add bcm4912 to bcmbca arch entry
.../bindings/arm/bcm/brcm,bcmbca.yaml | 7 +
MAINTAINERS | 1 +
arch/arm64/boot/dts/broadcom/bcmbca/Makefile | 3 +-
.../boot/dts/broadcom/bcmbca/bcm4912.dtsi | 128 ++++++++++++++++++
.../boot/dts/broadcom/bcmbca/bcm94912.dts | 30 ++++
5 files changed, 168 insertions(+), 1 deletion(-)
create mode 100644 arch/arm64/boot/dts/broadcom/bcmbca/bcm4912.dtsi
create mode 100644 arch/arm64/boot/dts/broadcom/bcmbca/bcm94912.dts
--
2.36.1
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^ permalink raw reply [flat|nested] 15+ messages in thread
* [PATCH v3 0/3] arm64: bcmbca: add bcm4912 SoC support
@ 2022-06-01 20:17 ` William Zhang
0 siblings, 0 replies; 15+ messages in thread
From: William Zhang @ 2022-06-01 20:17 UTC (permalink / raw)
To: Linux ARM List
Cc: dan.beygelman, philippe.reynes, joel.peshkin, anand.gore,
florian.fainelli, kursad.oney, tomer.yacoby, samyon.furman,
William Zhang, Broadcom internal kernel review list,
Krzysztof Kozlowski, Rob Herring, devicetree, linux-kernel
[-- Attachment #1: Type: text/plain, Size: 1128 bytes --]
This change adds the basic support for Broadcom's ARMv8 based
Broadband SoC BCM4912. The initial support includes a bare-bone dts
for quad core Broadcom B53 with a Broadcom uart.
Changes in v3:
- Change internal bus address and size cells from 2 to 1
Changes in v2:
- Simplify dt-bindings patch subject line
- Fix pmu compatible string
- Remove unnecessary cpu_on and cpu_off properties from psci node
- Add the missing gic registers and interrupts property to gic node
William Zhang (3):
dt-bindings: arm64: add bcm4912 SoC
arm64: dts: add dts files for bcmbca SoC bcm4912
MAINTAINERS: add bcm4912 to bcmbca arch entry
.../bindings/arm/bcm/brcm,bcmbca.yaml | 7 +
MAINTAINERS | 1 +
arch/arm64/boot/dts/broadcom/bcmbca/Makefile | 3 +-
.../boot/dts/broadcom/bcmbca/bcm4912.dtsi | 128 ++++++++++++++++++
.../boot/dts/broadcom/bcmbca/bcm94912.dts | 30 ++++
5 files changed, 168 insertions(+), 1 deletion(-)
create mode 100644 arch/arm64/boot/dts/broadcom/bcmbca/bcm4912.dtsi
create mode 100644 arch/arm64/boot/dts/broadcom/bcmbca/bcm94912.dts
--
2.36.1
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^ permalink raw reply [flat|nested] 15+ messages in thread
* [PATCH v3 1/3] dt-bindings: arm64: add bcm4912 SoC
2022-06-01 20:17 ` William Zhang
(?)
@ 2022-06-01 20:17 ` William Zhang
-1 siblings, 0 replies; 15+ messages in thread
From: William Zhang @ 2022-06-01 20:17 UTC (permalink / raw)
To: Linux ARM List
Cc: dan.beygelman, philippe.reynes, joel.peshkin, anand.gore,
florian.fainelli, kursad.oney, tomer.yacoby, samyon.furman,
William Zhang, Broadcom internal kernel review list,
Krzysztof Kozlowski, Rob Herring, devicetree, linux-kernel
[-- Attachment #1.1: Type: text/plain, Size: 989 bytes --]
Add BCM4912 SoC device tree description to bcmbca binding document.
Signed-off-by: William Zhang <william.zhang@broadcom.com>
---
(no changes since v2)
Changes in v2:
- Simplify dt-bindings patch subject line
Documentation/devicetree/bindings/arm/bcm/brcm,bcmbca.yaml | 7 +++++++
1 file changed, 7 insertions(+)
diff --git a/Documentation/devicetree/bindings/arm/bcm/brcm,bcmbca.yaml b/Documentation/devicetree/bindings/arm/bcm/brcm,bcmbca.yaml
index 4e3a1a5391f6..323f09b0f95d 100644
--- a/Documentation/devicetree/bindings/arm/bcm/brcm,bcmbca.yaml
+++ b/Documentation/devicetree/bindings/arm/bcm/brcm,bcmbca.yaml
@@ -28,6 +28,13 @@ properties:
- const: brcm,bcm47622
- const: brcm,bcmbca
+ - description: BCM4912 based boards
+ items:
+ - enum:
+ - brcm,bcm94912
+ - const: brcm,bcm4912
+ - const: brcm,bcmbca
+
- description: BCM63158 based boards
items:
- enum:
--
2.36.1
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_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 15+ messages in thread* [PATCH v3 1/3] dt-bindings: arm64: add bcm4912 SoC
@ 2022-06-01 20:17 ` William Zhang
0 siblings, 0 replies; 15+ messages in thread
From: William Zhang @ 2022-06-01 20:17 UTC (permalink / raw)
To: Linux ARM List
Cc: dan.beygelman, philippe.reynes, joel.peshkin, anand.gore,
florian.fainelli, kursad.oney, tomer.yacoby, samyon.furman,
William Zhang, Broadcom internal kernel review list,
Krzysztof Kozlowski, Rob Herring, devicetree, linux-kernel
[-- Attachment #1: Type: text/plain, Size: 989 bytes --]
Add BCM4912 SoC device tree description to bcmbca binding document.
Signed-off-by: William Zhang <william.zhang@broadcom.com>
---
(no changes since v2)
Changes in v2:
- Simplify dt-bindings patch subject line
Documentation/devicetree/bindings/arm/bcm/brcm,bcmbca.yaml | 7 +++++++
1 file changed, 7 insertions(+)
diff --git a/Documentation/devicetree/bindings/arm/bcm/brcm,bcmbca.yaml b/Documentation/devicetree/bindings/arm/bcm/brcm,bcmbca.yaml
index 4e3a1a5391f6..323f09b0f95d 100644
--- a/Documentation/devicetree/bindings/arm/bcm/brcm,bcmbca.yaml
+++ b/Documentation/devicetree/bindings/arm/bcm/brcm,bcmbca.yaml
@@ -28,6 +28,13 @@ properties:
- const: brcm,bcm47622
- const: brcm,bcmbca
+ - description: BCM4912 based boards
+ items:
+ - enum:
+ - brcm,bcm94912
+ - const: brcm,bcm4912
+ - const: brcm,bcmbca
+
- description: BCM63158 based boards
items:
- enum:
--
2.36.1
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^ permalink raw reply related [flat|nested] 15+ messages in thread* [PATCH v3 1/3] dt-bindings: arm64: add bcm4912 SoC
@ 2022-06-01 20:17 ` William Zhang
0 siblings, 0 replies; 15+ messages in thread
From: William Zhang @ 2022-06-01 20:17 UTC (permalink / raw)
To: Linux ARM List
Cc: dan.beygelman, philippe.reynes, joel.peshkin, anand.gore,
florian.fainelli, kursad.oney, tomer.yacoby, samyon.furman,
William Zhang, Broadcom internal kernel review list,
Krzysztof Kozlowski, Rob Herring, devicetree, linux-kernel
[-- Attachment #1: Type: text/plain, Size: 989 bytes --]
Add BCM4912 SoC device tree description to bcmbca binding document.
Signed-off-by: William Zhang <william.zhang@broadcom.com>
---
(no changes since v2)
Changes in v2:
- Simplify dt-bindings patch subject line
Documentation/devicetree/bindings/arm/bcm/brcm,bcmbca.yaml | 7 +++++++
1 file changed, 7 insertions(+)
diff --git a/Documentation/devicetree/bindings/arm/bcm/brcm,bcmbca.yaml b/Documentation/devicetree/bindings/arm/bcm/brcm,bcmbca.yaml
index 4e3a1a5391f6..323f09b0f95d 100644
--- a/Documentation/devicetree/bindings/arm/bcm/brcm,bcmbca.yaml
+++ b/Documentation/devicetree/bindings/arm/bcm/brcm,bcmbca.yaml
@@ -28,6 +28,13 @@ properties:
- const: brcm,bcm47622
- const: brcm,bcmbca
+ - description: BCM4912 based boards
+ items:
+ - enum:
+ - brcm,bcm94912
+ - const: brcm,bcm4912
+ - const: brcm,bcmbca
+
- description: BCM63158 based boards
items:
- enum:
--
2.36.1
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^ permalink raw reply related [flat|nested] 15+ messages in thread* Re: [PATCH v3 1/3] dt-bindings: arm64: add bcm4912 SoC
2022-06-01 20:17 ` William Zhang
@ 2022-06-02 11:52 ` Krzysztof Kozlowski
-1 siblings, 0 replies; 15+ messages in thread
From: Krzysztof Kozlowski @ 2022-06-02 11:52 UTC (permalink / raw)
To: William Zhang, Linux ARM List
Cc: dan.beygelman, philippe.reynes, joel.peshkin, anand.gore,
florian.fainelli, kursad.oney, tomer.yacoby, samyon.furman,
Broadcom internal kernel review list, Krzysztof Kozlowski,
Rob Herring, devicetree, linux-kernel
On 01/06/2022 22:17, William Zhang wrote:
> Add BCM4912 SoC device tree description to bcmbca binding document.
>
> Signed-off-by: William Zhang <william.zhang@broadcom.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Best regards,
Krzysztof
^ permalink raw reply [flat|nested] 15+ messages in thread
* Re: [PATCH v3 1/3] dt-bindings: arm64: add bcm4912 SoC
@ 2022-06-02 11:52 ` Krzysztof Kozlowski
0 siblings, 0 replies; 15+ messages in thread
From: Krzysztof Kozlowski @ 2022-06-02 11:52 UTC (permalink / raw)
To: William Zhang, Linux ARM List
Cc: dan.beygelman, philippe.reynes, joel.peshkin, anand.gore,
florian.fainelli, kursad.oney, tomer.yacoby, samyon.furman,
Broadcom internal kernel review list, Krzysztof Kozlowski,
Rob Herring, devicetree, linux-kernel
On 01/06/2022 22:17, William Zhang wrote:
> Add BCM4912 SoC device tree description to bcmbca binding document.
>
> Signed-off-by: William Zhang <william.zhang@broadcom.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Best regards,
Krzysztof
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 15+ messages in thread
* [PATCH v3 2/3] arm64: dts: add dts files for bcmbca SoC bcm4912
2022-06-01 20:17 ` William Zhang
(?)
@ 2022-06-01 20:17 ` William Zhang
-1 siblings, 0 replies; 15+ messages in thread
From: William Zhang @ 2022-06-01 20:17 UTC (permalink / raw)
To: Linux ARM List
Cc: dan.beygelman, philippe.reynes, joel.peshkin, anand.gore,
florian.fainelli, kursad.oney, tomer.yacoby, samyon.furman,
William Zhang, Krzysztof Kozlowski,
Broadcom internal kernel review list, Krzysztof Kozlowski,
Rob Herring, devicetree, linux-kernel
[-- Attachment #1.1: Type: text/plain, Size: 5304 bytes --]
Add dts for ARMv8 based broadband SoC BCM4912. bcm4912.dtsi is the
SoC description dts header and bcm94912.dts is a simple dts file for
Broadcom BCM94912 Reference board that only enable the UART port.
Signed-off-by: William Zhang <william.zhang@broadcom.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
---
Changes in v3:
- Change internal bus address and size cells from 2 to 1
Changes in v2:
- Fix pmu compatible string
- Remove unnecessary cpu_on and cpu_off properties from psci node
- Add the missing gic registers and interrupts property to gic node
arch/arm64/boot/dts/broadcom/bcmbca/Makefile | 3 +-
.../boot/dts/broadcom/bcmbca/bcm4912.dtsi | 128 ++++++++++++++++++
.../boot/dts/broadcom/bcmbca/bcm94912.dts | 30 ++++
3 files changed, 160 insertions(+), 1 deletion(-)
create mode 100644 arch/arm64/boot/dts/broadcom/bcmbca/bcm4912.dtsi
create mode 100644 arch/arm64/boot/dts/broadcom/bcmbca/bcm94912.dts
diff --git a/arch/arm64/boot/dts/broadcom/bcmbca/Makefile b/arch/arm64/boot/dts/broadcom/bcmbca/Makefile
index d5f89245336c..9bdab7778cbd 100644
--- a/arch/arm64/boot/dts/broadcom/bcmbca/Makefile
+++ b/arch/arm64/boot/dts/broadcom/bcmbca/Makefile
@@ -1,2 +1,3 @@
# SPDX-License-Identifier: GPL-2.0
-dtb-$(CONFIG_ARCH_BCMBCA) += bcm963158.dtb
+dtb-$(CONFIG_ARCH_BCMBCA) += bcm963158.dtb \
+ bcm94912.dtb
diff --git a/arch/arm64/boot/dts/broadcom/bcmbca/bcm4912.dtsi b/arch/arm64/boot/dts/broadcom/bcmbca/bcm4912.dtsi
new file mode 100644
index 000000000000..3d016c2ce675
--- /dev/null
+++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm4912.dtsi
@@ -0,0 +1,128 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright 2022 Broadcom Ltd.
+ */
+
+#include <dt-bindings/interrupt-controller/irq.h>
+#include <dt-bindings/interrupt-controller/arm-gic.h>
+
+/ {
+ compatible = "brcm,bcm4912", "brcm,bcmbca";
+ #address-cells = <2>;
+ #size-cells = <2>;
+
+ interrupt-parent = <&gic>;
+
+ cpus {
+ #address-cells = <2>;
+ #size-cells = <0>;
+
+ B53_0: cpu@0 {
+ compatible = "brcm,brahma-b53";
+ device_type = "cpu";
+ reg = <0x0 0x0>;
+ next-level-cache = <&L2_0>;
+ enable-method = "psci";
+ };
+
+ B53_1: cpu@1 {
+ compatible = "brcm,brahma-b53";
+ device_type = "cpu";
+ reg = <0x0 0x1>;
+ next-level-cache = <&L2_0>;
+ enable-method = "psci";
+ };
+
+ B53_2: cpu@2 {
+ compatible = "brcm,brahma-b53";
+ device_type = "cpu";
+ reg = <0x0 0x2>;
+ next-level-cache = <&L2_0>;
+ enable-method = "psci";
+ };
+
+ B53_3: cpu@3 {
+ compatible = "brcm,brahma-b53";
+ device_type = "cpu";
+ reg = <0x0 0x3>;
+ next-level-cache = <&L2_0>;
+ enable-method = "psci";
+ };
+
+ L2_0: l2-cache0 {
+ compatible = "cache";
+ };
+ };
+
+ timer {
+ compatible = "arm,armv8-timer";
+ interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
+ <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
+ <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
+ <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
+ };
+
+ pmu: pmu {
+ compatible = "arm,cortex-a53-pmu";
+ interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-affinity = <&B53_0>, <&B53_1>,
+ <&B53_2>, <&B53_3>;
+ };
+
+ clocks: clocks {
+ periph_clk: periph-clk {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <200000000>;
+ };
+ uart_clk: uart-clk {
+ compatible = "fixed-factor-clock";
+ #clock-cells = <0>;
+ clocks = <&periph_clk>;
+ clock-div = <4>;
+ clock-mult = <1>;
+ };
+ };
+
+ psci {
+ compatible = "arm,psci-0.2";
+ method = "smc";
+ };
+
+ axi@81000000 {
+ compatible = "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x0 0x0 0x81000000 0x8000>;
+
+ gic: interrupt-controller@1000 {
+ compatible = "arm,gic-400";
+ #interrupt-cells = <3>;
+ interrupt-controller;
+ interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
+ reg = <0x1000 0x1000>,
+ <0x2000 0x2000>,
+ <0x4000 0x2000>,
+ <0x6000 0x2000>;
+ };
+ };
+
+ bus@ff800000 {
+ compatible = "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x0 0x0 0xff800000 0x800000>;
+
+ uart0: serial@12000 {
+ compatible = "arm,pl011", "arm,primecell";
+ reg = <0x12000 0x1000>;
+ interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&uart_clk>, <&uart_clk>;
+ clock-names = "uartclk", "apb_pclk";
+ status = "disabled";
+ };
+ };
+};
diff --git a/arch/arm64/boot/dts/broadcom/bcmbca/bcm94912.dts b/arch/arm64/boot/dts/broadcom/bcmbca/bcm94912.dts
new file mode 100644
index 000000000000..a3623e6f6919
--- /dev/null
+++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm94912.dts
@@ -0,0 +1,30 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright 2022 Broadcom Ltd.
+ */
+
+/dts-v1/;
+
+#include "bcm4912.dtsi"
+
+/ {
+ model = "Broadcom BCM94912 Reference Board";
+ compatible = "brcm,bcm94912", "brcm,bcm4912", "brcm,bcmbca";
+
+ aliases {
+ serial0 = &uart0;
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+
+ memory@0 {
+ device_type = "memory";
+ reg = <0x0 0x0 0x0 0x08000000>;
+ };
+};
+
+&uart0 {
+ status = "okay";
+};
--
2.36.1
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_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 15+ messages in thread* [PATCH v3 2/3] arm64: dts: add dts files for bcmbca SoC bcm4912
@ 2022-06-01 20:17 ` William Zhang
0 siblings, 0 replies; 15+ messages in thread
From: William Zhang @ 2022-06-01 20:17 UTC (permalink / raw)
To: Linux ARM List
Cc: dan.beygelman, philippe.reynes, joel.peshkin, anand.gore,
florian.fainelli, kursad.oney, tomer.yacoby, samyon.furman,
William Zhang, Krzysztof Kozlowski,
Broadcom internal kernel review list, Krzysztof Kozlowski,
Rob Herring, devicetree, linux-kernel
[-- Attachment #1: Type: text/plain, Size: 5304 bytes --]
Add dts for ARMv8 based broadband SoC BCM4912. bcm4912.dtsi is the
SoC description dts header and bcm94912.dts is a simple dts file for
Broadcom BCM94912 Reference board that only enable the UART port.
Signed-off-by: William Zhang <william.zhang@broadcom.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
---
Changes in v3:
- Change internal bus address and size cells from 2 to 1
Changes in v2:
- Fix pmu compatible string
- Remove unnecessary cpu_on and cpu_off properties from psci node
- Add the missing gic registers and interrupts property to gic node
arch/arm64/boot/dts/broadcom/bcmbca/Makefile | 3 +-
.../boot/dts/broadcom/bcmbca/bcm4912.dtsi | 128 ++++++++++++++++++
.../boot/dts/broadcom/bcmbca/bcm94912.dts | 30 ++++
3 files changed, 160 insertions(+), 1 deletion(-)
create mode 100644 arch/arm64/boot/dts/broadcom/bcmbca/bcm4912.dtsi
create mode 100644 arch/arm64/boot/dts/broadcom/bcmbca/bcm94912.dts
diff --git a/arch/arm64/boot/dts/broadcom/bcmbca/Makefile b/arch/arm64/boot/dts/broadcom/bcmbca/Makefile
index d5f89245336c..9bdab7778cbd 100644
--- a/arch/arm64/boot/dts/broadcom/bcmbca/Makefile
+++ b/arch/arm64/boot/dts/broadcom/bcmbca/Makefile
@@ -1,2 +1,3 @@
# SPDX-License-Identifier: GPL-2.0
-dtb-$(CONFIG_ARCH_BCMBCA) += bcm963158.dtb
+dtb-$(CONFIG_ARCH_BCMBCA) += bcm963158.dtb \
+ bcm94912.dtb
diff --git a/arch/arm64/boot/dts/broadcom/bcmbca/bcm4912.dtsi b/arch/arm64/boot/dts/broadcom/bcmbca/bcm4912.dtsi
new file mode 100644
index 000000000000..3d016c2ce675
--- /dev/null
+++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm4912.dtsi
@@ -0,0 +1,128 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright 2022 Broadcom Ltd.
+ */
+
+#include <dt-bindings/interrupt-controller/irq.h>
+#include <dt-bindings/interrupt-controller/arm-gic.h>
+
+/ {
+ compatible = "brcm,bcm4912", "brcm,bcmbca";
+ #address-cells = <2>;
+ #size-cells = <2>;
+
+ interrupt-parent = <&gic>;
+
+ cpus {
+ #address-cells = <2>;
+ #size-cells = <0>;
+
+ B53_0: cpu@0 {
+ compatible = "brcm,brahma-b53";
+ device_type = "cpu";
+ reg = <0x0 0x0>;
+ next-level-cache = <&L2_0>;
+ enable-method = "psci";
+ };
+
+ B53_1: cpu@1 {
+ compatible = "brcm,brahma-b53";
+ device_type = "cpu";
+ reg = <0x0 0x1>;
+ next-level-cache = <&L2_0>;
+ enable-method = "psci";
+ };
+
+ B53_2: cpu@2 {
+ compatible = "brcm,brahma-b53";
+ device_type = "cpu";
+ reg = <0x0 0x2>;
+ next-level-cache = <&L2_0>;
+ enable-method = "psci";
+ };
+
+ B53_3: cpu@3 {
+ compatible = "brcm,brahma-b53";
+ device_type = "cpu";
+ reg = <0x0 0x3>;
+ next-level-cache = <&L2_0>;
+ enable-method = "psci";
+ };
+
+ L2_0: l2-cache0 {
+ compatible = "cache";
+ };
+ };
+
+ timer {
+ compatible = "arm,armv8-timer";
+ interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
+ <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
+ <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
+ <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
+ };
+
+ pmu: pmu {
+ compatible = "arm,cortex-a53-pmu";
+ interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-affinity = <&B53_0>, <&B53_1>,
+ <&B53_2>, <&B53_3>;
+ };
+
+ clocks: clocks {
+ periph_clk: periph-clk {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <200000000>;
+ };
+ uart_clk: uart-clk {
+ compatible = "fixed-factor-clock";
+ #clock-cells = <0>;
+ clocks = <&periph_clk>;
+ clock-div = <4>;
+ clock-mult = <1>;
+ };
+ };
+
+ psci {
+ compatible = "arm,psci-0.2";
+ method = "smc";
+ };
+
+ axi@81000000 {
+ compatible = "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x0 0x0 0x81000000 0x8000>;
+
+ gic: interrupt-controller@1000 {
+ compatible = "arm,gic-400";
+ #interrupt-cells = <3>;
+ interrupt-controller;
+ interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
+ reg = <0x1000 0x1000>,
+ <0x2000 0x2000>,
+ <0x4000 0x2000>,
+ <0x6000 0x2000>;
+ };
+ };
+
+ bus@ff800000 {
+ compatible = "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x0 0x0 0xff800000 0x800000>;
+
+ uart0: serial@12000 {
+ compatible = "arm,pl011", "arm,primecell";
+ reg = <0x12000 0x1000>;
+ interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&uart_clk>, <&uart_clk>;
+ clock-names = "uartclk", "apb_pclk";
+ status = "disabled";
+ };
+ };
+};
diff --git a/arch/arm64/boot/dts/broadcom/bcmbca/bcm94912.dts b/arch/arm64/boot/dts/broadcom/bcmbca/bcm94912.dts
new file mode 100644
index 000000000000..a3623e6f6919
--- /dev/null
+++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm94912.dts
@@ -0,0 +1,30 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright 2022 Broadcom Ltd.
+ */
+
+/dts-v1/;
+
+#include "bcm4912.dtsi"
+
+/ {
+ model = "Broadcom BCM94912 Reference Board";
+ compatible = "brcm,bcm94912", "brcm,bcm4912", "brcm,bcmbca";
+
+ aliases {
+ serial0 = &uart0;
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+
+ memory@0 {
+ device_type = "memory";
+ reg = <0x0 0x0 0x0 0x08000000>;
+ };
+};
+
+&uart0 {
+ status = "okay";
+};
--
2.36.1
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^ permalink raw reply related [flat|nested] 15+ messages in thread* [PATCH v3 2/3] arm64: dts: add dts files for bcmbca SoC bcm4912
@ 2022-06-01 20:17 ` William Zhang
0 siblings, 0 replies; 15+ messages in thread
From: William Zhang @ 2022-06-01 20:17 UTC (permalink / raw)
To: Linux ARM List
Cc: dan.beygelman, philippe.reynes, joel.peshkin, anand.gore,
florian.fainelli, kursad.oney, tomer.yacoby, samyon.furman,
William Zhang, Krzysztof Kozlowski,
Broadcom internal kernel review list, Krzysztof Kozlowski,
Rob Herring, devicetree, linux-kernel
[-- Attachment #1: Type: text/plain, Size: 5304 bytes --]
Add dts for ARMv8 based broadband SoC BCM4912. bcm4912.dtsi is the
SoC description dts header and bcm94912.dts is a simple dts file for
Broadcom BCM94912 Reference board that only enable the UART port.
Signed-off-by: William Zhang <william.zhang@broadcom.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
---
Changes in v3:
- Change internal bus address and size cells from 2 to 1
Changes in v2:
- Fix pmu compatible string
- Remove unnecessary cpu_on and cpu_off properties from psci node
- Add the missing gic registers and interrupts property to gic node
arch/arm64/boot/dts/broadcom/bcmbca/Makefile | 3 +-
.../boot/dts/broadcom/bcmbca/bcm4912.dtsi | 128 ++++++++++++++++++
.../boot/dts/broadcom/bcmbca/bcm94912.dts | 30 ++++
3 files changed, 160 insertions(+), 1 deletion(-)
create mode 100644 arch/arm64/boot/dts/broadcom/bcmbca/bcm4912.dtsi
create mode 100644 arch/arm64/boot/dts/broadcom/bcmbca/bcm94912.dts
diff --git a/arch/arm64/boot/dts/broadcom/bcmbca/Makefile b/arch/arm64/boot/dts/broadcom/bcmbca/Makefile
index d5f89245336c..9bdab7778cbd 100644
--- a/arch/arm64/boot/dts/broadcom/bcmbca/Makefile
+++ b/arch/arm64/boot/dts/broadcom/bcmbca/Makefile
@@ -1,2 +1,3 @@
# SPDX-License-Identifier: GPL-2.0
-dtb-$(CONFIG_ARCH_BCMBCA) += bcm963158.dtb
+dtb-$(CONFIG_ARCH_BCMBCA) += bcm963158.dtb \
+ bcm94912.dtb
diff --git a/arch/arm64/boot/dts/broadcom/bcmbca/bcm4912.dtsi b/arch/arm64/boot/dts/broadcom/bcmbca/bcm4912.dtsi
new file mode 100644
index 000000000000..3d016c2ce675
--- /dev/null
+++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm4912.dtsi
@@ -0,0 +1,128 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright 2022 Broadcom Ltd.
+ */
+
+#include <dt-bindings/interrupt-controller/irq.h>
+#include <dt-bindings/interrupt-controller/arm-gic.h>
+
+/ {
+ compatible = "brcm,bcm4912", "brcm,bcmbca";
+ #address-cells = <2>;
+ #size-cells = <2>;
+
+ interrupt-parent = <&gic>;
+
+ cpus {
+ #address-cells = <2>;
+ #size-cells = <0>;
+
+ B53_0: cpu@0 {
+ compatible = "brcm,brahma-b53";
+ device_type = "cpu";
+ reg = <0x0 0x0>;
+ next-level-cache = <&L2_0>;
+ enable-method = "psci";
+ };
+
+ B53_1: cpu@1 {
+ compatible = "brcm,brahma-b53";
+ device_type = "cpu";
+ reg = <0x0 0x1>;
+ next-level-cache = <&L2_0>;
+ enable-method = "psci";
+ };
+
+ B53_2: cpu@2 {
+ compatible = "brcm,brahma-b53";
+ device_type = "cpu";
+ reg = <0x0 0x2>;
+ next-level-cache = <&L2_0>;
+ enable-method = "psci";
+ };
+
+ B53_3: cpu@3 {
+ compatible = "brcm,brahma-b53";
+ device_type = "cpu";
+ reg = <0x0 0x3>;
+ next-level-cache = <&L2_0>;
+ enable-method = "psci";
+ };
+
+ L2_0: l2-cache0 {
+ compatible = "cache";
+ };
+ };
+
+ timer {
+ compatible = "arm,armv8-timer";
+ interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
+ <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
+ <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
+ <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
+ };
+
+ pmu: pmu {
+ compatible = "arm,cortex-a53-pmu";
+ interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-affinity = <&B53_0>, <&B53_1>,
+ <&B53_2>, <&B53_3>;
+ };
+
+ clocks: clocks {
+ periph_clk: periph-clk {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <200000000>;
+ };
+ uart_clk: uart-clk {
+ compatible = "fixed-factor-clock";
+ #clock-cells = <0>;
+ clocks = <&periph_clk>;
+ clock-div = <4>;
+ clock-mult = <1>;
+ };
+ };
+
+ psci {
+ compatible = "arm,psci-0.2";
+ method = "smc";
+ };
+
+ axi@81000000 {
+ compatible = "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x0 0x0 0x81000000 0x8000>;
+
+ gic: interrupt-controller@1000 {
+ compatible = "arm,gic-400";
+ #interrupt-cells = <3>;
+ interrupt-controller;
+ interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
+ reg = <0x1000 0x1000>,
+ <0x2000 0x2000>,
+ <0x4000 0x2000>,
+ <0x6000 0x2000>;
+ };
+ };
+
+ bus@ff800000 {
+ compatible = "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x0 0x0 0xff800000 0x800000>;
+
+ uart0: serial@12000 {
+ compatible = "arm,pl011", "arm,primecell";
+ reg = <0x12000 0x1000>;
+ interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&uart_clk>, <&uart_clk>;
+ clock-names = "uartclk", "apb_pclk";
+ status = "disabled";
+ };
+ };
+};
diff --git a/arch/arm64/boot/dts/broadcom/bcmbca/bcm94912.dts b/arch/arm64/boot/dts/broadcom/bcmbca/bcm94912.dts
new file mode 100644
index 000000000000..a3623e6f6919
--- /dev/null
+++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm94912.dts
@@ -0,0 +1,30 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright 2022 Broadcom Ltd.
+ */
+
+/dts-v1/;
+
+#include "bcm4912.dtsi"
+
+/ {
+ model = "Broadcom BCM94912 Reference Board";
+ compatible = "brcm,bcm94912", "brcm,bcm4912", "brcm,bcmbca";
+
+ aliases {
+ serial0 = &uart0;
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+
+ memory@0 {
+ device_type = "memory";
+ reg = <0x0 0x0 0x0 0x08000000>;
+ };
+};
+
+&uart0 {
+ status = "okay";
+};
--
2.36.1
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^ permalink raw reply related [flat|nested] 15+ messages in thread
* [PATCH v3 3/3] MAINTAINERS: add bcm4912 to bcmbca arch entry
2022-06-01 20:17 ` William Zhang
@ 2022-06-01 20:17 ` William Zhang
-1 siblings, 0 replies; 15+ messages in thread
From: William Zhang @ 2022-06-01 20:17 UTC (permalink / raw)
To: Linux ARM List
Cc: dan.beygelman, philippe.reynes, joel.peshkin, anand.gore,
florian.fainelli, kursad.oney, tomer.yacoby, samyon.furman,
William Zhang, linux-kernel
[-- Attachment #1.1: Type: text/plain, Size: 535 bytes --]
Add bcm4912 related files to BCMBCA ARCH maintainer list entry
Signed-off-by: William Zhang <william.zhang@broadcom.com>
---
(no changes since v1)
MAINTAINERS | 1 +
1 file changed, 1 insertion(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index 164d1f3bedf8..f68258a590ff 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -3779,6 +3779,7 @@ F: arch/arm/boot/dts/bcm947622.dts
F: arch/arm64/boot/dts/broadcom/bcmbca/*
N: bcmbca
N: bcm[9]?47622
+N: bcm[9]?4912
N: bcm[9]?63158
BROADCOM BCM2711/BCM2835 ARM ARCHITECTURE
--
2.36.1
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_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 15+ messages in thread
* [PATCH v3 3/3] MAINTAINERS: add bcm4912 to bcmbca arch entry
@ 2022-06-01 20:17 ` William Zhang
0 siblings, 0 replies; 15+ messages in thread
From: William Zhang @ 2022-06-01 20:17 UTC (permalink / raw)
To: Linux ARM List
Cc: dan.beygelman, philippe.reynes, joel.peshkin, anand.gore,
florian.fainelli, kursad.oney, tomer.yacoby, samyon.furman,
William Zhang, linux-kernel
[-- Attachment #1: Type: text/plain, Size: 535 bytes --]
Add bcm4912 related files to BCMBCA ARCH maintainer list entry
Signed-off-by: William Zhang <william.zhang@broadcom.com>
---
(no changes since v1)
MAINTAINERS | 1 +
1 file changed, 1 insertion(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index 164d1f3bedf8..f68258a590ff 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -3779,6 +3779,7 @@ F: arch/arm/boot/dts/bcm947622.dts
F: arch/arm64/boot/dts/broadcom/bcmbca/*
N: bcmbca
N: bcm[9]?47622
+N: bcm[9]?4912
N: bcm[9]?63158
BROADCOM BCM2711/BCM2835 ARM ARCHITECTURE
--
2.36.1
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^ permalink raw reply related [flat|nested] 15+ messages in thread
* Re: [PATCH v3 0/3] arm64: bcmbca: add bcm4912 SoC support
2022-06-01 20:17 ` William Zhang
@ 2022-06-08 8:36 ` Florian Fainelli
-1 siblings, 0 replies; 15+ messages in thread
From: Florian Fainelli @ 2022-06-08 8:36 UTC (permalink / raw)
To: William Zhang, Linux ARM List
Cc: dan.beygelman, philippe.reynes, joel.peshkin, anand.gore,
kursad.oney, tomer.yacoby, samyon.furman,
Broadcom internal kernel review list, Krzysztof Kozlowski,
Rob Herring, devicetree, linux-kernel
On 6/1/2022 10:17 PM, William Zhang wrote:
> This change adds the basic support for Broadcom's ARMv8 based
> Broadband SoC BCM4912. The initial support includes a bare-bone dts
> for quad core Broadcom B53 with a Broadcom uart.
Series applied, thanks William!
--
Florian
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 15+ messages in thread
* Re: [PATCH v3 0/3] arm64: bcmbca: add bcm4912 SoC support
@ 2022-06-08 8:36 ` Florian Fainelli
0 siblings, 0 replies; 15+ messages in thread
From: Florian Fainelli @ 2022-06-08 8:36 UTC (permalink / raw)
To: William Zhang, Linux ARM List
Cc: dan.beygelman, philippe.reynes, joel.peshkin, anand.gore,
kursad.oney, tomer.yacoby, samyon.furman,
Broadcom internal kernel review list, Krzysztof Kozlowski,
Rob Herring, devicetree, linux-kernel
On 6/1/2022 10:17 PM, William Zhang wrote:
> This change adds the basic support for Broadcom's ARMv8 based
> Broadband SoC BCM4912. The initial support includes a bare-bone dts
> for quad core Broadcom B53 with a Broadcom uart.
Series applied, thanks William!
--
Florian
^ permalink raw reply [flat|nested] 15+ messages in thread