* [Intel-gfx] [PATCH 0/2] drm/i915/guc: Add GuC-Error-Capture-Init coverage of new engine types
@ 2022-10-15 3:59 Alan Previn
2022-10-15 3:59 ` [Intel-gfx] [PATCH 1/2] drm/i915/guc: Add error-capture init warnings when needed Alan Previn
` (3 more replies)
0 siblings, 4 replies; 16+ messages in thread
From: Alan Previn @ 2022-10-15 3:59 UTC (permalink / raw)
To: intel-gfx
After initial upstream merge of GuC error-capture feature, we eventually
decided to remove a lot of unnecessary warning messages when we couldn't
retrieve register lists for ADS-error-state-capture initialization. It was
a justified decision because the majority of that noise was being repeated
three times per GT reset and included list-types that are not supported
upstream. However after that change, we are not able to catch cases of
missing register lists for new engines that hadn't been added.
This series introduces new selective checks and warnings (such as skipping
if its a VF or if its an empty register list). This series also adds register
list for compute engine which is merely a duplicate of render class list.
Alan Previn (2):
drm/i915/guc: Add error-capture init warnings when needed
drm/i915/guc: Add compute reglist for guc err capture
.../gpu/drm/i915/gt/uc/intel_guc_capture.c | 59 ++++++++++++++++++-
1 file changed, 57 insertions(+), 2 deletions(-)
base-commit: 5996bd8b9a613edd4ea145b95001cf0d6229e97e
--
2.34.1
^ permalink raw reply [flat|nested] 16+ messages in thread
* [Intel-gfx] [PATCH 1/2] drm/i915/guc: Add error-capture init warnings when needed
2022-10-15 3:59 [Intel-gfx] [PATCH 0/2] drm/i915/guc: Add GuC-Error-Capture-Init coverage of new engine types Alan Previn
@ 2022-10-15 3:59 ` Alan Previn
2022-10-17 8:42 ` Tvrtko Ursulin
2022-10-17 19:33 ` John Harrison
2022-10-15 3:59 ` [Intel-gfx] [PATCH 2/2] drm/i915/guc: Add compute reglist for GuC error capture Alan Previn
` (2 subsequent siblings)
3 siblings, 2 replies; 16+ messages in thread
From: Alan Previn @ 2022-10-15 3:59 UTC (permalink / raw)
To: intel-gfx
If GuC is being used and we initialized GuC-error-capture,
we need to be warning if we don't provide an error-capture
register list in the firmware ADS, for valid GT engines.
A warning makes sense as this would impact debugability
without realizing why a reglist wasn't retrieved and reported
by GuC.
However, depending on the platform, we might have certain
engines that have a register list for engine instance error state
but not for engine class. Thus, add a check only to warn if the
register list was non existent vs an empty list (use the
empty lists to skip the warning).
Signed-off-by: Alan Previn <alan.previn.teres.alexis@intel.com>
---
.../gpu/drm/i915/gt/uc/intel_guc_capture.c | 55 ++++++++++++++++++-
1 file changed, 53 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_capture.c b/drivers/gpu/drm/i915/gt/uc/intel_guc_capture.c
index 8f1165146013..290c1e1343dd 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc_capture.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_capture.c
@@ -419,6 +419,44 @@ guc_capture_get_device_reglist(struct intel_guc *guc)
return default_lists;
}
+static const char *
+__stringify_type(u32 type)
+{
+ switch (type) {
+ case GUC_CAPTURE_LIST_TYPE_GLOBAL:
+ return "Global";
+ case GUC_CAPTURE_LIST_TYPE_ENGINE_CLASS:
+ return "Class";
+ case GUC_CAPTURE_LIST_TYPE_ENGINE_INSTANCE:
+ return "Instance";
+ default:
+ return "unknown";
+ }
+
+ return "";
+}
+
+static const char *
+__stringify_engclass(u32 class)
+{
+ switch (class) {
+ case GUC_RENDER_CLASS:
+ return "Render";
+ case GUC_VIDEO_CLASS:
+ return "Video";
+ case GUC_VIDEOENHANCE_CLASS:
+ return "VideoEnhance";
+ case GUC_BLITTER_CLASS:
+ return "Blitter";
+ case GUC_COMPUTE_CLASS:
+ return "Compute";
+ default:
+ return "unknown";
+ }
+
+ return "";
+}
+
static int
guc_capture_list_init(struct intel_guc *guc, u32 owner, u32 type, u32 classid,
struct guc_mmio_reg *ptr, u16 num_entries)
@@ -487,19 +525,32 @@ intel_guc_capture_getlistsize(struct intel_guc *guc, u32 owner, u32 type, u32 cl
size_t *size)
{
struct intel_guc_state_capture *gc = guc->capture;
+ struct drm_i915_private *i915 = guc_to_gt(guc)->i915;
struct __guc_capture_ads_cache *cache = &gc->ads_cache[owner][type][classid];
int num_regs;
- if (!gc->reglists)
+ if (!gc->reglists) {
+ drm_warn(&i915->drm, "GuC-capture: No reglist on this device\n");
return -ENODEV;
+ }
if (cache->is_valid) {
*size = cache->size;
return cache->status;
}
+ if (!guc_capture_get_one_list(gc->reglists, owner, type, classid)) {
+ if (owner == GUC_CAPTURE_LIST_INDEX_PF && type == GUC_CAPTURE_LIST_TYPE_GLOBAL)
+ drm_warn(&i915->drm, "GuC-capture: missing reglist type-Global\n");
+ if (owner == GUC_CAPTURE_LIST_INDEX_PF)
+ drm_warn(&i915->drm, "GuC-capture: missing regiist type(%d)-%s : "
+ "%s(%d)-Engine\n", type, __stringify_type(type),
+ __stringify_engclass(classid), classid);
+ return -ENODATA;
+ }
+
num_regs = guc_cap_list_num_regs(gc, owner, type, classid);
- if (!num_regs)
+ if (!num_regs) /* intentional empty lists can exist depending on hw config */
return -ENODATA;
*size = PAGE_ALIGN((sizeof(struct guc_debug_capture_list)) +
--
2.34.1
^ permalink raw reply related [flat|nested] 16+ messages in thread
* [Intel-gfx] [PATCH 2/2] drm/i915/guc: Add compute reglist for GuC error capture
2022-10-15 3:59 [Intel-gfx] [PATCH 0/2] drm/i915/guc: Add GuC-Error-Capture-Init coverage of new engine types Alan Previn
2022-10-15 3:59 ` [Intel-gfx] [PATCH 1/2] drm/i915/guc: Add error-capture init warnings when needed Alan Previn
@ 2022-10-15 3:59 ` Alan Previn
2022-10-17 8:43 ` Tvrtko Ursulin
2022-10-15 4:41 ` [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/guc: Add GuC-Error-Capture-Init coverage of new engine types Patchwork
2022-10-15 6:24 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
3 siblings, 1 reply; 16+ messages in thread
From: Alan Previn @ 2022-10-15 3:59 UTC (permalink / raw)
To: intel-gfx
Add compute reglist for GuC error capture.
Signed-off-by: Alan Previn <alan.previn.teres.alexis@intel.com>
---
drivers/gpu/drm/i915/gt/uc/intel_guc_capture.c | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_capture.c b/drivers/gpu/drm/i915/gt/uc/intel_guc_capture.c
index 290c1e1343dd..da3a09c11d12 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc_capture.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_capture.c
@@ -169,6 +169,8 @@ static struct __guc_mmio_reg_descr_group default_lists[] = {
MAKE_REGLIST(default_global_regs, PF, GLOBAL, 0),
MAKE_REGLIST(default_rc_class_regs, PF, ENGINE_CLASS, GUC_RENDER_CLASS),
MAKE_REGLIST(xe_lpd_rc_inst_regs, PF, ENGINE_INSTANCE, GUC_RENDER_CLASS),
+ MAKE_REGLIST(default_rc_class_regs, PF, ENGINE_CLASS, GUC_COMPUTE_CLASS),
+ MAKE_REGLIST(xe_lpd_rc_inst_regs, PF, ENGINE_INSTANCE, GUC_COMPUTE_CLASS),
MAKE_REGLIST(empty_regs_list, PF, ENGINE_CLASS, GUC_VIDEO_CLASS),
MAKE_REGLIST(xe_lpd_vd_inst_regs, PF, ENGINE_INSTANCE, GUC_VIDEO_CLASS),
MAKE_REGLIST(empty_regs_list, PF, ENGINE_CLASS, GUC_VIDEOENHANCE_CLASS),
@@ -182,6 +184,8 @@ static const struct __guc_mmio_reg_descr_group xe_lpd_lists[] = {
MAKE_REGLIST(xe_lpd_global_regs, PF, GLOBAL, 0),
MAKE_REGLIST(xe_lpd_rc_class_regs, PF, ENGINE_CLASS, GUC_RENDER_CLASS),
MAKE_REGLIST(xe_lpd_rc_inst_regs, PF, ENGINE_INSTANCE, GUC_RENDER_CLASS),
+ MAKE_REGLIST(xe_lpd_rc_class_regs, PF, ENGINE_CLASS, GUC_COMPUTE_CLASS),
+ MAKE_REGLIST(xe_lpd_rc_inst_regs, PF, ENGINE_INSTANCE, GUC_COMPUTE_CLASS),
MAKE_REGLIST(empty_regs_list, PF, ENGINE_CLASS, GUC_VIDEO_CLASS),
MAKE_REGLIST(xe_lpd_vd_inst_regs, PF, ENGINE_INSTANCE, GUC_VIDEO_CLASS),
MAKE_REGLIST(xe_lpd_vec_class_regs, PF, ENGINE_CLASS, GUC_VIDEOENHANCE_CLASS),
--
2.34.1
^ permalink raw reply related [flat|nested] 16+ messages in thread
* [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/guc: Add GuC-Error-Capture-Init coverage of new engine types
2022-10-15 3:59 [Intel-gfx] [PATCH 0/2] drm/i915/guc: Add GuC-Error-Capture-Init coverage of new engine types Alan Previn
2022-10-15 3:59 ` [Intel-gfx] [PATCH 1/2] drm/i915/guc: Add error-capture init warnings when needed Alan Previn
2022-10-15 3:59 ` [Intel-gfx] [PATCH 2/2] drm/i915/guc: Add compute reglist for GuC error capture Alan Previn
@ 2022-10-15 4:41 ` Patchwork
2022-10-15 6:24 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
3 siblings, 0 replies; 16+ messages in thread
From: Patchwork @ 2022-10-15 4:41 UTC (permalink / raw)
To: Alan Previn; +Cc: intel-gfx
[-- Attachment #1: Type: text/plain, Size: 9412 bytes --]
== Series Details ==
Series: drm/i915/guc: Add GuC-Error-Capture-Init coverage of new engine types
URL : https://patchwork.freedesktop.org/series/109737/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_12242 -> Patchwork_109737v1
====================================================
Summary
-------
**SUCCESS**
No regressions found.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109737v1/index.html
Participating hosts (45 -> 43)
------------------------------
Additional (2): bat-atsm-1 fi-pnv-d510
Missing (4): fi-ilk-m540 fi-kbl-x1275 bat-jsl-1 fi-hsw-4200u
Possible new issues
-------------------
Here are the unknown changes that may have been introduced in Patchwork_109737v1:
### IGT changes ###
#### Suppressed ####
The following results come from untrusted machines, tests, or statuses.
They do not affect the overall result.
* igt@i915_module_load@load:
- {bat-atsm-1}: NOTRUN -> [DMESG-WARN][1]
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109737v1/bat-atsm-1/igt@i915_module_load@load.html
* igt@i915_pm_rpm@module-reload:
- {fi-tgl-mst}: [DMESG-WARN][2] ([i915#5537]) -> [DMESG-WARN][3]
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12242/fi-tgl-mst/igt@i915_pm_rpm@module-reload.html
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109737v1/fi-tgl-mst/igt@i915_pm_rpm@module-reload.html
* igt@i915_selftest@live@client:
- {bat-dg2-8}: [PASS][4] -> [DMESG-WARN][5] +39 similar issues
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12242/bat-dg2-8/igt@i915_selftest@live@client.html
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109737v1/bat-dg2-8/igt@i915_selftest@live@client.html
* igt@i915_selftest@live@coherency:
- {bat-dg2-9}: [PASS][6] -> [DMESG-WARN][7] +41 similar issues
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12242/bat-dg2-9/igt@i915_selftest@live@coherency.html
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109737v1/bat-dg2-9/igt@i915_selftest@live@coherency.html
* igt@i915_selftest@live@perf:
- {bat-dg2-11}: [PASS][8] -> [DMESG-WARN][9] +41 similar issues
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12242/bat-dg2-11/igt@i915_selftest@live@perf.html
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109737v1/bat-dg2-11/igt@i915_selftest@live@perf.html
Known issues
------------
Here are the changes found in Patchwork_109737v1 that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@i915_selftest@live@gt_heartbeat:
- fi-apl-guc: [PASS][10] -> [DMESG-FAIL][11] ([i915#5334])
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12242/fi-apl-guc/igt@i915_selftest@live@gt_heartbeat.html
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109737v1/fi-apl-guc/igt@i915_selftest@live@gt_heartbeat.html
* igt@i915_suspend@basic-s3-without-i915:
- fi-bdw-5557u: [PASS][12] -> [INCOMPLETE][13] ([i915#146] / [i915#6712])
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12242/fi-bdw-5557u/igt@i915_suspend@basic-s3-without-i915.html
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109737v1/fi-bdw-5557u/igt@i915_suspend@basic-s3-without-i915.html
* igt@kms_cursor_legacy@basic-busy-flip-before-cursor@atomic-transitions-varying-size:
- fi-bsw-kefka: [PASS][14] -> [FAIL][15] ([i915#6298])
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12242/fi-bsw-kefka/igt@kms_cursor_legacy@basic-busy-flip-before-cursor@atomic-transitions-varying-size.html
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109737v1/fi-bsw-kefka/igt@kms_cursor_legacy@basic-busy-flip-before-cursor@atomic-transitions-varying-size.html
* igt@kms_psr@primary_page_flip:
- fi-pnv-d510: NOTRUN -> [SKIP][16] ([fdo#109271]) +43 similar issues
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109737v1/fi-pnv-d510/igt@kms_psr@primary_page_flip.html
#### Possible fixes ####
* igt@gem_exec_suspend@basic-s0@lmem0:
- {bat-dg2-11}: [DMESG-WARN][17] ([i915#6816]) -> [PASS][18] +1 similar issue
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12242/bat-dg2-11/igt@gem_exec_suspend@basic-s0@lmem0.html
[18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109737v1/bat-dg2-11/igt@gem_exec_suspend@basic-s0@lmem0.html
* igt@i915_module_load@reload:
- {bat-rpls-2}: [DMESG-WARN][19] ([i915#5537]) -> [PASS][20]
[19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12242/bat-rpls-2/igt@i915_module_load@reload.html
[20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109737v1/bat-rpls-2/igt@i915_module_load@reload.html
* igt@i915_pm_rpm@basic-rte:
- {bat-rplp-1}: [DMESG-WARN][21] ([i915#7077]) -> [PASS][22]
[21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12242/bat-rplp-1/igt@i915_pm_rpm@basic-rte.html
[22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109737v1/bat-rplp-1/igt@i915_pm_rpm@basic-rte.html
* igt@i915_selftest@live@reset:
- {bat-rpls-1}: [DMESG-FAIL][23] ([i915#4983]) -> [PASS][24]
[23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12242/bat-rpls-1/igt@i915_selftest@live@reset.html
[24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109737v1/bat-rpls-1/igt@i915_selftest@live@reset.html
- {bat-rpls-2}: [DMESG-FAIL][25] ([i915#4983]) -> [PASS][26]
[25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12242/bat-rpls-2/igt@i915_selftest@live@reset.html
[26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109737v1/bat-rpls-2/igt@i915_selftest@live@reset.html
* igt@kms_cursor_legacy@basic-busy-flip-before-cursor@atomic-transitions:
- fi-bsw-kefka: [FAIL][27] ([i915#6298]) -> [PASS][28]
[27]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12242/fi-bsw-kefka/igt@kms_cursor_legacy@basic-busy-flip-before-cursor@atomic-transitions.html
[28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109737v1/fi-bsw-kefka/igt@kms_cursor_legacy@basic-busy-flip-before-cursor@atomic-transitions.html
* igt@kms_pipe_crc_basic@suspend-read-crc@pipe-d-dp-3:
- {bat-dg2-11}: [FAIL][29] ([i915#6818]) -> [PASS][30]
[29]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12242/bat-dg2-11/igt@kms_pipe_crc_basic@suspend-read-crc@pipe-d-dp-3.html
[30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109737v1/bat-dg2-11/igt@kms_pipe_crc_basic@suspend-read-crc@pipe-d-dp-3.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[fdo#111827]: https://bugs.freedesktop.org/show_bug.cgi?id=111827
[i915#146]: https://gitlab.freedesktop.org/drm/intel/issues/146
[i915#1845]: https://gitlab.freedesktop.org/drm/intel/issues/1845
[i915#2582]: https://gitlab.freedesktop.org/drm/intel/issues/2582
[i915#2867]: https://gitlab.freedesktop.org/drm/intel/issues/2867
[i915#3708]: https://gitlab.freedesktop.org/drm/intel/issues/3708
[i915#3987]: https://gitlab.freedesktop.org/drm/intel/issues/3987
[i915#4077]: https://gitlab.freedesktop.org/drm/intel/issues/4077
[i915#4079]: https://gitlab.freedesktop.org/drm/intel/issues/4079
[i915#4083]: https://gitlab.freedesktop.org/drm/intel/issues/4083
[i915#4312]: https://gitlab.freedesktop.org/drm/intel/issues/4312
[i915#4613]: https://gitlab.freedesktop.org/drm/intel/issues/4613
[i915#4983]: https://gitlab.freedesktop.org/drm/intel/issues/4983
[i915#5334]: https://gitlab.freedesktop.org/drm/intel/issues/5334
[i915#5354]: https://gitlab.freedesktop.org/drm/intel/issues/5354
[i915#5537]: https://gitlab.freedesktop.org/drm/intel/issues/5537
[i915#6298]: https://gitlab.freedesktop.org/drm/intel/issues/6298
[i915#6367]: https://gitlab.freedesktop.org/drm/intel/issues/6367
[i915#6559]: https://gitlab.freedesktop.org/drm/intel/issues/6559
[i915#6596]: https://gitlab.freedesktop.org/drm/intel/issues/6596
[i915#6621]: https://gitlab.freedesktop.org/drm/intel/issues/6621
[i915#6687]: https://gitlab.freedesktop.org/drm/intel/issues/6687
[i915#6712]: https://gitlab.freedesktop.org/drm/intel/issues/6712
[i915#6816]: https://gitlab.freedesktop.org/drm/intel/issues/6816
[i915#6818]: https://gitlab.freedesktop.org/drm/intel/issues/6818
[i915#7029]: https://gitlab.freedesktop.org/drm/intel/issues/7029
[i915#7030]: https://gitlab.freedesktop.org/drm/intel/issues/7030
[i915#7031]: https://gitlab.freedesktop.org/drm/intel/issues/7031
[i915#7077]: https://gitlab.freedesktop.org/drm/intel/issues/7077
Build changes
-------------
* Linux: CI_DRM_12242 -> Patchwork_109737v1
CI-20190529: 20190529
CI_DRM_12242: 075a81b1efd29300194bdf7877e08b6dbe3079d9 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_7012: ca6f5bdd537d26692c4b1ca011b8c4f227d95703 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
Patchwork_109737v1: 075a81b1efd29300194bdf7877e08b6dbe3079d9 @ git://anongit.freedesktop.org/gfx-ci/linux
### Linux commits
126cc22ce707 drm/i915/guc: Add compute reglist for GuC error capture
902fe6b79dfa drm/i915/guc: Add error-capture init warnings when needed
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109737v1/index.html
[-- Attachment #2: Type: text/html, Size: 9290 bytes --]
^ permalink raw reply [flat|nested] 16+ messages in thread
* [Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/guc: Add GuC-Error-Capture-Init coverage of new engine types
2022-10-15 3:59 [Intel-gfx] [PATCH 0/2] drm/i915/guc: Add GuC-Error-Capture-Init coverage of new engine types Alan Previn
` (2 preceding siblings ...)
2022-10-15 4:41 ` [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/guc: Add GuC-Error-Capture-Init coverage of new engine types Patchwork
@ 2022-10-15 6:24 ` Patchwork
3 siblings, 0 replies; 16+ messages in thread
From: Patchwork @ 2022-10-15 6:24 UTC (permalink / raw)
To: Alan Previn; +Cc: intel-gfx
[-- Attachment #1: Type: text/plain, Size: 45104 bytes --]
== Series Details ==
Series: drm/i915/guc: Add GuC-Error-Capture-Init coverage of new engine types
URL : https://patchwork.freedesktop.org/series/109737/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_12242_full -> Patchwork_109737v1_full
====================================================
Summary
-------
**SUCCESS**
No regressions found.
Participating hosts (9 -> 12)
------------------------------
Additional (3): shard-rkl shard-dg1 shard-tglu
Possible new issues
-------------------
Here are the unknown changes that may have been introduced in Patchwork_109737v1_full:
### IGT changes ###
#### Suppressed ####
The following results come from untrusted machines, tests, or statuses.
They do not affect the overall result.
* igt@gem_create@create-clear@smem0:
- {shard-rkl}: NOTRUN -> [INCOMPLETE][1]
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109737v1/shard-rkl-5/igt@gem_create@create-clear@smem0.html
* igt@kms_flip@flip-vs-suspend@d-hdmi-a4:
- {shard-dg1}: NOTRUN -> [INCOMPLETE][2]
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109737v1/shard-dg1-15/igt@kms_flip@flip-vs-suspend@d-hdmi-a4.html
Known issues
------------
Here are the changes found in Patchwork_109737v1_full that come from known issues:
### CI changes ###
#### Possible fixes ####
* boot:
- shard-skl: ([PASS][3], [PASS][4], [PASS][5], [PASS][6], [PASS][7], [PASS][8], [PASS][9], [PASS][10], [PASS][11], [PASS][12], [PASS][13], [PASS][14], [PASS][15], [FAIL][16], [PASS][17], [PASS][18], [PASS][19], [PASS][20], [FAIL][21], [PASS][22], [PASS][23], [PASS][24], [PASS][25], [PASS][26], [PASS][27]) ([i915#5032]) -> ([PASS][28], [PASS][29], [PASS][30], [PASS][31], [PASS][32], [PASS][33], [PASS][34], [PASS][35], [PASS][36], [PASS][37], [PASS][38], [PASS][39], [PASS][40], [PASS][41], [PASS][42], [PASS][43], [PASS][44], [PASS][45], [PASS][46], [PASS][47], [PASS][48], [PASS][49])
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12242/shard-skl10/boot.html
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12242/shard-skl9/boot.html
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12242/shard-skl9/boot.html
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12242/shard-skl9/boot.html
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12242/shard-skl10/boot.html
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12242/shard-skl9/boot.html
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12242/shard-skl7/boot.html
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12242/shard-skl7/boot.html
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12242/shard-skl7/boot.html
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12242/shard-skl6/boot.html
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12242/shard-skl6/boot.html
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12242/shard-skl6/boot.html
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12242/shard-skl5/boot.html
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12242/shard-skl5/boot.html
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12242/shard-skl10/boot.html
[18]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12242/shard-skl10/boot.html
[19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12242/shard-skl1/boot.html
[20]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12242/shard-skl5/boot.html
[21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12242/shard-skl5/boot.html
[22]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12242/shard-skl4/boot.html
[23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12242/shard-skl4/boot.html
[24]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12242/shard-skl4/boot.html
[25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12242/shard-skl4/boot.html
[26]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12242/shard-skl1/boot.html
[27]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12242/shard-skl1/boot.html
[28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109737v1/shard-skl3/boot.html
[29]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109737v1/shard-skl2/boot.html
[30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109737v1/shard-skl1/boot.html
[31]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109737v1/shard-skl1/boot.html
[32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109737v1/shard-skl1/boot.html
[33]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109737v1/shard-skl10/boot.html
[34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109737v1/shard-skl10/boot.html
[35]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109737v1/shard-skl10/boot.html
[36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109737v1/shard-skl10/boot.html
[37]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109737v1/shard-skl9/boot.html
[38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109737v1/shard-skl9/boot.html
[39]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109737v1/shard-skl9/boot.html
[40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109737v1/shard-skl7/boot.html
[41]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109737v1/shard-skl7/boot.html
[42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109737v1/shard-skl7/boot.html
[43]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109737v1/shard-skl7/boot.html
[44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109737v1/shard-skl6/boot.html
[45]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109737v1/shard-skl6/boot.html
[46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109737v1/shard-skl6/boot.html
[47]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109737v1/shard-skl4/boot.html
[48]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109737v1/shard-skl4/boot.html
[49]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109737v1/shard-skl4/boot.html
### IGT changes ###
#### Issues hit ####
* igt@gem_ctx_exec@basic-nohangcheck:
- shard-tglb: [PASS][50] -> [FAIL][51] ([i915#6268])
[50]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12242/shard-tglb2/igt@gem_ctx_exec@basic-nohangcheck.html
[51]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109737v1/shard-tglb2/igt@gem_ctx_exec@basic-nohangcheck.html
* igt@gem_exec_balancer@parallel-keep-in-fence:
- shard-iclb: [PASS][52] -> [SKIP][53] ([i915#4525]) +1 similar issue
[52]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12242/shard-iclb2/igt@gem_exec_balancer@parallel-keep-in-fence.html
[53]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109737v1/shard-iclb8/igt@gem_exec_balancer@parallel-keep-in-fence.html
* igt@gem_exec_capture@pi@rcs0:
- shard-skl: [PASS][54] -> [INCOMPLETE][55] ([i915#1982] / [i915#3371] / [i915#7192])
[54]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12242/shard-skl1/igt@gem_exec_capture@pi@rcs0.html
[55]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109737v1/shard-skl2/igt@gem_exec_capture@pi@rcs0.html
* igt@gem_exec_fair@basic-none@vcs1:
- shard-iclb: NOTRUN -> [FAIL][56] ([i915#2842]) +1 similar issue
[56]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109737v1/shard-iclb2/igt@gem_exec_fair@basic-none@vcs1.html
* igt@gem_exec_fair@basic-none@vecs0:
- shard-glk: [PASS][57] -> [FAIL][58] ([i915#2842])
[57]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12242/shard-glk2/igt@gem_exec_fair@basic-none@vecs0.html
[58]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109737v1/shard-glk2/igt@gem_exec_fair@basic-none@vecs0.html
* igt@gem_exec_fair@basic-pace@vecs0:
- shard-iclb: [PASS][59] -> [FAIL][60] ([i915#2842])
[59]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12242/shard-iclb8/igt@gem_exec_fair@basic-pace@vecs0.html
[60]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109737v1/shard-iclb2/igt@gem_exec_fair@basic-pace@vecs0.html
* igt@gem_huc_copy@huc-copy:
- shard-tglb: [PASS][61] -> [SKIP][62] ([i915#2190])
[61]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12242/shard-tglb5/igt@gem_huc_copy@huc-copy.html
[62]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109737v1/shard-tglb7/igt@gem_huc_copy@huc-copy.html
* igt@gem_lmem_swapping@heavy-random:
- shard-skl: NOTRUN -> [SKIP][63] ([fdo#109271] / [i915#4613])
[63]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109737v1/shard-skl4/igt@gem_lmem_swapping@heavy-random.html
* igt@gen9_exec_parse@allowed-single:
- shard-glk: [PASS][64] -> [DMESG-WARN][65] ([i915#5566] / [i915#716])
[64]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12242/shard-glk3/igt@gen9_exec_parse@allowed-single.html
[65]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109737v1/shard-glk9/igt@gen9_exec_parse@allowed-single.html
* igt@i915_pipe_stress@stress-xrgb8888-untiled:
- shard-apl: NOTRUN -> [FAIL][66] ([i915#7036])
[66]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109737v1/shard-apl1/igt@i915_pipe_stress@stress-xrgb8888-untiled.html
- shard-skl: NOTRUN -> [FAIL][67] ([i915#7036])
[67]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109737v1/shard-skl1/igt@i915_pipe_stress@stress-xrgb8888-untiled.html
* igt@i915_selftest@live@hangcheck:
- shard-tglb: [PASS][68] -> [DMESG-WARN][69] ([i915#5591])
[68]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12242/shard-tglb7/igt@i915_selftest@live@hangcheck.html
[69]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109737v1/shard-tglb3/igt@i915_selftest@live@hangcheck.html
* igt@kms_addfb_basic@legacy-format:
- shard-iclb: [PASS][70] -> [INCOMPLETE][71] ([i915#7017] / [i915#7057])
[70]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12242/shard-iclb3/igt@kms_addfb_basic@legacy-format.html
[71]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109737v1/shard-iclb3/igt@kms_addfb_basic@legacy-format.html
- shard-tglb: [PASS][72] -> [INCOMPLETE][73] ([i915#6987] / [i915#7190])
[72]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12242/shard-tglb5/igt@kms_addfb_basic@legacy-format.html
[73]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109737v1/shard-tglb7/igt@kms_addfb_basic@legacy-format.html
* igt@kms_async_flips@alternate-sync-async-flip@pipe-b-edp-1:
- shard-skl: [PASS][74] -> [FAIL][75] ([i915#2521])
[74]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12242/shard-skl10/igt@kms_async_flips@alternate-sync-async-flip@pipe-b-edp-1.html
[75]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109737v1/shard-skl9/igt@kms_async_flips@alternate-sync-async-flip@pipe-b-edp-1.html
* igt@kms_ccs@pipe-a-missing-ccs-buffer-y_tiled_gen12_mc_ccs:
- shard-skl: NOTRUN -> [SKIP][76] ([fdo#109271] / [i915#3886]) +2 similar issues
[76]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109737v1/shard-skl4/igt@kms_ccs@pipe-a-missing-ccs-buffer-y_tiled_gen12_mc_ccs.html
* igt@kms_ccs@pipe-a-random-ccs-data-y_tiled_gen12_rc_ccs_cc:
- shard-apl: NOTRUN -> [SKIP][77] ([fdo#109271] / [i915#3886]) +2 similar issues
[77]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109737v1/shard-apl3/igt@kms_ccs@pipe-a-random-ccs-data-y_tiled_gen12_rc_ccs_cc.html
- shard-glk: NOTRUN -> [SKIP][78] ([fdo#109271] / [i915#3886])
[78]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109737v1/shard-glk9/igt@kms_ccs@pipe-a-random-ccs-data-y_tiled_gen12_rc_ccs_cc.html
* igt@kms_ccs@pipe-b-bad-rotation-90-4_tiled_dg2_rc_ccs_cc:
- shard-apl: NOTRUN -> [SKIP][79] ([fdo#109271]) +52 similar issues
[79]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109737v1/shard-apl1/igt@kms_ccs@pipe-b-bad-rotation-90-4_tiled_dg2_rc_ccs_cc.html
* igt@kms_ccs@pipe-c-crc-sprite-planes-basic-4_tiled_dg2_rc_ccs:
- shard-glk: NOTRUN -> [SKIP][80] ([fdo#109271]) +27 similar issues
[80]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109737v1/shard-glk9/igt@kms_ccs@pipe-c-crc-sprite-planes-basic-4_tiled_dg2_rc_ccs.html
* igt@kms_chamelium@hdmi-hpd-storm:
- shard-apl: NOTRUN -> [SKIP][81] ([fdo#109271] / [fdo#111827]) +3 similar issues
[81]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109737v1/shard-apl3/igt@kms_chamelium@hdmi-hpd-storm.html
- shard-glk: NOTRUN -> [SKIP][82] ([fdo#109271] / [fdo#111827])
[82]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109737v1/shard-glk9/igt@kms_chamelium@hdmi-hpd-storm.html
* igt@kms_chamelium@hdmi-hpd-with-enabled-mode:
- shard-skl: NOTRUN -> [SKIP][83] ([fdo#109271] / [fdo#111827]) +4 similar issues
[83]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109737v1/shard-skl1/igt@kms_chamelium@hdmi-hpd-with-enabled-mode.html
* igt@kms_color@ctm-0-25:
- shard-skl: NOTRUN -> [SKIP][84] ([fdo#109271] / [i915#3546])
[84]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109737v1/shard-skl4/igt@kms_color@ctm-0-25.html
* igt@kms_cursor_crc@cursor-suspend@pipe-b-dp-1:
- shard-apl: [PASS][85] -> [DMESG-WARN][86] ([i915#180])
[85]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12242/shard-apl6/igt@kms_cursor_crc@cursor-suspend@pipe-b-dp-1.html
[86]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109737v1/shard-apl1/igt@kms_cursor_crc@cursor-suspend@pipe-b-dp-1.html
* igt@kms_cursor_legacy@flip-vs-cursor-crc-atomic:
- shard-glk: [PASS][87] -> [FAIL][88] ([i915#2346])
[87]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12242/shard-glk1/igt@kms_cursor_legacy@flip-vs-cursor-crc-atomic.html
[88]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109737v1/shard-glk3/igt@kms_cursor_legacy@flip-vs-cursor-crc-atomic.html
* igt@kms_flip@flip-vs-expired-vblank-interruptible@b-hdmi-a2:
- shard-glk: [PASS][89] -> [FAIL][90] ([i915#79])
[89]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12242/shard-glk7/igt@kms_flip@flip-vs-expired-vblank-interruptible@b-hdmi-a2.html
[90]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109737v1/shard-glk5/igt@kms_flip@flip-vs-expired-vblank-interruptible@b-hdmi-a2.html
* igt@kms_flip@flip-vs-expired-vblank@a-edp1:
- shard-skl: [PASS][91] -> [FAIL][92] ([i915#79]) +1 similar issue
[91]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12242/shard-skl1/igt@kms_flip@flip-vs-expired-vblank@a-edp1.html
[92]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109737v1/shard-skl3/igt@kms_flip@flip-vs-expired-vblank@a-edp1.html
* igt@kms_flip@wf_vblank-ts-check-interruptible@b-edp1:
- shard-skl: [PASS][93] -> [FAIL][94] ([i915#2122]) +5 similar issues
[93]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12242/shard-skl1/igt@kms_flip@wf_vblank-ts-check-interruptible@b-edp1.html
[94]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109737v1/shard-skl2/igt@kms_flip@wf_vblank-ts-check-interruptible@b-edp1.html
* igt@kms_flip_scaled_crc@flip-32bpp-4tile-to-32bpp-4tiledg2rcccs-downscaling@pipe-a-valid-mode:
- shard-iclb: NOTRUN -> [SKIP][95] ([i915#2587] / [i915#2672]) +2 similar issues
[95]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109737v1/shard-iclb7/igt@kms_flip_scaled_crc@flip-32bpp-4tile-to-32bpp-4tiledg2rcccs-downscaling@pipe-a-valid-mode.html
* igt@kms_flip_scaled_crc@flip-32bpp-linear-to-64bpp-linear-downscaling@pipe-a-default-mode:
- shard-iclb: NOTRUN -> [SKIP][96] ([i915#3555])
[96]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109737v1/shard-iclb2/igt@kms_flip_scaled_crc@flip-32bpp-linear-to-64bpp-linear-downscaling@pipe-a-default-mode.html
* igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-32bpp-yftile-upscaling@pipe-a-default-mode:
- shard-iclb: NOTRUN -> [SKIP][97] ([i915#2672]) +7 similar issues
[97]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109737v1/shard-iclb2/igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-32bpp-yftile-upscaling@pipe-a-default-mode.html
* igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytilercccs-downscaling@pipe-a-default-mode:
- shard-iclb: NOTRUN -> [SKIP][98] ([i915#2672] / [i915#3555])
[98]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109737v1/shard-iclb2/igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytilercccs-downscaling@pipe-a-default-mode.html
* igt@kms_frontbuffer_tracking@fbcpsr-suspend:
- shard-skl: NOTRUN -> [SKIP][99] ([fdo#109271]) +95 similar issues
[99]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109737v1/shard-skl4/igt@kms_frontbuffer_tracking@fbcpsr-suspend.html
* igt@kms_plane_alpha_blend@alpha-opaque-fb@pipe-a-dp-1:
- shard-apl: NOTRUN -> [FAIL][100] ([i915#4573]) +2 similar issues
[100]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109737v1/shard-apl1/igt@kms_plane_alpha_blend@alpha-opaque-fb@pipe-a-dp-1.html
* igt@kms_plane_alpha_blend@alpha-opaque-fb@pipe-b-edp-1:
- shard-skl: NOTRUN -> [FAIL][101] ([i915#4573]) +2 similar issues
[101]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109737v1/shard-skl1/igt@kms_plane_alpha_blend@alpha-opaque-fb@pipe-b-edp-1.html
* igt@kms_psr2_sf@overlay-plane-update-sf-dmg-area:
- shard-skl: NOTRUN -> [SKIP][102] ([fdo#109271] / [i915#658])
[102]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109737v1/shard-skl4/igt@kms_psr2_sf@overlay-plane-update-sf-dmg-area.html
* igt@kms_psr@psr2_primary_page_flip:
- shard-iclb: [PASS][103] -> [SKIP][104] ([fdo#109441]) +2 similar issues
[103]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12242/shard-iclb2/igt@kms_psr@psr2_primary_page_flip.html
[104]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109737v1/shard-iclb8/igt@kms_psr@psr2_primary_page_flip.html
* igt@kms_writeback@writeback-invalid-parameters:
- shard-skl: NOTRUN -> [SKIP][105] ([fdo#109271] / [i915#2437])
[105]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109737v1/shard-skl4/igt@kms_writeback@writeback-invalid-parameters.html
* igt@perf_pmu@module-unload:
- shard-skl: [PASS][106] -> [DMESG-WARN][107] ([i915#1982])
[106]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12242/shard-skl6/igt@perf_pmu@module-unload.html
[107]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109737v1/shard-skl10/igt@perf_pmu@module-unload.html
* igt@sysfs_clients@create:
- shard-apl: NOTRUN -> [SKIP][108] ([fdo#109271] / [i915#2994])
[108]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109737v1/shard-apl1/igt@sysfs_clients@create.html
- shard-skl: NOTRUN -> [SKIP][109] ([fdo#109271] / [i915#2994])
[109]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109737v1/shard-skl1/igt@sysfs_clients@create.html
#### Possible fixes ####
* igt@gem_exec_balancer@parallel-keep-submit-fence:
- shard-iclb: [SKIP][110] ([i915#4525]) -> [PASS][111]
[110]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12242/shard-iclb7/igt@gem_exec_balancer@parallel-keep-submit-fence.html
[111]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109737v1/shard-iclb2/igt@gem_exec_balancer@parallel-keep-submit-fence.html
* igt@gem_exec_fair@basic-flow@rcs0:
- shard-tglb: [FAIL][112] ([i915#2842]) -> [PASS][113] +1 similar issue
[112]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12242/shard-tglb7/igt@gem_exec_fair@basic-flow@rcs0.html
[113]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109737v1/shard-tglb3/igt@gem_exec_fair@basic-flow@rcs0.html
* igt@gen9_exec_parse@allowed-all:
- shard-skl: [DMESG-WARN][114] ([i915#5566] / [i915#716]) -> [PASS][115]
[114]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12242/shard-skl10/igt@gen9_exec_parse@allowed-all.html
[115]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109737v1/shard-skl1/igt@gen9_exec_parse@allowed-all.html
- shard-apl: [DMESG-WARN][116] ([i915#5566] / [i915#716]) -> [PASS][117]
[116]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12242/shard-apl2/igt@gen9_exec_parse@allowed-all.html
[117]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109737v1/shard-apl1/igt@gen9_exec_parse@allowed-all.html
* igt@i915_pm_dc@dc9-dpms:
- shard-iclb: [SKIP][118] ([i915#4281]) -> [PASS][119]
[118]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12242/shard-iclb3/igt@i915_pm_dc@dc9-dpms.html
[119]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109737v1/shard-iclb6/igt@i915_pm_dc@dc9-dpms.html
* igt@kms_cursor_legacy@flip-vs-cursor-crc-atomic:
- shard-skl: [FAIL][120] ([i915#2346]) -> [PASS][121]
[120]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12242/shard-skl6/igt@kms_cursor_legacy@flip-vs-cursor-crc-atomic.html
[121]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109737v1/shard-skl6/igt@kms_cursor_legacy@flip-vs-cursor-crc-atomic.html
* igt@kms_flip@2x-plain-flip-fb-recreate-interruptible@ab-hdmi-a1-hdmi-a2:
- shard-glk: [FAIL][122] ([i915#2122]) -> [PASS][123]
[122]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12242/shard-glk8/igt@kms_flip@2x-plain-flip-fb-recreate-interruptible@ab-hdmi-a1-hdmi-a2.html
[123]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109737v1/shard-glk1/igt@kms_flip@2x-plain-flip-fb-recreate-interruptible@ab-hdmi-a1-hdmi-a2.html
* igt@kms_flip@busy-flip@c-edp1:
- shard-skl: [FAIL][124] ([i915#7200]) -> [PASS][125] +1 similar issue
[124]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12242/shard-skl5/igt@kms_flip@busy-flip@c-edp1.html
[125]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109737v1/shard-skl4/igt@kms_flip@busy-flip@c-edp1.html
* igt@kms_flip_scaled_crc@flip-64bpp-linear-to-32bpp-linear-downscaling@pipe-a-valid-mode:
- shard-glk: [FAIL][126] ([i915#7197]) -> [PASS][127]
[126]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12242/shard-glk5/igt@kms_flip_scaled_crc@flip-64bpp-linear-to-32bpp-linear-downscaling@pipe-a-valid-mode.html
[127]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109737v1/shard-glk6/igt@kms_flip_scaled_crc@flip-64bpp-linear-to-32bpp-linear-downscaling@pipe-a-valid-mode.html
* igt@kms_hdr@bpc-switch-suspend@pipe-a-dp-1:
- shard-apl: [DMESG-WARN][128] ([i915#180]) -> [PASS][129] +1 similar issue
[128]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12242/shard-apl3/igt@kms_hdr@bpc-switch-suspend@pipe-a-dp-1.html
[129]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109737v1/shard-apl3/igt@kms_hdr@bpc-switch-suspend@pipe-a-dp-1.html
* igt@kms_plane_scaling@planes-unity-scaling-downscale-factor-0-5@pipe-c-edp-1:
- shard-iclb: [SKIP][130] ([i915#5235]) -> [PASS][131] +2 similar issues
[130]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12242/shard-iclb2/igt@kms_plane_scaling@planes-unity-scaling-downscale-factor-0-5@pipe-c-edp-1.html
[131]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109737v1/shard-iclb7/igt@kms_plane_scaling@planes-unity-scaling-downscale-factor-0-5@pipe-c-edp-1.html
* igt@kms_psr@psr2_sprite_blt:
- shard-iclb: [SKIP][132] ([fdo#109441]) -> [PASS][133] +4 similar issues
[132]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12242/shard-iclb8/igt@kms_psr@psr2_sprite_blt.html
[133]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109737v1/shard-iclb2/igt@kms_psr@psr2_sprite_blt.html
* igt@perf@stress-open-close:
- shard-glk: [INCOMPLETE][134] ([i915#5213]) -> [PASS][135]
[134]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12242/shard-glk1/igt@perf@stress-open-close.html
[135]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109737v1/shard-glk9/igt@perf@stress-open-close.html
#### Warnings ####
* igt@dmabuf@all@dma_fence_chain:
- shard-skl: [INCOMPLETE][136] ([i915#6949] / [i915#7165]) -> [INCOMPLETE][137] ([i915#6949] / [i915#7165] / [i915#7192])
[136]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12242/shard-skl6/igt@dmabuf@all@dma_fence_chain.html
[137]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109737v1/shard-skl6/igt@dmabuf@all@dma_fence_chain.html
* igt@i915_selftest@mock@vma:
- shard-skl: [INCOMPLETE][138] ([i915#6950] / [i915#7065]) -> [INCOMPLETE][139] ([i915#6950] / [i915#7065] / [i915#7192])
[138]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12242/shard-skl6/igt@i915_selftest@mock@vma.html
[139]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109737v1/shard-skl10/igt@i915_selftest@mock@vma.html
* igt@kms_big_fb@y-tiled-max-hw-stride-64bpp-rotate-0-hflip:
- shard-apl: [SKIP][140] ([fdo#109271]) -> [SKIP][141] ([fdo#109271] / [i915#7206])
[140]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12242/shard-apl7/igt@kms_big_fb@y-tiled-max-hw-stride-64bpp-rotate-0-hflip.html
[141]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109737v1/shard-apl7/igt@kms_big_fb@y-tiled-max-hw-stride-64bpp-rotate-0-hflip.html
- shard-glk: [SKIP][142] ([fdo#109271]) -> [SKIP][143] ([fdo#109271] / [i915#7206])
[142]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12242/shard-glk9/igt@kms_big_fb@y-tiled-max-hw-stride-64bpp-rotate-0-hflip.html
[143]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109737v1/shard-glk7/igt@kms_big_fb@y-tiled-max-hw-stride-64bpp-rotate-0-hflip.html
* igt@kms_dsc@dsc-with-bpc-formats:
- shard-glk: [SKIP][144] ([fdo#109271]) -> [SKIP][145] ([fdo#109271] / [i915#7205])
[144]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12242/shard-glk9/igt@kms_dsc@dsc-with-bpc-formats.html
[145]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109737v1/shard-glk7/igt@kms_dsc@dsc-with-bpc-formats.html
- shard-skl: [SKIP][146] ([fdo#109271]) -> [SKIP][147] ([fdo#109271] / [i915#7205])
[146]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12242/shard-skl5/igt@kms_dsc@dsc-with-bpc-formats.html
[147]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109737v1/shard-skl4/igt@kms_dsc@dsc-with-bpc-formats.html
- shard-apl: [SKIP][148] ([fdo#109271]) -> [SKIP][149] ([fdo#109271] / [i915#7205])
[148]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12242/shard-apl7/igt@kms_dsc@dsc-with-bpc-formats.html
[149]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109737v1/shard-apl7/igt@kms_dsc@dsc-with-bpc-formats.html
* igt@kms_flip@flip-vs-expired-vblank-interruptible@a-edp1:
- shard-skl: [FAIL][150] ([i915#79]) -> [FAIL][151] ([i915#2122])
[150]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12242/shard-skl6/igt@kms_flip@flip-vs-expired-vblank-interruptible@a-edp1.html
[151]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109737v1/shard-skl10/igt@kms_flip@flip-vs-expired-vblank-interruptible@a-edp1.html
* igt@kms_flip_scaled_crc@flip-32bpp-yftileccs-to-64bpp-yftile-upscaling@pipe-a-default-mode:
- shard-skl: [SKIP][152] ([fdo#109271]) -> [SKIP][153] ([fdo#109271] / [i915#7207])
[152]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12242/shard-skl9/igt@kms_flip_scaled_crc@flip-32bpp-yftileccs-to-64bpp-yftile-upscaling@pipe-a-default-mode.html
[153]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109737v1/shard-skl7/igt@kms_flip_scaled_crc@flip-32bpp-yftileccs-to-64bpp-yftile-upscaling@pipe-a-default-mode.html
* igt@kms_psr2_sf@overlay-plane-move-continuous-exceed-sf:
- shard-iclb: [SKIP][154] ([i915#2920]) -> [SKIP][155] ([i915#658]) +1 similar issue
[154]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12242/shard-iclb2/igt@kms_psr2_sf@overlay-plane-move-continuous-exceed-sf.html
[155]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109737v1/shard-iclb8/igt@kms_psr2_sf@overlay-plane-move-continuous-exceed-sf.html
* igt@kms_psr2_sf@overlay-plane-move-continuous-sf:
- shard-iclb: [SKIP][156] ([i915#658]) -> [SKIP][157] ([i915#2920])
[156]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12242/shard-iclb7/igt@kms_psr2_sf@overlay-plane-move-continuous-sf.html
[157]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109737v1/shard-iclb2/igt@kms_psr2_sf@overlay-plane-move-continuous-sf.html
* igt@kms_psr2_sf@overlay-plane-update-continuous-sf:
- shard-iclb: [SKIP][158] ([fdo#111068] / [i915#658]) -> [SKIP][159] ([i915#2920]) +1 similar issue
[158]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12242/shard-iclb8/igt@kms_psr2_sf@overlay-plane-update-continuous-sf.html
[159]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109737v1/shard-iclb2/igt@kms_psr2_sf@overlay-plane-update-continuous-sf.html
* igt@kms_psr2_sf@overlay-plane-update-sf-dmg-area:
- shard-iclb: [SKIP][160] ([i915#2920]) -> [SKIP][161] ([fdo#111068] / [i915#658])
[160]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12242/shard-iclb2/igt@kms_psr2_sf@overlay-plane-update-sf-dmg-area.html
[161]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109737v1/shard-iclb7/igt@kms_psr2_sf@overlay-plane-update-sf-dmg-area.html
* igt@runner@aborted:
- shard-apl: ([FAIL][162], [FAIL][163], [FAIL][164], [FAIL][165], [FAIL][166]) ([fdo#109271] / [i915#3002] / [i915#4312]) -> ([FAIL][167], [FAIL][168], [FAIL][169]) ([i915#3002] / [i915#4312])
[162]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12242/shard-apl2/igt@runner@aborted.html
[163]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12242/shard-apl6/igt@runner@aborted.html
[164]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12242/shard-apl8/igt@runner@aborted.html
[165]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12242/shard-apl3/igt@runner@aborted.html
[166]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12242/shard-apl3/igt@runner@aborted.html
[167]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109737v1/shard-apl1/igt@runner@aborted.html
[168]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109737v1/shard-apl7/igt@runner@aborted.html
[169]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109737v1/shard-apl8/igt@runner@aborted.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#103375]: https://bugs.freedesktop.org/show_bug.cgi?id=103375
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[fdo#109274]: https://bugs.freedesktop.org/show_bug.cgi?id=109274
[fdo#109279]: https://bugs.freedesktop.org/show_bug.cgi?id=109279
[fdo#109280]: https://bugs.freedesktop.org/show_bug.cgi?id=109280
[fdo#109283]: https://bugs.freedesktop.org/show_bug.cgi?id=109283
[fdo#109289]: https://bugs.freedesktop.org/show_bug.cgi?id=109289
[fdo#109291]: https://bugs.freedesktop.org/show_bug.cgi?id=109291
[fdo#109295]: https://bugs.freedesktop.org/show_bug.cgi?id=109295
[fdo#109303]: https://bugs.freedesktop.org/show_bug.cgi?id=109303
[fdo#109307]: https://bugs.freedesktop.org/show_bug.cgi?id=109307
[fdo#109308]: https://bugs.freedesktop.org/show_bug.cgi?id=109308
[fdo#109309]: https://bugs.freedesktop.org/show_bug.cgi?id=109309
[fdo#109312]: https://bugs.freedesktop.org/show_bug.cgi?id=109312
[fdo#109313]: https://bugs.freedesktop.org/show_bug.cgi?id=109313
[fdo#109314]: https://bugs.freedesktop.org/show_bug.cgi?id=109314
[fdo#109441]: https://bugs.freedesktop.org/show_bug.cgi?id=109441
[fdo#109506]: https://bugs.freedesktop.org/show_bug.cgi?id=109506
[fdo#109642]: https://bugs.freedesktop.org/show_bug.cgi?id=109642
[fdo#110189]: https://bugs.freedesktop.org/show_bug.cgi?id=110189
[fdo#110254]: https://bugs.freedesktop.org/show_bug.cgi?id=110254
[fdo#110542]: https://bugs.freedesktop.org/show_bug.cgi?id=110542
[fdo#110723]: https://bugs.freedesktop.org/show_bug.cgi?id=110723
[fdo#111068]: https://bugs.freedesktop.org/show_bug.cgi?id=111068
[fdo#111614]: https://bugs.freedesktop.org/show_bug.cgi?id=111614
[fdo#111615]: https://bugs.freedesktop.org/show_bug.cgi?id=111615
[fdo#111644]: https://bugs.freedesktop.org/show_bug.cgi?id=111644
[fdo#111656]: https://bugs.freedesktop.org/show_bug.cgi?id=111656
[fdo#111825]: https://bugs.freedesktop.org/show_bug.cgi?id=111825
[fdo#111827]: https://bugs.freedesktop.org/show_bug.cgi?id=111827
[fdo#112054]: https://bugs.freedesktop.org/show_bug.cgi?id=112054
[fdo#112283]: https://bugs.freedesktop.org/show_bug.cgi?id=112283
[i915#1072]: https://gitlab.freedesktop.org/drm/intel/issues/1072
[i915#1155]: https://gitlab.freedesktop.org/drm/intel/issues/1155
[i915#1257]: https://gitlab.freedesktop.org/drm/intel/issues/1257
[i915#132]: https://gitlab.freedesktop.org/drm/intel/issues/132
[i915#1397]: https://gitlab.freedesktop.org/drm/intel/issues/1397
[i915#1769]: https://gitlab.freedesktop.org/drm/intel/issues/1769
[i915#180]: https://gitlab.freedesktop.org/drm/intel/issues/180
[i915#1825]: https://gitlab.freedesktop.org/drm/intel/issues/1825
[i915#1839]: https://gitlab.freedesktop.org/drm/intel/issues/1839
[i915#1845]: https://gitlab.freedesktop.org/drm/intel/issues/1845
[i915#1849]: https://gitlab.freedesktop.org/drm/intel/issues/1849
[i915#1850]: https://gitlab.freedesktop.org/drm/intel/issues/1850
[i915#1902]: https://gitlab.freedesktop.org/drm/intel/issues/1902
[i915#1937]: https://gitlab.freedesktop.org/drm/intel/issues/1937
[i915#1982]: https://gitlab.freedesktop.org/drm/intel/issues/1982
[i915#2122]: https://gitlab.freedesktop.org/drm/intel/issues/2122
[i915#2190]: https://gitlab.freedesktop.org/drm/intel/issues/2190
[i915#2346]: https://gitlab.freedesktop.org/drm/intel/issues/2346
[i915#2410]: https://gitlab.freedesktop.org/drm/intel/issues/2410
[i915#2433]: https://gitlab.freedesktop.org/drm/intel/issues/2433
[i915#2434]: https://gitlab.freedesktop.org/drm/intel/issues/2434
[i915#2435]: https://gitlab.freedesktop.org/drm/intel/issues/2435
[i915#2436]: https://gitlab.freedesktop.org/drm/intel/issues/2436
[i915#2437]: https://gitlab.freedesktop.org/drm/intel/issues/2437
[i915#2521]: https://gitlab.freedesktop.org/drm/intel/issues/2521
[i915#2527]: https://gitlab.freedesktop.org/drm/intel/issues/2527
[i915#2582]: https://gitlab.freedesktop.org/drm/intel/issues/2582
[i915#2587]: https://gitlab.freedesktop.org/drm/intel/issues/2587
[i915#2658]: https://gitlab.freedesktop.org/drm/intel/issues/2658
[i915#2672]: https://gitlab.freedesktop.org/drm/intel/issues/2672
[i915#2681]: https://gitlab.freedesktop.org/drm/intel/issues/2681
[i915#2705]: https://gitlab.freedesktop.org/drm/intel/issues/2705
[i915#280]: https://gitlab.freedesktop.org/drm/intel/issues/280
[i915#284]: https://gitlab.freedesktop.org/drm/intel/issues/284
[i915#2842]: https://gitlab.freedesktop.org/drm/intel/issues/2842
[i915#2856]: https://gitlab.freedesktop.org/drm/intel/issues/2856
[i915#2920]: https://gitlab.freedesktop.org/drm/intel/issues/2920
[i915#2994]: https://gitlab.freedesktop.org/drm/intel/issues/2994
[i915#3002]: https://gitlab.freedesktop.org/drm/intel/issues/3002
[i915#3012]: https://gitlab.freedesktop.org/drm/intel/issues/3012
[i915#3116]: https://gitlab.freedesktop.org/drm/intel/issues/3116
[i915#315]: https://gitlab.freedesktop.org/drm/intel/issues/315
[i915#3281]: https://gitlab.freedesktop.org/drm/intel/issues/3281
[i915#3282]: https://gitlab.freedesktop.org/drm/intel/issues/3282
[i915#3291]: https://gitlab.freedesktop.org/drm/intel/issues/3291
[i915#3297]: https://gitlab.freedesktop.org/drm/intel/issues/3297
[i915#3299]: https://gitlab.freedesktop.org/drm/intel/issues/3299
[i915#3301]: https://gitlab.freedesktop.org/drm/intel/issues/3301
[i915#3318]: https://gitlab.freedesktop.org/drm/intel/issues/3318
[i915#3323]: https://gitlab.freedesktop.org/drm/intel/issues/3323
[i915#3359]: https://gitlab.freedesktop.org/drm/intel/issues/3359
[i915#3361]: https://gitlab.freedesktop.org/drm/intel/issues/3361
[i915#3371]: https://gitlab.freedesktop.org/drm/intel/issues/3371
[i915#3458]: https://gitlab.freedesktop.org/drm/intel/issues/3458
[i915#3469]: https://gitlab.freedesktop.org/drm/intel/issues/3469
[i915#3528]: https://gitlab.freedesktop.org/drm/intel/issues/3528
[i915#3539]: https://gitlab.freedesktop.org/drm/intel/issues/3539
[i915#3546]: https://gitlab.freedesktop.org/drm/intel/issues/3546
[i915#3555]: https://gitlab.freedesktop.org/drm/intel/issues/3555
[i915#3558]: https://gitlab.freedesktop.org/drm/intel/issues/3558
[i915#3637]: https://gitlab.freedesktop.org/drm/intel/issues/3637
[i915#3638]: https://gitlab.freedesktop.org/drm/intel/issues/3638
[i915#3689]: https://gitlab.freedesktop.org/drm/intel/issues/3689
[i915#3708]: https://gitlab.freedesktop.org/drm/intel/issues/3708
[i915#3734]: https://gitlab.freedesktop.org/drm/intel/issues/3734
[i915#3742]: https://gitlab.freedesktop.org/drm/intel/issues/3742
[i915#3804]: https://gitlab.freedesktop.org/drm/intel/issues/3804
[i915#3825]: https://gitlab.freedesktop.org/drm/intel/issues/3825
[i915#3840]: https://gitlab.freedesktop.org/drm/intel/issues/3840
[i915#3886]: https://gitlab.freedesktop.org/drm/intel/issues/3886
[i915#3938]: https://gitlab.freedesktop.org/drm/intel/issues/3938
[i915#3952]: https://gitlab.freedesktop.org/drm/intel/issues/3952
[i915#3955]: https://gitlab.freedesktop.org/drm/intel/issues/3955
[i915#3989]: https://gitlab.freedesktop.org/drm/intel/issues/3989
[i915#404]: https://gitlab.freedesktop.org/drm/intel/issues/404
[i915#4070]: https://gitlab.freedesktop.org/drm/intel/issues/4070
[i915#4077]: https://gitlab.freedesktop.org/drm/intel/issues/4077
[i915#4078]: https://gitlab.freedesktop.org/drm/intel/issues/4078
[i915#4079]: https://gitlab.freedesktop.org/drm/intel/issues/4079
[i915#4083]: https://gitlab.freedesktop.org/drm/intel/issues/4083
[i915#4098]: https://gitlab.freedesktop.org/drm/intel/issues/4098
[i915#4103]: https://gitlab.freedesktop.org/drm/intel/issues/4103
[i915#4212]: https://gitlab.freedesktop.org/drm/intel/issues/4212
[i915#4213]: https://gitlab.freedesktop.org/drm/intel/issues/4213
[i915#426]: https://gitlab.freedesktop.org/drm/intel/issues/426
[i915#4270]: https://gitlab.freedesktop.org/drm/intel/issues/4270
[i915#4281]: https://gitlab.freedesktop.org/drm/intel/issues/4281
[i915#4312]: https://gitlab.freedesktop.org/drm/intel/issues/4312
[i915#433]: https://gitlab.freedesktop.org/drm/intel/issues/433
[i915#4387]: https://gitlab.freedesktop.org/drm/intel/issues/4387
[i915#4391]: https://gitlab.freedesktop.org/drm/intel/issues/4391
[i915#4525]: https://gitlab.freedesktop.org/drm/intel/issues/4525
[i915#4538]: https://gitlab.freedesktop.org/drm/intel/issues/4538
[i915#454]: https://gitlab.freedesktop.org/drm/intel/issues/454
[i915#4565]: https://gitlab.freedesktop.org/drm/intel/issues/4565
[i915#4573]: https://gitlab.freedesktop.org/drm/intel/issues/4573
[i915#4613]: https://gitlab.freedesktop.org/drm/intel/issues/4613
[i915#4771]: https://gitlab.freedesktop.org/drm/intel/issues/4771
[i915#4812]: https://gitlab.freedesktop.org/drm/intel/issues/4812
[i915#4818]: https://gitlab.freedesktop.org/drm/intel/issues/4818
[i915#4833]: https://gitlab.freedesktop.org/drm/intel/issues/4833
[i915#4852]: https://gitlab.freedesktop.org/drm/intel/issues/4852
[i915#4854]: https://gitlab.freedesktop.org/drm/intel/issues/4854
[i915#4855]: https://gitlab.freedesktop.org/drm/intel/issues/4855
[i915#4859]: https://gitlab.freedesktop.org/drm/intel/issues/4859
[i915#4860]: https://gitlab.freedesktop.org/drm/intel/issues/4860
[i915#4873]: https://gitlab.freedesktop.org/drm/intel/issues/4873
[i915#4877]: https://gitlab.freedesktop.org/drm/intel/issues/4877
[i915#4879]: https://gitlab.freedesktop.org/drm/intel/issues/4879
[i915#4880]: https://gitlab.freedesktop.org/drm/intel/issues/4880
[i915#4881]: https://gitlab.freedesktop.org/drm/intel/issues/4881
[i915#4885]: https://gitlab.freedesktop.org/drm/intel/issues/4885
[i915#4958]: https://gitlab.freedesktop.org/drm/intel/issues/4958
[i915#4991]: https://gitlab.freedesktop.org/drm/intel/issues/4991
[i915#5032]: https://gitlab.freedesktop.org/drm/intel/issues/5032
[i915#5122]: https://gitlab.freedesktop.org/drm/intel/issues/5122
[i915#5176]: https://gitlab.freedesktop.org/drm/intel/issues/5176
[i915#5182]: https://gitlab.freedesktop.org/drm/intel/issues/5182
[i915#5213]: https://gitlab.freedesktop.org/drm/intel/issues/5213
[i915#5235]: https://gitlab.freedesktop.org/drm/intel/issues/5235
[i915#5286]: https://gitlab.freedesktop.org/drm/intel/issues/5286
[i915#5288]: https://gitlab.freedesktop.org/drm/intel/issues/5288
[i915#5289]: https://gitlab.freedesktop.org/drm/intel/issues/5289
[i915#5325]: https://gitlab.freedesktop.org/drm/intel/issues/5325
[i915#5327]: https://gitlab.freedesktop.org/drm/intel/issues/5327
[i915#533]: https://gitlab.freedesktop.org/drm/intel/issues/533
[i915#5439]: https://gitlab.freedesktop.org/drm/intel/issues/5439
[i915#5563]: https://gitlab.freedesktop.org/drm/intel/issues/5563
[i915#5566]: https://gitlab.freedesktop.org/drm/intel/issues/5566
[i915#5591]: https://gitlab.freedesktop.org/drm/intel/issues/5591
[i915#5723]: https://gitlab.freedesktop.org/drm/intel/issues/5723
[i915#5784]: https://gitlab.freedesktop.org/drm/intel/issues/5784
[i915#6095]: https://gitlab.freedesktop.org/drm/intel/issues/6095
[i915#6117]: https://gitlab.freedesktop.org/drm/intel/issues/6117
[i915#6227]: https://gitlab.freedesktop.org/drm/intel/issues/6227
[i915#6230]: https://gitlab.freedesktop.org/drm/intel/issues/6230
[i915#6248]: https://gitlab.freedesktop.org/drm/intel/issues/6248
[i915#6259]: https://gitlab.freedesktop.org/drm/intel/issues/6259
[i915#6268]: https://gitlab.freedesktop.org/drm/intel/issues/6268
[i915#6301]: https://gitlab.freedesktop.org/drm/intel/issues/6301
[i915#6334]: https://gitlab.freedesktop.org/drm/intel/issues/6334
[i915#6335]: https://gitlab.freedesktop.org/drm/intel/issues/6335
[i915#6344]: https://gitlab.freedesktop.org/drm/intel/issues/6344
[i915#6412]: https://gitlab.freedesktop.org/drm/intel/issues/6412
[i915#6433]: https://gitlab.freedesktop.org/drm/intel/issues/6433
[i915#6463]: https://gitlab.freedesktop.org/drm/intel/issues/6463
[i915#6493]: https://gitlab.freedesktop.org/drm/intel/issues/6493
[i915#6497]: https://gitlab.freedesktop.org/drm/intel/issues/6497
[i915#6524]: https://gitlab.freedesktop.org/drm/intel/issues/6524
[i915#658]: https://gitlab.freedesktop.org/drm/intel/issues/658
[i915#6590]: https://gitlab.freedesktop.org/drm/intel/issues/6590
[i915#6621]: https://gitlab.freedesktop.org/drm/intel/issues/6621
[i915#6946]: https://gitlab.freedesktop.org/drm/intel/issues/6946
[i915#6949]: https://gitlab.freedesktop.org/drm/intel/issues/6949
[i915#6950]: https://gitlab.freedesktop.org/drm/intel/issues/6950
[i915#6987]: https://gitlab.freedesktop.org/drm/intel/issues/6987
[i915#7017]: https://gitlab.freedesktop.org/drm/intel/issues/7017
[i915#7036]: https://gitlab.freedesktop.org/drm/intel/issues/7036
[i915#7057]: https://gitlab.freedesktop.org/drm/intel/issues/7057
[i915#7065]: https://gitlab.freedesktop.org/drm/intel/issues/7065
[i915#7116]: https://gitlab.freedesktop.org/drm/intel/issues/7116
[i915#7118]: https://gitlab.freedesktop.org/drm/intel/issues/7118
[i915#716]: https://gitlab.freedesktop.org/drm/intel/issues/716
[i915#7165]: https://gitlab.freedesktop.org/drm/intel/issues/7165
[i915#7178]: https://gitlab.freedesktop.org/drm/intel/issues/7178
[i915#7190]: https://gitlab.freedesktop.org/drm/intel/issues/7190
[i915#7192]: https://gitlab.freedesktop.org/drm/intel/issues/7192
[i915#7197]: https://gitlab.freedesktop.org/drm/intel/issues/7197
[i915#7200]: https://gitlab.freedesktop.org/drm/intel/issues/7200
[i915#7205]: https://gitlab.freedesktop.org/drm/intel/issues/7205
[i915#7206]: https://gitlab.freedesktop.org/drm/intel/issues/7206
[i915#7207]: https://gitlab.freedesktop.org/drm/intel/issues/7207
[i915#79]: https://gitlab.freedesktop.org/drm/intel/issues/79
Build changes
-------------
* Linux: CI_DRM_12242 -> Patchwork_109737v1
CI-20190529: 20190529
CI_DRM_12242: 075a81b1efd29300194bdf7877e08b6dbe3079d9 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_7012: ca6f5bdd537d26692c4b1ca011b8c4f227d95703 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
Patchwork_109737v1: 075a81b1efd29300194bdf7877e08b6dbe3079d9 @ git://anongit.freedesktop.org/gfx-ci/linux
piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109737v1/index.html
[-- Attachment #2: Type: text/html, Size: 41954 bytes --]
^ permalink raw reply [flat|nested] 16+ messages in thread
* Re: [Intel-gfx] [PATCH 1/2] drm/i915/guc: Add error-capture init warnings when needed
2022-10-15 3:59 ` [Intel-gfx] [PATCH 1/2] drm/i915/guc: Add error-capture init warnings when needed Alan Previn
@ 2022-10-17 8:42 ` Tvrtko Ursulin
2022-10-17 17:46 ` Teres Alexis, Alan Previn
2022-10-17 19:33 ` John Harrison
1 sibling, 1 reply; 16+ messages in thread
From: Tvrtko Ursulin @ 2022-10-17 8:42 UTC (permalink / raw)
To: Alan Previn, intel-gfx
On 15/10/2022 04:59, Alan Previn wrote:
> If GuC is being used and we initialized GuC-error-capture,
> we need to be warning if we don't provide an error-capture
> register list in the firmware ADS, for valid GT engines.
> A warning makes sense as this would impact debugability
> without realizing why a reglist wasn't retrieved and reported
> by GuC.>
> However, depending on the platform, we might have certain
> engines that have a register list for engine instance error state
> but not for engine class. Thus, add a check only to warn if the
> register list was non existent vs an empty list (use the
> empty lists to skip the warning).
>
> Signed-off-by: Alan Previn <alan.previn.teres.alexis@intel.com>
> ---
> .../gpu/drm/i915/gt/uc/intel_guc_capture.c | 55 ++++++++++++++++++-
> 1 file changed, 53 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_capture.c b/drivers/gpu/drm/i915/gt/uc/intel_guc_capture.c
> index 8f1165146013..290c1e1343dd 100644
> --- a/drivers/gpu/drm/i915/gt/uc/intel_guc_capture.c
> +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_capture.c
> @@ -419,6 +419,44 @@ guc_capture_get_device_reglist(struct intel_guc *guc)
> return default_lists;
> }
>
> +static const char *
> +__stringify_type(u32 type)
> +{
> + switch (type) {
> + case GUC_CAPTURE_LIST_TYPE_GLOBAL:
> + return "Global";
> + case GUC_CAPTURE_LIST_TYPE_ENGINE_CLASS:
> + return "Class";
> + case GUC_CAPTURE_LIST_TYPE_ENGINE_INSTANCE:
> + return "Instance";
> + default:
> + return "unknown";
> + }
> +
> + return "";
What's the point of these returns? Gcc complains about not returning a type from const char * return function?
> +}
> +
> +static const char *
> +__stringify_engclass(u32 class)
> +{
> + switch (class) {
> + case GUC_RENDER_CLASS:
> + return "Render";
> + case GUC_VIDEO_CLASS:
> + return "Video";
> + case GUC_VIDEOENHANCE_CLASS:
> + return "VideoEnhance";
> + case GUC_BLITTER_CLASS:
> + return "Blitter";
> + case GUC_COMPUTE_CLASS:
> + return "Compute";
> + default:
> + return "unknown";
> + }
> +
> + return "";
> +}
> +
> static int
> guc_capture_list_init(struct intel_guc *guc, u32 owner, u32 type, u32 classid,
> struct guc_mmio_reg *ptr, u16 num_entries)
> @@ -487,19 +525,32 @@ intel_guc_capture_getlistsize(struct intel_guc *guc, u32 owner, u32 type, u32 cl
> size_t *size)
> {
> struct intel_guc_state_capture *gc = guc->capture;
> + struct drm_i915_private *i915 = guc_to_gt(guc)->i915;
> struct __guc_capture_ads_cache *cache = &gc->ads_cache[owner][type][classid];
> int num_regs;
>
> - if (!gc->reglists)
> + if (!gc->reglists) {
> + drm_warn(&i915->drm, "GuC-capture: No reglist on this device\n");
> return -ENODEV;
> + }
>
> if (cache->is_valid) {
> *size = cache->size;
> return cache->status;
> }
>
> + if (!guc_capture_get_one_list(gc->reglists, owner, type, classid)) {
> + if (owner == GUC_CAPTURE_LIST_INDEX_PF && type == GUC_CAPTURE_LIST_TYPE_GLOBAL)
> + drm_warn(&i915->drm, "GuC-capture: missing reglist type-Global\n");
> + if (owner == GUC_CAPTURE_LIST_INDEX_PF)
GUC_CAPTURE_LIST_INDEX_PF could be made once on the enclosing if statement?
Btw what's with the PF and VF (cover letter) references while SRIOV does not exists upstream?
> + drm_warn(&i915->drm, "GuC-capture: missing regiist type(%d)-%s : "
reglist
> + "%s(%d)-Engine\n", type, __stringify_type(type),
> + __stringify_engclass(classid), classid);
One details to consider from Documentation/process/coding-style.rst
"""
However, never break user-visible strings such as printk messages because that breaks the ability to grep for them.
"""
Also commit message you can aim to wrap at 75 chars as per submitting-patches.rst.
> + return -ENODATA;
Is this a new exit condition or the thing would exit on the !num_regs check below anyway? Just wondering if the series is only about logging changes or there is more to it.
> + }
> +
> num_regs = guc_cap_list_num_regs(gc, owner, type, classid);
> - if (!num_regs)
> + if (!num_regs) /* intentional empty lists can exist depending on hw config */
> return -ENODATA;
>
> *size = PAGE_ALIGN((sizeof(struct guc_debug_capture_list)) +
Regards,
Tvrtko
^ permalink raw reply [flat|nested] 16+ messages in thread
* Re: [Intel-gfx] [PATCH 2/2] drm/i915/guc: Add compute reglist for GuC error capture
2022-10-15 3:59 ` [Intel-gfx] [PATCH 2/2] drm/i915/guc: Add compute reglist for GuC error capture Alan Previn
@ 2022-10-17 8:43 ` Tvrtko Ursulin
2022-10-17 17:32 ` Teres Alexis, Alan Previn
0 siblings, 1 reply; 16+ messages in thread
From: Tvrtko Ursulin @ 2022-10-17 8:43 UTC (permalink / raw)
To: Alan Previn, intel-gfx
On 15/10/2022 04:59, Alan Previn wrote:
> Add compute reglist for GuC error capture.
>
> Signed-off-by: Alan Previn <alan.previn.teres.alexis@intel.com>
> ---
> drivers/gpu/drm/i915/gt/uc/intel_guc_capture.c | 4 ++++
> 1 file changed, 4 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_capture.c b/drivers/gpu/drm/i915/gt/uc/intel_guc_capture.c
> index 290c1e1343dd..da3a09c11d12 100644
> --- a/drivers/gpu/drm/i915/gt/uc/intel_guc_capture.c
> +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_capture.c
> @@ -169,6 +169,8 @@ static struct __guc_mmio_reg_descr_group default_lists[] = {
> MAKE_REGLIST(default_global_regs, PF, GLOBAL, 0),
> MAKE_REGLIST(default_rc_class_regs, PF, ENGINE_CLASS, GUC_RENDER_CLASS),
> MAKE_REGLIST(xe_lpd_rc_inst_regs, PF, ENGINE_INSTANCE, GUC_RENDER_CLASS),
> + MAKE_REGLIST(default_rc_class_regs, PF, ENGINE_CLASS, GUC_COMPUTE_CLASS),
> + MAKE_REGLIST(xe_lpd_rc_inst_regs, PF, ENGINE_INSTANCE, GUC_COMPUTE_CLASS),
Does this means error capture on ADL-P was incomplete aka should
something be sent to stable?
Regards,
Tvrtko
> MAKE_REGLIST(empty_regs_list, PF, ENGINE_CLASS, GUC_VIDEO_CLASS),
> MAKE_REGLIST(xe_lpd_vd_inst_regs, PF, ENGINE_INSTANCE, GUC_VIDEO_CLASS),
> MAKE_REGLIST(empty_regs_list, PF, ENGINE_CLASS, GUC_VIDEOENHANCE_CLASS),
> @@ -182,6 +184,8 @@ static const struct __guc_mmio_reg_descr_group xe_lpd_lists[] = {
> MAKE_REGLIST(xe_lpd_global_regs, PF, GLOBAL, 0),
> MAKE_REGLIST(xe_lpd_rc_class_regs, PF, ENGINE_CLASS, GUC_RENDER_CLASS),
> MAKE_REGLIST(xe_lpd_rc_inst_regs, PF, ENGINE_INSTANCE, GUC_RENDER_CLASS),
> + MAKE_REGLIST(xe_lpd_rc_class_regs, PF, ENGINE_CLASS, GUC_COMPUTE_CLASS),
> + MAKE_REGLIST(xe_lpd_rc_inst_regs, PF, ENGINE_INSTANCE, GUC_COMPUTE_CLASS),
> MAKE_REGLIST(empty_regs_list, PF, ENGINE_CLASS, GUC_VIDEO_CLASS),
> MAKE_REGLIST(xe_lpd_vd_inst_regs, PF, ENGINE_INSTANCE, GUC_VIDEO_CLASS),
> MAKE_REGLIST(xe_lpd_vec_class_regs, PF, ENGINE_CLASS, GUC_VIDEOENHANCE_CLASS),
^ permalink raw reply [flat|nested] 16+ messages in thread
* Re: [Intel-gfx] [PATCH 2/2] drm/i915/guc: Add compute reglist for GuC error capture
2022-10-17 8:43 ` Tvrtko Ursulin
@ 2022-10-17 17:32 ` Teres Alexis, Alan Previn
2022-10-18 8:04 ` Tvrtko Ursulin
0 siblings, 1 reply; 16+ messages in thread
From: Teres Alexis, Alan Previn @ 2022-10-17 17:32 UTC (permalink / raw)
To: tvrtko.ursulin, intel-gfx
ADL-P doesnt support CCS and DG2 is stll force-probe (so hoping to get this before DG2 goes live).
...alan
On Mon, 2022-10-17 at 09:43 +0100, Tvrtko Ursulin wrote:
> On 15/10/2022 04:59, Alan Previn wrote:
> > Add compute reglist for GuC error capture.
> >
> > Signed-off-by: Alan Previn <alan.previn.teres.alexis@intel.com>
> > ---
> > drivers/gpu/drm/i915/gt/uc/intel_guc_capture.c | 4 ++++
> > 1 file changed, 4 insertions(+)
> >
> > diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_capture.c b/drivers/gpu/drm/i915/gt/uc/intel_guc_capture.c
> > index 290c1e1343dd..da3a09c11d12 100644
> > --- a/drivers/gpu/drm/i915/gt/uc/intel_guc_capture.c
> > +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_capture.c
> > @@ -169,6 +169,8 @@ static struct __guc_mmio_reg_descr_group default_lists[] = {
> > MAKE_REGLIST(default_global_regs, PF, GLOBAL, 0),
> > MAKE_REGLIST(default_rc_class_regs, PF, ENGINE_CLASS, GUC_RENDER_CLASS),
> > MAKE_REGLIST(xe_lpd_rc_inst_regs, PF, ENGINE_INSTANCE, GUC_RENDER_CLASS),
> > + MAKE_REGLIST(default_rc_class_regs, PF, ENGINE_CLASS, GUC_COMPUTE_CLASS),
> > + MAKE_REGLIST(xe_lpd_rc_inst_regs, PF, ENGINE_INSTANCE, GUC_COMPUTE_CLASS),
>
> Does this means error capture on ADL-P was incomplete aka should
> something be sent to stable?
>
> Regards,
>
> Tvrtko
>
> > MAKE_REGLIST(empty_regs_list, PF, ENGINE_CLASS, GUC_VIDEO_CLASS),
> > MAKE_REGLIST(xe_lpd_vd_inst_regs, PF, ENGINE_INSTANCE, GUC_VIDEO_CLASS),
> > MAKE_REGLIST(empty_regs_list, PF, ENGINE_CLASS, GUC_VIDEOENHANCE_CLASS),
> > @@ -182,6 +184,8 @@ static const struct __guc_mmio_reg_descr_group xe_lpd_lists[] = {
> > MAKE_REGLIST(xe_lpd_global_regs, PF, GLOBAL, 0),
> > MAKE_REGLIST(xe_lpd_rc_class_regs, PF, ENGINE_CLASS, GUC_RENDER_CLASS),
> > MAKE_REGLIST(xe_lpd_rc_inst_regs, PF, ENGINE_INSTANCE, GUC_RENDER_CLASS),
> > + MAKE_REGLIST(xe_lpd_rc_class_regs, PF, ENGINE_CLASS, GUC_COMPUTE_CLASS),
> > + MAKE_REGLIST(xe_lpd_rc_inst_regs, PF, ENGINE_INSTANCE, GUC_COMPUTE_CLASS),
> > MAKE_REGLIST(empty_regs_list, PF, ENGINE_CLASS, GUC_VIDEO_CLASS),
> > MAKE_REGLIST(xe_lpd_vd_inst_regs, PF, ENGINE_INSTANCE, GUC_VIDEO_CLASS),
> > MAKE_REGLIST(xe_lpd_vec_class_regs, PF, ENGINE_CLASS, GUC_VIDEOENHANCE_CLASS),
^ permalink raw reply [flat|nested] 16+ messages in thread
* Re: [Intel-gfx] [PATCH 1/2] drm/i915/guc: Add error-capture init warnings when needed
2022-10-17 8:42 ` Tvrtko Ursulin
@ 2022-10-17 17:46 ` Teres Alexis, Alan Previn
2022-10-18 8:00 ` Tvrtko Ursulin
0 siblings, 1 reply; 16+ messages in thread
From: Teres Alexis, Alan Previn @ 2022-10-17 17:46 UTC (permalink / raw)
To: tvrtko.ursulin, intel-gfx
On Mon, 2022-10-17 at 09:42 +0100, Tvrtko Ursulin wrote:
> On 15/10/2022 04:59, Alan Previn wrote:
> > If GuC is being used and we initialized GuC-error-capture,
> > we need to be warning if we don't provide an error-capture
> > register list in the firmware ADS, for valid GT engines.
> > A warning makes sense as this would impact debugability
> > without realizing why a reglist wasn't retrieved and reported
> > by GuC.>
> > However, depending on the platform, we might have certain
> > engines that have a register list for engine instance error state
> > but not for engine class. Thus, add a check only to warn if the
> > register list was non existent vs an empty list (use the
> > empty lists to skip the warning).
> >
> > Signed-off-by: Alan Previn <alan.previn.teres.alexis@intel.com>
> > ---
> > .../gpu/drm/i915/gt/uc/intel_guc_capture.c | 55 ++++++++++++++++++-
> > 1 file changed, 53 insertions(+), 2 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_capture.c b/drivers/gpu/drm/i915/gt/uc/intel_guc_capture.c
> > index 8f1165146013..290c1e1343dd 100644
> > --- a/drivers/gpu/drm/i915/gt/uc/intel_guc_capture.c
> > +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_capture.c
> > @@ -419,6 +419,44 @@ guc_capture_get_device_reglist(struct intel_guc *guc)
> > return default_lists;
> > }
> >
> > +static const char *
> > +__stringify_type(u32 type)
> > +{
> > + switch (type) {
> > + case GUC_CAPTURE_LIST_TYPE_GLOBAL:
> > + return "Global";
> > + case GUC_CAPTURE_LIST_TYPE_ENGINE_CLASS:
> > + return "Class";
> > + case GUC_CAPTURE_LIST_TYPE_ENGINE_INSTANCE:
> > + return "Instance";
> > + default:
> > + return "unknown";
> > + }
> > +
> > + return "";
>
> What's the point of these returns? Gcc complains about not returning a type from const char * return function?
>
Sorry i am not sure I saw any complain for Gcc. If you are referring to "" then i can re-rev without the default and
just let the path outside return the unknown. Is that what you are referring to?
> > +}
> > +
> > +static const char *
> > +__stringify_engclass(u32 class)
> > +{
> > + switch (class) {
> > + case GUC_RENDER_CLASS:
> > + return "Render";
> > + case GUC_VIDEO_CLASS:
> > + return "Video";
> > + case GUC_VIDEOENHANCE_CLASS:
> > + return "VideoEnhance";
> > + case GUC_BLITTER_CLASS:
> > + return "Blitter";
> > + case GUC_COMPUTE_CLASS:
> > + return "Compute";
> > + default:
> > + return "unknown";
> > + }
> > +
> > + return "";
> > +}
> > +
> > static int
> > guc_capture_list_init(struct intel_guc *guc, u32 owner, u32 type, u32 classid,
> > struct guc_mmio_reg *ptr, u16 num_entries)
> > @@ -487,19 +525,32 @@ intel_guc_capture_getlistsize(struct intel_guc *guc, u32 owner, u32 type, u32 cl
> > size_t *size)
> > {
> > struct intel_guc_state_capture *gc = guc->capture;
> > + struct drm_i915_private *i915 = guc_to_gt(guc)->i915;
> > struct __guc_capture_ads_cache *cache = &gc->ads_cache[owner][type][classid];
> > int num_regs;
> >
> > - if (!gc->reglists)
> > + if (!gc->reglists) {
> > + drm_warn(&i915->drm, "GuC-capture: No reglist on this device\n");
> > return -ENODEV;
> > + }
> >
> > if (cache->is_valid) {
> > *size = cache->size;
> > return cache->status;
> > }
> >
> > + if (!guc_capture_get_one_list(gc->reglists, owner, type, classid)) {
> > + if (owner == GUC_CAPTURE_LIST_INDEX_PF && type == GUC_CAPTURE_LIST_TYPE_GLOBAL)
> > + drm_warn(&i915->drm, "GuC-capture: missing reglist type-Global\n");
> > + if (owner == GUC_CAPTURE_LIST_INDEX_PF)
>
> GUC_CAPTURE_LIST_INDEX_PF could be made once on the enclosing if statement?
Sure - will do.
>
> Btw what's with the PF and VF (cover letter) references while SRIOV does not exists upstream?
To maintain a scalable code flow across both the ADS code and guc-error-capture code, we do have to skip over this enum
else we'll encounter lots of warnings about missing VF-reglist support (which we cant check for since we dont even have
support - i.e we dont even have a "is not supported" check) but the GuC firmware ADS buffer allocation includes an entry
for VFs so we have to skip over it. This is the cleanest way i can think of without impacting other code areas and also
while adding the ability to warn when its important.
> > + drm_warn(&i915->drm, "GuC-capture: missing regiist type(%d)-%s : "
>
> reglist
thanks - will fix
>
> > + "%s(%d)-Engine\n", type, __stringify_type(type),
> > + __stringify_engclass(classid), classid);
>
> One details to consider from Documentation/process/coding-style.rst
> """
> However, never break user-visible strings such as printk messages because that breaks the ability to grep for them.
> """
>
I totally agree with you but i cant find a way to keep totally grep-able way without creating a whole set of error
strings for the various list-types, list-owners and class-types. However i did ensure the first part of the message
is grep-able : "GuC-capture: missing reglist type". Do you an alternative proposal?
> Also commit message you can aim to wrap at 75 chars as per submitting-patches.rst.
>
> > + return -ENODATA;
>
> Is this a new exit condition or the thing would exit on the !num_regs check below anyway? Just wondering if the series is only about logging changes or there is more to it.
Its no different from previous behavior - and yes its about logging the missing reg lists for hw that needs it as we are
missing this for DG2 we we didn't notice (we did a previous revert to remove these warnings but that time the warnings
was too verbose - even complaining for the intentional empty lists and for VF cases that isnt supported).
>
> > + }
> > +
> > num_regs = guc_cap_list_num_regs(gc, owner, type, classid);
> > - if (!num_regs)
> > + if (!num_regs) /* intentional empty lists can exist depending on hw config */
> > return -ENODATA;
> >
> > *size = PAGE_ALIGN((sizeof(struct guc_debug_capture_list)) +
>
> Regards,
>
> Tvrtko
^ permalink raw reply [flat|nested] 16+ messages in thread
* Re: [Intel-gfx] [PATCH 1/2] drm/i915/guc: Add error-capture init warnings when needed
2022-10-15 3:59 ` [Intel-gfx] [PATCH 1/2] drm/i915/guc: Add error-capture init warnings when needed Alan Previn
2022-10-17 8:42 ` Tvrtko Ursulin
@ 2022-10-17 19:33 ` John Harrison
2022-10-17 23:36 ` Teres Alexis, Alan Previn
1 sibling, 1 reply; 16+ messages in thread
From: John Harrison @ 2022-10-17 19:33 UTC (permalink / raw)
To: Alan Previn, intel-gfx
On 10/14/2022 20:59, Alan Previn wrote:
> If GuC is being used and we initialized GuC-error-capture,
> we need to be warning if we don't provide an error-capture
> register list in the firmware ADS, for valid GT engines.
> A warning makes sense as this would impact debugability
> without realizing why a reglist wasn't retrieved and reported
> by GuC.
>
> However, depending on the platform, we might have certain
> engines that have a register list for engine instance error state
> but not for engine class. Thus, add a check only to warn if the
> register list was non existent vs an empty list (use the
> empty lists to skip the warning).
>
> Signed-off-by: Alan Previn <alan.previn.teres.alexis@intel.com>
> ---
> .../gpu/drm/i915/gt/uc/intel_guc_capture.c | 55 ++++++++++++++++++-
> 1 file changed, 53 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_capture.c b/drivers/gpu/drm/i915/gt/uc/intel_guc_capture.c
> index 8f1165146013..290c1e1343dd 100644
> --- a/drivers/gpu/drm/i915/gt/uc/intel_guc_capture.c
> +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_capture.c
> @@ -419,6 +419,44 @@ guc_capture_get_device_reglist(struct intel_guc *guc)
> return default_lists;
> }
>
> +static const char *
> +__stringify_type(u32 type)
> +{
> + switch (type) {
> + case GUC_CAPTURE_LIST_TYPE_GLOBAL:
> + return "Global";
> + case GUC_CAPTURE_LIST_TYPE_ENGINE_CLASS:
> + return "Class";
> + case GUC_CAPTURE_LIST_TYPE_ENGINE_INSTANCE:
> + return "Instance";
> + default:
> + return "unknown";
> + }
> +
> + return "";
As per Tvrtko's comment, this is dead code and unnecessary. A blank
'default:' that falls through to 'return "Unknown";' would be better.
> +}
> +
> +static const char *
> +__stringify_engclass(u32 class)
> +{
> + switch (class) {
> + case GUC_RENDER_CLASS:
> + return "Render";
> + case GUC_VIDEO_CLASS:
> + return "Video";
> + case GUC_VIDEOENHANCE_CLASS:
> + return "VideoEnhance";
> + case GUC_BLITTER_CLASS:
> + return "Blitter";
> + case GUC_COMPUTE_CLASS:
> + return "Compute";
> + default:
> + return "unknown";
> + }
> +
> + return "";
As above.
> +}
> +
> static int
> guc_capture_list_init(struct intel_guc *guc, u32 owner, u32 type, u32 classid,
> struct guc_mmio_reg *ptr, u16 num_entries)
> @@ -487,19 +525,32 @@ intel_guc_capture_getlistsize(struct intel_guc *guc, u32 owner, u32 type, u32 cl
> size_t *size)
> {
> struct intel_guc_state_capture *gc = guc->capture;
> + struct drm_i915_private *i915 = guc_to_gt(guc)->i915;
> struct __guc_capture_ads_cache *cache = &gc->ads_cache[owner][type][classid];
> int num_regs;
>
> - if (!gc->reglists)
> + if (!gc->reglists) {
> + drm_warn(&i915->drm, "GuC-capture: No reglist on this device\n");
> return -ENODEV;
> + }
>
> if (cache->is_valid) {
> *size = cache->size;
> return cache->status;
> }
>
> + if (!guc_capture_get_one_list(gc->reglists, owner, type, classid)) {
> + if (owner == GUC_CAPTURE_LIST_INDEX_PF && type == GUC_CAPTURE_LIST_TYPE_GLOBAL)
> + drm_warn(&i915->drm, "GuC-capture: missing reglist type-Global\n");
> + if (owner == GUC_CAPTURE_LIST_INDEX_PF)
> + drm_warn(&i915->drm, "GuC-capture: missing regiist type(%d)-%s : "
> + "%s(%d)-Engine\n", type, __stringify_type(type),
What Tvrtko is meaning here is to not split the string at all. You can
ignore a line length warning message if the only alternatives are either
to split the string or to obfuscate the code with unreadable/unnecessary
construction methods.
> + __stringify_engclass(classid), classid);
> + return -ENODATA;
> + }
> +
> num_regs = guc_cap_list_num_regs(gc, owner, type, classid);
> - if (!num_regs)
> + if (!num_regs) /* intentional empty lists can exist depending on hw config */
Not sure if this is proper formatting for a comment? I would either put
it on the line before or inside the if with the addition of braces.
John.
> return -ENODATA;
>
> *size = PAGE_ALIGN((sizeof(struct guc_debug_capture_list)) +
^ permalink raw reply [flat|nested] 16+ messages in thread
* Re: [Intel-gfx] [PATCH 1/2] drm/i915/guc: Add error-capture init warnings when needed
2022-10-17 19:33 ` John Harrison
@ 2022-10-17 23:36 ` Teres Alexis, Alan Previn
2022-10-18 0:15 ` John Harrison
0 siblings, 1 reply; 16+ messages in thread
From: Teres Alexis, Alan Previn @ 2022-10-17 23:36 UTC (permalink / raw)
To: Harrison, John C, intel-gfx
Agreed on all the others (as per my other reply to Tvrtko), but on that 2nd last one:
On Mon, 2022-10-17 at 12:33 -0700, Harrison, John C wrote:
> On 10/14/2022 20:59, Alan Previn wrote:
> > If GuC is being used and we initialized GuC-error-capture,
> > we need to be warning if we don't provide an error-capture
> > register list in the firmware ADS, for valid GT engines.
> > A warning makes sense as this would impact debugability
> > without realizing why a reglist wasn't retrieved and reported
> > by GuC.
> >
> > + if (!guc_capture_get_one_list(gc->reglists, owner, type, classid)) {
> > + if (owner == GUC_CAPTURE_LIST_INDEX_PF && type == GUC_CAPTURE_LIST_TYPE_GLOBAL)
> > + drm_warn(&i915->drm, "GuC-capture: missing reglist type-Global\n");
> > + if (owner == GUC_CAPTURE_LIST_INDEX_PF)
> > + drm_warn(&i915->drm, "GuC-capture: missing regiist type(%d)-%s : "
> > + "%s(%d)-Engine\n", type, __stringify_type(type),
> What Tvrtko is meaning here is to not split the string at all. You can
> ignore a line length warning message if the only alternatives are either
> to split the string or to obfuscate the code with unreadable/unnecessary
> construction methods.
>
>
I dont see how not splitting the string makes the grep work as per the reason Tvrtko was bringing up... but sure,..
ignoring a checkpatch here is fine by me - as i do agree having a single line is better to read.
...alan
^ permalink raw reply [flat|nested] 16+ messages in thread
* Re: [Intel-gfx] [PATCH 1/2] drm/i915/guc: Add error-capture init warnings when needed
2022-10-17 23:36 ` Teres Alexis, Alan Previn
@ 2022-10-18 0:15 ` John Harrison
0 siblings, 0 replies; 16+ messages in thread
From: John Harrison @ 2022-10-18 0:15 UTC (permalink / raw)
To: Teres Alexis, Alan Previn, intel-gfx
On 10/17/2022 16:36, Teres Alexis, Alan Previn wrote:
> Agreed on all the others (as per my other reply to Tvrtko), but on that 2nd last one:
>
> On Mon, 2022-10-17 at 12:33 -0700, Harrison, John C wrote:
>> On 10/14/2022 20:59, Alan Previn wrote:
>>> If GuC is being used and we initialized GuC-error-capture,
>>> we need to be warning if we don't provide an error-capture
>>> register list in the firmware ADS, for valid GT engines.
>>> A warning makes sense as this would impact debugability
>>> without realizing why a reglist wasn't retrieved and reported
>>> by GuC.
>>>
>>> + if (!guc_capture_get_one_list(gc->reglists, owner, type, classid)) {
>>> + if (owner == GUC_CAPTURE_LIST_INDEX_PF && type == GUC_CAPTURE_LIST_TYPE_GLOBAL)
>>> + drm_warn(&i915->drm, "GuC-capture: missing reglist type-Global\n");
>>> + if (owner == GUC_CAPTURE_LIST_INDEX_PF)
>>> + drm_warn(&i915->drm, "GuC-capture: missing regiist type(%d)-%s : "
>>> + "%s(%d)-Engine\n", type, __stringify_type(type),
>> What Tvrtko is meaning here is to not split the string at all. You can
>> ignore a line length warning message if the only alternatives are either
>> to split the string or to obfuscate the code with unreadable/unnecessary
>> construction methods.
>>
>>
> I dont see how not splitting the string makes the grep work as per the reason Tvrtko was bringing up... but sure,..
> ignoring a checkpatch here is fine by me - as i do agree having a single line is better to read.
I don't think Tvrtko was meaning anything other than the line wrap.
Having %d, %s, etc. in a string is fine if that's what you are meaning.
You really don't want to go the route of expanding all possible options
of those. And you can still grep for 'missing reglist.*Engine' for
example. But yeah, with this particular one I think it is more about
code readability than greppability for me at least.
John.
>
> ...alan
>
^ permalink raw reply [flat|nested] 16+ messages in thread
* Re: [Intel-gfx] [PATCH 1/2] drm/i915/guc: Add error-capture init warnings when needed
2022-10-17 17:46 ` Teres Alexis, Alan Previn
@ 2022-10-18 8:00 ` Tvrtko Ursulin
2022-10-19 5:14 ` Teres Alexis, Alan Previn
2022-10-19 5:28 ` Teres Alexis, Alan Previn
0 siblings, 2 replies; 16+ messages in thread
From: Tvrtko Ursulin @ 2022-10-18 8:00 UTC (permalink / raw)
To: Teres Alexis, Alan Previn, intel-gfx
On 17/10/2022 18:46, Teres Alexis, Alan Previn wrote:
> On Mon, 2022-10-17 at 09:42 +0100, Tvrtko Ursulin wrote:
>> On 15/10/2022 04:59, Alan Previn wrote:
>>> If GuC is being used and we initialized GuC-error-capture,
>>> we need to be warning if we don't provide an error-capture
>>> register list in the firmware ADS, for valid GT engines.
>>> A warning makes sense as this would impact debugability
>>> without realizing why a reglist wasn't retrieved and reported
>>> by GuC.>
>>> However, depending on the platform, we might have certain
>>> engines that have a register list for engine instance error state
>>> but not for engine class. Thus, add a check only to warn if the
>>> register list was non existent vs an empty list (use the
>>> empty lists to skip the warning).
>>>
>>> Signed-off-by: Alan Previn <alan.previn.teres.alexis@intel.com>
>>> ---
>>> .../gpu/drm/i915/gt/uc/intel_guc_capture.c | 55 ++++++++++++++++++-
>>> 1 file changed, 53 insertions(+), 2 deletions(-)
>>>
>>> diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_capture.c b/drivers/gpu/drm/i915/gt/uc/intel_guc_capture.c
>>> index 8f1165146013..290c1e1343dd 100644
>>> --- a/drivers/gpu/drm/i915/gt/uc/intel_guc_capture.c
>>> +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_capture.c
>>> @@ -419,6 +419,44 @@ guc_capture_get_device_reglist(struct intel_guc *guc)
>>> return default_lists;
>>> }
>>>
>>> +static const char *
>>> +__stringify_type(u32 type)
>>> +{
>>> + switch (type) {
>>> + case GUC_CAPTURE_LIST_TYPE_GLOBAL:
>>> + return "Global";
>>> + case GUC_CAPTURE_LIST_TYPE_ENGINE_CLASS:
>>> + return "Class";
>>> + case GUC_CAPTURE_LIST_TYPE_ENGINE_INSTANCE:
>>> + return "Instance";
>>> + default:
>>> + return "unknown";
>>> + }
>>> +
>>> + return "";
>>
>> What's the point of these returns? Gcc complains about not returning a type from const char * return function?
>>
> Sorry i am not sure I saw any complain for Gcc. If you are referring to "" then i can re-rev without the default and
> just let the path outside return the unknown. Is that what you are referring to?
Yes, it is an unreachable path, handled by default switch branch already.
>>> +}
>>> +
>>> +static const char *
>>> +__stringify_engclass(u32 class)
>>> +{
>>> + switch (class) {
>>> + case GUC_RENDER_CLASS:
>>> + return "Render";
>>> + case GUC_VIDEO_CLASS:
>>> + return "Video";
>>> + case GUC_VIDEOENHANCE_CLASS:
>>> + return "VideoEnhance";
>>> + case GUC_BLITTER_CLASS:
>>> + return "Blitter";
>>> + case GUC_COMPUTE_CLASS:
>>> + return "Compute";
>>> + default:
>>> + return "unknown";
>>> + }
>>> +
>>> + return "";
>>> +}
>>> +
>>> static int
>>> guc_capture_list_init(struct intel_guc *guc, u32 owner, u32 type, u32 classid,
>>> struct guc_mmio_reg *ptr, u16 num_entries)
>>> @@ -487,19 +525,32 @@ intel_guc_capture_getlistsize(struct intel_guc *guc, u32 owner, u32 type, u32 cl
>>> size_t *size)
>>> {
>>> struct intel_guc_state_capture *gc = guc->capture;
>>> + struct drm_i915_private *i915 = guc_to_gt(guc)->i915;
>>> struct __guc_capture_ads_cache *cache = &gc->ads_cache[owner][type][classid];
>>> int num_regs;
>>>
>>> - if (!gc->reglists)
>>> + if (!gc->reglists) {
>>> + drm_warn(&i915->drm, "GuC-capture: No reglist on this device\n");
>>> return -ENODEV;
>>> + }
>>>
>>> if (cache->is_valid) {
>>> *size = cache->size;
>>> return cache->status;
>>> }
>>>
>>> + if (!guc_capture_get_one_list(gc->reglists, owner, type, classid)) {
>>> + if (owner == GUC_CAPTURE_LIST_INDEX_PF && type == GUC_CAPTURE_LIST_TYPE_GLOBAL)
>>> + drm_warn(&i915->drm, "GuC-capture: missing reglist type-Global\n");
>>> + if (owner == GUC_CAPTURE_LIST_INDEX_PF)
>>
>> GUC_CAPTURE_LIST_INDEX_PF could be made once on the enclosing if statement?
> Sure - will do.
>>
>> Btw what's with the PF and VF (cover letter) references while SRIOV does not exists upstream?
> To maintain a scalable code flow across both the ADS code and guc-error-capture code, we do have to skip over this enum
> else we'll encounter lots of warnings about missing VF-reglist support (which we cant check for since we dont even have
> support - i.e we dont even have a "is not supported" check) but the GuC firmware ADS buffer allocation includes an entry
> for VFs so we have to skip over it. This is the cleanest way i can think of without impacting other code areas and also
> while adding the ability to warn when its important.
>>> + drm_warn(&i915->drm, "GuC-capture: missing regiist type(%d)-%s : "
>>
>> reglist
> thanks - will fix
>>
>>> + "%s(%d)-Engine\n", type, __stringify_type(type),
>>> + __stringify_engclass(classid), classid);
>>
>> One details to consider from Documentation/process/coding-style.rst
>> """
>> However, never break user-visible strings such as printk messages because that breaks the ability to grep for them.
>> """
>>
> I totally agree with you but i cant find a way to keep totally grep-able way without creating a whole set of error
> strings for the various list-types, list-owners and class-types. However i did ensure the first part of the message
> is grep-able : "GuC-capture: missing reglist type". Do you an alternative proposal?
Yeah it is not very greppable being largely constructed at runtime, but
just don't break the string. IMO no gain to diverge from coding style here.
Or maybe with one level of indentation less as discussed, and maybe
remove "GuC-capture" if it can be implied (are there other reglists not
relating to error capture?), maybe it becomes short enough?
"Missing GuC reglist %s(%u):%s(%u)!", ...
?
Type will never be unknown I suspect since it should always be added
very early during development. So type and engine suffixes may be
redundant? Or keep it verbose if that fits better with existing GuC
error capture logging, I don't know.
>
>> Also commit message you can aim to wrap at 75 chars as per submitting-patches.rst.
>>
>>> + return -ENODATA;
>>
>> Is this a new exit condition or the thing would exit on the !num_regs check below anyway? Just wondering if the series is only about logging changes or there is more to it.
> Its no different from previous behavior - and yes its about logging the missing reg lists for hw that needs it as we are
> missing this for DG2 we we didn't notice (we did a previous revert to remove these warnings but that time the warnings
> was too verbose - even complaining for the intentional empty lists and for VF cases that isnt supported).
Okay think I get it, thanks. If the "positive match" logging of empty
list is more future proof than "negative - don't log these" you will
know better.
Regards,
Tvrtko
>>
>>> + }
>>> +
>>> num_regs = guc_cap_list_num_regs(gc, owner, type, classid);
>>> - if (!num_regs)
>>> + if (!num_regs) /* intentional empty lists can exist depending on hw config */
>>> return -ENODATA;
>>>
>>> *size = PAGE_ALIGN((sizeof(struct guc_debug_capture_list)) +
>>
>> Regards,
>>
>> Tvrtko
>
^ permalink raw reply [flat|nested] 16+ messages in thread
* Re: [Intel-gfx] [PATCH 2/2] drm/i915/guc: Add compute reglist for GuC error capture
2022-10-17 17:32 ` Teres Alexis, Alan Previn
@ 2022-10-18 8:04 ` Tvrtko Ursulin
0 siblings, 0 replies; 16+ messages in thread
From: Tvrtko Ursulin @ 2022-10-18 8:04 UTC (permalink / raw)
To: Teres Alexis, Alan Previn, intel-gfx
On 17/10/2022 18:32, Teres Alexis, Alan Previn wrote:
> ADL-P doesnt support CCS and DG2 is stll force-probe (so hoping to get this before DG2 goes live).
->
> On Mon, 2022-10-17 at 09:43 +0100, Tvrtko Ursulin wrote:
>> On 15/10/2022 04:59, Alan Previn wrote:
>>> Add compute reglist for GuC error capture.
>>>
>>> Signed-off-by: Alan Previn <alan.previn.teres.alexis@intel.com>
>>> ---
>>> drivers/gpu/drm/i915/gt/uc/intel_guc_capture.c | 4 ++++
>>> 1 file changed, 4 insertions(+)
>>>
>>> diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_capture.c b/drivers/gpu/drm/i915/gt/uc/intel_guc_capture.c
>>> index 290c1e1343dd..da3a09c11d12 100644
>>> --- a/drivers/gpu/drm/i915/gt/uc/intel_guc_capture.c
>>> +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_capture.c
>>> @@ -169,6 +169,8 @@ static struct __guc_mmio_reg_descr_group default_lists[] = {
>>> MAKE_REGLIST(default_global_regs, PF, GLOBAL, 0),
>>> MAKE_REGLIST(default_rc_class_regs, PF, ENGINE_CLASS, GUC_RENDER_CLASS),
>>> MAKE_REGLIST(xe_lpd_rc_inst_regs, PF, ENGINE_INSTANCE, GUC_RENDER_CLASS),
>>> + MAKE_REGLIST(default_rc_class_regs, PF, ENGINE_CLASS, GUC_COMPUTE_CLASS),
>>> + MAKE_REGLIST(xe_lpd_rc_inst_regs, PF, ENGINE_INSTANCE, GUC_COMPUTE_CLASS),
>>
>> Does this means error capture on ADL-P was incomplete aka should
>> something be sent to stable?
-> okay I read xe_lpd_rc_inst_regs and somehow thought this is adding
xe_lpd support for the first time. My bad.
Regards,
Tvrtko
>>
>>> MAKE_REGLIST(empty_regs_list, PF, ENGINE_CLASS, GUC_VIDEO_CLASS),
>>> MAKE_REGLIST(xe_lpd_vd_inst_regs, PF, ENGINE_INSTANCE, GUC_VIDEO_CLASS),
>>> MAKE_REGLIST(empty_regs_list, PF, ENGINE_CLASS, GUC_VIDEOENHANCE_CLASS),
>>> @@ -182,6 +184,8 @@ static const struct __guc_mmio_reg_descr_group xe_lpd_lists[] = {
>>> MAKE_REGLIST(xe_lpd_global_regs, PF, GLOBAL, 0),
>>> MAKE_REGLIST(xe_lpd_rc_class_regs, PF, ENGINE_CLASS, GUC_RENDER_CLASS),
>>> MAKE_REGLIST(xe_lpd_rc_inst_regs, PF, ENGINE_INSTANCE, GUC_RENDER_CLASS),
>>> + MAKE_REGLIST(xe_lpd_rc_class_regs, PF, ENGINE_CLASS, GUC_COMPUTE_CLASS),
>>> + MAKE_REGLIST(xe_lpd_rc_inst_regs, PF, ENGINE_INSTANCE, GUC_COMPUTE_CLASS),
>>> MAKE_REGLIST(empty_regs_list, PF, ENGINE_CLASS, GUC_VIDEO_CLASS),
>>> MAKE_REGLIST(xe_lpd_vd_inst_regs, PF, ENGINE_INSTANCE, GUC_VIDEO_CLASS),
>>> MAKE_REGLIST(xe_lpd_vec_class_regs, PF, ENGINE_CLASS, GUC_VIDEOENHANCE_CLASS),
>
^ permalink raw reply [flat|nested] 16+ messages in thread
* Re: [Intel-gfx] [PATCH 1/2] drm/i915/guc: Add error-capture init warnings when needed
2022-10-18 8:00 ` Tvrtko Ursulin
@ 2022-10-19 5:14 ` Teres Alexis, Alan Previn
2022-10-19 5:28 ` Teres Alexis, Alan Previn
1 sibling, 0 replies; 16+ messages in thread
From: Teres Alexis, Alan Previn @ 2022-10-19 5:14 UTC (permalink / raw)
To: tvrtko.ursulin, intel-gfx
Update: One additional change needed... after more testing i have come to realize that
intel_guc_capture_getlistsize is also being triggered before ADS-guc-error-capture
register-list population during initialization of the guc-error-capture module itself
(intel_guc_capture_init). Its getting called as part of a check on the size of the
guc-log-buffer-error-capture-region to verify its big enough for the current platform
(assuming all engine masks + all steered-register permutations). So at that early
point, we do encounter the "OTHER ENGINE" showing up as a possible engine but in
fact none of the current hardware has that (yet). So to ensure this warning is not printed
during this early size estimation check:
i shall make "intel_guc_capture_getlistsize" a wrapper around a new function
"static int guc_capture_getlistsize(...[same-params]..., bool is_purpose_estimation)"
which contains all the original logic and uses new boolean for the additional check
on whether to print the warning or not.
current code:
if (!guc_capture_get_one_list(gc->reglists, owner, type, classid)) {
if (owner == GUC_CAPTURE_LIST_INDEX_PF && type == GUC_CAPTURE_LIST_TYPE_GLOBAL)
drm_warn(&i915->drm, "Missing GuC reglist Global\n");
... ...
...
new code:
if (!is_purpose_estimation && owner == GUC_CAPTURE_LIST_INDEX_PF &&
!guc_capture_get_one_list(gc->reglists, owner, type, classid)) {
if (tpe == GUC_CAPTURE_LIST_TYPE_GLOBAL)
drm_warn(&i915->drm, "Missing GuC reglist Global\n");
...
...
On Tue, 2022-10-18 at 09:00 +0100, Tvrtko Ursulin wrote:
> > > > + if (!guc_capture_get_one_list(gc->reglists, owner, type, classid)) {
> > > > + if (owner == GUC_CAPTURE_LIST_INDEX_PF && type == GUC_CAPTURE_LIST_TYPE_GLOBAL)
> > > > + drm_warn(&i915->drm, "GuC-capture: missing reglist type-Global\n");
> > > > + if (owner == GUC_CAPTURE_LIST_INDEX_PF)
> > >
> > > GUC_CAPTURE_LIST_INDEX_PF could be made once on the enclosing if statement?
> > Sure - will do.
> > >
> > > Btw what's with the PF and VF (cover letter) references while SRIOV does not exists upstream?
> > To maintain a scalable code flow across both the ADS code and guc-error-capture code, we do have to skip over this enum
> > else we'll encounter lots of warnings about missing VF-reglist support (which we cant check for since we dont even have
> > support - i.e we dont even have a "is not supported" check) but the GuC firmware ADS buffer allocation includes an entry
> > for VFs so we have to skip over it. This is the cleanest way i can think of without impacting other code areas and also
> > while adding the ability to warn when its important.
> > > > + drm_warn(&i915->drm, "GuC-capture: missing regiist type(%d)-%s : "
> > >
> > > reglist
> > thanks - will fix
> > >
> > > > + "%s(%d)-Engine\n", type, __stringify_type(type),
> > > > + __stringify_engclass(classid), classid);
> > >
> > > One details to consider from Documentation/process/coding-style.rst
> > > """
> > > However, never break user-visible strings such as printk messages because that breaks the ability to grep for them.
> > > """
> > >
> > I totally agree with you but i cant find a way to keep totally grep-able way without creating a whole set of error
> > strings for the various list-types, list-owners and class-types. However i did ensure the first part of the message
> > is grep-able : "GuC-capture: missing reglist type". Do you an alternative proposal?
>
> Yeah it is not very greppable being largely constructed at runtime, but
> just don't break the string. IMO no gain to diverge from coding style here.
>
> Or maybe with one level of indentation less as discussed, and maybe
> remove "GuC-capture" if it can be implied (are there other reglists not
> relating to error capture?), maybe it becomes short enough?
>
> "Missing GuC reglist %s(%u):%s(%u)!", ...
>
> ?
>
Yes. this will work well - will use this.
> Type will never be unknown I suspect since it should always be added
> very early during development. So type and engine suffixes may be
> redundant? Or keep it verbose if that fits better with existing GuC
> error capture logging, I don't know.
>
above is good. :)
> >
> > > Also commit message you can aim to wrap at 75 chars as per submitting-patches.rst.
> > >
> > > > + return -ENODATA;
> > >
> > > Is this a new exit condition or the thing would exit on the !num_regs check below anyway? Just wondering if the series is only about logging changes or there is more to it.
> > Its no different from previous behavior - and yes its about logging the missing reg lists for hw that needs it as we are
> > missing this for DG2 we we didn't notice (we did a previous revert to remove these warnings but that time the warnings
> > was too verbose - even complaining for the intentional empty lists and for VF cases that isnt supported).
>
> Okay think I get it, thanks. If the "positive match" logging of empty
> list is more future proof than "negative - don't log these" you will
> know better.
>
> Regards,
>
> Tvrtko
>
> >
^ permalink raw reply [flat|nested] 16+ messages in thread
* Re: [Intel-gfx] [PATCH 1/2] drm/i915/guc: Add error-capture init warnings when needed
2022-10-18 8:00 ` Tvrtko Ursulin
2022-10-19 5:14 ` Teres Alexis, Alan Previn
@ 2022-10-19 5:28 ` Teres Alexis, Alan Previn
1 sibling, 0 replies; 16+ messages in thread
From: Teres Alexis, Alan Previn @ 2022-10-19 5:28 UTC (permalink / raw)
To: tvrtko.ursulin, intel-gfx
> > > Also commit message you can aim to wrap at 75 chars as per submitting-patches.rst.
> > >
> > > > + return -ENODATA;
> > >
> > > Is this a new exit condition or the thing would exit on the !num_regs check below anyway? Just wondering if the series is only about logging changes or there is more to it.
> > Its no different from previous behavior - and yes its about logging the missing reg lists for hw that needs it as we are
> > missing this for DG2 we we didn't notice (we did a previous revert to remove these warnings but that time the warnings
> > was too verbose - even complaining for the intentional empty lists and for VF cases that isnt supported).
>
> Okay think I get it, thanks. If the "positive match" logging of empty
> list is more future proof than "negative - don't log these" you will
> know better.
NOTE: John and I had an offline conversation and we are aware that there will still be a case where
we can miss new-platform updates for guc-error-capture without being alerted by a warning:
Let's take the example of the empty blitter's engine-class-register-list. We dont have such a thing on
today's hardware.. we only have blitter's engine-register-list ... i.e. HEAD, TAIL etc. But if a future
platform were to introduce a blitter engine-class-register-list, we wont get a warning since the empty
list is there to prevent unnecessary warning for today's hardware. But we know this is better than
having to explain unnecessary warnings (which was the reason why a more verbose version of this code
was removed in the past).
I believe we are good with this solution here for now.
^ permalink raw reply [flat|nested] 16+ messages in thread
end of thread, other threads:[~2022-10-19 5:28 UTC | newest]
Thread overview: 16+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2022-10-15 3:59 [Intel-gfx] [PATCH 0/2] drm/i915/guc: Add GuC-Error-Capture-Init coverage of new engine types Alan Previn
2022-10-15 3:59 ` [Intel-gfx] [PATCH 1/2] drm/i915/guc: Add error-capture init warnings when needed Alan Previn
2022-10-17 8:42 ` Tvrtko Ursulin
2022-10-17 17:46 ` Teres Alexis, Alan Previn
2022-10-18 8:00 ` Tvrtko Ursulin
2022-10-19 5:14 ` Teres Alexis, Alan Previn
2022-10-19 5:28 ` Teres Alexis, Alan Previn
2022-10-17 19:33 ` John Harrison
2022-10-17 23:36 ` Teres Alexis, Alan Previn
2022-10-18 0:15 ` John Harrison
2022-10-15 3:59 ` [Intel-gfx] [PATCH 2/2] drm/i915/guc: Add compute reglist for GuC error capture Alan Previn
2022-10-17 8:43 ` Tvrtko Ursulin
2022-10-17 17:32 ` Teres Alexis, Alan Previn
2022-10-18 8:04 ` Tvrtko Ursulin
2022-10-15 4:41 ` [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/guc: Add GuC-Error-Capture-Init coverage of new engine types Patchwork
2022-10-15 6:24 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
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