From: psodagud@codeaurora.org
To: catalin.marinas@arm.com, will@kernel.org, Dave.Martin@arm.com,
amit.kachhap@arm.com
Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org
Subject: sve_user_discard
Date: Thu, 20 May 2021 16:02:03 -0700 [thread overview]
Message-ID: <785d7bc29da6bff0dceeb712c24601fd@codeaurora.org> (raw)
Hi All,
This is regarding sve_user_disable(CPACR_EL1_ZEN_EL0EN) on every system
call. If a userspace task is using SVE instructions and making sys
calls in between, it would impact the performance of the thread. On
every SVE instructions after SVC/system call, it would trap to EL1.
I think by setting CPACR_EL1_ZEN_EL0EN flag, the processor faults when
it runs an SVE instruction. This approach may be taken as part of FPSIMD
registers switching optimizations. Can below portion of the code use
thread.fpsimd_cpu and fpsimd_last_state variables to avoid clearing
CPACR_EL1_ZEN_EL0EN for this kind of use cases?
static inline void sve_user_discard(void)
{
if (!system_supports_sve())
return;
clear_thread_flag(TIF_SVE);
/*
* task_fpsimd_load() won't be called to update CPACR_EL1 in
* ret_to_user unless TIF_FOREIGN_FPSTATE is still set, which only
* happens if a context switch or kernel_neon_begin() or context
* modification (sigreturn, ptrace) intervenes.
* So, ensure that CPACR_EL1 is already correct for the fast-path case.
*/
sve_user_disable();
}
-Thanks, Prasad
next reply other threads:[~2021-05-20 23:02 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-05-20 23:02 psodagud [this message]
2021-05-21 9:12 ` sve_user_discard Catalin Marinas
2021-05-21 9:12 ` sve_user_discard Catalin Marinas
2021-05-21 11:54 ` sve_user_discard Mark Brown
2021-05-21 11:54 ` sve_user_discard Mark Brown
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