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* Handling MSI-X interrupts in the head stage for x86 platform
@ 2020-06-01  8:09 Alexander Frolov
  2020-06-01  9:23 ` Meng, Fino
  0 siblings, 1 reply; 4+ messages in thread
From: Alexander Frolov @ 2020-06-01  8:09 UTC (permalink / raw)
  To: xenomai

Hi all!

I have a PCIe device in x86 motherboard that generate periodic MSI-X 
interrupts and I would like to handle them in the head stage, how it can 
be done?
Thank you! Appreciate any help!

Best,
    Alex


^ permalink raw reply	[flat|nested] 4+ messages in thread

* RE: Handling MSI-X interrupts in the head stage for x86 platform
  2020-06-01  8:09 Handling MSI-X interrupts in the head stage for x86 platform Alexander Frolov
@ 2020-06-01  9:23 ` Meng, Fino
  2020-06-02  6:40   ` Alexander Frolov
  0 siblings, 1 reply; 4+ messages in thread
From: Meng, Fino @ 2020-06-01  9:23 UTC (permalink / raw)
  To: xenomai



>Sent: Monday, June 1, 2020 4:09 PM
>
>Hi all!
>
>I have a PCIe device in x86 motherboard that generate periodic MSI-X interrupts and I would like to handle them in the head
>stage, how it can be done?
>Thank you! Appreciate any help!
>
>Best,
>    Alex

Hi Alex,

Kernel/driver/serial/16550A.c is a pci device, and have less code than net/igb driver, 
Which specific device u want to enable? Does it have a vanilla kernel driver already?

BR / Fino (孟祥夫)
Intel – IOTG Developer Enabling


^ permalink raw reply	[flat|nested] 4+ messages in thread

* Re: Handling MSI-X interrupts in the head stage for x86 platform
  2020-06-01  9:23 ` Meng, Fino
@ 2020-06-02  6:40   ` Alexander Frolov
  2020-06-02  7:46     ` Jan Kiszka
  0 siblings, 1 reply; 4+ messages in thread
From: Alexander Frolov @ 2020-06-02  6:40 UTC (permalink / raw)
  To: xenomai



On 6/1/20 12:23 PM, Meng, Fino via Xenomai wrote:
>
>> Sent: Monday, June 1, 2020 4:09 PM
>>
>> Hi all!
>>
>> I have a PCIe device in x86 motherboard that generate periodic MSI-X interrupts and I would like to handle them in the head
>> stage, how it can be done?
>> Thank you! Appreciate any help!
>>
>> Best,
>>     Alex
> Hi Alex,
>
> Kernel/driver/serial/16550A.c is a pci device, and have less code than net/igb driver,
> Which specific device u want to enable? Does it have a vanilla kernel driver already?

Not sure that 16550A uses MSI-X interrupts. However, net/igb does. Is it 
only driver in Xenomai that supports MSI-X?


I am using FPGA based device for periodic interrupts which is totally 
custom. We have are own driver.

Nevertheless, I have tested its latency from root stage driver and it is 
appropriately good (not over than 60us). It seems that
msix irqs are not stalled anywhere. Is it possible?

Can I guarantee that there will be no condition when MSIX interrupt will 
be deferred by head stage on more than that? What latency
improvement I can expect from moving to RTDM based driver?

Thank you!



^ permalink raw reply	[flat|nested] 4+ messages in thread

* Re: Handling MSI-X interrupts in the head stage for x86 platform
  2020-06-02  6:40   ` Alexander Frolov
@ 2020-06-02  7:46     ` Jan Kiszka
  0 siblings, 0 replies; 4+ messages in thread
From: Jan Kiszka @ 2020-06-02  7:46 UTC (permalink / raw)
  To: Alexander Frolov, xenomai

On 02.06.20 08:40, Alexander Frolov via Xenomai wrote:
> 
> 
> On 6/1/20 12:23 PM, Meng, Fino via Xenomai wrote:
>>
>>> Sent: Monday, June 1, 2020 4:09 PM
>>>
>>> Hi all!
>>>
>>> I have a PCIe device in x86 motherboard that generate periodic MSI-X
>>> interrupts and I would like to handle them in the head
>>> stage, how it can be done?
>>> Thank you! Appreciate any help!
>>>
>>> Best,
>>>     Alex
>> Hi Alex,
>>
>> Kernel/driver/serial/16550A.c is a pci device, and have less code than
>> net/igb driver,
>> Which specific device u want to enable? Does it have a vanilla kernel
>> driver already?
> 
> Not sure that 16550A uses MSI-X interrupts. However, net/igb does. Is it
> only driver in Xenomai that supports MSI-X?
> 
> 
> I am using FPGA based device for periodic interrupts which is totally
> custom. We have are own driver.
> 
> Nevertheless, I have tested its latency from root stage driver and it is
> appropriately good (not over than 60us). It seems that
> msix irqs are not stalled anywhere. Is it possible?
> 
> Can I guarantee that there will be no condition when MSIX interrupt will
> be deferred by head stage on more than that? What latency
> improvement I can expect from moving to RTDM based driver?
> 

Head stage defers according to priorities: There there is an interrupt
or a task for head stage pending, that will win. No guarantees beyond
what your own workload can guarantee. In addition, no guarantees
architecturally on what will happen in Linux (root stage) which could
defer your interrupt. If you want determinism, move it to head stage.

Jan

PS: MSI-X works as well as MSI or legacy INTx.

-- 
Siemens AG, Corporate Technology, CT RDA IOT SES-DE
Corporate Competence Center Embedded Linux


^ permalink raw reply	[flat|nested] 4+ messages in thread

end of thread, other threads:[~2020-06-02  7:46 UTC | newest]

Thread overview: 4+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2020-06-01  8:09 Handling MSI-X interrupts in the head stage for x86 platform Alexander Frolov
2020-06-01  9:23 ` Meng, Fino
2020-06-02  6:40   ` Alexander Frolov
2020-06-02  7:46     ` Jan Kiszka

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