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From: Juergen Gross <jgross@suse.com>
To: Tim Deegan <tim@xen.org>
Cc: Andrew Cooper <andrew.cooper3@citrix.com>,
	Jan Beulich <JBeulich@suse.com>,
	xen-devel <xen-devel@lists.xenproject.org>
Subject: Re: [PATCH v8 1/9] x86/xpti: avoid copying L4 page table contents when possible
Date: Sat, 21 Apr 2018 19:11:33 +0200	[thread overview]
Message-ID: <7a0d30e0-1c7c-c7f5-6bd0-81709ea3890a@suse.com> (raw)
In-Reply-To: <20180421133208.GA61756@deinos.phlegethon.org>

On 21/04/18 15:32, Tim Deegan wrote:
> Hi,
> 
> At 09:44 +0200 on 19 Apr (1524131080), Juergen Gross wrote:
>>>> So either I'm adding some kind of locking/rcu, or I'm switching to use
>>>> IPIs and access root_pgt_changed only locally.
>>>>
>>>> Do you have any preference?
>>>
>>> Since issuing an IPI is just a single call, I'd prefer not to have new (locking,
>>> rcu, or whatever else) logic added here. Unless of course someone, in
>>> particular Tim, thinks sending an IPI here is a rather bad idea.
> 
> AFAICS you're calling this from shadow code whenever it changes an
> L4e, so I'd rather not have an IPI here if we don't need it.
> 
>> Another alternative would be to pass another flag to the callers to
>> signal the need for a flush. This would require quite some modifications
>> to shadow code I'd like to avoid, though. OTOH this way we could combine
>> flushing the tlb and the root page tables. Tim, any preferences?
> 
> This sounds a promising direction but it should be doabl without major
> surgery to the shadow code.  The shadow code already leaves old sl4es
> visible (in TLBs) when it's safe to do so, so I think the right place
> to hook this is on the receiving side of the TLB flush IPI.  IOW as
> long as:
>  - you copy the L4 on context switch; and
>  - you copy it on the TLB flush IPI is received
> then you can rely on the existing TLB flush mechanisms to do what you need.
> And shadow doesn't have to behave differently from 'normal' PV MM.

It is not so easy. The problem is that e.g. a page fault will flush the
TLB entry for the page in question, but it won't lead to the L4 to be
copied. Additionally a new introduced page resulting in a new L4 entry
would possibly never result in picking up the new L4 shadow entry as a
TLB flush wouldn't be necessary and this would result in an endless
stream of page faults.

I tried that approach be just doing a L4 copy in case of a TLB flush IPI
on all affected cpus but this wouldn't be enough.

So what I'd need to do is to set a new flag when writing a L4 entry and
carry it up to the point where the TLB flush is done to add a L4 copy.
All the places which won't do a TLB flush today will have to add one
for the L4 copy.

> Do you think it needs more (in particular to avoid the L4 copy on TLB
> flushes?)  Would a per-domain flag be good enough if per-vcpu is
> difficult?


Juergen


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  reply	other threads:[~2018-04-21 17:11 UTC|newest]

Thread overview: 33+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-04-18  8:30 [PATCH v8 0/9] xen/x86: various XPTI speedups Juergen Gross
2018-04-18  8:30 ` [PATCH v8 1/9] x86/xpti: avoid copying L4 page table contents when possible Juergen Gross
2018-04-18 16:12   ` Jan Beulich
     [not found]   ` <5AD76E5A02000078001BC770@suse.com>
2018-04-19  6:19     ` Juergen Gross
2018-04-19  7:39       ` Jan Beulich
     [not found]       ` <5AD847BD02000078001BC8D9@suse.com>
2018-04-19  7:44         ` Juergen Gross
2018-04-21 13:32           ` Tim Deegan
2018-04-21 17:11             ` Juergen Gross [this message]
2018-04-22 16:39               ` Tim Deegan
2018-04-23  5:45                 ` Juergen Gross
2018-04-24 10:31                   ` Tim Deegan
2018-04-24 11:45                     ` Juergen Gross
2018-04-18  8:30 ` [PATCH v8 2/9] xen/x86: add a function for modifying cr3 Juergen Gross
2018-04-18  8:30 ` [PATCH v8 3/9] xen/x86: support per-domain flag for xpti Juergen Gross
2018-04-18  9:42   ` Sergey Dyasli
2018-04-18  9:49     ` Jan Beulich
2018-04-18  9:52       ` Juergen Gross
2018-04-18  9:54     ` Juergen Gross
2018-04-18 15:29   ` Jan Beulich
     [not found]   ` <5AD7647502000078001BC6C8@suse.com>
2018-04-18 15:33     ` Juergen Gross
2018-04-18 15:45       ` Jan Beulich
     [not found]       ` <5AD7680102000078001BC725@suse.com>
2018-04-18 15:54         ` Juergen Gross
2018-04-18 16:06           ` Jan Beulich
2018-04-18  8:30 ` [PATCH v8 4/9] xen/x86: use invpcid for flushing the TLB Juergen Gross
2018-04-18  8:30 ` [PATCH v8 5/9] xen/x86: disable global pages for domains with XPTI active Juergen Gross
2018-04-18  8:30 ` [PATCH v8 6/9] xen/x86: use flag byte for decision whether xen_cr3 is valid Juergen Gross
2018-04-18  8:30 ` [PATCH v8 7/9] xen/x86: convert pv_guest_cr4_to_real_cr4() to a function Juergen Gross
2018-04-18  8:30 ` [PATCH v8 8/9] xen/x86: add some cr3 helpers Juergen Gross
2018-04-18  8:30 ` [PATCH v8 9/9] xen/x86: use PCID feature Juergen Gross
2018-04-18  9:13   ` Jan Beulich
2018-04-18  9:37     ` Juergen Gross
2018-04-18 15:32       ` Jan Beulich
     [not found]       ` <5AD7652902000078001BC6F4@suse.com>
2018-04-18 15:36         ` Juergen Gross

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