Re: [PATCH net-next 2/5] qed: Fix TM block ILT allocation

[Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>]

On 4/3/2017 12:21 PM, Yuval Mintz wrote:

> From: Michal Kalderon <Michal.Kalderon@cavium.com>
>
> When configuring the HW timers block we should set the number of CIDs
> up until the last CID that require timers, instead of only those CIDs
> whose protocol needs timers support.
>
> Today, the protocols that require HW timers' support have their CIDs
> before any other protocol, but that would change in future [when we
> add iWARP support].
>
> Signed-off-by: Michal Kalderon <Michal.Kalderon@cavium.com>
> Signed-off-by: Yuval Mintz <Yuval.Mintz@cavium.com>
> ---
>  drivers/net/ethernet/qlogic/qed/qed_cxt.c | 32 ++++++++++++++++++++++++-------
>  1 file changed, 25 insertions(+), 7 deletions(-)
>
> diff --git a/drivers/net/ethernet/qlogic/qed/qed_cxt.c b/drivers/net/ethernet/qlogic/qed/qed_cxt.c
> index 1012b3c..259dafa 100644
> --- a/drivers/net/ethernet/qlogic/qed/qed_cxt.c
> +++ b/drivers/net/ethernet/qlogic/qed/qed_cxt.c
> @@ -303,16 +303,34 @@ struct qed_tm_iids {
>  	u32 per_vf_tids;
>  };
>
> -static void qed_cxt_tm_iids(struct qed_cxt_mngr *p_mngr,
> +static void qed_cxt_tm_iids(struct qed_hwfn *p_hwfn,
> +			    struct qed_cxt_mngr *p_mngr,
>  			    struct qed_tm_iids *iids)
>  {
> -	u32 i, j;
> -
> -	for (i = 0; i < MAX_CONN_TYPES; i++) {
> +	bool tm_vf_required = false;
> +	bool tm_required = false;
> +	int i, j;
> +
> +	/* Timers is a special case -> we don't count how many cids require

    S/is/are/. CIDs?

> +	 * timers but what's the max cid that will be used by the timer block.
> +	 * therefore we traverse in reverse order, and once we hit a protocol
> +	 * that requires the timers memory, we'll sum all the protocols up
> +	 * to that one.
> +	 */
> +	for (i = MAX_CONN_TYPES - 1; i >= 0; i--) {
[...]

MBR, Sergei