All of lore.kernel.org
 help / color / mirror / Atom feed
* [PATCH 0/6] fixed width type adjustments
@ 2023-02-09 10:36 Jan Beulich
  2023-02-09 10:38 ` [PATCH 1/6] x86/Hyper-V: use standard C types in hyperv-tlfs.h Jan Beulich
                   ` (5 more replies)
  0 siblings, 6 replies; 19+ messages in thread
From: Jan Beulich @ 2023-02-09 10:36 UTC (permalink / raw)
  To: xen-devel
  Cc: Andrew Cooper, George Dunlap, Julien Grall, Stefano Stabellini,
	Wei Liu, Roger Pau Monné,
	Bertrand Marquis, Bobby Eshleman, Alistair Francis, Connor Davis,
	Daniel Smith, Paul Durrant

Most of this is merely tidying, with patch 2 being the real meat, but partly
RFC (see there).

1: x86/Hyper-V: use standard C types in hyperv-tlfs.h
2: common: move standard C fixed width type declarations to common header
3: ACPI/CPER: use standard C types
4: x86/MSI: use standard C types in structures/unions
5: x86: use standard C types in struct cpuinfo_x86
6: common: __u8 is history

Jan


^ permalink raw reply	[flat|nested] 19+ messages in thread
* [PATCH 1/6] x86/Hyper-V: use standard C types in hyperv-tlfs.h
  2023-02-09 10:36 [PATCH 0/6] fixed width type adjustments Jan Beulich
@ 2023-02-09 10:38 ` Jan Beulich
  2023-02-15 13:56   ` Andrew Cooper
  2023-02-21 13:43   ` Ping: " Jan Beulich
  2023-02-09 10:38 ` [PATCH 2/6] common: move standard C fixed width type declarations to common header Jan Beulich
                   ` (4 subsequent siblings)
  5 siblings, 2 replies; 19+ messages in thread
From: Jan Beulich @ 2023-02-09 10:38 UTC (permalink / raw)
  To: xen-devel; +Cc: George Dunlap, Wei Liu, Paul Durrant

This is the only file left with a use of an __s<N> type coming from
Linux. Since the file has been using an apparently random mix of all
three classes of fixed-width types (__{s,u}<N>, {s,u}<N>, and
{,u}int<N>_t), consolidate this to use exclusively standard types.

No functional change intended.

Signed-off-by: Jan Beulich <jbeulich@suse.com>

--- a/xen/arch/x86/include/asm/guest/hyperv-tlfs.h
+++ b/xen/arch/x86/include/asm/guest/hyperv-tlfs.h
@@ -283,11 +283,11 @@
  * Declare the MSR used to setup pages used to communicate with the hypervisor.
  */
 union hv_x64_msr_hypercall_contents {
-	u64 as_uint64;
+	uint64_t as_uint64;
 	struct {
-		u64 enable:1;
-		u64 reserved:11;
-		u64 guest_physical_address:52;
+		uint64_t enable:1;
+		uint64_t reserved:11;
+		uint64_t guest_physical_address:52;
 	};
 };
 
@@ -295,11 +295,11 @@ union hv_x64_msr_hypercall_contents {
  * TSC page layout.
  */
 struct ms_hyperv_tsc_page {
-	volatile u32 tsc_sequence;
-	u32 reserved1;
-	volatile u64 tsc_scale;
-	volatile s64 tsc_offset;
-	u64 reserved2[509];
+	volatile uint32_t tsc_sequence;
+	uint32_t reserved1;
+	volatile uint64_t tsc_scale;
+	volatile int64_t tsc_offset;
+	uint64_t reserved2[509];
 };
 
 /*
@@ -343,21 +343,21 @@ union hv_guest_os_id
 };
 
 struct hv_reenlightenment_control {
-	__u64 vector:8;
-	__u64 reserved1:8;
-	__u64 enabled:1;
-	__u64 reserved2:15;
-	__u64 target_vp:32;
+	uint64_t vector:8;
+	uint64_t reserved1:8;
+	uint64_t enabled:1;
+	uint64_t reserved2:15;
+	uint64_t target_vp:32;
 };
 
 struct hv_tsc_emulation_control {
-	__u64 enabled:1;
-	__u64 reserved:63;
+	uint64_t enabled:1;
+	uint64_t reserved:63;
 };
 
 struct hv_tsc_emulation_status {
-	__u64 inprogress:1;
-	__u64 reserved:63;
+	uint64_t inprogress:1;
+	uint64_t reserved:63;
 };
 
 #define HV_X64_MSR_HYPERCALL_ENABLE		0x00000001
@@ -442,10 +442,10 @@ enum HV_GENERIC_SET_FORMAT {
 #define HV_CLOCK_HZ (NSEC_PER_SEC/100)
 
 typedef struct _HV_REFERENCE_TSC_PAGE {
-	__u32 tsc_sequence;
-	__u32 res1;
-	__u64 tsc_scale;
-	__s64 tsc_offset;
+	uint32_t tsc_sequence;
+	uint32_t res1;
+	uint64_t tsc_scale;
+	int64_t tsc_offset;
 } HV_REFERENCE_TSC_PAGE, *PHV_REFERENCE_TSC_PAGE;
 
 /* Define the number of synthetic interrupt sources. */
@@ -499,30 +499,30 @@ enum hv_message_type {
 
 /* Define synthetic interrupt controller message flags. */
 union hv_message_flags {
-	__u8 asu8;
+	uint8_t asu8;
 	struct {
-		__u8 msg_pending:1;
-		__u8 reserved:7;
+		uint8_t msg_pending:1;
+		uint8_t reserved:7;
 	};
 };
 
 /* Define port identifier type. */
 union hv_port_id {
-	__u32 asu32;
+	uint32_t asu32;
 	struct {
-		__u32 id:24;
-		__u32 reserved:8;
+		uint32_t id:24;
+		uint32_t reserved:8;
 	} u;
 };
 
 /* Define synthetic interrupt controller message header. */
 struct hv_message_header {
-	__u32 message_type;
-	__u8 payload_size;
+	uint32_t message_type;
+	uint8_t payload_size;
 	union hv_message_flags message_flags;
-	__u8 reserved[2];
+	uint8_t reserved[2];
 	union {
-		__u64 sender;
+		uint64_t sender;
 		union hv_port_id port;
 	};
 };
@@ -531,7 +531,7 @@ struct hv_message_header {
 struct hv_message {
 	struct hv_message_header header;
 	union {
-		__u64 payload[HV_MESSAGE_PAYLOAD_QWORD_COUNT];
+		uint64_t payload[HV_MESSAGE_PAYLOAD_QWORD_COUNT];
 	} u;
 };
 
@@ -542,19 +542,19 @@ struct hv_message_page {
 
 /* Define timer message payload structure. */
 struct hv_timer_message_payload {
-	__u32 timer_index;
-	__u32 reserved;
-	__u64 expiration_time;	/* When the timer expired */
-	__u64 delivery_time;	/* When the message was delivered */
+	uint32_t timer_index;
+	uint32_t reserved;
+	uint64_t expiration_time; /* When the timer expired */
+	uint64_t delivery_time;   /* When the message was delivered */
 };
 
 struct hv_nested_enlightenments_control {
 	struct {
-		__u32 directhypercall:1;
-		__u32 reserved:31;
+		uint32_t directhypercall:1;
+		uint32_t reserved:31;
 	} features;
 	struct {
-		__u32 reserved;
+		uint32_t reserved;
 	} hypercallControls;
 };
 
@@ -571,199 +571,199 @@ union hv_vp_assist_page_msr
 
 /* Define virtual processor assist page structure. */
 struct hv_vp_assist_page {
-	__u32 apic_assist;
-	__u32 reserved1;
-	__u64 vtl_control[3];
+	uint32_t apic_assist;
+	uint32_t reserved1;
+	uint64_t vtl_control[3];
 	struct hv_nested_enlightenments_control nested_control;
-	__u8 enlighten_vmentry;
-	__u8 reserved2[7];
-	__u64 current_nested_vmcs;
+	uint8_t enlighten_vmentry;
+	uint8_t reserved2[7];
+	uint64_t current_nested_vmcs;
 };
 
 struct hv_enlightened_vmcs {
-	u32 revision_id;
-	u32 abort;
+	uint32_t revision_id;
+	uint32_t abort;
 
-	u16 host_es_selector;
-	u16 host_cs_selector;
-	u16 host_ss_selector;
-	u16 host_ds_selector;
-	u16 host_fs_selector;
-	u16 host_gs_selector;
-	u16 host_tr_selector;
-
-	u16 padding16_1;
-
-	u64 host_ia32_pat;
-	u64 host_ia32_efer;
-
-	u64 host_cr0;
-	u64 host_cr3;
-	u64 host_cr4;
-
-	u64 host_ia32_sysenter_esp;
-	u64 host_ia32_sysenter_eip;
-	u64 host_rip;
-	u32 host_ia32_sysenter_cs;
-
-	u32 pin_based_vm_exec_control;
-	u32 vm_exit_controls;
-	u32 secondary_vm_exec_control;
-
-	u64 io_bitmap_a;
-	u64 io_bitmap_b;
-	u64 msr_bitmap;
-
-	u16 guest_es_selector;
-	u16 guest_cs_selector;
-	u16 guest_ss_selector;
-	u16 guest_ds_selector;
-	u16 guest_fs_selector;
-	u16 guest_gs_selector;
-	u16 guest_ldtr_selector;
-	u16 guest_tr_selector;
-
-	u32 guest_es_limit;
-	u32 guest_cs_limit;
-	u32 guest_ss_limit;
-	u32 guest_ds_limit;
-	u32 guest_fs_limit;
-	u32 guest_gs_limit;
-	u32 guest_ldtr_limit;
-	u32 guest_tr_limit;
-	u32 guest_gdtr_limit;
-	u32 guest_idtr_limit;
-
-	u32 guest_es_ar_bytes;
-	u32 guest_cs_ar_bytes;
-	u32 guest_ss_ar_bytes;
-	u32 guest_ds_ar_bytes;
-	u32 guest_fs_ar_bytes;
-	u32 guest_gs_ar_bytes;
-	u32 guest_ldtr_ar_bytes;
-	u32 guest_tr_ar_bytes;
-
-	u64 guest_es_base;
-	u64 guest_cs_base;
-	u64 guest_ss_base;
-	u64 guest_ds_base;
-	u64 guest_fs_base;
-	u64 guest_gs_base;
-	u64 guest_ldtr_base;
-	u64 guest_tr_base;
-	u64 guest_gdtr_base;
-	u64 guest_idtr_base;
-
-	u64 padding64_1[3];
-
-	u64 vm_exit_msr_store_addr;
-	u64 vm_exit_msr_load_addr;
-	u64 vm_entry_msr_load_addr;
-
-	u64 cr3_target_value0;
-	u64 cr3_target_value1;
-	u64 cr3_target_value2;
-	u64 cr3_target_value3;
-
-	u32 page_fault_error_code_mask;
-	u32 page_fault_error_code_match;
-
-	u32 cr3_target_count;
-	u32 vm_exit_msr_store_count;
-	u32 vm_exit_msr_load_count;
-	u32 vm_entry_msr_load_count;
-
-	u64 tsc_offset;
-	u64 virtual_apic_page_addr;
-	u64 vmcs_link_pointer;
-
-	u64 guest_ia32_debugctl;
-	u64 guest_ia32_pat;
-	u64 guest_ia32_efer;
-
-	u64 guest_pdptr0;
-	u64 guest_pdptr1;
-	u64 guest_pdptr2;
-	u64 guest_pdptr3;
-
-	u64 guest_pending_dbg_exceptions;
-	u64 guest_sysenter_esp;
-	u64 guest_sysenter_eip;
-
-	u32 guest_activity_state;
-	u32 guest_sysenter_cs;
-
-	u64 cr0_guest_host_mask;
-	u64 cr4_guest_host_mask;
-	u64 cr0_read_shadow;
-	u64 cr4_read_shadow;
-	u64 guest_cr0;
-	u64 guest_cr3;
-	u64 guest_cr4;
-	u64 guest_dr7;
-
-	u64 host_fs_base;
-	u64 host_gs_base;
-	u64 host_tr_base;
-	u64 host_gdtr_base;
-	u64 host_idtr_base;
-	u64 host_rsp;
-
-	u64 ept_pointer;
-
-	u16 virtual_processor_id;
-	u16 padding16_2[3];
-
-	u64 padding64_2[5];
-	u64 guest_physical_address;
-
-	u32 vm_instruction_error;
-	u32 vm_exit_reason;
-	u32 vm_exit_intr_info;
-	u32 vm_exit_intr_error_code;
-	u32 idt_vectoring_info_field;
-	u32 idt_vectoring_error_code;
-	u32 vm_exit_instruction_len;
-	u32 vmx_instruction_info;
-
-	u64 exit_qualification;
-	u64 exit_io_instruction_ecx;
-	u64 exit_io_instruction_esi;
-	u64 exit_io_instruction_edi;
-	u64 exit_io_instruction_eip;
-
-	u64 guest_linear_address;
-	u64 guest_rsp;
-	u64 guest_rflags;
-
-	u32 guest_interruptibility_info;
-	u32 cpu_based_vm_exec_control;
-	u32 exception_bitmap;
-	u32 vm_entry_controls;
-	u32 vm_entry_intr_info_field;
-	u32 vm_entry_exception_error_code;
-	u32 vm_entry_instruction_len;
-	u32 tpr_threshold;
-
-	u64 guest_rip;
-
-	u32 hv_clean_fields;
-	u32 hv_padding_32;
-	u32 hv_synthetic_controls;
-	struct {
-		u32 nested_flush_hypercall:1;
-		u32 msr_bitmap:1;
-		u32 reserved:30;
+	uint16_t host_es_selector;
+	uint16_t host_cs_selector;
+	uint16_t host_ss_selector;
+	uint16_t host_ds_selector;
+	uint16_t host_fs_selector;
+	uint16_t host_gs_selector;
+	uint16_t host_tr_selector;
+
+	uint16_t padding16_1;
+
+	uint64_t host_ia32_pat;
+	uint64_t host_ia32_efer;
+
+	uint64_t host_cr0;
+	uint64_t host_cr3;
+	uint64_t host_cr4;
+
+	uint64_t host_ia32_sysenter_esp;
+	uint64_t host_ia32_sysenter_eip;
+	uint64_t host_rip;
+	uint32_t host_ia32_sysenter_cs;
+
+	uint32_t pin_based_vm_exec_control;
+	uint32_t vm_exit_controls;
+	uint32_t secondary_vm_exec_control;
+
+	uint64_t io_bitmap_a;
+	uint64_t io_bitmap_b;
+	uint64_t msr_bitmap;
+
+	uint16_t guest_es_selector;
+	uint16_t guest_cs_selector;
+	uint16_t guest_ss_selector;
+	uint16_t guest_ds_selector;
+	uint16_t guest_fs_selector;
+	uint16_t guest_gs_selector;
+	uint16_t guest_ldtr_selector;
+	uint16_t guest_tr_selector;
+
+	uint32_t guest_es_limit;
+	uint32_t guest_cs_limit;
+	uint32_t guest_ss_limit;
+	uint32_t guest_ds_limit;
+	uint32_t guest_fs_limit;
+	uint32_t guest_gs_limit;
+	uint32_t guest_ldtr_limit;
+	uint32_t guest_tr_limit;
+	uint32_t guest_gdtr_limit;
+	uint32_t guest_idtr_limit;
+
+	uint32_t guest_es_ar_bytes;
+	uint32_t guest_cs_ar_bytes;
+	uint32_t guest_ss_ar_bytes;
+	uint32_t guest_ds_ar_bytes;
+	uint32_t guest_fs_ar_bytes;
+	uint32_t guest_gs_ar_bytes;
+	uint32_t guest_ldtr_ar_bytes;
+	uint32_t guest_tr_ar_bytes;
+
+	uint64_t guest_es_base;
+	uint64_t guest_cs_base;
+	uint64_t guest_ss_base;
+	uint64_t guest_ds_base;
+	uint64_t guest_fs_base;
+	uint64_t guest_gs_base;
+	uint64_t guest_ldtr_base;
+	uint64_t guest_tr_base;
+	uint64_t guest_gdtr_base;
+	uint64_t guest_idtr_base;
+
+	uint64_t padding64_1[3];
+
+	uint64_t vm_exit_msr_store_addr;
+	uint64_t vm_exit_msr_load_addr;
+	uint64_t vm_entry_msr_load_addr;
+
+	uint64_t cr3_target_value0;
+	uint64_t cr3_target_value1;
+	uint64_t cr3_target_value2;
+	uint64_t cr3_target_value3;
+
+	uint32_t page_fault_error_code_mask;
+	uint32_t page_fault_error_code_match;
+
+	uint32_t cr3_target_count;
+	uint32_t vm_exit_msr_store_count;
+	uint32_t vm_exit_msr_load_count;
+	uint32_t vm_entry_msr_load_count;
+
+	uint64_t tsc_offset;
+	uint64_t virtual_apic_page_addr;
+	uint64_t vmcs_link_pointer;
+
+	uint64_t guest_ia32_debugctl;
+	uint64_t guest_ia32_pat;
+	uint64_t guest_ia32_efer;
+
+	uint64_t guest_pdptr0;
+	uint64_t guest_pdptr1;
+	uint64_t guest_pdptr2;
+	uint64_t guest_pdptr3;
+
+	uint64_t guest_pending_dbg_exceptions;
+	uint64_t guest_sysenter_esp;
+	uint64_t guest_sysenter_eip;
+
+	uint32_t guest_activity_state;
+	uint32_t guest_sysenter_cs;
+
+	uint64_t cr0_guest_host_mask;
+	uint64_t cr4_guest_host_mask;
+	uint64_t cr0_read_shadow;
+	uint64_t cr4_read_shadow;
+	uint64_t guest_cr0;
+	uint64_t guest_cr3;
+	uint64_t guest_cr4;
+	uint64_t guest_dr7;
+
+	uint64_t host_fs_base;
+	uint64_t host_gs_base;
+	uint64_t host_tr_base;
+	uint64_t host_gdtr_base;
+	uint64_t host_idtr_base;
+	uint64_t host_rsp;
+
+	uint64_t ept_pointer;
+
+	uint16_t virtual_processor_id;
+	uint16_t padding16_2[3];
+
+	uint64_t padding64_2[5];
+	uint64_t guest_physical_address;
+
+	uint32_t vm_instruction_error;
+	uint32_t vm_exit_reason;
+	uint32_t vm_exit_intr_info;
+	uint32_t vm_exit_intr_error_code;
+	uint32_t idt_vectoring_info_field;
+	uint32_t idt_vectoring_error_code;
+	uint32_t vm_exit_instruction_len;
+	uint32_t vmx_instruction_info;
+
+	uint64_t exit_qualification;
+	uint64_t exit_io_instruction_ecx;
+	uint64_t exit_io_instruction_esi;
+	uint64_t exit_io_instruction_edi;
+	uint64_t exit_io_instruction_eip;
+
+	uint64_t guest_linear_address;
+	uint64_t guest_rsp;
+	uint64_t guest_rflags;
+
+	uint32_t guest_interruptibility_info;
+	uint32_t cpu_based_vm_exec_control;
+	uint32_t exception_bitmap;
+	uint32_t vm_entry_controls;
+	uint32_t vm_entry_intr_info_field;
+	uint32_t vm_entry_exception_error_code;
+	uint32_t vm_entry_instruction_len;
+	uint32_t tpr_threshold;
+
+	uint64_t guest_rip;
+
+	uint32_t hv_clean_fields;
+	uint32_t hv_padding_32;
+	uint32_t hv_synthetic_controls;
+	struct {
+		uint32_t nested_flush_hypercall:1;
+		uint32_t msr_bitmap:1;
+		uint32_t reserved:30;
 	}  hv_enlightenments_control;
-	u32 hv_vp_id;
+	uint32_t hv_vp_id;
 
-	u64 hv_vm_id;
-	u64 partition_assist_page;
-	u64 padding64_4[4];
-	u64 guest_bndcfgs;
-	u64 padding64_5[7];
-	u64 xss_exit_bitmap;
-	u64 padding64_6[7];
+	uint64_t hv_vm_id;
+	uint64_t partition_assist_page;
+	uint64_t padding64_4[4];
+	uint64_t guest_bndcfgs;
+	uint64_t padding64_5[7];
+	uint64_t xss_exit_bitmap;
+	uint64_t padding64_6[7];
 };
 
 #define HV_VMX_ENLIGHTENED_CLEAN_FIELD_NONE			0
@@ -794,17 +794,17 @@ struct hv_enlightened_vmcs {
  * Synthetic timer configuration.
  */
 union hv_stimer_config {
-	u64 as_uint64;
+	uint64_t as_uint64;
 	struct {
-		u64 enable:1;
-		u64 periodic:1;
-		u64 lazy:1;
-		u64 auto_enable:1;
-		u64 apic_vector:8;
-		u64 direct_mode:1;
-		u64 reserved_z0:3;
-		u64 sintx:4;
-		u64 reserved_z1:44;
+		uint64_t enable:1;
+		uint64_t periodic:1;
+		uint64_t lazy:1;
+		uint64_t auto_enable:1;
+		uint64_t apic_vector:8;
+		uint64_t direct_mode:1;
+		uint64_t reserved_z0:3;
+		uint64_t sintx:4;
+		uint64_t reserved_z1:44;
 	};
 };
 
@@ -816,70 +816,70 @@ union hv_synic_event_flags {
 
 /* Define SynIC control register. */
 union hv_synic_scontrol {
-	u64 as_uint64;
+	uint64_t as_uint64;
 	struct {
-		u64 enable:1;
-		u64 reserved:63;
+		uint64_t enable:1;
+		uint64_t reserved:63;
 	};
 };
 
 /* Define synthetic interrupt source. */
 union hv_synic_sint {
-	u64 as_uint64;
+	uint64_t as_uint64;
 	struct {
-		u64 vector:8;
-		u64 reserved1:8;
-		u64 masked:1;
-		u64 auto_eoi:1;
-		u64 polling:1;
-		u64 reserved2:45;
+		uint64_t vector:8;
+		uint64_t reserved1:8;
+		uint64_t masked:1;
+		uint64_t auto_eoi:1;
+		uint64_t polling:1;
+		uint64_t reserved2:45;
 	};
 };
 
 /* Define the format of the SIMP register */
 union hv_synic_simp {
-	u64 as_uint64;
+	uint64_t as_uint64;
 	struct {
-		u64 simp_enabled:1;
-		u64 preserved:11;
-		u64 base_simp_gpa:52;
+		uint64_t simp_enabled:1;
+		uint64_t preserved:11;
+		uint64_t base_simp_gpa:52;
 	};
 };
 
 /* Define the format of the SIEFP register */
 union hv_synic_siefp {
-	u64 as_uint64;
+	uint64_t as_uint64;
 	struct {
-		u64 siefp_enabled:1;
-		u64 preserved:11;
-		u64 base_siefp_gpa:52;
+		uint64_t siefp_enabled:1;
+		uint64_t preserved:11;
+		uint64_t base_siefp_gpa:52;
 	};
 };
 
 struct hv_vpset {
-	u64 format;
-	u64 valid_bank_mask;
-	u64 bank_contents[];
+	uint64_t format;
+	uint64_t valid_bank_mask;
+	uint64_t bank_contents[];
 };
 
 /* HvCallSendSyntheticClusterIpi hypercall */
 struct hv_send_ipi {
-	u32 vector;
-	u32 reserved;
-	u64 cpu_mask;
+	uint32_t vector;
+	uint32_t reserved;
+	uint64_t cpu_mask;
 };
 
 /* HvCallSendSyntheticClusterIpiEx hypercall */
 struct hv_send_ipi_ex {
-	u32 vector;
-	u32 reserved;
+	uint32_t vector;
+	uint32_t reserved;
 	struct hv_vpset vp_set;
 };
 
 /* HvFlushGuestPhysicalAddressSpace hypercalls */
 struct hv_guest_mapping_flush {
-	u64 address_space;
-	u64 flags;
+	uint64_t address_space;
+	uint64_t flags;
 };
 
 /*
@@ -890,11 +890,11 @@ struct hv_guest_mapping_flush {
 
 /* HvFlushGuestPhysicalAddressList hypercall */
 union hv_gpa_page_range {
-	u64 address_space;
+	uint64_t address_space;
 	struct {
-		u64 additional_pages:11;
-		u64 largepage:1;
-		u64 basepfn:52;
+		uint64_t additional_pages:11;
+		uint64_t largepage:1;
+		uint64_t basepfn:52;
 	} page;
 };
 
@@ -903,32 +903,32 @@ union hv_gpa_page_range {
  * count is equal with how many entries of union hv_gpa_page_range can
  * be populated into the input parameter page.
  */
-#define HV_MAX_FLUSH_REP_COUNT ((HV_HYP_PAGE_SIZE - 2 * sizeof(u64)) /	\
+#define HV_MAX_FLUSH_REP_COUNT ((HV_HYP_PAGE_SIZE - 2 * sizeof(uint64_t)) / \
 				sizeof(union hv_gpa_page_range))
 
 struct hv_guest_mapping_flush_list {
-	u64 address_space;
-	u64 flags;
+	uint64_t address_space;
+	uint64_t flags;
 	union hv_gpa_page_range gpa_list[HV_MAX_FLUSH_REP_COUNT];
 };
 
 /* HvFlushVirtualAddressSpace, HvFlushVirtualAddressList hypercalls */
 struct hv_tlb_flush {
-	u64 address_space;
-	u64 flags;
-	u64 processor_mask;
-	u64 gva_list[];
+	uint64_t address_space;
+	uint64_t flags;
+	uint64_t processor_mask;
+	uint64_t gva_list[];
 };
 
 /* HvFlushVirtualAddressSpaceEx hypercall */
 struct hv_tlb_flush_ex {
-	u64 address_space;
-	u64 flags;
+	uint64_t address_space;
+	uint64_t flags;
 	struct hv_vpset hv_vp_set;
-	/* u64 gva_list[]; */
+	/* uint64_t gva_list[]; */
 };
 
 struct hv_partition_assist_pg {
-	u32 tlb_lock_count;
+	uint32_t tlb_lock_count;
 };
 #endif



^ permalink raw reply	[flat|nested] 19+ messages in thread
* [PATCH 2/6] common: move standard C fixed width type declarations to common header
  2023-02-09 10:36 [PATCH 0/6] fixed width type adjustments Jan Beulich
  2023-02-09 10:38 ` [PATCH 1/6] x86/Hyper-V: use standard C types in hyperv-tlfs.h Jan Beulich
@ 2023-02-09 10:38 ` Jan Beulich
  2023-02-09 14:23   ` Daniel P. Smith
  2023-02-15 18:54   ` Andrew Cooper
  2023-02-09 10:39 ` [PATCH 3/6] ACPI/CPER: use standard C types Jan Beulich
                   ` (3 subsequent siblings)
  5 siblings, 2 replies; 19+ messages in thread
From: Jan Beulich @ 2023-02-09 10:38 UTC (permalink / raw)
  To: xen-devel
  Cc: Andrew Cooper, George Dunlap, Julien Grall, Stefano Stabellini,
	Wei Liu, Roger Pau Monné,
	Bertrand Marquis, Bobby Eshleman, Alistair Francis, Connor Davis,
	Daniel Smith, Paul Durrant

Have these in one place, for all architectures to use. Also use the C99
types as the "original" ones, and derive the Linux compatible ones
(which we're trying to phase out). For __s<N>, seeing that no uses exist
anymore, move them to a new Linux compatibility header (as an act of
precaution - we don't have any uses of these types right now).

Modern compilers supply __{,U}INT<n>_TYPE__ - use those if available.
Otherwise fall back to using "mode" attributes, but this can be relied
upon only when bytes are 8 bits wide. Should there ever be a port to an
architecture not matching this, it would need to define the fixed width
types locally by some other means.

In a few cases inclusion of asm/types.h needs replacing by xen/types.h.
Further in common/trace.c take the opportunity and also drop the
apparently unused inclusion of asm/io.h at the same time. Finally in
some Flask sources inclusion of asm/byteorder.h needs moving later.

No functional change intended.

Signed-off-by: Jan Beulich <jbeulich@suse.com>
---
RFC: I know Andrew would prefer these types to move to a new
     xen/stdint.h, but not being fully convinced of this myself, I was
     hoping for others to voice views.

--- a/xen/arch/arm/include/asm/types.h
+++ b/xen/arch/arm/include/asm/types.h
@@ -1,37 +1,8 @@
 #ifndef __ARM_TYPES_H__
 #define __ARM_TYPES_H__
 
-typedef __signed__ char __s8;
-typedef unsigned char __u8;
-
-typedef __signed__ short __s16;
-typedef unsigned short __u16;
-
-typedef __signed__ int __s32;
-typedef unsigned int __u32;
-
-#if defined(__GNUC__) && !defined(__STRICT_ANSI__)
 #if defined(CONFIG_ARM_32)
-typedef __signed__ long long __s64;
-typedef unsigned long long __u64;
-#elif defined (CONFIG_ARM_64)
-typedef __signed__ long __s64;
-typedef unsigned long __u64;
-#endif
-#endif
-
-typedef signed char s8;
-typedef unsigned char u8;
 
-typedef signed short s16;
-typedef unsigned short u16;
-
-typedef signed int s32;
-typedef unsigned int u32;
-
-#if defined(CONFIG_ARM_32)
-typedef signed long long s64;
-typedef unsigned long long u64;
 typedef u32 vaddr_t;
 #define PRIvaddr PRIx32
 typedef u64 paddr_t;
@@ -39,9 +10,9 @@ typedef u64 paddr_t;
 #define PRIpaddr "016llx"
 typedef u32 register_t;
 #define PRIregister "08x"
-#elif defined (CONFIG_ARM_64)
-typedef signed long s64;
-typedef unsigned long u64;
+
+#elif defined(CONFIG_ARM_64)
+
 typedef u64 vaddr_t;
 #define PRIvaddr PRIx64
 typedef u64 paddr_t;
@@ -49,6 +20,7 @@ typedef u64 paddr_t;
 #define PRIpaddr "016lx"
 typedef u64 register_t;
 #define PRIregister "016lx"
+
 #endif
 
 #endif /* __ARM_TYPES_H__ */
--- a/xen/arch/riscv/include/asm/types.h
+++ b/xen/arch/riscv/include/asm/types.h
@@ -1,38 +1,8 @@
 #ifndef __RISCV_TYPES_H__
 #define __RISCV_TYPES_H__
 
-typedef __signed__ char __s8;
-typedef unsigned char __u8;
-
-typedef __signed__ short __s16;
-typedef unsigned short __u16;
-
-typedef __signed__ int __s32;
-typedef unsigned int __u32;
-
-#if defined(__GNUC__) && !defined(__STRICT_ANSI__)
-#if defined(CONFIG_RISCV_32)
-typedef __signed__ long long __s64;
-typedef unsigned long long __u64;
-#elif defined (CONFIG_RISCV_64)
-typedef __signed__ long __s64;
-typedef unsigned long __u64;
-#endif
-#endif
-
-typedef signed char s8;
-typedef unsigned char u8;
-
-typedef signed short s16;
-typedef unsigned short u16;
-
-typedef signed int s32;
-typedef unsigned int u32;
-
 #if defined(CONFIG_RISCV_32)
 
-typedef signed long long s64;
-typedef unsigned long long u64;
 typedef u32 vaddr_t;
 #define PRIvaddr PRIx32
 typedef u64 paddr_t;
@@ -43,8 +13,6 @@ typedef u32 register_t;
 
 #elif defined (CONFIG_RISCV_64)
 
-typedef signed long s64;
-typedef unsigned long u64;
 typedef u64 vaddr_t;
 #define PRIvaddr PRIx64
 typedef u64 paddr_t;
--- a/xen/arch/x86/include/asm/types.h
+++ b/xen/arch/x86/include/asm/types.h
@@ -1,31 +1,6 @@
 #ifndef __X86_TYPES_H__
 #define __X86_TYPES_H__
 
-typedef __signed__ char __s8;
-typedef unsigned char __u8;
-
-typedef __signed__ short __s16;
-typedef unsigned short __u16;
-
-typedef __signed__ int __s32;
-typedef unsigned int __u32;
-
-#if defined(__GNUC__) && !defined(__STRICT_ANSI__)
-typedef __signed__ long __s64;
-typedef unsigned long __u64;
-#endif
-
-typedef signed char s8;
-typedef unsigned char u8;
-
-typedef signed short s16;
-typedef unsigned short u16;
-
-typedef signed int s32;
-typedef unsigned int u32;
-
-typedef signed long s64;
-typedef unsigned long u64;
 typedef unsigned long paddr_t;
 #define INVALID_PADDR (~0UL)
 #define PRIpaddr "016lx"
--- a/xen/common/trace.c
+++ b/xen/common/trace.c
@@ -16,8 +16,6 @@
  * it's possible to reconstruct a chronological record of trace events.
  */
 
-#include <asm/types.h>
-#include <asm/io.h>
 #include <xen/lib.h>
 #include <xen/param.h>
 #include <xen/sched.h>
--- a/xen/include/xen/bitops.h
+++ b/xen/include/xen/bitops.h
@@ -1,6 +1,7 @@
 #ifndef _LINUX_BITOPS_H
 #define _LINUX_BITOPS_H
-#include <asm/types.h>
+
+#include <xen/types.h>
 
 /*
  * Create a contiguous bitmask starting at bit position @l and ending at
--- /dev/null
+++ b/xen/include/xen/linux-compat.h
@@ -0,0 +1,19 @@
+/******************************************************************************
+ * linux-compat.h
+ *
+ * Container for types and other definitions use in Linux (and hence in files
+ * we "steal" from there), but which shouldn't be used (anymore) in normal Xen
+ * files.
+ */
+
+#ifndef __XEN_LINUX_COMPAT_H__
+#define __XEN_LINUX_COMPAT_H__
+
+#include <xen/types.h>
+
+typedef int8_t  __s8;
+typedef int16_t __s16;
+typedef int32_t __s32;
+typedef int64_t __s64;
+
+#endif /* __XEN_LINUX_COMPAT_H__ */
--- a/xen/include/xen/types.h
+++ b/xen/include/xen/types.h
@@ -3,6 +3,66 @@
 
 #include <xen/stdbool.h>
 
+/* Fixed width types */
+
+#if defined(__INT8_TYPE__)
+typedef __INT8_TYPE__ int8_t;
+#elif BITS_PER_BYTE == 8
+typedef signed int __attribute__((__mode__(__QI__))) int8_t;
+#endif
+
+#if defined(__UINT8_TYPE__)
+typedef __UINT8_TYPE__ uint8_t;
+#elif BITS_PER_BYTE == 8
+typedef unsigned int __attribute__((__mode__(__QI__))) uint8_t;
+#endif
+
+#if defined(__INT16_TYPE__)
+typedef __INT16_TYPE__ int16_t;
+#elif BITS_PER_BYTE == 8
+typedef signed int __attribute__((__mode__(__HI__))) int16_t;
+#endif
+
+#if defined(__UINT16_TYPE__)
+typedef __UINT16_TYPE__ uint16_t;
+#elif BITS_PER_BYTE == 8
+typedef unsigned int __attribute__((__mode__(__HI__))) uint16_t;
+#endif
+
+#if defined(__INT32_TYPE__)
+typedef __INT32_TYPE__ int32_t;
+#elif BITS_PER_BYTE == 8
+typedef signed int __attribute__((__mode__(__SI__))) int32_t;
+#endif
+
+#if defined(__UINT32_TYPE__)
+typedef __UINT32_TYPE__ uint32_t;
+#elif BITS_PER_BYTE == 8
+typedef unsigned int __attribute__((__mode__(__SI__))) uint32_t;
+#endif
+
+#if defined(__INT64_TYPE__)
+typedef __INT64_TYPE__ int64_t;
+#elif BITS_PER_BYTE == 8
+typedef signed int __attribute__((__mode__(__DI__))) int64_t;
+#endif
+
+#if defined(__UINT64_TYPE__)
+typedef __UINT64_TYPE__ uint64_t;
+#elif BITS_PER_BYTE == 8
+typedef unsigned int __attribute__((__mode__(__DI__))) uint64_t;
+#endif
+
+/* Linux inherited types which are being phased out */
+typedef int8_t s8;
+typedef uint8_t u8, __u8;
+typedef int16_t s16;
+typedef uint16_t u16, __u16;
+typedef int32_t s32;
+typedef uint32_t u32, __u32;
+typedef int64_t s64;
+typedef uint64_t u64, __u64;
+
 #include <asm/types.h>
 
 #if defined(__SIZE_TYPE__)
@@ -46,18 +106,6 @@ typedef signed long ptrdiff_t;
 #define LONG_MIN        (-LONG_MAX - 1)
 #define ULONG_MAX       (~0UL)
 
-typedef         __u8            uint8_t;
-typedef         __s8            int8_t;
-
-typedef         __u16           uint16_t;
-typedef         __s16           int16_t;
-
-typedef         __u32           uint32_t;
-typedef         __s32           int32_t;
-
-typedef         __u64           uint64_t;
-typedef         __s64           int64_t;
-
 typedef __u16 __le16;
 typedef __u16 __be16;
 typedef __u32 __le32;
--- a/xen/xsm/flask/ss/conditional.c
+++ b/xen/xsm/flask/ss/conditional.c
@@ -9,7 +9,6 @@
 
 /* Ported to Xen 3.0, George Coker, <gscoker@alpha.ncsc.mil> */
 
-#include <asm/byteorder.h>
 #include <xen/lib.h>
 #include <xen/types.h>
 #include <xen/errno.h>
@@ -17,6 +16,8 @@
 #include <xen/spinlock.h>
 #include <xen/xmalloc.h>
 
+#include <asm/byteorder.h>
+
 #include "security.h"
 #include "conditional.h"
 
--- a/xen/xsm/flask/ss/ebitmap.c
+++ b/xen/xsm/flask/ss/ebitmap.c
@@ -10,12 +10,14 @@
 
 /* Ported to Xen 3.0, George Coker, <gscoker@alpha.ncsc.mil> */
 
-#include <asm/byteorder.h>
 #include <xen/lib.h>
 #include <xen/xmalloc.h>
 #include <xen/errno.h>
 #include <xen/spinlock.h>
 #include <xen/bitmap.h>
+
+#include <asm/byteorder.h>
+
 #include "ebitmap.h"
 #include "policydb.h"
 
--- a/xen/xsm/flask/ss/policydb.c
+++ b/xen/xsm/flask/ss/policydb.c
@@ -22,12 +22,14 @@
 
 /* Ported to Xen 3.0, George Coker, <gscoker@alpha.ncsc.mil> */
 
-#include <asm/byteorder.h>
 #include <xen/lib.h>
 #include <xen/types.h>
 #include <xen/xmalloc.h>
 #include <xen/string.h>
 #include <xen/errno.h>
+
+#include <asm/byteorder.h>
+
 #include <conditional.h>
 #include "security.h"
 



^ permalink raw reply	[flat|nested] 19+ messages in thread
* [PATCH 3/6] ACPI/CPER: use standard C types
  2023-02-09 10:36 [PATCH 0/6] fixed width type adjustments Jan Beulich
  2023-02-09 10:38 ` [PATCH 1/6] x86/Hyper-V: use standard C types in hyperv-tlfs.h Jan Beulich
  2023-02-09 10:38 ` [PATCH 2/6] common: move standard C fixed width type declarations to common header Jan Beulich
@ 2023-02-09 10:39 ` Jan Beulich
  2023-02-15 19:10   ` Andrew Cooper
  2023-02-09 10:39 ` [PATCH 4/6] x86/MSI: use standard C types in structures/unions Jan Beulich
                   ` (2 subsequent siblings)
  5 siblings, 1 reply; 19+ messages in thread
From: Jan Beulich @ 2023-02-09 10:39 UTC (permalink / raw)
  To: xen-devel
  Cc: Andrew Cooper, George Dunlap, Julien Grall, Stefano Stabellini, Wei Liu

Consolidate cper.h to use exclusively standard types.

No functional change intended.

Signed-off-by: Jan Beulich <jbeulich@suse.com>

--- a/xen/include/xen/cper.h
+++ b/xen/include/xen/cper.h
@@ -27,7 +27,7 @@
 extern unsigned long get_sec(void);
 
 typedef struct {
-	__u8 b[16];
+	uint8_t b[16];
 } uuid_le;
 
 static inline int uuid_le_cmp(const uuid_le u1, const uuid_le u2)
@@ -35,12 +35,12 @@ static inline int uuid_le_cmp(const uuid
         return memcmp(&u1, &u2, sizeof(uuid_le));
 }
 
-static inline u64 cper_next_record_id(void)
+static inline uint64_t cper_next_record_id(void)
 {
-	static u64 record_id;
+	static uint64_t record_id;
 
 	if (!record_id)
-		record_id = (u64)get_sec() << 32;
+		record_id = (uint64_t)get_sec() << 32;
 
 	return ++record_id;
 }
@@ -154,36 +154,36 @@ static inline u64 cper_next_record_id(vo
 
 struct cper_record_header {
 	char	signature[CPER_SIG_SIZE];	/* must be CPER_SIG_RECORD */
-	__u16	revision;			/* must be CPER_RECORD_REV */
-	__u32	signature_end;			/* must be CPER_SIG_END */
-	__u16	section_count;
-	__u32	error_severity;
-	__u32	validation_bits;
-	__u32	record_length;
-	__u64	timestamp;
+	uint16_t revision;			/* must be CPER_RECORD_REV */
+	uint32_t signature_end;			/* must be CPER_SIG_END */
+	uint16_t section_count;
+	uint32_t error_severity;
+	uint32_t validation_bits;
+	uint32_t record_length;
+	uint64_t timestamp;
 	uuid_le	platform_id;
 	uuid_le	partition_id;
 	uuid_le	creator_id;
 	uuid_le	notification_type;
-	__u64	record_id;
-	__u32	flags;
-	__u64	persistence_information;
-	__u8	reserved[12];			/* must be zero */
+	uint64_t record_id;
+	uint32_t flags;
+	uint64_t persistence_information;
+	uint8_t reserved[12];			/* must be zero */
 };
 
 struct cper_section_descriptor {
-	__u32	section_offset;		/* Offset in bytes of the
+	uint32_t section_offset;	/* Offset in bytes of the
 					 *  section body from the base
 					 *  of the record header */
-	__u32	section_length;
-	__u16	revision;		/* must be CPER_RECORD_REV */
-	__u8	validation_bits;
-	__u8	reserved;		/* must be zero */
-	__u32	flags;
+	uint32_t section_length;
+	uint16_t revision;		/* must be CPER_RECORD_REV */
+	uint8_t	validation_bits;
+	uint8_t	reserved;		/* must be zero */
+	uint32_t flags;
 	uuid_le	section_type;
 	uuid_le	fru_id;
-	__u32	section_severity;
-	__u8	fru_text[20];
+	uint32_t section_severity;
+	uint8_t	fru_text[20];
 };
 
 /* Reset to default packing */



^ permalink raw reply	[flat|nested] 19+ messages in thread
* [PATCH 4/6] x86/MSI: use standard C types in structures/unions
  2023-02-09 10:36 [PATCH 0/6] fixed width type adjustments Jan Beulich
                   ` (2 preceding siblings ...)
  2023-02-09 10:39 ` [PATCH 3/6] ACPI/CPER: use standard C types Jan Beulich
@ 2023-02-09 10:39 ` Jan Beulich
  2023-02-16 10:55   ` Andrew Cooper
  2023-02-09 10:42 ` [PATCH 5/6] x86: use standard C types in struct cpuinfo_x86 Jan Beulich
  2023-02-09 10:43 ` [PATCH 6/6] common: __u8 is history Jan Beulich
  5 siblings, 1 reply; 19+ messages in thread
From: Jan Beulich @ 2023-02-09 10:39 UTC (permalink / raw)
  To: xen-devel; +Cc: Andrew Cooper, George Dunlap, Wei Liu, Roger Pau Monné

Consolidate this to use exclusively standard types, and change
indentation style to Xen's there at the same time (the file already had
a mix of styles).

No functional change intended.

Signed-off-by: Jan Beulich <jbeulich@suse.com>
---
For most (all?) of the single bit I was on the edge of switching them to
bool - thoughts?

--- a/xen/arch/x86/include/asm/msi.h
+++ b/xen/arch/x86/include/asm/msi.h
@@ -66,15 +66,15 @@ struct msi_info {
 };
 
 struct msi_msg {
-	union {
-		u64	address; /* message address */
-		struct {
-			u32	address_lo; /* message address low 32 bits */
-			u32	address_hi; /* message address high 32 bits */
-		};
-	};
-	u32	data;		/* 16 bits of msi message data */
-	u32	dest32;		/* used when Interrupt Remapping with EIM is enabled */
+    union {
+        uint64_t address; /* message address */
+        struct {
+            uint32_t address_lo; /* message address low 32 bits */
+            uint32_t address_hi; /* message address high 32 bits */
+        };
+    };
+    uint32_t data;        /* 16 bits of msi message data */
+    uint32_t dest32;      /* used when Interrupt Remapping with EIM is enabled */
 };
 
 struct irq_desc;
@@ -94,35 +94,35 @@ extern int pci_restore_msi_state(struct
 extern int pci_reset_msix_state(struct pci_dev *pdev);
 
 struct msi_desc {
-	struct msi_attrib {
-		__u8	type;		/* {0: unused, 5h:MSI, 11h:MSI-X} */
-		__u8	pos;		/* Location of the MSI capability */
-		__u8	maskbit	: 1;	/* mask/pending bit supported ?   */
-		__u8	is_64	: 1;	/* Address size: 0=32bit 1=64bit  */
-		__u8	host_masked : 1;
-		__u8	guest_masked : 1;
-		__u16	entry_nr;	/* specific enabled entry 	  */
-	} msi_attrib;
-
-	bool irte_initialized;
-	uint8_t gvec;			/* guest vector. valid when pi_desc isn't NULL */
-	const struct pi_desc *pi_desc;	/* pointer to posted descriptor */
-
-	struct list_head list;
-
-	union {
-		void __iomem *mask_base;/* va for the entry in mask table */
-		struct {
-			unsigned int nvec;/* number of vectors            */
-			unsigned int mpos;/* location of mask register    */
-		} msi;
-		unsigned int hpet_id;   /* HPET (dev is NULL)             */
-	};
-	struct pci_dev *dev;
-	int irq;
-	int remap_index;		/* index in interrupt remapping table */
+    struct msi_attrib {
+        uint8_t type;        /* {0: unused, 5h:MSI, 11h:MSI-X} */
+        uint8_t pos;         /* Location of the MSI capability */
+        uint8_t maskbit      : 1; /* mask/pending bit supported ?   */
+        uint8_t is_64        : 1; /* Address size: 0=32bit 1=64bit  */
+        uint8_t host_masked  : 1;
+        uint8_t guest_masked : 1;
+        uint16_t entry_nr;   /* specific enabled entry */
+    } msi_attrib;
+
+    bool irte_initialized;
+    uint8_t gvec;            /* guest vector. valid when pi_desc isn't NULL */
+    const struct pi_desc *pi_desc; /* pointer to posted descriptor */
+
+    struct list_head list;
+
+    union {
+        void __iomem *mask_base; /* va for the entry in mask table */
+        struct {
+            unsigned int nvec; /* number of vectors */
+            unsigned int mpos; /* location of mask register */
+        } msi;
+        unsigned int hpet_id; /* HPET (dev is NULL) */
+    };
+    struct pci_dev *dev;
+    int irq;
+    int remap_index;         /* index in interrupt remapping table */
 
-	struct msi_msg msg;		/* Last set MSI message */
+    struct msi_msg msg;      /* Last set MSI message */
 };
 
 /*
@@ -180,48 +180,48 @@ int msi_free_irq(struct msi_desc *entry)
 
 struct __packed msg_data {
 #if defined(__LITTLE_ENDIAN_BITFIELD)
-	__u32	vector		:  8;
-	__u32	delivery_mode	:  3;	/* 000b: FIXED | 001b: lowest prior */
-	__u32	reserved_1	:  3;
-	__u32	level		:  1;	/* 0: deassert | 1: assert */
-	__u32	trigger		:  1;	/* 0: edge | 1: level */
-	__u32	reserved_2	: 16;
+    uint32_t vector        :  8;
+    uint32_t delivery_mode :  3;    /* 000b: FIXED | 001b: lowest prior */
+    uint32_t reserved_1    :  3;
+    uint32_t level         :  1;    /* 0: deassert | 1: assert */
+    uint32_t trigger       :  1;    /* 0: edge | 1: level */
+    uint32_t reserved_2    : 16;
 #elif defined(__BIG_ENDIAN_BITFIELD)
-	__u32	reserved_2	: 16;
-	__u32	trigger		:  1;	/* 0: edge | 1: level */
-	__u32	level		:  1;	/* 0: deassert | 1: assert */
-	__u32	reserved_1	:  3;
-	__u32	delivery_mode	:  3;	/* 000b: FIXED | 001b: lowest prior */
-	__u32	vector		:  8;
+    uint32_t reserved_2    : 16;
+    uint32_t trigger       :  1;    /* 0: edge | 1: level */
+    uint32_t level         :  1;    /* 0: deassert | 1: assert */
+    uint32_t reserved_1    :  3;
+    uint32_t delivery_mode :  3;    /* 000b: FIXED | 001b: lowest prior */
+    uint32_t vector        :  8;
 #else
 #error "Bitfield endianness not defined! Check your byteorder.h"
 #endif
 };
 
 struct __packed msg_address {
-	union {
-		struct {
+    union {
+        struct {
 #if defined(__LITTLE_ENDIAN_BITFIELD)
-			__u32	reserved_1	:  2;
-			__u32	dest_mode	:  1;	/*0:physic | 1:logic */
-			__u32	redirection_hint:  1;  	/*0: dedicated CPU
-							  1: lowest priority */
-			__u32	reserved_2	:  4;
- 			__u32	dest_id		: 24;	/* Destination ID */
+            uint32_t reserved_1       :  2;
+            uint32_t dest_mode        :  1; /* 0:phys | 1:logic */
+            uint32_t redirection_hint :  1; /* 0: dedicated CPU
+                                               1: lowest priority */
+            uint32_t reserved_2       :  4;
+            uint32_t dest_id          : 24; /* Destination ID */
 #elif defined(__BIG_ENDIAN_BITFIELD)
- 			__u32	dest_id		: 24;	/* Destination ID */
-			__u32	reserved_2	:  4;
-			__u32	redirection_hint:  1;  	/*0: dedicated CPU
-							  1: lowest priority */
-			__u32	dest_mode	:  1;	/*0:physic | 1:logic */
-			__u32	reserved_1	:  2;
+            uint32_t dest_id          : 24; /* Destination ID */
+            uint32_t reserved_2       :  4;
+            uint32_t redirection_hint : 1;  /* 0: dedicated CPU
+                                               1: lowest priority */
+            uint32_t dest_mode        :  1; /* 0:phys | 1:logic */
+            uint32_t reserved_1       :  2;
 #else
 #error "Bitfield endianness not defined! Check your byteorder.h"
 #endif
-      		}u;
-       		__u32  value;
-	}lo_address;
-	__u32 	hi_address;
+        } u;
+        uint32_t value;
+    } lo_address;
+    uint32_t hi_address;
 };
 
 #define MAX_MSIX_TABLE_ENTRIES  (PCI_MSIX_FLAGS_QSIZE + 1)



^ permalink raw reply	[flat|nested] 19+ messages in thread
* [PATCH 5/6] x86: use standard C types in struct cpuinfo_x86
  2023-02-09 10:36 [PATCH 0/6] fixed width type adjustments Jan Beulich
                   ` (3 preceding siblings ...)
  2023-02-09 10:39 ` [PATCH 4/6] x86/MSI: use standard C types in structures/unions Jan Beulich
@ 2023-02-09 10:42 ` Jan Beulich
  2023-02-16 12:12   ` Andrew Cooper
  2023-02-09 10:43 ` [PATCH 6/6] common: __u8 is history Jan Beulich
  5 siblings, 1 reply; 19+ messages in thread
From: Jan Beulich @ 2023-02-09 10:42 UTC (permalink / raw)
  To: xen-devel; +Cc: Andrew Cooper, George Dunlap, Wei Liu, Roger Pau Monné

Consolidate this to use exclusively standard types, and change oprofile
code (apparently trying to mirror those types) at the same time. Where
sensible actually drop local variables.

No functional change intended.

Signed-off-by: Jan Beulich <jbeulich@suse.com>
---
Much like x86_capability[] already doesn't use a fixed width type, most
if not all of the other fields touched here probably also shouldn't. I
wasn't sure though whether switching might be controversial for some of
them ...

--- a/xen/arch/x86/include/asm/processor.h
+++ b/xen/arch/x86/include/asm/processor.h
@@ -119,24 +119,24 @@ struct x86_cpu_id {
 };
 
 struct cpuinfo_x86 {
-    __u8 x86;            /* CPU family */
-    __u8 x86_vendor;     /* CPU vendor */
-    __u8 x86_model;
-    __u8 x86_mask;
+    uint8_t x86;            /* CPU family */
+    uint8_t x86_vendor;     /* CPU vendor */
+    uint8_t x86_model;
+    uint8_t x86_mask;
     int  cpuid_level;    /* Maximum supported CPUID level, -1=no CPUID */
-    __u32 extended_cpuid_level; /* Maximum supported CPUID extended level */
+    uint32_t extended_cpuid_level; /* Maximum supported CPUID extended level */
     unsigned int x86_capability[NCAPINTS];
     char x86_vendor_id[16];
     char x86_model_id[64];
     int  x86_cache_size; /* in KB - valid for CPUS which support this call  */
     int  x86_cache_alignment;    /* In bytes */
-    __u32 x86_max_cores; /* cpuid returned max cores value */
-    __u32 booted_cores;  /* number of cores as seen by OS */
-    __u32 x86_num_siblings; /* cpuid logical cpus per chip value */
-    __u32 apicid;
-    __u32 phys_proc_id;    /* package ID of each logical CPU */
-    __u32 cpu_core_id;     /* core ID of each logical CPU*/
-    __u32 compute_unit_id; /* AMD compute unit ID of each logical CPU */
+    uint32_t x86_max_cores;   /* cpuid returned max cores value */
+    uint32_t booted_cores;    /* number of cores as seen by OS */
+    uint32_t x86_num_siblings; /* cpuid logical cpus per chip value */
+    uint32_t apicid;
+    uint32_t phys_proc_id;    /* package ID of each logical CPU */
+    uint32_t cpu_core_id;     /* core ID of each logical CPU */
+    uint32_t compute_unit_id; /* AMD compute unit ID of each logical CPU */
     unsigned short x86_clflush_size;
 } __cacheline_aligned;
 
--- a/xen/arch/x86/oprofile/nmi_int.c
+++ b/xen/arch/x86/oprofile/nmi_int.c
@@ -311,11 +311,11 @@ void nmi_stop(void)
 
 static int __init p4_init(char ** cpu_type)
 {
-	__u8 cpu_model = current_cpu_data.x86_model;
+	unsigned int cpu_model = current_cpu_data.x86_model;
 
 	if ((cpu_model > 6) || (cpu_model == 5)) {
 		printk("xenoprof: Initialization failed. "
-		       "Intel processor model %d for pentium 4 family is not "
+		       "Intel processor model %u for pentium 4 family is not "
 		       "supported\n", cpu_model);
 		return 0;
 	}
@@ -355,12 +355,10 @@ custom_param("cpu_type", force_cpu_type)
 
 static int __init ppro_init(char ** cpu_type)
 {
-	__u8 cpu_model = current_cpu_data.x86_model;
-
 	if (force_arch_perfmon && cpu_has_arch_perfmon)
 		return 0;
 
-	switch (cpu_model) {
+	switch (current_cpu_data.x86_model) {
 	case 14:
 		*cpu_type = "i386/core";
 		break;
@@ -390,9 +388,8 @@ static int __init arch_perfmon_init(char
 
 static int __init cf_check nmi_init(void)
 {
-	__u8 vendor = current_cpu_data.x86_vendor;
-	__u8 family = current_cpu_data.x86;
-	__u8 _model = current_cpu_data.x86_model;
+	unsigned int vendor = current_cpu_data.x86_vendor;
+	unsigned int family = current_cpu_data.x86;
 
 	if (!cpu_has_apic) {
 		printk("xenoprof: Initialization failed. No APIC\n");
@@ -406,7 +403,7 @@ static int __init cf_check nmi_init(void
 			switch (family) {
 			default:
 				printk("xenoprof: Initialization failed. "
-				       "AMD processor family %d is not "
+				       "AMD processor family %u is not "
 				       "supported\n", family);
 				return -ENODEV;
 			case 0xf:
@@ -458,15 +455,15 @@ static int __init cf_check nmi_init(void
 			}
 			if (!cpu_type && !arch_perfmon_init(&cpu_type)) {
 				printk("xenoprof: Initialization failed. "
-				       "Intel processor family %d model %d "
-				       "is not supported\n", family, _model);
+				       "Intel processor family %u model %d is not supported\n",
+				       family, current_cpu_data.x86_model);
 				return -ENODEV;
 			}
 			break;
 
 		default:
 			printk("xenoprof: Initialization failed. "
-			       "Unsupported processor. Unknown vendor %d\n",
+			       "Unsupported processor. Unknown vendor %u\n",
 				vendor);
 			return -ENODEV;
 	}



^ permalink raw reply	[flat|nested] 19+ messages in thread
* [PATCH 6/6] common: __u8 is history
  2023-02-09 10:36 [PATCH 0/6] fixed width type adjustments Jan Beulich
                   ` (4 preceding siblings ...)
  2023-02-09 10:42 ` [PATCH 5/6] x86: use standard C types in struct cpuinfo_x86 Jan Beulich
@ 2023-02-09 10:43 ` Jan Beulich
  2023-02-16 12:13   ` Andrew Cooper
  5 siblings, 1 reply; 19+ messages in thread
From: Jan Beulich @ 2023-02-09 10:43 UTC (permalink / raw)
  To: xen-devel
  Cc: Andrew Cooper, George Dunlap, Julien Grall, Stefano Stabellini, Wei Liu

With the last uses gone, move the type to linux-compat.h.

No functional change intended.

Signed-off-by: Jan Beulich <jbeulich@suse.com>
---
The primary use of __u{16,32,64} is in the byte-order headers. Iirc
there is a series re-working part of that, so I guess before touching
the logic there that other series would better land first.

--- a/xen/include/xen/linux-compat.h
+++ b/xen/include/xen/linux-compat.h
@@ -12,6 +12,7 @@
 #include <xen/types.h>
 
 typedef int8_t  __s8;
+typedef uint8_t __u8;
 typedef int16_t __s16;
 typedef int32_t __s32;
 typedef int64_t __s64;
--- a/xen/include/xen/types.h
+++ b/xen/include/xen/types.h
@@ -55,7 +55,7 @@ typedef unsigned int __attribute__((__mo
 
 /* Linux inherited types which are being phased out */
 typedef int8_t s8;
-typedef uint8_t u8, __u8;
+typedef uint8_t u8;
 typedef int16_t s16;
 typedef uint16_t u16, __u16;
 typedef int32_t s32;



^ permalink raw reply	[flat|nested] 19+ messages in thread
* Re: [PATCH 2/6] common: move standard C fixed width type declarations to common header
  2023-02-09 10:38 ` [PATCH 2/6] common: move standard C fixed width type declarations to common header Jan Beulich
@ 2023-02-09 14:23   ` Daniel P. Smith
  2023-02-15 18:54   ` Andrew Cooper
  1 sibling, 0 replies; 19+ messages in thread
From: Daniel P. Smith @ 2023-02-09 14:23 UTC (permalink / raw)
  To: Jan Beulich, xen-devel
  Cc: Andrew Cooper, George Dunlap, Julien Grall, Stefano Stabellini,
	Wei Liu, Roger Pau Monné,
	Bertrand Marquis, Bobby Eshleman, Alistair Francis, Connor Davis,
	Paul Durrant

On 2/9/23 05:38, Jan Beulich wrote:
> Have these in one place, for all architectures to use. Also use the C99
> types as the "original" ones, and derive the Linux compatible ones
> (which we're trying to phase out). For __s<N>, seeing that no uses exist
> anymore, move them to a new Linux compatibility header (as an act of
> precaution - we don't have any uses of these types right now).
> 
> Modern compilers supply __{,U}INT<n>_TYPE__ - use those if available.
> Otherwise fall back to using "mode" attributes, but this can be relied
> upon only when bytes are 8 bits wide. Should there ever be a port to an
> architecture not matching this, it would need to define the fixed width
> types locally by some other means.
> 
> In a few cases inclusion of asm/types.h needs replacing by xen/types.h.
> Further in common/trace.c take the opportunity and also drop the
> apparently unused inclusion of asm/io.h at the same time. Finally in
> some Flask sources inclusion of asm/byteorder.h needs moving later.
> 
> No functional change intended.
> 
> Signed-off-by: Jan Beulich <jbeulich@suse.com>
> ---
> RFC: I know Andrew would prefer these types to move to a new
>       xen/stdint.h, but not being fully convinced of this myself, I was
>       hoping for others to voice views.
> 

IHHO since there is already stdarg.h and stdbool.h, which establishes 
some degree of following C standard library includes, it would seem more 
logical to move to stdint.h. The main point here is not whether 
following the C standard library includes is the right approach, but 
that consistency is more important. Having a mixture of types.h and C 
standard library includes leaves one having to keep track of which C 
standard library includes are present versus what is in type.h.


^ permalink raw reply	[flat|nested] 19+ messages in thread
* Re: [PATCH 1/6] x86/Hyper-V: use standard C types in hyperv-tlfs.h
  2023-02-09 10:38 ` [PATCH 1/6] x86/Hyper-V: use standard C types in hyperv-tlfs.h Jan Beulich
@ 2023-02-15 13:56   ` Andrew Cooper
  2023-02-21 13:43   ` Ping: " Jan Beulich
  1 sibling, 0 replies; 19+ messages in thread
From: Andrew Cooper @ 2023-02-15 13:56 UTC (permalink / raw)
  To: Jan Beulich, xen-devel; +Cc: George Dunlap, Wei Liu, Paul Durrant

On 09/02/2023 10:38 am, Jan Beulich wrote:
> This is the only file left with a use of an __s<N> type coming from
> Linux. Since the file has been using an apparently random mix of all
> three classes of fixed-width types (__{s,u}<N>, {s,u}<N>, and
> {,u}int<N>_t), consolidate this to use exclusively standard types.
>
> No functional change intended.
>
> Signed-off-by: Jan Beulich <jbeulich@suse.com>

Acked-by: Andrew Cooper <andrew.cooper3@citrix.com>


^ permalink raw reply	[flat|nested] 19+ messages in thread
* Re: [PATCH 2/6] common: move standard C fixed width type declarations to common header
  2023-02-09 10:38 ` [PATCH 2/6] common: move standard C fixed width type declarations to common header Jan Beulich
  2023-02-09 14:23   ` Daniel P. Smith
@ 2023-02-15 18:54   ` Andrew Cooper
  2023-02-16  7:47     ` Jan Beulich
  1 sibling, 1 reply; 19+ messages in thread
From: Andrew Cooper @ 2023-02-15 18:54 UTC (permalink / raw)
  To: Jan Beulich, xen-devel
  Cc: George Dunlap, Julien Grall, Stefano Stabellini, Wei Liu,
	Roger Pau Monné,
	Bertrand Marquis, Bobby Eshleman, Alistair Francis, Connor Davis,
	Daniel Smith, Paul Durrant

On 09/02/2023 10:38 am, Jan Beulich wrote:
> Have these in one place, for all architectures to use. Also use the C99
> types as the "original" ones, and derive the Linux compatible ones
> (which we're trying to phase out). For __s<N>, seeing that no uses exist
> anymore, move them to a new Linux compatibility header (as an act of
> precaution - we don't have any uses of these types right now).
>
> Modern compilers supply __{,U}INT<n>_TYPE__ - use those if available.
> Otherwise fall back to using "mode" attributes, but this can be relied
> upon only when bytes are 8 bits wide. Should there ever be a port to an
> architecture not matching this, it would need to define the fixed width
> types locally by some other means.

These types were added in GCC 4.5.  It is 12 years old.  We even use a
newer C standard than this compiler...

At this point, it is an unreasonable burden to be continuing to support
compilers this obsolete, not to mention that the mode attributes are
unreadable to anyone who isn't a GCC developer and clearly unnecessary
to begin with.

~Andrew


^ permalink raw reply	[flat|nested] 19+ messages in thread
* Re: [PATCH 3/6] ACPI/CPER: use standard C types
  2023-02-09 10:39 ` [PATCH 3/6] ACPI/CPER: use standard C types Jan Beulich
@ 2023-02-15 19:10   ` Andrew Cooper
  0 siblings, 0 replies; 19+ messages in thread
From: Andrew Cooper @ 2023-02-15 19:10 UTC (permalink / raw)
  To: Jan Beulich, xen-devel
  Cc: George Dunlap, Julien Grall, Stefano Stabellini, Wei Liu

On 09/02/2023 10:39 am, Jan Beulich wrote:
> Consolidate cper.h to use exclusively standard types.
>
> No functional change intended.
>
> Signed-off-by: Jan Beulich <jbeulich@suse.com>

Acked-by: Andrew Cooper <andrew.cooper3@citrix.com>


^ permalink raw reply	[flat|nested] 19+ messages in thread
* Re: [PATCH 2/6] common: move standard C fixed width type declarations to common header
  2023-02-15 18:54   ` Andrew Cooper
@ 2023-02-16  7:47     ` Jan Beulich
  0 siblings, 0 replies; 19+ messages in thread
From: Jan Beulich @ 2023-02-16  7:47 UTC (permalink / raw)
  To: Andrew Cooper, xen-devel
  Cc: George Dunlap, Julien Grall, Stefano Stabellini, Wei Liu,
	Roger Pau Monné,
	Bertrand Marquis, Bobby Eshleman, Alistair Francis, Connor Davis,
	Daniel Smith, Paul Durrant

On 15.02.2023 19:54, Andrew Cooper wrote:
> On 09/02/2023 10:38 am, Jan Beulich wrote:
>> Have these in one place, for all architectures to use. Also use the C99
>> types as the "original" ones, and derive the Linux compatible ones
>> (which we're trying to phase out). For __s<N>, seeing that no uses exist
>> anymore, move them to a new Linux compatibility header (as an act of
>> precaution - we don't have any uses of these types right now).
>>
>> Modern compilers supply __{,U}INT<n>_TYPE__ - use those if available.
>> Otherwise fall back to using "mode" attributes, but this can be relied
>> upon only when bytes are 8 bits wide. Should there ever be a port to an
>> architecture not matching this, it would need to define the fixed width
>> types locally by some other means.
> 
> These types were added in GCC 4.5.  It is 12 years old.  We even use a
> newer C standard than this compiler...

A newer C standard? We're using C99, don't we? And Xen, at this point,
continues to build fine with gcc 4.3. Furthermore I for one didn't
check when Clang gained support for these pre-defs ...

> At this point, it is an unreasonable burden to be continuing to support
> compilers this obsolete, not to mention that the mode attributes are
> unreadable to anyone who isn't a GCC developer and clearly unnecessary
> to begin with.

I disagree about the rant regarding mode attributes, but that's secondary.
What I'm really unhappy about is for this work to grow a dependency on the
long-standing question of what to update our tool chain baseline to. This
has been discussed many times, but there was never a concrete proposal on
a policy that we could use not only now, but also going forward. As it
stands I can't help the impression that this is going to remain unresolved
for an extended period of time. But there not being an appropriate
solution to that other issue shouldn't block the work here. Once that one
is resolved (and provided it's then acceptable also on the Clang side),
we could easily drop the mode attribute fallbacks again.

Jan


^ permalink raw reply	[flat|nested] 19+ messages in thread
* Re: [PATCH 4/6] x86/MSI: use standard C types in structures/unions
  2023-02-09 10:39 ` [PATCH 4/6] x86/MSI: use standard C types in structures/unions Jan Beulich
@ 2023-02-16 10:55   ` Andrew Cooper
  2023-02-16 14:16     ` Jan Beulich
  0 siblings, 1 reply; 19+ messages in thread
From: Andrew Cooper @ 2023-02-16 10:55 UTC (permalink / raw)
  To: Jan Beulich, xen-devel; +Cc: George Dunlap, Wei Liu, Roger Pau Monné

On 09/02/2023 10:39 am, Jan Beulich wrote:
> Consolidate this to use exclusively standard types, and change
> indentation style to Xen's there at the same time (the file already had
> a mix of styles).
>
> No functional change intended.
>
> Signed-off-by: Jan Beulich <jbeulich@suse.com>

So I suppose Acked-by: Andrew Cooper <andrew.cooper3@citrix.com> because
this is an improvement on the status quo, but I have quite a few requests.

> ---
> For most (all?) of the single bit I was on the edge of switching them to
> bool - thoughts?

Yes.

>
> --- a/xen/arch/x86/include/asm/msi.h
> +++ b/xen/arch/x86/include/asm/msi.h
> @@ -66,15 +66,15 @@ struct msi_info {
>  };
>  
>  struct msi_msg {
> -	union {
> -		u64	address; /* message address */
> -		struct {
> -			u32	address_lo; /* message address low 32 bits */
> -			u32	address_hi; /* message address high 32 bits */
> -		};
> -	};
> -	u32	data;		/* 16 bits of msi message data */
> -	u32	dest32;		/* used when Interrupt Remapping with EIM is enabled */
> +    union {
> +        uint64_t address; /* message address */
> +        struct {
> +            uint32_t address_lo; /* message address low 32 bits */
> +            uint32_t address_hi; /* message address high 32 bits */
> +        };
> +    };
> +    uint32_t data;        /* 16 bits of msi message data */
> +    uint32_t dest32;      /* used when Interrupt Remapping with EIM is enabled */

The 16 is actively wrong for data, but honestly it's only this dest32
comment which has any value whatsoever (when it has been de-Intel'd).

I'd correct dest32 to reference the AMD too, and delete the rest.

>  };
>  
>  struct irq_desc;
> @@ -94,35 +94,35 @@ extern int pci_restore_msi_state(struct
>  extern int pci_reset_msix_state(struct pci_dev *pdev);
>  
>  struct msi_desc {
> -	struct msi_attrib {
> -		__u8	type;		/* {0: unused, 5h:MSI, 11h:MSI-X} */
> -		__u8	pos;		/* Location of the MSI capability */
> -		__u8	maskbit	: 1;	/* mask/pending bit supported ?   */
> -		__u8	is_64	: 1;	/* Address size: 0=32bit 1=64bit  */
> -		__u8	host_masked : 1;
> -		__u8	guest_masked : 1;
> -		__u16	entry_nr;	/* specific enabled entry 	  */
> -	} msi_attrib;
> -
> -	bool irte_initialized;
> -	uint8_t gvec;			/* guest vector. valid when pi_desc isn't NULL */
> -	const struct pi_desc *pi_desc;	/* pointer to posted descriptor */
> -
> -	struct list_head list;
> -
> -	union {
> -		void __iomem *mask_base;/* va for the entry in mask table */
> -		struct {
> -			unsigned int nvec;/* number of vectors            */
> -			unsigned int mpos;/* location of mask register    */
> -		} msi;
> -		unsigned int hpet_id;   /* HPET (dev is NULL)             */
> -	};
> -	struct pci_dev *dev;
> -	int irq;
> -	int remap_index;		/* index in interrupt remapping table */
> +    struct msi_attrib {
> +        uint8_t type;        /* {0: unused, 5h:MSI, 11h:MSI-X} */
> +        uint8_t pos;         /* Location of the MSI capability */
> +        uint8_t maskbit      : 1; /* mask/pending bit supported ?   */
> +        uint8_t is_64        : 1; /* Address size: 0=32bit 1=64bit  */
> +        uint8_t host_masked  : 1;
> +        uint8_t guest_masked : 1;
> +        uint16_t entry_nr;   /* specific enabled entry */

entry_nr wants to move up to between pos and maskbit, and then we shrink
the total structure by 8 bytes (I think).

> +    } msi_attrib;
> +
> +    bool irte_initialized;
> +    uint8_t gvec;            /* guest vector. valid when pi_desc isn't NULL */
> +    const struct pi_desc *pi_desc; /* pointer to posted descriptor */
> +
> +    struct list_head list;
> +
> +    union {
> +        void __iomem *mask_base; /* va for the entry in mask table */
> +        struct {
> +            unsigned int nvec; /* number of vectors */
> +            unsigned int mpos; /* location of mask register */
> +        } msi;
> +        unsigned int hpet_id; /* HPET (dev is NULL) */
> +    };
> +    struct pci_dev *dev;
> +    int irq;
> +    int remap_index;         /* index in interrupt remapping table */
>  
> -	struct msi_msg msg;		/* Last set MSI message */
> +    struct msi_msg msg;      /* Last set MSI message */
>  };
>  
>  /*
> @@ -180,48 +180,48 @@ int msi_free_irq(struct msi_desc *entry)
>  
>  struct __packed msg_data {
>  #if defined(__LITTLE_ENDIAN_BITFIELD)

There's no such thing as a big endian x86 bitfield.  Just delete this
ifdefary to simplify the result.

Additionally, the structure doesn't need to be packed - its a single
uint32_t's worth of bitfield.

Finally, can we drop the reserved fields and leave them as anonymous
bitfields?

> -	__u32	vector		:  8;
> -	__u32	delivery_mode	:  3;	/* 000b: FIXED | 001b: lowest prior */
> -	__u32	reserved_1	:  3;
> -	__u32	level		:  1;	/* 0: deassert | 1: assert */
> -	__u32	trigger		:  1;	/* 0: edge | 1: level */
> -	__u32	reserved_2	: 16;
> +    uint32_t vector        :  8;
> +    uint32_t delivery_mode :  3;    /* 000b: FIXED | 001b: lowest prior */
> +    uint32_t reserved_1    :  3;
> +    uint32_t level         :  1;    /* 0: deassert | 1: assert */
> +    uint32_t trigger       :  1;    /* 0: edge | 1: level */
> +    uint32_t reserved_2    : 16;
>  #elif defined(__BIG_ENDIAN_BITFIELD)
> -	__u32	reserved_2	: 16;
> -	__u32	trigger		:  1;	/* 0: edge | 1: level */
> -	__u32	level		:  1;	/* 0: deassert | 1: assert */
> -	__u32	reserved_1	:  3;
> -	__u32	delivery_mode	:  3;	/* 000b: FIXED | 001b: lowest prior */
> -	__u32	vector		:  8;
> +    uint32_t reserved_2    : 16;
> +    uint32_t trigger       :  1;    /* 0: edge | 1: level */
> +    uint32_t level         :  1;    /* 0: deassert | 1: assert */
> +    uint32_t reserved_1    :  3;
> +    uint32_t delivery_mode :  3;    /* 000b: FIXED | 001b: lowest prior */
> +    uint32_t vector        :  8;
>  #else
>  #error "Bitfield endianness not defined! Check your byteorder.h"
>  #endif
>  };
>  
>  struct __packed msg_address {
> -	union {
> -		struct {
> +    union {
> +        struct {
>  #if defined(__LITTLE_ENDIAN_BITFIELD)

Same here for ifdefary and packed.

> -			__u32	reserved_1	:  2;
> -			__u32	dest_mode	:  1;	/*0:physic | 1:logic */
> -			__u32	redirection_hint:  1;  	/*0: dedicated CPU
> -							  1: lowest priority */
> -			__u32	reserved_2	:  4;
> - 			__u32	dest_id		: 24;	/* Destination ID */
> +            uint32_t reserved_1       :  2;
> +            uint32_t dest_mode        :  1; /* 0:phys | 1:logic */
> +            uint32_t redirection_hint :  1; /* 0: dedicated CPU
> +                                               1: lowest priority */
> +            uint32_t reserved_2       :  4;
> +            uint32_t dest_id          : 24; /* Destination ID */

Considering that these fields are stale (its missing the remappable bit
for one), I do have to question if we actually use them correctly in code...

But that's not something for this patch.

~Andrew


^ permalink raw reply	[flat|nested] 19+ messages in thread
* Re: [PATCH 5/6] x86: use standard C types in struct cpuinfo_x86
  2023-02-09 10:42 ` [PATCH 5/6] x86: use standard C types in struct cpuinfo_x86 Jan Beulich
@ 2023-02-16 12:12   ` Andrew Cooper
  0 siblings, 0 replies; 19+ messages in thread
From: Andrew Cooper @ 2023-02-16 12:12 UTC (permalink / raw)
  To: Jan Beulich, xen-devel; +Cc: George Dunlap, Wei Liu, Roger Pau Monné

On 09/02/2023 10:42 am, Jan Beulich wrote:
> Consolidate this to use exclusively standard types, and change oprofile
> code (apparently trying to mirror those types) at the same time. Where
> sensible actually drop local variables.
>
> No functional change intended.
>
> Signed-off-by: Jan Beulich <jbeulich@suse.com>
> ---
> Much like x86_capability[] already doesn't use a fixed width type, most
> if not all of the other fields touched here probably also shouldn't. I
> wasn't sure though whether switching might be controversial for some of
> them ...

x86_capability isn't an inherently 32bit structure.  It's a bitmap, and
all of Xen's bitmap operations take unsigned int *.

Most other things in this structure don't need to have specific widths
IMO, but there is huge quantity of junk here.

> --- a/xen/arch/x86/include/asm/processor.h
> +++ b/xen/arch/x86/include/asm/processor.h
> @@ -119,24 +119,24 @@ struct x86_cpu_id {
>  };
>  
>  struct cpuinfo_x86 {
> -    __u8 x86;            /* CPU family */
> -    __u8 x86_vendor;     /* CPU vendor */
> -    __u8 x86_model;
> -    __u8 x86_mask;
> +    uint8_t x86;            /* CPU family */
> +    uint8_t x86_vendor;     /* CPU vendor */
> +    uint8_t x86_model;
> +    uint8_t x86_mask;

These specific names always irritated me.  They should be vendor,
family, model, stepping and probably in that order.  The x86 prefix is
entirely redundant.

>      int  cpuid_level;    /* Maximum supported CPUID level, -1=no CPUID */

There's no such thing a "no CPUID" cpu for Xen any more.

> -    __u32 extended_cpuid_level; /* Maximum supported CPUID extended level */
> +    uint32_t extended_cpuid_level; /* Maximum supported CPUID extended level */

This does need to be this wide, but I really regret the name being this
wide...

>      unsigned int x86_capability[NCAPINTS];
>      char x86_vendor_id[16];
>      char x86_model_id[64];

These arrays should be 12 and 48 respectively, but the vendor id is
redundant with the vendor field.

Furthermore, we do some non-trivial string rearranging of the string,
and (seeing as you rejected my patch to print it on boot) only ever gets
used to hand to dom0 in a machine check.

>      int  x86_cache_size; /* in KB - valid for CPUS which support this call  */
>      int  x86_cache_alignment;    /* In bytes */

The only interesting thing I can see about this field is that the
Netburst quirk is wrong.  double-pumped IO was a firmware setting
because it was a tradeoff and different workloads favoured different
settings.

> -    __u32 x86_max_cores; /* cpuid returned max cores value */
> -    __u32 booted_cores;  /* number of cores as seen by OS */
> -    __u32 x86_num_siblings; /* cpuid logical cpus per chip value */
> -    __u32 apicid;
> -    __u32 phys_proc_id;    /* package ID of each logical CPU */
> -    __u32 cpu_core_id;     /* core ID of each logical CPU*/
> -    __u32 compute_unit_id; /* AMD compute unit ID of each logical CPU */
> +    uint32_t x86_max_cores;   /* cpuid returned max cores value */
> +    uint32_t booted_cores;    /* number of cores as seen by OS */
> +    uint32_t x86_num_siblings; /* cpuid logical cpus per chip value */
> +    uint32_t apicid;
> +    uint32_t phys_proc_id;    /* package ID of each logical CPU */
> +    uint32_t cpu_core_id;     /* core ID of each logical CPU */
> +    uint32_t compute_unit_id; /* AMD compute unit ID of each logical CPU */

There's lots of redundancy here, and half of these fields can be derived
directly from the 32bit APIC ID.

For the purpose of the type cleanup, Acked-by: Andrew Cooper
<andrew.cooper3@citrix.com>.

~Andrew


^ permalink raw reply	[flat|nested] 19+ messages in thread
* Re: [PATCH 6/6] common: __u8 is history
  2023-02-09 10:43 ` [PATCH 6/6] common: __u8 is history Jan Beulich
@ 2023-02-16 12:13   ` Andrew Cooper
  0 siblings, 0 replies; 19+ messages in thread
From: Andrew Cooper @ 2023-02-16 12:13 UTC (permalink / raw)
  To: Jan Beulich, xen-devel
  Cc: George Dunlap, Julien Grall, Stefano Stabellini, Wei Liu

On 09/02/2023 10:43 am, Jan Beulich wrote:
> With the last uses gone, move the type to linux-compat.h.
>
> No functional change intended.
>
> Signed-off-by: Jan Beulich <jbeulich@suse.com>

Acked-by: Andrew Cooper <andrew.cooper3@citrix.com>


^ permalink raw reply	[flat|nested] 19+ messages in thread
* Re: [PATCH 4/6] x86/MSI: use standard C types in structures/unions
  2023-02-16 10:55   ` Andrew Cooper
@ 2023-02-16 14:16     ` Jan Beulich
  2023-02-16 19:16       ` Andrew Cooper
  0 siblings, 1 reply; 19+ messages in thread
From: Jan Beulich @ 2023-02-16 14:16 UTC (permalink / raw)
  To: Andrew Cooper; +Cc: George Dunlap, Wei Liu, Roger Pau Monné, xen-devel

On 16.02.2023 11:55, Andrew Cooper wrote:
> On 09/02/2023 10:39 am, Jan Beulich wrote:
>> Consolidate this to use exclusively standard types, and change
>> indentation style to Xen's there at the same time (the file already had
>> a mix of styles).
>>
>> No functional change intended.
>>
>> Signed-off-by: Jan Beulich <jbeulich@suse.com>
> 
> So I suppose Acked-by: Andrew Cooper <andrew.cooper3@citrix.com> because
> this is an improvement on the status quo, but I have quite a few requests.

Thanks. I'll be happy to carry out some of them (but the sheer amount makes
it so I'd rather not apply the A-b to the result). It's always difficult to
judge how much "while doing this" is going to be acceptable ...

>> --- a/xen/arch/x86/include/asm/msi.h
>> +++ b/xen/arch/x86/include/asm/msi.h
>> @@ -66,15 +66,15 @@ struct msi_info {
>>  };
>>  
>>  struct msi_msg {
>> -	union {
>> -		u64	address; /* message address */
>> -		struct {
>> -			u32	address_lo; /* message address low 32 bits */
>> -			u32	address_hi; /* message address high 32 bits */
>> -		};
>> -	};
>> -	u32	data;		/* 16 bits of msi message data */
>> -	u32	dest32;		/* used when Interrupt Remapping with EIM is enabled */
>> +    union {
>> +        uint64_t address; /* message address */
>> +        struct {
>> +            uint32_t address_lo; /* message address low 32 bits */
>> +            uint32_t address_hi; /* message address high 32 bits */
>> +        };
>> +    };
>> +    uint32_t data;        /* 16 bits of msi message data */
>> +    uint32_t dest32;      /* used when Interrupt Remapping with EIM is enabled */
> 
> The 16 is actively wrong for data,

It it? The upper 16 bits aren't used, are they?

> but honestly it's only this dest32
> comment which has any value whatsoever (when it has been de-Intel'd).
> 
> I'd correct dest32 to reference the AMD too, and delete the rest.

I guess I'll simply drop "with EIM".

>> @@ -94,35 +94,35 @@ extern int pci_restore_msi_state(struct
>>  extern int pci_reset_msix_state(struct pci_dev *pdev);
>>  
>>  struct msi_desc {
>> -	struct msi_attrib {
>> -		__u8	type;		/* {0: unused, 5h:MSI, 11h:MSI-X} */
>> -		__u8	pos;		/* Location of the MSI capability */
>> -		__u8	maskbit	: 1;	/* mask/pending bit supported ?   */
>> -		__u8	is_64	: 1;	/* Address size: 0=32bit 1=64bit  */
>> -		__u8	host_masked : 1;
>> -		__u8	guest_masked : 1;
>> -		__u16	entry_nr;	/* specific enabled entry 	  */
>> -	} msi_attrib;
>> -
>> -	bool irte_initialized;
>> -	uint8_t gvec;			/* guest vector. valid when pi_desc isn't NULL */
>> -	const struct pi_desc *pi_desc;	/* pointer to posted descriptor */
>> -
>> -	struct list_head list;
>> -
>> -	union {
>> -		void __iomem *mask_base;/* va for the entry in mask table */
>> -		struct {
>> -			unsigned int nvec;/* number of vectors            */
>> -			unsigned int mpos;/* location of mask register    */
>> -		} msi;
>> -		unsigned int hpet_id;   /* HPET (dev is NULL)             */
>> -	};
>> -	struct pci_dev *dev;
>> -	int irq;
>> -	int remap_index;		/* index in interrupt remapping table */
>> +    struct msi_attrib {
>> +        uint8_t type;        /* {0: unused, 5h:MSI, 11h:MSI-X} */
>> +        uint8_t pos;         /* Location of the MSI capability */
>> +        uint8_t maskbit      : 1; /* mask/pending bit supported ?   */
>> +        uint8_t is_64        : 1; /* Address size: 0=32bit 1=64bit  */
>> +        uint8_t host_masked  : 1;
>> +        uint8_t guest_masked : 1;
>> +        uint16_t entry_nr;   /* specific enabled entry */
> 
> entry_nr wants to move up to between pos and maskbit, and then we shrink
> the total structure by 8 bytes (I think).

The struct is 6 bytes now and will be 6 bytes with the adjustment you
suggest. Plus I'd prefer to not do any re-ordering in this patch.

>> @@ -180,48 +180,48 @@ int msi_free_irq(struct msi_desc *entry)
>>  
>>  struct __packed msg_data {
>>  #if defined(__LITTLE_ENDIAN_BITFIELD)
> 
> There's no such thing as a big endian x86 bitfield.  Just delete this
> ifdefary to simplify the result.

Will do.

> Additionally, the structure doesn't need to be packed - its a single
> uint32_t's worth of bitfield.

Like with re-ordering I would prefer to not touch entirely unrelated
aspects. I'll see if I can motivate myself to make a separate follow-on
change.

> Finally, can we drop the reserved fields and leave them as anonymous
> bitfields?

Perhaps - I can give that a try, hoping that we don't access them
anywhere by their name (even if just to e.g. zero them).

Jan


^ permalink raw reply	[flat|nested] 19+ messages in thread
* Re: [PATCH 4/6] x86/MSI: use standard C types in structures/unions
  2023-02-16 14:16     ` Jan Beulich
@ 2023-02-16 19:16       ` Andrew Cooper
  0 siblings, 0 replies; 19+ messages in thread
From: Andrew Cooper @ 2023-02-16 19:16 UTC (permalink / raw)
  To: Jan Beulich; +Cc: George Dunlap, Wei Liu, Roger Pau Monné, xen-devel

On 16/02/2023 2:16 pm, Jan Beulich wrote:
> On 16.02.2023 11:55, Andrew Cooper wrote:
>> On 09/02/2023 10:39 am, Jan Beulich wrote:
>>> Consolidate this to use exclusively standard types, and change
>>> indentation style to Xen's there at the same time (the file already had
>>> a mix of styles).
>>>
>>> No functional change intended.
>>>
>>> Signed-off-by: Jan Beulich <jbeulich@suse.com>
>> So I suppose Acked-by: Andrew Cooper <andrew.cooper3@citrix.com> because
>> this is an improvement on the status quo, but I have quite a few requests.
> Thanks. I'll be happy to carry out some of them (but the sheer amount makes
> it so I'd rather not apply the A-b to the result). It's always difficult to
> judge how much "while doing this" is going to be acceptable ...

Everything I've suggested is minimal enough IMO.

>
>>> --- a/xen/arch/x86/include/asm/msi.h
>>> +++ b/xen/arch/x86/include/asm/msi.h
>>> @@ -66,15 +66,15 @@ struct msi_info {
>>>  };
>>>  
>>>  struct msi_msg {
>>> -	union {
>>> -		u64	address; /* message address */
>>> -		struct {
>>> -			u32	address_lo; /* message address low 32 bits */
>>> -			u32	address_hi; /* message address high 32 bits */
>>> -		};
>>> -	};
>>> -	u32	data;		/* 16 bits of msi message data */
>>> -	u32	dest32;		/* used when Interrupt Remapping with EIM is enabled */
>>> +    union {
>>> +        uint64_t address; /* message address */
>>> +        struct {
>>> +            uint32_t address_lo; /* message address low 32 bits */
>>> +            uint32_t address_hi; /* message address high 32 bits */
>>> +        };
>>> +    };
>>> +    uint32_t data;        /* 16 bits of msi message data */
>>> +    uint32_t dest32;      /* used when Interrupt Remapping with EIM is enabled */
>> The 16 is actively wrong for data,
> It it? The upper 16 bits aren't used, are they?

Well... I've just found that my local PCI reference doesn't actually
match the spec when it comes to stating the width of the message field. 
Guess I need to stop using this reference.

But the rules given would require this to turn into uint16_t as that's
the specified size of the register...  But that will probably require a
separate patch.

>
>> but honestly it's only this dest32
>> comment which has any value whatsoever (when it has been de-Intel'd).
>>
>> I'd correct dest32 to reference the AMD too, and delete the rest.
> I guess I'll simply drop "with EIM".

Yeah, probably the easiest adjustment.  AMD is more complicated anyway IIRC.

>>> @@ -94,35 +94,35 @@ extern int pci_restore_msi_state(struct
>>>  extern int pci_reset_msix_state(struct pci_dev *pdev);
>>>  
>>>  struct msi_desc {
>>> -	struct msi_attrib {
>>> -		__u8	type;		/* {0: unused, 5h:MSI, 11h:MSI-X} */
>>> -		__u8	pos;		/* Location of the MSI capability */
>>> -		__u8	maskbit	: 1;	/* mask/pending bit supported ?   */
>>> -		__u8	is_64	: 1;	/* Address size: 0=32bit 1=64bit  */
>>> -		__u8	host_masked : 1;
>>> -		__u8	guest_masked : 1;
>>> -		__u16	entry_nr;	/* specific enabled entry 	  */
>>> -	} msi_attrib;
>>> -
>>> -	bool irte_initialized;
>>> -	uint8_t gvec;			/* guest vector. valid when pi_desc isn't NULL */
>>> -	const struct pi_desc *pi_desc;	/* pointer to posted descriptor */
>>> -
>>> -	struct list_head list;
>>> -
>>> -	union {
>>> -		void __iomem *mask_base;/* va for the entry in mask table */
>>> -		struct {
>>> -			unsigned int nvec;/* number of vectors            */
>>> -			unsigned int mpos;/* location of mask register    */
>>> -		} msi;
>>> -		unsigned int hpet_id;   /* HPET (dev is NULL)             */
>>> -	};
>>> -	struct pci_dev *dev;
>>> -	int irq;
>>> -	int remap_index;		/* index in interrupt remapping table */
>>> +    struct msi_attrib {
>>> +        uint8_t type;        /* {0: unused, 5h:MSI, 11h:MSI-X} */
>>> +        uint8_t pos;         /* Location of the MSI capability */
>>> +        uint8_t maskbit      : 1; /* mask/pending bit supported ?   */
>>> +        uint8_t is_64        : 1; /* Address size: 0=32bit 1=64bit  */
>>> +        uint8_t host_masked  : 1;
>>> +        uint8_t guest_masked : 1;
>>> +        uint16_t entry_nr;   /* specific enabled entry */
>> entry_nr wants to move up to between pos and maskbit, and then we shrink
>> the total structure by 8 bytes (I think).
> The struct is 6 bytes now and will be 6 bytes with the adjustment you
> suggest. Plus I'd prefer to not do any re-ordering in this patch.

Ah, so I see what went wrong.  Right now, we've got:

8b type
8b pos
4b the bitfields
12b padding
16b entry_nr

and rearranging it moves the padding to the end but doesn't drop it,
because overall the structure has 16b alignment because of the uint16_t

If it were packed, then the following byte fields would shuffle up into
the padding, and there would ba knockon effect.

But don't worry seeing as it doesn't make a difference.

>
>> Additionally, the structure doesn't need to be packed - its a single
>> uint32_t's worth of bitfield.
> Like with re-ordering I would prefer to not touch entirely unrelated
> aspects. I'll see if I can motivate myself to make a separate follow-on
> change.

Personally I'd consider dropping some __packed as sufficiently relevant
to this change to be included, but fine.

>
>> Finally, can we drop the reserved fields and leave them as anonymous
>> bitfields?
> Perhaps - I can give that a try, hoping that we don't access them
> anywhere by their name (even if just to e.g. zero them).

Well, its easy to try right now.  And if not, then it needs a different
patch anyway.

~Andrew


^ permalink raw reply	[flat|nested] 19+ messages in thread
* Ping: [PATCH 1/6] x86/Hyper-V: use standard C types in hyperv-tlfs.h
  2023-02-09 10:38 ` [PATCH 1/6] x86/Hyper-V: use standard C types in hyperv-tlfs.h Jan Beulich
  2023-02-15 13:56   ` Andrew Cooper
@ 2023-02-21 13:43   ` Jan Beulich
  2023-02-22 12:16     ` Paul Durrant
  1 sibling, 1 reply; 19+ messages in thread
From: Jan Beulich @ 2023-02-21 13:43 UTC (permalink / raw)
  To: Paul Durrant, Wei Liu; +Cc: George Dunlap, xen-devel

On 09.02.2023 11:38, Jan Beulich wrote:
> This is the only file left with a use of an __s<N> type coming from
> Linux. Since the file has been using an apparently random mix of all
> three classes of fixed-width types (__{s,u}<N>, {s,u}<N>, and
> {,u}int<N>_t), consolidate this to use exclusively standard types.
> 
> No functional change intended.
> 
> Signed-off-by: Jan Beulich <jbeulich@suse.com>

Ping? (I'll wait a few more days, but I'm going to commit this eventually
with just Andrew's ack if no maintainer one arrives.)

Jan

> --- a/xen/arch/x86/include/asm/guest/hyperv-tlfs.h
> +++ b/xen/arch/x86/include/asm/guest/hyperv-tlfs.h
> @@ -283,11 +283,11 @@
>   * Declare the MSR used to setup pages used to communicate with the hypervisor.
>   */
>  union hv_x64_msr_hypercall_contents {
> -	u64 as_uint64;
> +	uint64_t as_uint64;
>  	struct {
> -		u64 enable:1;
> -		u64 reserved:11;
> -		u64 guest_physical_address:52;
> +		uint64_t enable:1;
> +		uint64_t reserved:11;
> +		uint64_t guest_physical_address:52;
>  	};
>  };
>  
> @@ -295,11 +295,11 @@ union hv_x64_msr_hypercall_contents {
>   * TSC page layout.
>   */
>  struct ms_hyperv_tsc_page {
> -	volatile u32 tsc_sequence;
> -	u32 reserved1;
> -	volatile u64 tsc_scale;
> -	volatile s64 tsc_offset;
> -	u64 reserved2[509];
> +	volatile uint32_t tsc_sequence;
> +	uint32_t reserved1;
> +	volatile uint64_t tsc_scale;
> +	volatile int64_t tsc_offset;
> +	uint64_t reserved2[509];
>  };
>  
>  /*
> @@ -343,21 +343,21 @@ union hv_guest_os_id
>  };
>  
>  struct hv_reenlightenment_control {
> -	__u64 vector:8;
> -	__u64 reserved1:8;
> -	__u64 enabled:1;
> -	__u64 reserved2:15;
> -	__u64 target_vp:32;
> +	uint64_t vector:8;
> +	uint64_t reserved1:8;
> +	uint64_t enabled:1;
> +	uint64_t reserved2:15;
> +	uint64_t target_vp:32;
>  };
>  
>  struct hv_tsc_emulation_control {
> -	__u64 enabled:1;
> -	__u64 reserved:63;
> +	uint64_t enabled:1;
> +	uint64_t reserved:63;
>  };
>  
>  struct hv_tsc_emulation_status {
> -	__u64 inprogress:1;
> -	__u64 reserved:63;
> +	uint64_t inprogress:1;
> +	uint64_t reserved:63;
>  };
>  
>  #define HV_X64_MSR_HYPERCALL_ENABLE		0x00000001
> @@ -442,10 +442,10 @@ enum HV_GENERIC_SET_FORMAT {
>  #define HV_CLOCK_HZ (NSEC_PER_SEC/100)
>  
>  typedef struct _HV_REFERENCE_TSC_PAGE {
> -	__u32 tsc_sequence;
> -	__u32 res1;
> -	__u64 tsc_scale;
> -	__s64 tsc_offset;
> +	uint32_t tsc_sequence;
> +	uint32_t res1;
> +	uint64_t tsc_scale;
> +	int64_t tsc_offset;
>  } HV_REFERENCE_TSC_PAGE, *PHV_REFERENCE_TSC_PAGE;
>  
>  /* Define the number of synthetic interrupt sources. */
> @@ -499,30 +499,30 @@ enum hv_message_type {
>  
>  /* Define synthetic interrupt controller message flags. */
>  union hv_message_flags {
> -	__u8 asu8;
> +	uint8_t asu8;
>  	struct {
> -		__u8 msg_pending:1;
> -		__u8 reserved:7;
> +		uint8_t msg_pending:1;
> +		uint8_t reserved:7;
>  	};
>  };
>  
>  /* Define port identifier type. */
>  union hv_port_id {
> -	__u32 asu32;
> +	uint32_t asu32;
>  	struct {
> -		__u32 id:24;
> -		__u32 reserved:8;
> +		uint32_t id:24;
> +		uint32_t reserved:8;
>  	} u;
>  };
>  
>  /* Define synthetic interrupt controller message header. */
>  struct hv_message_header {
> -	__u32 message_type;
> -	__u8 payload_size;
> +	uint32_t message_type;
> +	uint8_t payload_size;
>  	union hv_message_flags message_flags;
> -	__u8 reserved[2];
> +	uint8_t reserved[2];
>  	union {
> -		__u64 sender;
> +		uint64_t sender;
>  		union hv_port_id port;
>  	};
>  };
> @@ -531,7 +531,7 @@ struct hv_message_header {
>  struct hv_message {
>  	struct hv_message_header header;
>  	union {
> -		__u64 payload[HV_MESSAGE_PAYLOAD_QWORD_COUNT];
> +		uint64_t payload[HV_MESSAGE_PAYLOAD_QWORD_COUNT];
>  	} u;
>  };
>  
> @@ -542,19 +542,19 @@ struct hv_message_page {
>  
>  /* Define timer message payload structure. */
>  struct hv_timer_message_payload {
> -	__u32 timer_index;
> -	__u32 reserved;
> -	__u64 expiration_time;	/* When the timer expired */
> -	__u64 delivery_time;	/* When the message was delivered */
> +	uint32_t timer_index;
> +	uint32_t reserved;
> +	uint64_t expiration_time; /* When the timer expired */
> +	uint64_t delivery_time;   /* When the message was delivered */
>  };
>  
>  struct hv_nested_enlightenments_control {
>  	struct {
> -		__u32 directhypercall:1;
> -		__u32 reserved:31;
> +		uint32_t directhypercall:1;
> +		uint32_t reserved:31;
>  	} features;
>  	struct {
> -		__u32 reserved;
> +		uint32_t reserved;
>  	} hypercallControls;
>  };
>  
> @@ -571,199 +571,199 @@ union hv_vp_assist_page_msr
>  
>  /* Define virtual processor assist page structure. */
>  struct hv_vp_assist_page {
> -	__u32 apic_assist;
> -	__u32 reserved1;
> -	__u64 vtl_control[3];
> +	uint32_t apic_assist;
> +	uint32_t reserved1;
> +	uint64_t vtl_control[3];
>  	struct hv_nested_enlightenments_control nested_control;
> -	__u8 enlighten_vmentry;
> -	__u8 reserved2[7];
> -	__u64 current_nested_vmcs;
> +	uint8_t enlighten_vmentry;
> +	uint8_t reserved2[7];
> +	uint64_t current_nested_vmcs;
>  };
>  
>  struct hv_enlightened_vmcs {
> -	u32 revision_id;
> -	u32 abort;
> +	uint32_t revision_id;
> +	uint32_t abort;
>  
> -	u16 host_es_selector;
> -	u16 host_cs_selector;
> -	u16 host_ss_selector;
> -	u16 host_ds_selector;
> -	u16 host_fs_selector;
> -	u16 host_gs_selector;
> -	u16 host_tr_selector;
> -
> -	u16 padding16_1;
> -
> -	u64 host_ia32_pat;
> -	u64 host_ia32_efer;
> -
> -	u64 host_cr0;
> -	u64 host_cr3;
> -	u64 host_cr4;
> -
> -	u64 host_ia32_sysenter_esp;
> -	u64 host_ia32_sysenter_eip;
> -	u64 host_rip;
> -	u32 host_ia32_sysenter_cs;
> -
> -	u32 pin_based_vm_exec_control;
> -	u32 vm_exit_controls;
> -	u32 secondary_vm_exec_control;
> -
> -	u64 io_bitmap_a;
> -	u64 io_bitmap_b;
> -	u64 msr_bitmap;
> -
> -	u16 guest_es_selector;
> -	u16 guest_cs_selector;
> -	u16 guest_ss_selector;
> -	u16 guest_ds_selector;
> -	u16 guest_fs_selector;
> -	u16 guest_gs_selector;
> -	u16 guest_ldtr_selector;
> -	u16 guest_tr_selector;
> -
> -	u32 guest_es_limit;
> -	u32 guest_cs_limit;
> -	u32 guest_ss_limit;
> -	u32 guest_ds_limit;
> -	u32 guest_fs_limit;
> -	u32 guest_gs_limit;
> -	u32 guest_ldtr_limit;
> -	u32 guest_tr_limit;
> -	u32 guest_gdtr_limit;
> -	u32 guest_idtr_limit;
> -
> -	u32 guest_es_ar_bytes;
> -	u32 guest_cs_ar_bytes;
> -	u32 guest_ss_ar_bytes;
> -	u32 guest_ds_ar_bytes;
> -	u32 guest_fs_ar_bytes;
> -	u32 guest_gs_ar_bytes;
> -	u32 guest_ldtr_ar_bytes;
> -	u32 guest_tr_ar_bytes;
> -
> -	u64 guest_es_base;
> -	u64 guest_cs_base;
> -	u64 guest_ss_base;
> -	u64 guest_ds_base;
> -	u64 guest_fs_base;
> -	u64 guest_gs_base;
> -	u64 guest_ldtr_base;
> -	u64 guest_tr_base;
> -	u64 guest_gdtr_base;
> -	u64 guest_idtr_base;
> -
> -	u64 padding64_1[3];
> -
> -	u64 vm_exit_msr_store_addr;
> -	u64 vm_exit_msr_load_addr;
> -	u64 vm_entry_msr_load_addr;
> -
> -	u64 cr3_target_value0;
> -	u64 cr3_target_value1;
> -	u64 cr3_target_value2;
> -	u64 cr3_target_value3;
> -
> -	u32 page_fault_error_code_mask;
> -	u32 page_fault_error_code_match;
> -
> -	u32 cr3_target_count;
> -	u32 vm_exit_msr_store_count;
> -	u32 vm_exit_msr_load_count;
> -	u32 vm_entry_msr_load_count;
> -
> -	u64 tsc_offset;
> -	u64 virtual_apic_page_addr;
> -	u64 vmcs_link_pointer;
> -
> -	u64 guest_ia32_debugctl;
> -	u64 guest_ia32_pat;
> -	u64 guest_ia32_efer;
> -
> -	u64 guest_pdptr0;
> -	u64 guest_pdptr1;
> -	u64 guest_pdptr2;
> -	u64 guest_pdptr3;
> -
> -	u64 guest_pending_dbg_exceptions;
> -	u64 guest_sysenter_esp;
> -	u64 guest_sysenter_eip;
> -
> -	u32 guest_activity_state;
> -	u32 guest_sysenter_cs;
> -
> -	u64 cr0_guest_host_mask;
> -	u64 cr4_guest_host_mask;
> -	u64 cr0_read_shadow;
> -	u64 cr4_read_shadow;
> -	u64 guest_cr0;
> -	u64 guest_cr3;
> -	u64 guest_cr4;
> -	u64 guest_dr7;
> -
> -	u64 host_fs_base;
> -	u64 host_gs_base;
> -	u64 host_tr_base;
> -	u64 host_gdtr_base;
> -	u64 host_idtr_base;
> -	u64 host_rsp;
> -
> -	u64 ept_pointer;
> -
> -	u16 virtual_processor_id;
> -	u16 padding16_2[3];
> -
> -	u64 padding64_2[5];
> -	u64 guest_physical_address;
> -
> -	u32 vm_instruction_error;
> -	u32 vm_exit_reason;
> -	u32 vm_exit_intr_info;
> -	u32 vm_exit_intr_error_code;
> -	u32 idt_vectoring_info_field;
> -	u32 idt_vectoring_error_code;
> -	u32 vm_exit_instruction_len;
> -	u32 vmx_instruction_info;
> -
> -	u64 exit_qualification;
> -	u64 exit_io_instruction_ecx;
> -	u64 exit_io_instruction_esi;
> -	u64 exit_io_instruction_edi;
> -	u64 exit_io_instruction_eip;
> -
> -	u64 guest_linear_address;
> -	u64 guest_rsp;
> -	u64 guest_rflags;
> -
> -	u32 guest_interruptibility_info;
> -	u32 cpu_based_vm_exec_control;
> -	u32 exception_bitmap;
> -	u32 vm_entry_controls;
> -	u32 vm_entry_intr_info_field;
> -	u32 vm_entry_exception_error_code;
> -	u32 vm_entry_instruction_len;
> -	u32 tpr_threshold;
> -
> -	u64 guest_rip;
> -
> -	u32 hv_clean_fields;
> -	u32 hv_padding_32;
> -	u32 hv_synthetic_controls;
> -	struct {
> -		u32 nested_flush_hypercall:1;
> -		u32 msr_bitmap:1;
> -		u32 reserved:30;
> +	uint16_t host_es_selector;
> +	uint16_t host_cs_selector;
> +	uint16_t host_ss_selector;
> +	uint16_t host_ds_selector;
> +	uint16_t host_fs_selector;
> +	uint16_t host_gs_selector;
> +	uint16_t host_tr_selector;
> +
> +	uint16_t padding16_1;
> +
> +	uint64_t host_ia32_pat;
> +	uint64_t host_ia32_efer;
> +
> +	uint64_t host_cr0;
> +	uint64_t host_cr3;
> +	uint64_t host_cr4;
> +
> +	uint64_t host_ia32_sysenter_esp;
> +	uint64_t host_ia32_sysenter_eip;
> +	uint64_t host_rip;
> +	uint32_t host_ia32_sysenter_cs;
> +
> +	uint32_t pin_based_vm_exec_control;
> +	uint32_t vm_exit_controls;
> +	uint32_t secondary_vm_exec_control;
> +
> +	uint64_t io_bitmap_a;
> +	uint64_t io_bitmap_b;
> +	uint64_t msr_bitmap;
> +
> +	uint16_t guest_es_selector;
> +	uint16_t guest_cs_selector;
> +	uint16_t guest_ss_selector;
> +	uint16_t guest_ds_selector;
> +	uint16_t guest_fs_selector;
> +	uint16_t guest_gs_selector;
> +	uint16_t guest_ldtr_selector;
> +	uint16_t guest_tr_selector;
> +
> +	uint32_t guest_es_limit;
> +	uint32_t guest_cs_limit;
> +	uint32_t guest_ss_limit;
> +	uint32_t guest_ds_limit;
> +	uint32_t guest_fs_limit;
> +	uint32_t guest_gs_limit;
> +	uint32_t guest_ldtr_limit;
> +	uint32_t guest_tr_limit;
> +	uint32_t guest_gdtr_limit;
> +	uint32_t guest_idtr_limit;
> +
> +	uint32_t guest_es_ar_bytes;
> +	uint32_t guest_cs_ar_bytes;
> +	uint32_t guest_ss_ar_bytes;
> +	uint32_t guest_ds_ar_bytes;
> +	uint32_t guest_fs_ar_bytes;
> +	uint32_t guest_gs_ar_bytes;
> +	uint32_t guest_ldtr_ar_bytes;
> +	uint32_t guest_tr_ar_bytes;
> +
> +	uint64_t guest_es_base;
> +	uint64_t guest_cs_base;
> +	uint64_t guest_ss_base;
> +	uint64_t guest_ds_base;
> +	uint64_t guest_fs_base;
> +	uint64_t guest_gs_base;
> +	uint64_t guest_ldtr_base;
> +	uint64_t guest_tr_base;
> +	uint64_t guest_gdtr_base;
> +	uint64_t guest_idtr_base;
> +
> +	uint64_t padding64_1[3];
> +
> +	uint64_t vm_exit_msr_store_addr;
> +	uint64_t vm_exit_msr_load_addr;
> +	uint64_t vm_entry_msr_load_addr;
> +
> +	uint64_t cr3_target_value0;
> +	uint64_t cr3_target_value1;
> +	uint64_t cr3_target_value2;
> +	uint64_t cr3_target_value3;
> +
> +	uint32_t page_fault_error_code_mask;
> +	uint32_t page_fault_error_code_match;
> +
> +	uint32_t cr3_target_count;
> +	uint32_t vm_exit_msr_store_count;
> +	uint32_t vm_exit_msr_load_count;
> +	uint32_t vm_entry_msr_load_count;
> +
> +	uint64_t tsc_offset;
> +	uint64_t virtual_apic_page_addr;
> +	uint64_t vmcs_link_pointer;
> +
> +	uint64_t guest_ia32_debugctl;
> +	uint64_t guest_ia32_pat;
> +	uint64_t guest_ia32_efer;
> +
> +	uint64_t guest_pdptr0;
> +	uint64_t guest_pdptr1;
> +	uint64_t guest_pdptr2;
> +	uint64_t guest_pdptr3;
> +
> +	uint64_t guest_pending_dbg_exceptions;
> +	uint64_t guest_sysenter_esp;
> +	uint64_t guest_sysenter_eip;
> +
> +	uint32_t guest_activity_state;
> +	uint32_t guest_sysenter_cs;
> +
> +	uint64_t cr0_guest_host_mask;
> +	uint64_t cr4_guest_host_mask;
> +	uint64_t cr0_read_shadow;
> +	uint64_t cr4_read_shadow;
> +	uint64_t guest_cr0;
> +	uint64_t guest_cr3;
> +	uint64_t guest_cr4;
> +	uint64_t guest_dr7;
> +
> +	uint64_t host_fs_base;
> +	uint64_t host_gs_base;
> +	uint64_t host_tr_base;
> +	uint64_t host_gdtr_base;
> +	uint64_t host_idtr_base;
> +	uint64_t host_rsp;
> +
> +	uint64_t ept_pointer;
> +
> +	uint16_t virtual_processor_id;
> +	uint16_t padding16_2[3];
> +
> +	uint64_t padding64_2[5];
> +	uint64_t guest_physical_address;
> +
> +	uint32_t vm_instruction_error;
> +	uint32_t vm_exit_reason;
> +	uint32_t vm_exit_intr_info;
> +	uint32_t vm_exit_intr_error_code;
> +	uint32_t idt_vectoring_info_field;
> +	uint32_t idt_vectoring_error_code;
> +	uint32_t vm_exit_instruction_len;
> +	uint32_t vmx_instruction_info;
> +
> +	uint64_t exit_qualification;
> +	uint64_t exit_io_instruction_ecx;
> +	uint64_t exit_io_instruction_esi;
> +	uint64_t exit_io_instruction_edi;
> +	uint64_t exit_io_instruction_eip;
> +
> +	uint64_t guest_linear_address;
> +	uint64_t guest_rsp;
> +	uint64_t guest_rflags;
> +
> +	uint32_t guest_interruptibility_info;
> +	uint32_t cpu_based_vm_exec_control;
> +	uint32_t exception_bitmap;
> +	uint32_t vm_entry_controls;
> +	uint32_t vm_entry_intr_info_field;
> +	uint32_t vm_entry_exception_error_code;
> +	uint32_t vm_entry_instruction_len;
> +	uint32_t tpr_threshold;
> +
> +	uint64_t guest_rip;
> +
> +	uint32_t hv_clean_fields;
> +	uint32_t hv_padding_32;
> +	uint32_t hv_synthetic_controls;
> +	struct {
> +		uint32_t nested_flush_hypercall:1;
> +		uint32_t msr_bitmap:1;
> +		uint32_t reserved:30;
>  	}  hv_enlightenments_control;
> -	u32 hv_vp_id;
> +	uint32_t hv_vp_id;
>  
> -	u64 hv_vm_id;
> -	u64 partition_assist_page;
> -	u64 padding64_4[4];
> -	u64 guest_bndcfgs;
> -	u64 padding64_5[7];
> -	u64 xss_exit_bitmap;
> -	u64 padding64_6[7];
> +	uint64_t hv_vm_id;
> +	uint64_t partition_assist_page;
> +	uint64_t padding64_4[4];
> +	uint64_t guest_bndcfgs;
> +	uint64_t padding64_5[7];
> +	uint64_t xss_exit_bitmap;
> +	uint64_t padding64_6[7];
>  };
>  
>  #define HV_VMX_ENLIGHTENED_CLEAN_FIELD_NONE			0
> @@ -794,17 +794,17 @@ struct hv_enlightened_vmcs {
>   * Synthetic timer configuration.
>   */
>  union hv_stimer_config {
> -	u64 as_uint64;
> +	uint64_t as_uint64;
>  	struct {
> -		u64 enable:1;
> -		u64 periodic:1;
> -		u64 lazy:1;
> -		u64 auto_enable:1;
> -		u64 apic_vector:8;
> -		u64 direct_mode:1;
> -		u64 reserved_z0:3;
> -		u64 sintx:4;
> -		u64 reserved_z1:44;
> +		uint64_t enable:1;
> +		uint64_t periodic:1;
> +		uint64_t lazy:1;
> +		uint64_t auto_enable:1;
> +		uint64_t apic_vector:8;
> +		uint64_t direct_mode:1;
> +		uint64_t reserved_z0:3;
> +		uint64_t sintx:4;
> +		uint64_t reserved_z1:44;
>  	};
>  };
>  
> @@ -816,70 +816,70 @@ union hv_synic_event_flags {
>  
>  /* Define SynIC control register. */
>  union hv_synic_scontrol {
> -	u64 as_uint64;
> +	uint64_t as_uint64;
>  	struct {
> -		u64 enable:1;
> -		u64 reserved:63;
> +		uint64_t enable:1;
> +		uint64_t reserved:63;
>  	};
>  };
>  
>  /* Define synthetic interrupt source. */
>  union hv_synic_sint {
> -	u64 as_uint64;
> +	uint64_t as_uint64;
>  	struct {
> -		u64 vector:8;
> -		u64 reserved1:8;
> -		u64 masked:1;
> -		u64 auto_eoi:1;
> -		u64 polling:1;
> -		u64 reserved2:45;
> +		uint64_t vector:8;
> +		uint64_t reserved1:8;
> +		uint64_t masked:1;
> +		uint64_t auto_eoi:1;
> +		uint64_t polling:1;
> +		uint64_t reserved2:45;
>  	};
>  };
>  
>  /* Define the format of the SIMP register */
>  union hv_synic_simp {
> -	u64 as_uint64;
> +	uint64_t as_uint64;
>  	struct {
> -		u64 simp_enabled:1;
> -		u64 preserved:11;
> -		u64 base_simp_gpa:52;
> +		uint64_t simp_enabled:1;
> +		uint64_t preserved:11;
> +		uint64_t base_simp_gpa:52;
>  	};
>  };
>  
>  /* Define the format of the SIEFP register */
>  union hv_synic_siefp {
> -	u64 as_uint64;
> +	uint64_t as_uint64;
>  	struct {
> -		u64 siefp_enabled:1;
> -		u64 preserved:11;
> -		u64 base_siefp_gpa:52;
> +		uint64_t siefp_enabled:1;
> +		uint64_t preserved:11;
> +		uint64_t base_siefp_gpa:52;
>  	};
>  };
>  
>  struct hv_vpset {
> -	u64 format;
> -	u64 valid_bank_mask;
> -	u64 bank_contents[];
> +	uint64_t format;
> +	uint64_t valid_bank_mask;
> +	uint64_t bank_contents[];
>  };
>  
>  /* HvCallSendSyntheticClusterIpi hypercall */
>  struct hv_send_ipi {
> -	u32 vector;
> -	u32 reserved;
> -	u64 cpu_mask;
> +	uint32_t vector;
> +	uint32_t reserved;
> +	uint64_t cpu_mask;
>  };
>  
>  /* HvCallSendSyntheticClusterIpiEx hypercall */
>  struct hv_send_ipi_ex {
> -	u32 vector;
> -	u32 reserved;
> +	uint32_t vector;
> +	uint32_t reserved;
>  	struct hv_vpset vp_set;
>  };
>  
>  /* HvFlushGuestPhysicalAddressSpace hypercalls */
>  struct hv_guest_mapping_flush {
> -	u64 address_space;
> -	u64 flags;
> +	uint64_t address_space;
> +	uint64_t flags;
>  };
>  
>  /*
> @@ -890,11 +890,11 @@ struct hv_guest_mapping_flush {
>  
>  /* HvFlushGuestPhysicalAddressList hypercall */
>  union hv_gpa_page_range {
> -	u64 address_space;
> +	uint64_t address_space;
>  	struct {
> -		u64 additional_pages:11;
> -		u64 largepage:1;
> -		u64 basepfn:52;
> +		uint64_t additional_pages:11;
> +		uint64_t largepage:1;
> +		uint64_t basepfn:52;
>  	} page;
>  };
>  
> @@ -903,32 +903,32 @@ union hv_gpa_page_range {
>   * count is equal with how many entries of union hv_gpa_page_range can
>   * be populated into the input parameter page.
>   */
> -#define HV_MAX_FLUSH_REP_COUNT ((HV_HYP_PAGE_SIZE - 2 * sizeof(u64)) /	\
> +#define HV_MAX_FLUSH_REP_COUNT ((HV_HYP_PAGE_SIZE - 2 * sizeof(uint64_t)) / \
>  				sizeof(union hv_gpa_page_range))
>  
>  struct hv_guest_mapping_flush_list {
> -	u64 address_space;
> -	u64 flags;
> +	uint64_t address_space;
> +	uint64_t flags;
>  	union hv_gpa_page_range gpa_list[HV_MAX_FLUSH_REP_COUNT];
>  };
>  
>  /* HvFlushVirtualAddressSpace, HvFlushVirtualAddressList hypercalls */
>  struct hv_tlb_flush {
> -	u64 address_space;
> -	u64 flags;
> -	u64 processor_mask;
> -	u64 gva_list[];
> +	uint64_t address_space;
> +	uint64_t flags;
> +	uint64_t processor_mask;
> +	uint64_t gva_list[];
>  };
>  
>  /* HvFlushVirtualAddressSpaceEx hypercall */
>  struct hv_tlb_flush_ex {
> -	u64 address_space;
> -	u64 flags;
> +	uint64_t address_space;
> +	uint64_t flags;
>  	struct hv_vpset hv_vp_set;
> -	/* u64 gva_list[]; */
> +	/* uint64_t gva_list[]; */
>  };
>  
>  struct hv_partition_assist_pg {
> -	u32 tlb_lock_count;
> +	uint32_t tlb_lock_count;
>  };
>  #endif
> 
> 



^ permalink raw reply	[flat|nested] 19+ messages in thread
* Re: Ping: [PATCH 1/6] x86/Hyper-V: use standard C types in hyperv-tlfs.h
  2023-02-21 13:43   ` Ping: " Jan Beulich
@ 2023-02-22 12:16     ` Paul Durrant
  0 siblings, 0 replies; 19+ messages in thread
From: Paul Durrant @ 2023-02-22 12:16 UTC (permalink / raw)
  To: Jan Beulich, Wei Liu; +Cc: George Dunlap, xen-devel

On 21/02/2023 13:43, Jan Beulich wrote:
> On 09.02.2023 11:38, Jan Beulich wrote:
>> This is the only file left with a use of an __s<N> type coming from
>> Linux. Since the file has been using an apparently random mix of all
>> three classes of fixed-width types (__{s,u}<N>, {s,u}<N>, and
>> {,u}int<N>_t), consolidate this to use exclusively standard types.
>>
>> No functional change intended.
>>
>> Signed-off-by: Jan Beulich <jbeulich@suse.com>
> 
> Ping? (I'll wait a few more days, but I'm going to commit this eventually
> with just Andrew's ack if no maintainer one arrives.)
> 

No objection from me, but I assume the types were as they were because 
the header was imported.

   Paul



^ permalink raw reply	[flat|nested] 19+ messages in thread
end of thread, other threads:[~2023-02-22 12:16 UTC | newest]

Thread overview: 19+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2023-02-09 10:36 [PATCH 0/6] fixed width type adjustments Jan Beulich
2023-02-09 10:38 ` [PATCH 1/6] x86/Hyper-V: use standard C types in hyperv-tlfs.h Jan Beulich
2023-02-15 13:56   ` Andrew Cooper
2023-02-21 13:43   ` Ping: " Jan Beulich
2023-02-22 12:16     ` Paul Durrant
2023-02-09 10:38 ` [PATCH 2/6] common: move standard C fixed width type declarations to common header Jan Beulich
2023-02-09 14:23   ` Daniel P. Smith
2023-02-15 18:54   ` Andrew Cooper
2023-02-16  7:47     ` Jan Beulich
2023-02-09 10:39 ` [PATCH 3/6] ACPI/CPER: use standard C types Jan Beulich
2023-02-15 19:10   ` Andrew Cooper
2023-02-09 10:39 ` [PATCH 4/6] x86/MSI: use standard C types in structures/unions Jan Beulich
2023-02-16 10:55   ` Andrew Cooper
2023-02-16 14:16     ` Jan Beulich
2023-02-16 19:16       ` Andrew Cooper
2023-02-09 10:42 ` [PATCH 5/6] x86: use standard C types in struct cpuinfo_x86 Jan Beulich
2023-02-16 12:12   ` Andrew Cooper
2023-02-09 10:43 ` [PATCH 6/6] common: __u8 is history Jan Beulich
2023-02-16 12:13   ` Andrew Cooper

This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.