From: Geert Uytterhoeven <geert@linux-m68k.org> To: Paul Walmsley <paul.walmsley@sifive.com>, Palmer Dabbelt <palmer@dabbelt.com>, Albert Ou <aou@eecs.berkeley.edu> Cc: Rob Herring <robh+dt@kernel.org>, Damien Le Moal <damien.lemoal@wdc.com>, Lewis Hanly <lewis.hanly@microchip.com>, Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>, Conor Dooley <conor.dooley@microchip.com>, linux-riscv@lists.infradead.org, devicetree@vger.kernel.org, Geert Uytterhoeven <geert@linux-m68k.org> Subject: [PATCH v3 07/11] riscv: dts: microchip: mpfs: Group tuples in interrupt properties Date: Fri, 17 Dec 2021 13:49:28 +0100 [thread overview] Message-ID: <7e4bffff6d6d6f76e5ac6c0d649b9ca0140f4dc8.1639744905.git.geert@linux-m68k.org> (raw) In-Reply-To: <cover.1639744905.git.geert@linux-m68k.org> To improve human readability and enable automatic validation, the tuples in the various properties containing interrupt specifiers should be grouped. Fix this by grouping the tuples of "interrupts" and "interrupts-extended" properties using angle brackets. Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> Reviewed-by: Conor Dooley <conor.dooley@microchip.com> Tested-by: Conor Dooley <conor.dooley@microchip.com> --- v3: - Add Tested-by, v2: - Add Reviewed-by. --- .../boot/dts/microchip/microchip-mpfs.dtsi | 31 ++++++++++--------- 1 file changed, 16 insertions(+), 15 deletions(-) diff --git a/arch/riscv/boot/dts/microchip/microchip-mpfs.dtsi b/arch/riscv/boot/dts/microchip/microchip-mpfs.dtsi index d9c1dee3fb25beb8..869aaf0d5c066c9d 100644 --- a/arch/riscv/boot/dts/microchip/microchip-mpfs.dtsi +++ b/arch/riscv/boot/dts/microchip/microchip-mpfs.dtsi @@ -158,18 +158,18 @@ cache-controller@2010000 { cache-size = <2097152>; cache-unified; interrupt-parent = <&plic>; - interrupts = <1 2 3>; + interrupts = <1>, <2>, <3>; reg = <0x0 0x2010000 0x0 0x1000>; }; clint@2000000 { compatible = "sifive,fu540-c000-clint", "sifive,clint0"; reg = <0x0 0x2000000 0x0 0xC000>; - interrupts-extended = <&cpu0_intc 3 &cpu0_intc 7 - &cpu1_intc 3 &cpu1_intc 7 - &cpu2_intc 3 &cpu2_intc 7 - &cpu3_intc 3 &cpu3_intc 7 - &cpu4_intc 3 &cpu4_intc 7>; + interrupts-extended = <&cpu0_intc 3>, <&cpu0_intc 7>, + <&cpu1_intc 3>, <&cpu1_intc 7>, + <&cpu2_intc 3>, <&cpu2_intc 7>, + <&cpu3_intc 3>, <&cpu3_intc 7>, + <&cpu4_intc 3>, <&cpu4_intc 7>; }; plic: interrupt-controller@c000000 { @@ -178,11 +178,11 @@ plic: interrupt-controller@c000000 { #address-cells = <0>; #interrupt-cells = <1>; interrupt-controller; - interrupts-extended = <&cpu0_intc 11 - &cpu1_intc 11 &cpu1_intc 9 - &cpu2_intc 11 &cpu2_intc 9 - &cpu3_intc 11 &cpu3_intc 9 - &cpu4_intc 11 &cpu4_intc 9>; + interrupts-extended = <&cpu0_intc 11>, + <&cpu1_intc 11>, <&cpu1_intc 9>, + <&cpu2_intc 11>, <&cpu2_intc 9>, + <&cpu3_intc 11>, <&cpu3_intc 9>, + <&cpu4_intc 11>, <&cpu4_intc 9>; riscv,ndev = <186>; }; @@ -190,7 +190,8 @@ dma@3000000 { compatible = "sifive,fu540-c000-pdma"; reg = <0x0 0x3000000 0x0 0x8000>; interrupt-parent = <&plic>; - interrupts = <23 24 25 26 27 28 29 30>; + interrupts = <23>, <24>, <25>, <26>, <27>, <28>, <29>, + <30>; #dma-cells = <1>; }; @@ -254,7 +255,7 @@ mmc: mmc@20008000 { compatible = "microchip,mpfs-sd4hc", "cdns,sd4hc"; reg = <0x0 0x20008000 0x0 0x1000>; interrupt-parent = <&plic>; - interrupts = <88 89>; + interrupts = <88>, <89>; clocks = <&clkcfg 6>; max-frequency = <200000000>; status = "disabled"; @@ -264,7 +265,7 @@ emac0: ethernet@20110000 { compatible = "cdns,macb"; reg = <0x0 0x20110000 0x0 0x2000>; interrupt-parent = <&plic>; - interrupts = <64 65 66 67>; + interrupts = <64>, <65>, <66>, <67>; local-mac-address = [00 00 00 00 00 00]; clocks = <&clkcfg 4>, <&clkcfg 2>; clock-names = "pclk", "hclk"; @@ -277,7 +278,7 @@ emac1: ethernet@20112000 { compatible = "cdns,macb"; reg = <0x0 0x20112000 0x0 0x2000>; interrupt-parent = <&plic>; - interrupts = <70 71 72 73>; + interrupts = <70>, <71>, <72>, <73>; local-mac-address = [00 00 00 00 00 00]; clocks = <&clkcfg 5>, <&clkcfg 2>; status = "disabled"; -- 2.25.1
WARNING: multiple messages have this Message-ID (diff)
From: Geert Uytterhoeven <geert@linux-m68k.org> To: Paul Walmsley <paul.walmsley@sifive.com>, Palmer Dabbelt <palmer@dabbelt.com>, Albert Ou <aou@eecs.berkeley.edu> Cc: Rob Herring <robh+dt@kernel.org>, Damien Le Moal <damien.lemoal@wdc.com>, Lewis Hanly <lewis.hanly@microchip.com>, Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>, Conor Dooley <conor.dooley@microchip.com>, linux-riscv@lists.infradead.org, devicetree@vger.kernel.org, Geert Uytterhoeven <geert@linux-m68k.org> Subject: [PATCH v3 07/11] riscv: dts: microchip: mpfs: Group tuples in interrupt properties Date: Fri, 17 Dec 2021 13:49:28 +0100 [thread overview] Message-ID: <7e4bffff6d6d6f76e5ac6c0d649b9ca0140f4dc8.1639744905.git.geert@linux-m68k.org> (raw) In-Reply-To: <cover.1639744905.git.geert@linux-m68k.org> To improve human readability and enable automatic validation, the tuples in the various properties containing interrupt specifiers should be grouped. Fix this by grouping the tuples of "interrupts" and "interrupts-extended" properties using angle brackets. Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> Reviewed-by: Conor Dooley <conor.dooley@microchip.com> Tested-by: Conor Dooley <conor.dooley@microchip.com> --- v3: - Add Tested-by, v2: - Add Reviewed-by. --- .../boot/dts/microchip/microchip-mpfs.dtsi | 31 ++++++++++--------- 1 file changed, 16 insertions(+), 15 deletions(-) diff --git a/arch/riscv/boot/dts/microchip/microchip-mpfs.dtsi b/arch/riscv/boot/dts/microchip/microchip-mpfs.dtsi index d9c1dee3fb25beb8..869aaf0d5c066c9d 100644 --- a/arch/riscv/boot/dts/microchip/microchip-mpfs.dtsi +++ b/arch/riscv/boot/dts/microchip/microchip-mpfs.dtsi @@ -158,18 +158,18 @@ cache-controller@2010000 { cache-size = <2097152>; cache-unified; interrupt-parent = <&plic>; - interrupts = <1 2 3>; + interrupts = <1>, <2>, <3>; reg = <0x0 0x2010000 0x0 0x1000>; }; clint@2000000 { compatible = "sifive,fu540-c000-clint", "sifive,clint0"; reg = <0x0 0x2000000 0x0 0xC000>; - interrupts-extended = <&cpu0_intc 3 &cpu0_intc 7 - &cpu1_intc 3 &cpu1_intc 7 - &cpu2_intc 3 &cpu2_intc 7 - &cpu3_intc 3 &cpu3_intc 7 - &cpu4_intc 3 &cpu4_intc 7>; + interrupts-extended = <&cpu0_intc 3>, <&cpu0_intc 7>, + <&cpu1_intc 3>, <&cpu1_intc 7>, + <&cpu2_intc 3>, <&cpu2_intc 7>, + <&cpu3_intc 3>, <&cpu3_intc 7>, + <&cpu4_intc 3>, <&cpu4_intc 7>; }; plic: interrupt-controller@c000000 { @@ -178,11 +178,11 @@ plic: interrupt-controller@c000000 { #address-cells = <0>; #interrupt-cells = <1>; interrupt-controller; - interrupts-extended = <&cpu0_intc 11 - &cpu1_intc 11 &cpu1_intc 9 - &cpu2_intc 11 &cpu2_intc 9 - &cpu3_intc 11 &cpu3_intc 9 - &cpu4_intc 11 &cpu4_intc 9>; + interrupts-extended = <&cpu0_intc 11>, + <&cpu1_intc 11>, <&cpu1_intc 9>, + <&cpu2_intc 11>, <&cpu2_intc 9>, + <&cpu3_intc 11>, <&cpu3_intc 9>, + <&cpu4_intc 11>, <&cpu4_intc 9>; riscv,ndev = <186>; }; @@ -190,7 +190,8 @@ dma@3000000 { compatible = "sifive,fu540-c000-pdma"; reg = <0x0 0x3000000 0x0 0x8000>; interrupt-parent = <&plic>; - interrupts = <23 24 25 26 27 28 29 30>; + interrupts = <23>, <24>, <25>, <26>, <27>, <28>, <29>, + <30>; #dma-cells = <1>; }; @@ -254,7 +255,7 @@ mmc: mmc@20008000 { compatible = "microchip,mpfs-sd4hc", "cdns,sd4hc"; reg = <0x0 0x20008000 0x0 0x1000>; interrupt-parent = <&plic>; - interrupts = <88 89>; + interrupts = <88>, <89>; clocks = <&clkcfg 6>; max-frequency = <200000000>; status = "disabled"; @@ -264,7 +265,7 @@ emac0: ethernet@20110000 { compatible = "cdns,macb"; reg = <0x0 0x20110000 0x0 0x2000>; interrupt-parent = <&plic>; - interrupts = <64 65 66 67>; + interrupts = <64>, <65>, <66>, <67>; local-mac-address = [00 00 00 00 00 00]; clocks = <&clkcfg 4>, <&clkcfg 2>; clock-names = "pclk", "hclk"; @@ -277,7 +278,7 @@ emac1: ethernet@20112000 { compatible = "cdns,macb"; reg = <0x0 0x20112000 0x0 0x2000>; interrupt-parent = <&plic>; - interrupts = <70 71 72 73>; + interrupts = <70>, <71>, <72>, <73>; local-mac-address = [00 00 00 00 00 00]; clocks = <&clkcfg 5>, <&clkcfg 2>; status = "disabled"; -- 2.25.1 _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv
next prev parent reply other threads:[~2021-12-17 12:49 UTC|newest] Thread overview: 28+ messages / expand[flat|nested] mbox.gz Atom feed top 2021-12-17 12:49 [PATCH v3 00/11] riscv: dts: Miscellaneous fixes Geert Uytterhoeven 2021-12-17 12:49 ` Geert Uytterhoeven 2021-12-17 12:49 ` [PATCH v3 01/11] riscv: dts: canaan: Fix SPI FLASH node names Geert Uytterhoeven 2021-12-17 12:49 ` Geert Uytterhoeven 2021-12-17 12:49 ` [PATCH v3 02/11] riscv: dts: canaan: Group tuples in interrupt properties Geert Uytterhoeven 2021-12-17 12:49 ` Geert Uytterhoeven 2021-12-17 12:49 ` [PATCH v3 03/11] riscv: dts: microchip: mpfs: Drop empty chosen node Geert Uytterhoeven 2021-12-17 12:49 ` Geert Uytterhoeven 2021-12-17 15:10 ` Krzysztof Kozlowski 2021-12-17 15:10 ` Krzysztof Kozlowski 2021-12-17 12:49 ` [PATCH v3 04/11] riscv: dts: microchip: mpfs: Fix PLIC node Geert Uytterhoeven 2021-12-17 12:49 ` Geert Uytterhoeven 2021-12-17 12:49 ` [PATCH v3 05/11] riscv: dts: microchip: mpfs: Fix reference clock node Geert Uytterhoeven 2021-12-17 12:49 ` Geert Uytterhoeven 2021-12-17 12:49 ` [PATCH v3 06/11] riscv: dts: microchip: mpfs: Fix clock controller node Geert Uytterhoeven 2021-12-17 12:49 ` Geert Uytterhoeven 2021-12-17 12:49 ` Geert Uytterhoeven [this message] 2021-12-17 12:49 ` [PATCH v3 07/11] riscv: dts: microchip: mpfs: Group tuples in interrupt properties Geert Uytterhoeven 2021-12-17 12:49 ` [PATCH v3 08/11] riscv: dts: sifive: " Geert Uytterhoeven 2021-12-17 12:49 ` Geert Uytterhoeven 2021-12-17 12:49 ` [PATCH v3 09/11] riscv: dts: sifive: Group tuples in register properties Geert Uytterhoeven 2021-12-17 12:49 ` Geert Uytterhoeven 2021-12-17 12:49 ` [PATCH v3 10/11] riscv: dts: sifive: fu540-c000: Drop bogus soc node compatible values Geert Uytterhoeven 2021-12-17 12:49 ` Geert Uytterhoeven 2021-12-17 12:49 ` [PATCH v3 11/11] riscv: dts: sifive: fu540-c000: Fix PLIC node Geert Uytterhoeven 2021-12-17 12:49 ` Geert Uytterhoeven 2022-01-09 18:21 ` [PATCH v3 00/11] riscv: dts: Miscellaneous fixes Palmer Dabbelt 2022-01-09 18:21 ` Palmer Dabbelt
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