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From: Florian Fainelli <f.fainelli@gmail.com>
To: Ard Biesheuvel <ard.biesheuvel@linaro.org>,
	Jim Quinlan <jim2101024@gmail.com>
Cc: Linux Kernel Mailing List <linux-kernel@vger.kernel.org>,
	Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>,
	linux-pci <linux-pci@vger.kernel.org>,
	Florian Fainelli <f.fainelli@gmail.com>,
	BCM Kernel Feedback <bcm-kernel-feedback-list@broadcom.com>,
	Gregory Fong <gregory.0xf0@gmail.com>,
	Bjorn Helgaas <bhelgaas@google.com>,
	Brian Norris <computersforpeace@gmail.com>,
	Christoph Hellwig <hch@lst.de>,
	linux-arm-kernel <linux-arm-kernel@lists.infradead.org>
Subject: Re: [PATCH v5 04/12] PCI: brcmstb: add dma-range mapping for inbound traffic
Date: Thu, 20 Sep 2018 13:55:10 -0700	[thread overview]
Message-ID: <7fa897cf-4d58-c63f-afdd-a3ec5a6a56bf@gmail.com> (raw)
In-Reply-To: <CAKv+Gu_d-r0ubyqZcDzERYd5FVTSpjBk++iACHqVgtHrOK0F7A@mail.gmail.com>

On 09/19/2018 07:19 PM, Ard Biesheuvel wrote:
> On 19 September 2018 at 07:31, Jim Quinlan <jim2101024@gmail.com> wrote:
>> The Broadcom STB PCIe host controller is intimately related to the
>> memory subsystem.  This close relationship adds complexity to how cpu
>> system memory is mapped to PCIe memory.  Ideally, this mapping is an
>> identity mapping, or an identity mapping off by a constant.  Not so in
>> this case.
>>
>> Consider the Broadcom reference board BCM97445LCC_4X8 which has 6 GB
>> of system memory.  Here is how the PCIe controller maps the
>> system memory to PCIe memory:
>>
>>   memc0-a@[        0....3fffffff] <=> pci@[        0....3fffffff]
>>   memc0-b@[100000000...13fffffff] <=> pci@[ 40000000....7fffffff]
>>   memc1-a@[ 40000000....7fffffff] <=> pci@[ 80000000....bfffffff]
>>   memc1-b@[300000000...33fffffff] <=> pci@[ c0000000....ffffffff]
>>   memc2-a@[ 80000000....bfffffff] <=> pci@[100000000...13fffffff]
>>   memc2-b@[c00000000...c3fffffff] <=> pci@[140000000...17fffffff]
>>
> 
> So is describing this as
> 
> dma-ranges = <0x0 0x0 0x0 0x0 0x0 0x40000000>,
>              <0x0 0x40000000 0x1 0x0 0x0 0x40000000>,
>              <0x0 0x80000000 0x0 0x40000000 0x0 0x40000000>,
>              <0x0 0xc0000000 0x3 0x0 0x0 0x40000000>,
>              <0x1 0x0 0x0 0x80000000 0x0 0x40000000>,
>              <0x1 0x40000000 0x0 0xc0000000 0x0 0x40000000>;
> 
> not working for you? I haven't tried this myself, but since DT permits
> describing the inbound mappings this way, we should fix the code if it
> doesn't work at the moment.

You mean encoding the memory controller index in the first cell? If that
works, that's indeed a much cleaner solution, though is it standard
compliant in any form?
-- 
Florian

WARNING: multiple messages have this Message-ID (diff)
From: f.fainelli@gmail.com (Florian Fainelli)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v5 04/12] PCI: brcmstb: add dma-range mapping for inbound traffic
Date: Thu, 20 Sep 2018 13:55:10 -0700	[thread overview]
Message-ID: <7fa897cf-4d58-c63f-afdd-a3ec5a6a56bf@gmail.com> (raw)
In-Reply-To: <CAKv+Gu_d-r0ubyqZcDzERYd5FVTSpjBk++iACHqVgtHrOK0F7A@mail.gmail.com>

On 09/19/2018 07:19 PM, Ard Biesheuvel wrote:
> On 19 September 2018 at 07:31, Jim Quinlan <jim2101024@gmail.com> wrote:
>> The Broadcom STB PCIe host controller is intimately related to the
>> memory subsystem.  This close relationship adds complexity to how cpu
>> system memory is mapped to PCIe memory.  Ideally, this mapping is an
>> identity mapping, or an identity mapping off by a constant.  Not so in
>> this case.
>>
>> Consider the Broadcom reference board BCM97445LCC_4X8 which has 6 GB
>> of system memory.  Here is how the PCIe controller maps the
>> system memory to PCIe memory:
>>
>>   memc0-a@[        0....3fffffff] <=> pci@[        0....3fffffff]
>>   memc0-b@[100000000...13fffffff] <=> pci@[ 40000000....7fffffff]
>>   memc1-a@[ 40000000....7fffffff] <=> pci@[ 80000000....bfffffff]
>>   memc1-b@[300000000...33fffffff] <=> pci@[ c0000000....ffffffff]
>>   memc2-a@[ 80000000....bfffffff] <=> pci@[100000000...13fffffff]
>>   memc2-b@[c00000000...c3fffffff] <=> pci@[140000000...17fffffff]
>>
> 
> So is describing this as
> 
> dma-ranges = <0x0 0x0 0x0 0x0 0x0 0x40000000>,
>              <0x0 0x40000000 0x1 0x0 0x0 0x40000000>,
>              <0x0 0x80000000 0x0 0x40000000 0x0 0x40000000>,
>              <0x0 0xc0000000 0x3 0x0 0x0 0x40000000>,
>              <0x1 0x0 0x0 0x80000000 0x0 0x40000000>,
>              <0x1 0x40000000 0x0 0xc0000000 0x0 0x40000000>;
> 
> not working for you? I haven't tried this myself, but since DT permits
> describing the inbound mappings this way, we should fix the code if it
> doesn't work at the moment.

You mean encoding the memory controller index in the first cell? If that
works, that's indeed a much cleaner solution, though is it standard
compliant in any form?
-- 
Florian

  reply	other threads:[~2018-09-20 20:55 UTC|newest]

Thread overview: 71+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-09-19 14:31 [PATCH v5 00/12] PCI: brcmstb: Add Broadcom Settopbox PCIe support (resend) Jim Quinlan
2018-09-19 14:31 ` [PATCH v5 01/12] soc: bcm: brcmstb: add memory API Jim Quinlan
2018-09-19 14:31   ` Jim Quinlan
2018-09-19 14:31 ` [PATCH v5 02/12] dt-bindings: pci: add DT docs for Brcmstb PCIe device Jim Quinlan
2018-09-19 14:31   ` Jim Quinlan
2018-09-19 14:31   ` Jim Quinlan
2018-09-20  9:06   ` Jonas Gorski
2018-09-20  9:06     ` Jonas Gorski
2018-09-20  9:06     ` Jonas Gorski
2018-09-21 18:00     ` Jim Quinlan
2018-09-21 18:00       ` Jim Quinlan
2018-09-21 18:00       ` Jim Quinlan
2018-09-19 14:31 ` [PATCH v5 03/12] PCI: brcmstb: add Broadcom STB PCIe host controller driver Jim Quinlan
2018-09-19 14:31   ` Jim Quinlan
2018-09-19 14:31 ` [PATCH v5 04/12] PCI: brcmstb: add dma-range mapping for inbound traffic Jim Quinlan
2018-09-19 14:31   ` Jim Quinlan
2018-09-19 14:31   ` Jim Quinlan
2018-09-20  2:19   ` Ard Biesheuvel
2018-09-20  2:19     ` Ard Biesheuvel
2018-09-20 20:55     ` Florian Fainelli [this message]
2018-09-20 20:55       ` Florian Fainelli
2018-09-20 21:04       ` Ard Biesheuvel
2018-09-20 21:04         ` Ard Biesheuvel
2018-09-20 21:31         ` Florian Fainelli
2018-09-20 21:31           ` Florian Fainelli
2018-09-20 21:33           ` Ard Biesheuvel
2018-09-20 21:33             ` Ard Biesheuvel
2018-09-20 21:39             ` Florian Fainelli
2018-09-20 21:39               ` Florian Fainelli
2018-09-21 17:40               ` Jim Quinlan
2018-09-21 17:40                 ` Jim Quinlan
2018-09-24  8:25                 ` Ard Biesheuvel
2018-09-24  8:25                   ` Ard Biesheuvel
2018-09-24 15:01                   ` Jim Quinlan
2018-09-24 15:01                     ` Jim Quinlan
2018-09-26  2:59                     ` Florian Fainelli
2018-09-26  2:59                       ` Florian Fainelli
2018-09-26  7:59                       ` Ard Biesheuvel
2018-09-26  7:59                         ` Ard Biesheuvel
2018-09-26 10:56                       ` Robin Murphy
2018-09-26 10:56                         ` Robin Murphy
2018-10-01 18:13                         ` Florian Fainelli
2018-10-01 18:13                           ` Florian Fainelli
2019-06-27 16:55                     ` Stefan Wahren
2019-06-27 16:55                       ` Stefan Wahren
2018-09-19 14:32 ` [PATCH v5 05/12] PCI: brcmstb: add MSI capability Jim Quinlan
2018-09-19 14:32   ` Jim Quinlan
2018-09-19 14:32 ` [PATCH v5 06/12] MIPS: BMIPS: add dma remap for BrcmSTB PCIe Jim Quinlan
2018-09-26 22:07   ` Paul Burton
2018-09-26 22:07     ` Paul Burton
2018-09-28 21:48     ` Jim Quinlan
2018-09-19 14:32 ` [PATCH v5 07/12] PCI/MSI: enable PCI_MSI_IRQ_DOMAIN support for MIPS Jim Quinlan
2018-09-19 14:32 ` [PATCH v5 08/12] MIPS: BMIPS: add PCI bindings for 7425, 7435 Jim Quinlan
2018-09-19 14:32 ` [PATCH v5 09/12] MIPS: BMIPS: enable PCI Jim Quinlan
2018-09-19 14:32 ` [PATCH v5 10/12] ARM64: declare __phys_to_dma on ARCH_HAS_PHYS_TO_DMA Jim Quinlan
2018-09-19 14:32   ` Jim Quinlan
2018-09-19 14:37   ` Christoph Hellwig
2018-09-19 14:37     ` Christoph Hellwig
2018-09-19 14:32 ` [PATCH v5 11/12] ARM64: add dma remap for BrcmSTB PCIe Jim Quinlan
2018-09-19 14:32   ` Jim Quinlan
2018-09-19 14:32   ` Jim Quinlan
2018-09-19 14:41   ` Christoph Hellwig
2018-09-19 14:41     ` Christoph Hellwig
2018-09-19 14:41     ` Christoph Hellwig
2018-09-21 18:29     ` Jim Quinlan
2018-09-21 18:29       ` Jim Quinlan
2018-09-19 14:32 ` [PATCH v5 12/12] ARM: " Jim Quinlan
2018-09-19 14:32   ` Jim Quinlan
2019-03-20 23:15 ` [PATCH v5 00/12] PCI: brcmstb: Add Broadcom Settopbox PCIe support (resend) Bjorn Helgaas
2019-03-20 23:22   ` Florian Fainelli
  -- strict thread matches above, loose matches on Subject: below --
2018-09-06 20:42 [PATCH v5 00/12] PCI: brcmstb: Add Broadcom Settopbox PCIe support Jim Quinlan
2018-09-06 20:42 ` [PATCH v5 04/12] PCI: brcmstb: add dma-range mapping for inbound traffic Jim Quinlan

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