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From: Kevin Hilman <khilman@baylibre.com>
To: Martin Blumenstingl <martin.blumenstingl@googlemail.com>,
	linux-amlogic@lists.infradead.org
Cc: linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org,
	Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Subject: Re: [PATCH] ARM: dts: meson: move the L2 cache-controller inside the SoC node
Date: Mon, 24 Aug 2020 14:15:15 -0700	[thread overview]
Message-ID: <7hft8bu4nw.fsf@baylibre.com> (raw)
In-Reply-To: <20200815182223.408965-1-martin.blumenstingl@googlemail.com>

Martin Blumenstingl <martin.blumenstingl@googlemail.com> writes:

> All IO mapped SoC peripherals should be within the "soc" node. Move the
> L2 cache-controller there as well since it's the only one not following
> this pattern.
>
> Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>

Boot tested on meson8b-odroidc1

Tested-by: Kevin Hilman <khilman@baylibre.com>

Queuing for v5.10.

Thanks,

Kevin

WARNING: multiple messages have this Message-ID (diff)
From: Kevin Hilman <khilman@baylibre.com>
To: Martin Blumenstingl <martin.blumenstingl@googlemail.com>,
	linux-amlogic@lists.infradead.org
Cc: Martin Blumenstingl <martin.blumenstingl@googlemail.com>,
	linux-kernel@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH] ARM: dts: meson: move the L2 cache-controller inside the SoC node
Date: Mon, 24 Aug 2020 14:15:15 -0700	[thread overview]
Message-ID: <7hft8bu4nw.fsf@baylibre.com> (raw)
In-Reply-To: <20200815182223.408965-1-martin.blumenstingl@googlemail.com>

Martin Blumenstingl <martin.blumenstingl@googlemail.com> writes:

> All IO mapped SoC peripherals should be within the "soc" node. Move the
> L2 cache-controller there as well since it's the only one not following
> this pattern.
>
> Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>

Boot tested on meson8b-odroidc1

Tested-by: Kevin Hilman <khilman@baylibre.com>

Queuing for v5.10.

Thanks,

Kevin

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

WARNING: multiple messages have this Message-ID (diff)
From: Kevin Hilman <khilman@baylibre.com>
To: Martin Blumenstingl <martin.blumenstingl@googlemail.com>,
	linux-amlogic@lists.infradead.org
Cc: Martin Blumenstingl <martin.blumenstingl@googlemail.com>,
	linux-kernel@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH] ARM: dts: meson: move the L2 cache-controller inside the SoC node
Date: Mon, 24 Aug 2020 14:15:15 -0700	[thread overview]
Message-ID: <7hft8bu4nw.fsf@baylibre.com> (raw)
In-Reply-To: <20200815182223.408965-1-martin.blumenstingl@googlemail.com>

Martin Blumenstingl <martin.blumenstingl@googlemail.com> writes:

> All IO mapped SoC peripherals should be within the "soc" node. Move the
> L2 cache-controller there as well since it's the only one not following
> this pattern.
>
> Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>

Boot tested on meson8b-odroidc1

Tested-by: Kevin Hilman <khilman@baylibre.com>

Queuing for v5.10.

Thanks,

Kevin

_______________________________________________
linux-amlogic mailing list
linux-amlogic@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-amlogic

  parent reply	other threads:[~2020-08-24 21:15 UTC|newest]

Thread overview: 10+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-08-15 18:22 [PATCH] ARM: dts: meson: move the L2 cache-controller inside the SoC node Martin Blumenstingl
2020-08-15 18:22 ` Martin Blumenstingl
2020-08-15 18:22 ` Martin Blumenstingl
2020-08-24  8:05 ` Neil Armstrong
2020-08-24 21:15 ` Kevin Hilman [this message]
2020-08-24 21:15   ` Kevin Hilman
2020-08-24 21:15   ` Kevin Hilman
2020-08-24 21:16 ` Kevin Hilman
2020-08-24 21:16   ` Kevin Hilman
2020-08-24 21:16   ` Kevin Hilman

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