All of lore.kernel.org
 help / color / mirror / Atom feed
From: "Shankar, Uma" <uma.shankar@intel.com>
To: "Gupta, Anshuman" <anshuman.gupta@intel.com>,
	"intel-gfx@lists.freedesktop.org"
	<intel-gfx@lists.freedesktop.org>,
	"dri-devel@lists.freedesktop.org"
	<dri-devel@lists.freedesktop.org>
Cc: "Nikula, Jani" <jani.nikula@intel.com>,
	"seanpaul@chromium.org" <seanpaul@chromium.org>,
	"Li,  Juston" <juston.li@intel.com>,
	"Gupta, Anshuman" <anshuman.gupta@intel.com>
Subject: RE: [PATCH v3 05/16] drm/i915/hdcp: Move HDCP enc status timeout to header
Date: Tue, 27 Oct 2020 05:52:13 +0000	[thread overview]
Message-ID: <80aaa54c474449cf9e4b204e34488493@intel.com> (raw)
In-Reply-To: <20201023122112.15265-6-anshuman.gupta@intel.com>



> -----Original Message-----
> From: Anshuman Gupta <anshuman.gupta@intel.com>
> Sent: Friday, October 23, 2020 5:51 PM
> To: intel-gfx@lists.freedesktop.org; dri-devel@lists.freedesktop.org
> Cc: seanpaul@chromium.org; Nikula, Jani <jani.nikula@intel.com>; C,
> Ramalingam <ramalingam.c@intel.com>; Li, Juston <juston.li@intel.com>;
> Shankar, Uma <uma.shankar@intel.com>; Gupta, Anshuman
> <anshuman.gupta@intel.com>
> Subject: [PATCH v3 05/16] drm/i915/hdcp: Move HDCP enc status timeout to
> header
> 
> DP MST stream encryption status requires time of a link frame in order to change
> its status, but as there were some HDCP encryption timeout observed earlier, it
> is safer to use ENCRYPT_STATUS_CHANGE_TIMEOUT_MS timeout for stream
> status too, it requires to move the macro to a header.
> It will be used by both HDCP{1.x,2.x} stream status timeout.

Looks Good to me.
Reviewed-by: Uma Shankar <uma.shankar@intel.com>

> Related: 7e90e8d0c0ea ("drm/i915: Increase timeout for Encrypt status change")
> Cc: Ramalingam C <ramalingam.c@intel.com>
> Signed-off-by: Anshuman Gupta <anshuman.gupta@intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_hdcp.c | 9 ++++-----
> drivers/gpu/drm/i915/display/intel_hdcp.h | 2 ++
>  2 files changed, 6 insertions(+), 5 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_hdcp.c
> b/drivers/gpu/drm/i915/display/intel_hdcp.c
> index a9b652c6e742..61252d4be3dd 100644
> --- a/drivers/gpu/drm/i915/display/intel_hdcp.c
> +++ b/drivers/gpu/drm/i915/display/intel_hdcp.c
> @@ -23,7 +23,6 @@
>  #include "intel_connector.h"
> 
>  #define KEY_LOAD_TRIES	5
> -#define ENCRYPT_STATUS_CHANGE_TIMEOUT_MS	50
>  #define HDCP2_LC_RETRY_CNT			3
> 
>  static
> @@ -762,7 +761,7 @@ static int intel_hdcp_auth(struct intel_connector
> *connector)
>  	if (intel_de_wait_for_set(dev_priv,
>  				  HDCP_STATUS(dev_priv, cpu_transcoder, port),
>  				  HDCP_STATUS_ENC,
> -				  ENCRYPT_STATUS_CHANGE_TIMEOUT_MS)) {
> +
> HDCP_ENCRYPT_STATUS_CHANGE_TIMEOUT_MS)) {
>  		drm_err(&dev_priv->drm, "Timed out waiting for encryption\n");
>  		return -ETIMEDOUT;
>  	}
> @@ -809,7 +808,7 @@ static int _intel_hdcp_disable(struct intel_connector
> *connector)
>  	intel_de_write(dev_priv, HDCP_CONF(dev_priv, cpu_transcoder, port), 0);
>  	if (intel_de_wait_for_clear(dev_priv,
>  				    HDCP_STATUS(dev_priv, cpu_transcoder, port),
> -				    ~0, ENCRYPT_STATUS_CHANGE_TIMEOUT_MS))
> {
> +				    ~0,
> HDCP_ENCRYPT_STATUS_CHANGE_TIMEOUT_MS)) {
>  		drm_err(&dev_priv->drm,
>  			"Failed to disable HDCP, timeout clearing status\n");
>  		return -ETIMEDOUT;
> @@ -1641,7 +1640,7 @@ static int hdcp2_enable_encryption(struct
> intel_connector *connector)
>  				    HDCP2_STATUS(dev_priv, cpu_transcoder,
>  						 port),
>  				    LINK_ENCRYPTION_STATUS,
> -				    ENCRYPT_STATUS_CHANGE_TIMEOUT_MS);
> +
> HDCP_ENCRYPT_STATUS_CHANGE_TIMEOUT_MS);
> 
>  	return ret;
>  }
> @@ -1665,7 +1664,7 @@ static int hdcp2_disable_encryption(struct
> intel_connector *connector)
>  				      HDCP2_STATUS(dev_priv, cpu_transcoder,
>  						   port),
>  				      LINK_ENCRYPTION_STATUS,
> -				      ENCRYPT_STATUS_CHANGE_TIMEOUT_MS);
> +
> HDCP_ENCRYPT_STATUS_CHANGE_TIMEOUT_MS);
>  	if (ret == -ETIMEDOUT)
>  		drm_dbg_kms(&dev_priv->drm, "Disable Encryption Timedout");
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_hdcp.h
> b/drivers/gpu/drm/i915/display/intel_hdcp.h
> index bc51c1e9b481..b912a3a0f5b8 100644
> --- a/drivers/gpu/drm/i915/display/intel_hdcp.h
> +++ b/drivers/gpu/drm/i915/display/intel_hdcp.h
> @@ -8,6 +8,8 @@
> 
>  #include <linux/types.h>
> 
> +#define HDCP_ENCRYPT_STATUS_CHANGE_TIMEOUT_MS	50
> +
>  struct drm_connector;
>  struct drm_connector_state;
>  struct drm_i915_private;
> --
> 2.26.2

_______________________________________________
dri-devel mailing list
dri-devel@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/dri-devel

WARNING: multiple messages have this Message-ID (diff)
From: "Shankar, Uma" <uma.shankar@intel.com>
To: "Gupta, Anshuman" <anshuman.gupta@intel.com>,
	"intel-gfx@lists.freedesktop.org"
	<intel-gfx@lists.freedesktop.org>,
	"dri-devel@lists.freedesktop.org"
	<dri-devel@lists.freedesktop.org>
Cc: "Nikula, Jani" <jani.nikula@intel.com>,
	"seanpaul@chromium.org" <seanpaul@chromium.org>
Subject: Re: [Intel-gfx] [PATCH v3 05/16] drm/i915/hdcp: Move HDCP enc status timeout to header
Date: Tue, 27 Oct 2020 05:52:13 +0000	[thread overview]
Message-ID: <80aaa54c474449cf9e4b204e34488493@intel.com> (raw)
In-Reply-To: <20201023122112.15265-6-anshuman.gupta@intel.com>



> -----Original Message-----
> From: Anshuman Gupta <anshuman.gupta@intel.com>
> Sent: Friday, October 23, 2020 5:51 PM
> To: intel-gfx@lists.freedesktop.org; dri-devel@lists.freedesktop.org
> Cc: seanpaul@chromium.org; Nikula, Jani <jani.nikula@intel.com>; C,
> Ramalingam <ramalingam.c@intel.com>; Li, Juston <juston.li@intel.com>;
> Shankar, Uma <uma.shankar@intel.com>; Gupta, Anshuman
> <anshuman.gupta@intel.com>
> Subject: [PATCH v3 05/16] drm/i915/hdcp: Move HDCP enc status timeout to
> header
> 
> DP MST stream encryption status requires time of a link frame in order to change
> its status, but as there were some HDCP encryption timeout observed earlier, it
> is safer to use ENCRYPT_STATUS_CHANGE_TIMEOUT_MS timeout for stream
> status too, it requires to move the macro to a header.
> It will be used by both HDCP{1.x,2.x} stream status timeout.

Looks Good to me.
Reviewed-by: Uma Shankar <uma.shankar@intel.com>

> Related: 7e90e8d0c0ea ("drm/i915: Increase timeout for Encrypt status change")
> Cc: Ramalingam C <ramalingam.c@intel.com>
> Signed-off-by: Anshuman Gupta <anshuman.gupta@intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_hdcp.c | 9 ++++-----
> drivers/gpu/drm/i915/display/intel_hdcp.h | 2 ++
>  2 files changed, 6 insertions(+), 5 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_hdcp.c
> b/drivers/gpu/drm/i915/display/intel_hdcp.c
> index a9b652c6e742..61252d4be3dd 100644
> --- a/drivers/gpu/drm/i915/display/intel_hdcp.c
> +++ b/drivers/gpu/drm/i915/display/intel_hdcp.c
> @@ -23,7 +23,6 @@
>  #include "intel_connector.h"
> 
>  #define KEY_LOAD_TRIES	5
> -#define ENCRYPT_STATUS_CHANGE_TIMEOUT_MS	50
>  #define HDCP2_LC_RETRY_CNT			3
> 
>  static
> @@ -762,7 +761,7 @@ static int intel_hdcp_auth(struct intel_connector
> *connector)
>  	if (intel_de_wait_for_set(dev_priv,
>  				  HDCP_STATUS(dev_priv, cpu_transcoder, port),
>  				  HDCP_STATUS_ENC,
> -				  ENCRYPT_STATUS_CHANGE_TIMEOUT_MS)) {
> +
> HDCP_ENCRYPT_STATUS_CHANGE_TIMEOUT_MS)) {
>  		drm_err(&dev_priv->drm, "Timed out waiting for encryption\n");
>  		return -ETIMEDOUT;
>  	}
> @@ -809,7 +808,7 @@ static int _intel_hdcp_disable(struct intel_connector
> *connector)
>  	intel_de_write(dev_priv, HDCP_CONF(dev_priv, cpu_transcoder, port), 0);
>  	if (intel_de_wait_for_clear(dev_priv,
>  				    HDCP_STATUS(dev_priv, cpu_transcoder, port),
> -				    ~0, ENCRYPT_STATUS_CHANGE_TIMEOUT_MS))
> {
> +				    ~0,
> HDCP_ENCRYPT_STATUS_CHANGE_TIMEOUT_MS)) {
>  		drm_err(&dev_priv->drm,
>  			"Failed to disable HDCP, timeout clearing status\n");
>  		return -ETIMEDOUT;
> @@ -1641,7 +1640,7 @@ static int hdcp2_enable_encryption(struct
> intel_connector *connector)
>  				    HDCP2_STATUS(dev_priv, cpu_transcoder,
>  						 port),
>  				    LINK_ENCRYPTION_STATUS,
> -				    ENCRYPT_STATUS_CHANGE_TIMEOUT_MS);
> +
> HDCP_ENCRYPT_STATUS_CHANGE_TIMEOUT_MS);
> 
>  	return ret;
>  }
> @@ -1665,7 +1664,7 @@ static int hdcp2_disable_encryption(struct
> intel_connector *connector)
>  				      HDCP2_STATUS(dev_priv, cpu_transcoder,
>  						   port),
>  				      LINK_ENCRYPTION_STATUS,
> -				      ENCRYPT_STATUS_CHANGE_TIMEOUT_MS);
> +
> HDCP_ENCRYPT_STATUS_CHANGE_TIMEOUT_MS);
>  	if (ret == -ETIMEDOUT)
>  		drm_dbg_kms(&dev_priv->drm, "Disable Encryption Timedout");
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_hdcp.h
> b/drivers/gpu/drm/i915/display/intel_hdcp.h
> index bc51c1e9b481..b912a3a0f5b8 100644
> --- a/drivers/gpu/drm/i915/display/intel_hdcp.h
> +++ b/drivers/gpu/drm/i915/display/intel_hdcp.h
> @@ -8,6 +8,8 @@
> 
>  #include <linux/types.h>
> 
> +#define HDCP_ENCRYPT_STATUS_CHANGE_TIMEOUT_MS	50
> +
>  struct drm_connector;
>  struct drm_connector_state;
>  struct drm_i915_private;
> --
> 2.26.2

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

  reply	other threads:[~2020-10-27  5:52 UTC|newest]

Thread overview: 87+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-10-23 12:20 [PATCH v3 00/16] HDCP 2.2 and HDCP 1.4 Gen12 DP MST support Anshuman Gupta
2020-10-23 12:20 ` [Intel-gfx] " Anshuman Gupta
2020-10-23 12:20 ` [PATCH v3 01/16] drm/i915/hdcp: Update CP property in update_pipe Anshuman Gupta
2020-10-23 12:20   ` [Intel-gfx] " Anshuman Gupta
2020-10-27  5:32   ` Shankar, Uma
2020-10-27  5:32     ` [Intel-gfx] " Shankar, Uma
2020-10-27  7:50     ` Anshuman Gupta
2020-10-27  7:50       ` [Intel-gfx] " Anshuman Gupta
2020-10-23 12:20 ` [PATCH v3 02/16] drm/i915/hdcp: Get conn while content_type changed Anshuman Gupta
2020-10-23 12:20   ` [Intel-gfx] " Anshuman Gupta
2020-10-27  5:34   ` Shankar, Uma
2020-10-27  5:34     ` [Intel-gfx] " Shankar, Uma
2020-10-27  5:37     ` Anshuman Gupta
2020-10-27  5:37       ` [Intel-gfx] " Anshuman Gupta
2020-10-23 12:20 ` [PATCH v3 03/16] drm/i915/hotplug: Handle CP_IRQ for DP-MST Anshuman Gupta
2020-10-23 12:20   ` [Intel-gfx] " Anshuman Gupta
2020-10-27  5:43   ` Shankar, Uma
2020-10-27  5:43     ` [Intel-gfx] " Shankar, Uma
2020-10-23 12:21 ` [PATCH v3 04/16] drm/i915/hdcp: DP MST transcoder for link and stream Anshuman Gupta
2020-10-23 12:21   ` [Intel-gfx] " Anshuman Gupta
2020-10-27  5:49   ` Shankar, Uma
2020-10-27  5:49     ` [Intel-gfx] " Shankar, Uma
2020-10-23 12:21 ` [PATCH v3 05/16] drm/i915/hdcp: Move HDCP enc status timeout to header Anshuman Gupta
2020-10-23 12:21   ` [Intel-gfx] " Anshuman Gupta
2020-10-27  5:52   ` Shankar, Uma [this message]
2020-10-27  5:52     ` Shankar, Uma
2020-10-23 12:21 ` [PATCH v3 06/16] drm/i915/hdcp: HDCP stream encryption support Anshuman Gupta
2020-10-23 12:21   ` [Intel-gfx] " Anshuman Gupta
2020-10-27  6:20   ` Shankar, Uma
2020-10-27  6:20     ` [Intel-gfx] " Shankar, Uma
2020-10-27  7:46     ` Anshuman Gupta
2020-10-27  7:46       ` [Intel-gfx] " Anshuman Gupta
2020-10-23 12:21 ` [PATCH v3 07/16] drm/i915/hdcp: Enable Gen12 HDCP 1.4 DP MST support Anshuman Gupta
2020-10-23 12:21   ` [Intel-gfx] " Anshuman Gupta
2020-10-27  6:29   ` Shankar, Uma
2020-10-27  6:29     ` [Intel-gfx] " Shankar, Uma
2020-10-27  7:57     ` Anshuman Gupta
2020-10-27  7:57       ` [Intel-gfx] " Anshuman Gupta
2020-10-27 12:04     ` Anshuman Gupta
2020-10-27 12:04       ` [Intel-gfx] " Anshuman Gupta
2020-10-23 12:21 ` [PATCH v3 08/16] drm/i915/hdcp: Pass dig_port to intel_hdcp_init Anshuman Gupta
2020-10-23 12:21   ` [Intel-gfx] " Anshuman Gupta
2020-10-27  6:30   ` Shankar, Uma
2020-10-27  6:30     ` [Intel-gfx] " Shankar, Uma
2020-10-23 12:21 ` [PATCH v3 09/16] drm/i915/hdcp: Encapsulate hdcp_port_data to dig_port Anshuman Gupta
2020-10-23 12:21   ` [Intel-gfx] " Anshuman Gupta
2020-10-27  6:34   ` Shankar, Uma
2020-10-27  6:34     ` [Intel-gfx] " Shankar, Uma
2020-10-23 12:21 ` [PATCH v3 10/16] misc/mei/hdcp: Fix AUTH_STREAM_REQ cmd buffer len Anshuman Gupta
2020-10-23 12:21   ` [Intel-gfx] " Anshuman Gupta
2020-10-27  6:36   ` Shankar, Uma
2020-10-27  6:36     ` [Intel-gfx] " Shankar, Uma
2020-10-27  6:39     ` Winkler, Tomas
2020-10-27  6:39       ` [Intel-gfx] " Winkler, Tomas
2020-10-23 12:21 ` [PATCH v3 11/16] drm/hdcp: Max MST content streams Anshuman Gupta
2020-10-23 12:21   ` [Intel-gfx] " Anshuman Gupta
2020-10-27  6:41   ` Shankar, Uma
2020-10-27  6:41     ` [Intel-gfx] " Shankar, Uma
2020-10-23 12:21 ` [PATCH v3 12/16] drm/i915/hdcp: MST streams support in hdcp port_data Anshuman Gupta
2020-10-23 12:21   ` [Intel-gfx] " Anshuman Gupta
2020-10-27  6:55   ` Shankar, Uma
2020-10-27  6:55     ` [Intel-gfx] " Shankar, Uma
2020-10-23 12:21 ` [PATCH v3 13/16] drm/i915/hdcp: Pass connector to check_2_2_link Anshuman Gupta
2020-10-23 12:21   ` [Intel-gfx] " Anshuman Gupta
2020-10-27  6:57   ` Shankar, Uma
2020-10-27  6:57     ` [Intel-gfx] " Shankar, Uma
2020-10-23 12:21 ` [PATCH v3 14/16] drm/i915/hdcp: Add HDCP 2.2 stream register Anshuman Gupta
2020-10-23 12:21   ` [Intel-gfx] " Anshuman Gupta
2020-10-27  7:11   ` Shankar, Uma
2020-10-27  7:11     ` [Intel-gfx] " Shankar, Uma
2020-10-27  8:57     ` Anshuman Gupta
2020-10-27  8:57       ` [Intel-gfx] " Anshuman Gupta
2020-10-27  9:50       ` Shankar, Uma
2020-10-27  9:50         ` [Intel-gfx] " Shankar, Uma
2020-10-23 12:21 ` [PATCH v3 15/16] drm/i915/hdcp: Support for HDCP 2.2 MST shim callbacks Anshuman Gupta
2020-10-23 12:21   ` [Intel-gfx] " Anshuman Gupta
2020-10-27  7:20   ` Shankar, Uma
2020-10-27  7:20     ` [Intel-gfx] " Shankar, Uma
2020-10-23 12:21 ` [PATCH v3 16/16] drm/i915/hdcp: Enable HDCP 2.2 MST support Anshuman Gupta
2020-10-23 12:21   ` [Intel-gfx] " Anshuman Gupta
2020-10-27  7:24   ` Shankar, Uma
2020-10-27  7:24     ` [Intel-gfx] " Shankar, Uma
2020-10-23 14:41 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for HDCP 2.2 and HDCP 1.4 Gen12 DP " Patchwork
2020-10-23 14:42 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2020-10-23 15:07 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2020-10-23 18:54 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
  -- strict thread matches above, loose matches on Subject: below --
2020-10-22  8:55 [PATCH v3 00/16] HDCP 2.2 DP MST Support Anshuman Gupta
2020-10-22  8:55 ` [PATCH v3 05/16] drm/i915/hdcp: Move HDCP enc status timeout to header Anshuman Gupta

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=80aaa54c474449cf9e4b204e34488493@intel.com \
    --to=uma.shankar@intel.com \
    --cc=anshuman.gupta@intel.com \
    --cc=dri-devel@lists.freedesktop.org \
    --cc=intel-gfx@lists.freedesktop.org \
    --cc=jani.nikula@intel.com \
    --cc=juston.li@intel.com \
    --cc=seanpaul@chromium.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.