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From: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
To: Yong Wu <yong.wu@mediatek.com>
Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
	krzysztof.kozlowski@linaro.org, iommu@lists.linux-foundation.org,
	robh+dt@kernel.org, linux-mediatek@lists.infradead.org,
	krzysztof.kozlowski+dt@linaro.org, matthias.bgg@gmail.com,
	will@kernel.org, linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH v3 6/6] iommu: mtk_iommu: Lookup phandle to retrieve syscon to pericfg
Date: Mon, 13 Jun 2022 10:13:13 +0200	[thread overview]
Message-ID: <80c7fa61-e25a-fc45-bdcb-60ac3796b96e@collabora.com> (raw)
In-Reply-To: <db422fe4d0b5391ee2aacae989d7e48209e1095f.camel@mediatek.com>

Il 13/06/22 07:32, Yong Wu ha scritto:
> On Thu, 2022-06-09 at 12:08 +0200, AngeloGioacchino Del Regno wrote:
>> On some SoCs (of which only MT8195 is supported at the time of
>> writing),
>> the "R" and "W" (I/O) enable bits for the IOMMUs are in the
>> pericfg_ao
>> register space and not in the IOMMU space: as it happened already
>> with
>> infracfg, it is expected that this list will grow.
> 
> Currently I don't see the list will grow. As commented before, In the
> lastest SoC, The IOMMU enable bits for IOMMU will be in ATF, rather
> than in this pericfg register region. In this case, Is this patch
> unnecessary? or we could add this patch when there are 2 SoCs use this
> setting at least?  what's your opinion?
> 

Perhaps I've misunderstood... besides, can you please check if there's any
other SoC (not just chromebooks, also smartphone SoCs) that need this logic?

Thanks,
Angelo


_______________________________________________
iommu mailing list
iommu@lists.linux-foundation.org
https://lists.linuxfoundation.org/mailman/listinfo/iommu

WARNING: multiple messages have this Message-ID (diff)
From: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
To: Yong Wu <yong.wu@mediatek.com>
Cc: joro@8bytes.org, will@kernel.org, robh+dt@kernel.org,
	krzysztof.kozlowski+dt@linaro.org, matthias.bgg@gmail.com,
	iommu@lists.linux-foundation.org,
	linux-mediatek@lists.infradead.org, devicetree@vger.kernel.org,
	linux-kernel@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org,
	krzysztof.kozlowski@linaro.org
Subject: Re: [PATCH v3 6/6] iommu: mtk_iommu: Lookup phandle to retrieve syscon to pericfg
Date: Mon, 13 Jun 2022 10:13:13 +0200	[thread overview]
Message-ID: <80c7fa61-e25a-fc45-bdcb-60ac3796b96e@collabora.com> (raw)
In-Reply-To: <db422fe4d0b5391ee2aacae989d7e48209e1095f.camel@mediatek.com>

Il 13/06/22 07:32, Yong Wu ha scritto:
> On Thu, 2022-06-09 at 12:08 +0200, AngeloGioacchino Del Regno wrote:
>> On some SoCs (of which only MT8195 is supported at the time of
>> writing),
>> the "R" and "W" (I/O) enable bits for the IOMMUs are in the
>> pericfg_ao
>> register space and not in the IOMMU space: as it happened already
>> with
>> infracfg, it is expected that this list will grow.
> 
> Currently I don't see the list will grow. As commented before, In the
> lastest SoC, The IOMMU enable bits for IOMMU will be in ATF, rather
> than in this pericfg register region. In this case, Is this patch
> unnecessary? or we could add this patch when there are 2 SoCs use this
> setting at least?  what's your opinion?
> 

Perhaps I've misunderstood... besides, can you please check if there's any
other SoC (not just chromebooks, also smartphone SoCs) that need this logic?

Thanks,
Angelo



_______________________________________________
Linux-mediatek mailing list
Linux-mediatek@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-mediatek

WARNING: multiple messages have this Message-ID (diff)
From: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
To: Yong Wu <yong.wu@mediatek.com>
Cc: joro@8bytes.org, will@kernel.org, robh+dt@kernel.org,
	krzysztof.kozlowski+dt@linaro.org, matthias.bgg@gmail.com,
	iommu@lists.linux-foundation.org,
	linux-mediatek@lists.infradead.org, devicetree@vger.kernel.org,
	linux-kernel@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org,
	krzysztof.kozlowski@linaro.org
Subject: Re: [PATCH v3 6/6] iommu: mtk_iommu: Lookup phandle to retrieve syscon to pericfg
Date: Mon, 13 Jun 2022 10:13:13 +0200	[thread overview]
Message-ID: <80c7fa61-e25a-fc45-bdcb-60ac3796b96e@collabora.com> (raw)
In-Reply-To: <db422fe4d0b5391ee2aacae989d7e48209e1095f.camel@mediatek.com>

Il 13/06/22 07:32, Yong Wu ha scritto:
> On Thu, 2022-06-09 at 12:08 +0200, AngeloGioacchino Del Regno wrote:
>> On some SoCs (of which only MT8195 is supported at the time of
>> writing),
>> the "R" and "W" (I/O) enable bits for the IOMMUs are in the
>> pericfg_ao
>> register space and not in the IOMMU space: as it happened already
>> with
>> infracfg, it is expected that this list will grow.
> 
> Currently I don't see the list will grow. As commented before, In the
> lastest SoC, The IOMMU enable bits for IOMMU will be in ATF, rather
> than in this pericfg register region. In this case, Is this patch
> unnecessary? or we could add this patch when there are 2 SoCs use this
> setting at least?  what's your opinion?
> 

Perhaps I've misunderstood... besides, can you please check if there's any
other SoC (not just chromebooks, also smartphone SoCs) that need this logic?

Thanks,
Angelo



_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

WARNING: multiple messages have this Message-ID (diff)
From: AngeloGioacchino Del Regno  <angelogioacchino.delregno@collabora.com>
To: Yong Wu <yong.wu@mediatek.com>
Cc: joro@8bytes.org, will@kernel.org, robh+dt@kernel.org,
	krzysztof.kozlowski+dt@linaro.org, matthias.bgg@gmail.com,
	iommu@lists.linux-foundation.org,
	linux-mediatek@lists.infradead.org, devicetree@vger.kernel.org,
	linux-kernel@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org,
	krzysztof.kozlowski@linaro.org
Subject: Re: [PATCH v3 6/6] iommu: mtk_iommu: Lookup phandle to retrieve syscon to pericfg
Date: Mon, 13 Jun 2022 10:13:13 +0200	[thread overview]
Message-ID: <80c7fa61-e25a-fc45-bdcb-60ac3796b96e@collabora.com> (raw)
In-Reply-To: <db422fe4d0b5391ee2aacae989d7e48209e1095f.camel@mediatek.com>

Il 13/06/22 07:32, Yong Wu ha scritto:
> On Thu, 2022-06-09 at 12:08 +0200, AngeloGioacchino Del Regno wrote:
>> On some SoCs (of which only MT8195 is supported at the time of
>> writing),
>> the "R" and "W" (I/O) enable bits for the IOMMUs are in the
>> pericfg_ao
>> register space and not in the IOMMU space: as it happened already
>> with
>> infracfg, it is expected that this list will grow.
> 
> Currently I don't see the list will grow. As commented before, In the
> lastest SoC, The IOMMU enable bits for IOMMU will be in ATF, rather
> than in this pericfg register region. In this case, Is this patch
> unnecessary? or we could add this patch when there are 2 SoCs use this
> setting at least?  what's your opinion?
> 

Perhaps I've misunderstood... besides, can you please check if there's any
other SoC (not just chromebooks, also smartphone SoCs) that need this logic?

Thanks,
Angelo



  reply	other threads:[~2022-06-13  8:13 UTC|newest]

Thread overview: 79+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-06-09 10:07 [PATCH v3 0/6] mtk_iommu: Specify phandles to infracfg and pericfg AngeloGioacchino Del Regno
2022-06-09 10:07 ` AngeloGioacchino Del Regno
2022-06-09 10:07 ` AngeloGioacchino Del Regno
2022-06-09 10:07 ` AngeloGioacchino Del Regno
2022-06-09 10:07 ` [PATCH v3 1/6] dt-bindings: iommu: mediatek: Add mediatek,infracfg phandle AngeloGioacchino Del Regno
2022-06-09 10:07   ` AngeloGioacchino Del Regno
2022-06-09 10:07   ` AngeloGioacchino Del Regno
2022-06-09 10:07   ` [PATCH v3 1/6] dt-bindings: iommu: mediatek: Add mediatek, infracfg phandle AngeloGioacchino Del Regno
2022-06-09 14:23   ` Rob Herring
2022-06-09 14:23     ` [PATCH v3 1/6] dt-bindings: iommu: mediatek: Add mediatek,infracfg phandle Rob Herring
2022-06-09 14:23     ` Rob Herring
2022-06-09 14:23     ` Rob Herring
2022-06-09 10:07 ` [PATCH v3 2/6] iommu: mtk_iommu: Lookup phandle to retrieve syscon to infracfg AngeloGioacchino Del Regno
2022-06-09 10:07   ` AngeloGioacchino Del Regno
2022-06-09 10:07   ` AngeloGioacchino Del Regno
2022-06-09 10:07   ` AngeloGioacchino Del Regno
2022-06-09 17:52   ` Miles Chen
2022-06-09 17:52     ` Miles Chen
2022-06-09 17:52     ` Miles Chen
2022-06-09 17:52     ` Miles Chen via iommu
2022-06-13  5:31   ` Yong Wu
2022-06-13  5:31     ` Yong Wu
2022-06-13  5:31     ` Yong Wu
2022-06-13  5:31     ` Yong Wu via iommu
2022-06-14 15:14   ` Matthias Brugger
2022-06-14 15:14     ` Matthias Brugger
2022-06-14 15:14     ` Matthias Brugger
2022-06-14 15:14     ` Matthias Brugger
2022-06-09 10:07 ` [PATCH v3 3/6] arm64: dts: mediatek: mt8173: Add mediatek,infracfg phandle for IOMMU AngeloGioacchino Del Regno
2022-06-09 10:07   ` AngeloGioacchino Del Regno
2022-06-09 10:07   ` AngeloGioacchino Del Regno
2022-06-09 10:07   ` [PATCH v3 3/6] arm64: dts: mediatek: mt8173: Add mediatek, infracfg " AngeloGioacchino Del Regno
2022-06-09 18:06   ` [PATCH v3 3/6] arm64: dts: mediatek: mt8173: Add mediatek,infracfg " Miles Chen
2022-06-09 18:06     ` Miles Chen
2022-06-09 18:06     ` Miles Chen
2022-06-09 18:06     ` [PATCH v3 3/6] arm64: dts: mediatek: mt8173: Add mediatek, infracfg " Miles Chen via iommu
2022-06-09 10:08 ` [PATCH v3 4/6] arm64: dts: mediatek: mt2712e: Add mediatek,infracfg " AngeloGioacchino Del Regno
2022-06-09 10:08   ` AngeloGioacchino Del Regno
2022-06-09 10:08   ` AngeloGioacchino Del Regno
2022-06-09 10:08   ` [PATCH v3 4/6] arm64: dts: mediatek: mt2712e: Add mediatek, infracfg " AngeloGioacchino Del Regno
2022-06-09 18:08   ` [PATCH v3 4/6] arm64: dts: mediatek: mt2712e: Add mediatek,infracfg " Miles Chen
2022-06-09 18:08     ` Miles Chen
2022-06-09 18:08     ` Miles Chen
2022-06-09 18:08     ` [PATCH v3 4/6] arm64: dts: mediatek: mt2712e: Add mediatek, infracfg " Miles Chen via iommu
2022-06-09 10:08 ` [PATCH v3 5/6] dt-bindings: iommu: mediatek: Add mediatek,pericfg phandle AngeloGioacchino Del Regno
2022-06-09 10:08   ` AngeloGioacchino Del Regno
2022-06-09 10:08   ` AngeloGioacchino Del Regno
2022-06-09 10:08   ` [PATCH v3 5/6] dt-bindings: iommu: mediatek: Add mediatek, pericfg phandle AngeloGioacchino Del Regno
2022-06-14 15:16   ` [PATCH v3 5/6] dt-bindings: iommu: mediatek: Add mediatek,pericfg phandle Matthias Brugger
2022-06-14 15:16     ` Matthias Brugger
2022-06-14 15:16     ` Matthias Brugger
2022-06-14 15:16     ` [PATCH v3 5/6] dt-bindings: iommu: mediatek: Add mediatek, pericfg phandle Matthias Brugger
2022-06-09 10:08 ` [PATCH v3 6/6] iommu: mtk_iommu: Lookup phandle to retrieve syscon to pericfg AngeloGioacchino Del Regno
2022-06-09 10:08   ` AngeloGioacchino Del Regno
2022-06-09 10:08   ` AngeloGioacchino Del Regno
2022-06-09 10:08   ` AngeloGioacchino Del Regno
2022-06-13  5:32   ` Yong Wu
2022-06-13  5:32     ` Yong Wu
2022-06-13  5:32     ` Yong Wu
2022-06-13  5:32     ` Yong Wu via iommu
2022-06-13  8:13     ` AngeloGioacchino Del Regno [this message]
2022-06-13  8:13       ` AngeloGioacchino Del Regno
2022-06-13  8:13       ` AngeloGioacchino Del Regno
2022-06-13  8:13       ` AngeloGioacchino Del Regno
2022-06-16  6:30       ` Yong Wu
2022-06-16  6:30         ` Yong Wu
2022-06-16  6:30         ` Yong Wu via iommu
2022-06-16  8:45         ` AngeloGioacchino Del Regno
2022-06-16  8:45           ` AngeloGioacchino Del Regno
2022-06-16  8:45           ` AngeloGioacchino Del Regno
2022-06-15 12:09   ` Matthias Brugger
2022-06-15 12:09     ` Matthias Brugger
2022-06-15 12:09     ` Matthias Brugger
2022-06-15 12:28     ` AngeloGioacchino Del Regno
2022-06-15 12:28       ` AngeloGioacchino Del Regno
2022-06-15 12:28       ` AngeloGioacchino Del Regno
2022-06-17 10:32       ` Matthias Brugger
2022-06-17 10:32         ` Matthias Brugger
2022-06-17 10:32         ` Matthias Brugger

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