* [PATCH v1] imx: clk: added IPG Clock for I2C on imx8qm
@ 2020-11-12 10:51 Oliver Graute
2020-12-06 13:54 ` Stefano Babic
2020-12-08 7:58 ` sbabic at denx.de
0 siblings, 2 replies; 3+ messages in thread
From: Oliver Graute @ 2020-11-12 10:51 UTC (permalink / raw)
To: u-boot
This patch fixes this clk issue on I2C on imx8qm
=> i2c bus
Bus 3: i2c at 5a830000
=> i2c dev 3
Setting bus to 3
Failed to enable ipg clk
Failure changing bus number (-524)
Signed-off-by: Oliver Graute <oliver.graute@kococonnector.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: uboot-imx <uboot-imx@nxp.com>
---
drivers/clk/imx/clk-imx8qm.c | 24 ++++++++++++++++++++++++
1 file changed, 24 insertions(+)
diff --git a/drivers/clk/imx/clk-imx8qm.c b/drivers/clk/imx/clk-imx8qm.c
index 54fb09fda4..7e466d630a 100644
--- a/drivers/clk/imx/clk-imx8qm.c
+++ b/drivers/clk/imx/clk-imx8qm.c
@@ -53,19 +53,27 @@ ulong imx8_clk_get_rate(struct clk *clk)
resource = SC_R_A53;
pm_clk = SC_PM_CLK_CPU;
break;
+ case IMX8QM_I2C0_IPG_CLK:
case IMX8QM_I2C0_CLK:
+ case IMX8QM_I2C0_DIV:
resource = SC_R_I2C_0;
pm_clk = SC_PM_CLK_PER;
break;
+ case IMX8QM_I2C1_IPG_CLK:
case IMX8QM_I2C1_CLK:
+ case IMX8QM_I2C1_DIV:
resource = SC_R_I2C_1;
pm_clk = SC_PM_CLK_PER;
break;
+ case IMX8QM_I2C2_IPG_CLK:
case IMX8QM_I2C2_CLK:
+ case IMX8QM_I2C2_DIV:
resource = SC_R_I2C_2;
pm_clk = SC_PM_CLK_PER;
break;
+ case IMX8QM_I2C3_IPG_CLK:
case IMX8QM_I2C3_CLK:
+ case IMX8QM_I2C3_DIV:
resource = SC_R_I2C_3;
pm_clk = SC_PM_CLK_PER;
break;
@@ -148,19 +156,27 @@ ulong imx8_clk_set_rate(struct clk *clk, unsigned long rate)
debug("%s(#%lu), rate: %lu\n", __func__, clk->id, rate);
switch (clk->id) {
+ case IMX8QM_I2C0_IPG_CLK:
case IMX8QM_I2C0_CLK:
+ case IMX8QM_I2C0_DIV:
resource = SC_R_I2C_0;
pm_clk = SC_PM_CLK_PER;
break;
+ case IMX8QM_I2C1_IPG_CLK:
case IMX8QM_I2C1_CLK:
+ case IMX8QM_I2C1_DIV:
resource = SC_R_I2C_1;
pm_clk = SC_PM_CLK_PER;
break;
+ case IMX8QM_I2C2_IPG_CLK:
case IMX8QM_I2C2_CLK:
+ case IMX8QM_I2C2_DIV:
resource = SC_R_I2C_2;
pm_clk = SC_PM_CLK_PER;
break;
+ case IMX8QM_I2C3_IPG_CLK:
case IMX8QM_I2C3_CLK:
+ case IMX8QM_I2C3_DIV:
resource = SC_R_I2C_3;
pm_clk = SC_PM_CLK_PER;
break;
@@ -242,19 +258,27 @@ int __imx8_clk_enable(struct clk *clk, bool enable)
debug("%s(#%lu)\n", __func__, clk->id);
switch (clk->id) {
+ case IMX8QM_I2C0_IPG_CLK:
case IMX8QM_I2C0_CLK:
+ case IMX8QM_I2C0_DIV:
resource = SC_R_I2C_0;
pm_clk = SC_PM_CLK_PER;
break;
+ case IMX8QM_I2C1_IPG_CLK:
case IMX8QM_I2C1_CLK:
+ case IMX8QM_I2C1_DIV:
resource = SC_R_I2C_1;
pm_clk = SC_PM_CLK_PER;
break;
+ case IMX8QM_I2C2_IPG_CLK:
case IMX8QM_I2C2_CLK:
+ case IMX8QM_I2C2_DIV:
resource = SC_R_I2C_2;
pm_clk = SC_PM_CLK_PER;
break;
+ case IMX8QM_I2C3_IPG_CLK:
case IMX8QM_I2C3_CLK:
+ case IMX8QM_I2C3_DIV:
resource = SC_R_I2C_3;
pm_clk = SC_PM_CLK_PER;
break;
--
2.17.1
^ permalink raw reply related [flat|nested] 3+ messages in thread
* [PATCH v1] imx: clk: added IPG Clock for I2C on imx8qm
2020-11-12 10:51 [PATCH v1] imx: clk: added IPG Clock for I2C on imx8qm Oliver Graute
@ 2020-12-06 13:54 ` Stefano Babic
2020-12-08 7:58 ` sbabic at denx.de
1 sibling, 0 replies; 3+ messages in thread
From: Stefano Babic @ 2020-12-06 13:54 UTC (permalink / raw)
To: u-boot
On 12.11.20 11:51, Oliver Graute wrote:
> This patch fixes this clk issue on I2C on imx8qm
>
> => i2c bus
> Bus 3: i2c at 5a830000
> => i2c dev 3
> Setting bus to 3
> Failed to enable ipg clk
> Failure changing bus number (-524)
>
> Signed-off-by: Oliver Graute <oliver.graute@kococonnector.com>
> Cc: Stefano Babic <sbabic@denx.de>
> Cc: Peng Fan <peng.fan@nxp.com>
> Cc: uboot-imx <uboot-imx@nxp.com>
> ---
> drivers/clk/imx/clk-imx8qm.c | 24 ++++++++++++++++++++++++
> 1 file changed, 24 insertions(+)
>
> diff --git a/drivers/clk/imx/clk-imx8qm.c b/drivers/clk/imx/clk-imx8qm.c
> index 54fb09fda4..7e466d630a 100644
> --- a/drivers/clk/imx/clk-imx8qm.c
> +++ b/drivers/clk/imx/clk-imx8qm.c
> @@ -53,19 +53,27 @@ ulong imx8_clk_get_rate(struct clk *clk)
> resource = SC_R_A53;
> pm_clk = SC_PM_CLK_CPU;
> break;
> + case IMX8QM_I2C0_IPG_CLK:
> case IMX8QM_I2C0_CLK:
> + case IMX8QM_I2C0_DIV:
> resource = SC_R_I2C_0;
> pm_clk = SC_PM_CLK_PER;
> break;
> + case IMX8QM_I2C1_IPG_CLK:
> case IMX8QM_I2C1_CLK:
> + case IMX8QM_I2C1_DIV:
> resource = SC_R_I2C_1;
> pm_clk = SC_PM_CLK_PER;
> break;
> + case IMX8QM_I2C2_IPG_CLK:
> case IMX8QM_I2C2_CLK:
> + case IMX8QM_I2C2_DIV:
> resource = SC_R_I2C_2;
> pm_clk = SC_PM_CLK_PER;
> break;
> + case IMX8QM_I2C3_IPG_CLK:
> case IMX8QM_I2C3_CLK:
> + case IMX8QM_I2C3_DIV:
> resource = SC_R_I2C_3;
> pm_clk = SC_PM_CLK_PER;
> break;
> @@ -148,19 +156,27 @@ ulong imx8_clk_set_rate(struct clk *clk, unsigned long rate)
> debug("%s(#%lu), rate: %lu\n", __func__, clk->id, rate);
>
> switch (clk->id) {
> + case IMX8QM_I2C0_IPG_CLK:
> case IMX8QM_I2C0_CLK:
> + case IMX8QM_I2C0_DIV:
> resource = SC_R_I2C_0;
> pm_clk = SC_PM_CLK_PER;
> break;
> + case IMX8QM_I2C1_IPG_CLK:
> case IMX8QM_I2C1_CLK:
> + case IMX8QM_I2C1_DIV:
> resource = SC_R_I2C_1;
> pm_clk = SC_PM_CLK_PER;
> break;
> + case IMX8QM_I2C2_IPG_CLK:
> case IMX8QM_I2C2_CLK:
> + case IMX8QM_I2C2_DIV:
> resource = SC_R_I2C_2;
> pm_clk = SC_PM_CLK_PER;
> break;
> + case IMX8QM_I2C3_IPG_CLK:
> case IMX8QM_I2C3_CLK:
> + case IMX8QM_I2C3_DIV:
> resource = SC_R_I2C_3;
> pm_clk = SC_PM_CLK_PER;
> break;
> @@ -242,19 +258,27 @@ int __imx8_clk_enable(struct clk *clk, bool enable)
> debug("%s(#%lu)\n", __func__, clk->id);
>
> switch (clk->id) {
> + case IMX8QM_I2C0_IPG_CLK:
> case IMX8QM_I2C0_CLK:
> + case IMX8QM_I2C0_DIV:
> resource = SC_R_I2C_0;
> pm_clk = SC_PM_CLK_PER;
> break;
> + case IMX8QM_I2C1_IPG_CLK:
> case IMX8QM_I2C1_CLK:
> + case IMX8QM_I2C1_DIV:
> resource = SC_R_I2C_1;
> pm_clk = SC_PM_CLK_PER;
> break;
> + case IMX8QM_I2C2_IPG_CLK:
> case IMX8QM_I2C2_CLK:
> + case IMX8QM_I2C2_DIV:
> resource = SC_R_I2C_2;
> pm_clk = SC_PM_CLK_PER;
> break;
> + case IMX8QM_I2C3_IPG_CLK:
> case IMX8QM_I2C3_CLK:
> + case IMX8QM_I2C3_DIV:
> resource = SC_R_I2C_3;
> pm_clk = SC_PM_CLK_PER;
> break;
>
Reviewed-by: Stefano Babic <sbabic@denx.de>
Best regards,
Stefano Babic
--
=====================================================================
DENX Software Engineering GmbH, Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sbabic at denx.de
=====================================================================
^ permalink raw reply [flat|nested] 3+ messages in thread
* [PATCH v1] imx: clk: added IPG Clock for I2C on imx8qm
2020-11-12 10:51 [PATCH v1] imx: clk: added IPG Clock for I2C on imx8qm Oliver Graute
2020-12-06 13:54 ` Stefano Babic
@ 2020-12-08 7:58 ` sbabic at denx.de
1 sibling, 0 replies; 3+ messages in thread
From: sbabic at denx.de @ 2020-12-08 7:58 UTC (permalink / raw)
To: u-boot
> This patch fixes this clk issue on I2C on imx8qm
> => i2c bus
> Bus 3: i2c at 5a830000
> => i2c dev 3
> Setting bus to 3
> Failed to enable ipg clk
> Failure changing bus number (-524)
> Signed-off-by: Oliver Graute <oliver.graute@kococonnector.com>
> Cc: Stefano Babic <sbabic@denx.de>
> Cc: Peng Fan <peng.fan@nxp.com>
> Cc: uboot-imx <uboot-imx@nxp.com>
> Reviewed-by: Stefano Babic <sbabic@denx.de>
Applied to u-boot-imx, master, thanks !
Best regards,
Stefano Babic
--
=====================================================================
DENX Software Engineering GmbH, Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sbabic at denx.de
=====================================================================
^ permalink raw reply [flat|nested] 3+ messages in thread
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2020-11-12 10:51 [PATCH v1] imx: clk: added IPG Clock for I2C on imx8qm Oliver Graute
2020-12-06 13:54 ` Stefano Babic
2020-12-08 7:58 ` sbabic at denx.de
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