From: Dan Murphy <dmurphy@ti.com> To: Camel Guo <camel.guo@axis.com>, <lgirdwood@gmail.com>, <broonie@kernel.org>, <tiwai@suse.com> Cc: <alsa-devel@alsa-project.org>, <linux-kernel@vger.kernel.org>, <kernel@axis.com>, Camel Guo <camelg@axis.com> Subject: Re: [PATCH 2/2] ASoC: tlv320adcx140: Wake up codec before accessing register Date: Tue, 8 Sep 2020 09:58:55 -0500 [thread overview] Message-ID: <8160bf81-a72d-2db0-0767-79b0509ff143@ti.com> (raw) In-Reply-To: <89f8cce0-2407-15f5-a8e5-0aa17a2eb2c4@ti.com> Camel On 9/8/20 6:49 AM, Dan Murphy wrote: > Camel > > On 9/8/20 3:35 AM, Camel Guo wrote: >> From: Camel Guo <camelg@axis.com> >> >> According to its datasheet, after reset this codec goes into sleep >> mode. In this mode, any register accessing should be avoided except for >> exiting sleep mode. Hence this commit moves SLEEP_CFG access before any >> register accessing. > > This is interesting because our HW team suggested putting the device > into sleep mode when doing register writes/reads because they were > finding abnormalities in the register settings when the device is active. > > I have a local patch that changes this as well that the HW team > requested. OK I have clarification on this now. Their original request was incorrect they indicate the BIAS, ADC and PLLs be powered down during writes and reads. > > Mark > > Let me run this by the HW team first before applying this patch. Mark Acked-by: Dan Murphy <dmurphy@ti.com> > > Dan >
WARNING: multiple messages have this Message-ID (diff)
From: Dan Murphy <dmurphy@ti.com> To: Camel Guo <camel.guo@axis.com>, <lgirdwood@gmail.com>, <broonie@kernel.org>, <tiwai@suse.com> Cc: alsa-devel@alsa-project.org, kernel@axis.com, linux-kernel@vger.kernel.org, Camel Guo <camelg@axis.com> Subject: Re: [PATCH 2/2] ASoC: tlv320adcx140: Wake up codec before accessing register Date: Tue, 8 Sep 2020 09:58:55 -0500 [thread overview] Message-ID: <8160bf81-a72d-2db0-0767-79b0509ff143@ti.com> (raw) In-Reply-To: <89f8cce0-2407-15f5-a8e5-0aa17a2eb2c4@ti.com> Camel On 9/8/20 6:49 AM, Dan Murphy wrote: > Camel > > On 9/8/20 3:35 AM, Camel Guo wrote: >> From: Camel Guo <camelg@axis.com> >> >> According to its datasheet, after reset this codec goes into sleep >> mode. In this mode, any register accessing should be avoided except for >> exiting sleep mode. Hence this commit moves SLEEP_CFG access before any >> register accessing. > > This is interesting because our HW team suggested putting the device > into sleep mode when doing register writes/reads because they were > finding abnormalities in the register settings when the device is active. > > I have a local patch that changes this as well that the HW team > requested. OK I have clarification on this now. Their original request was incorrect they indicate the BIAS, ADC and PLLs be powered down during writes and reads. > > Mark > > Let me run this by the HW team first before applying this patch. Mark Acked-by: Dan Murphy <dmurphy@ti.com> > > Dan >
next prev parent reply other threads:[~2020-09-08 16:36 UTC|newest] Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top 2020-09-08 8:35 [PATCH 1/2] ASoC: tlv320adcx140: Avoid accessing invalid gpio_reset Camel Guo 2020-09-08 8:35 ` Camel Guo 2020-09-08 8:35 ` [PATCH 2/2] ASoC: tlv320adcx140: Wake up codec before accessing register Camel Guo 2020-09-08 8:35 ` Camel Guo 2020-09-08 11:49 ` Dan Murphy 2020-09-08 11:49 ` Dan Murphy 2020-09-08 14:58 ` Dan Murphy [this message] 2020-09-08 14:58 ` Dan Murphy 2020-09-08 11:55 ` [PATCH 1/2] ASoC: tlv320adcx140: Avoid accessing invalid gpio_reset Dan Murphy 2020-09-08 11:55 ` Dan Murphy 2020-09-08 11:55 ` Dan Murphy 2020-09-08 11:59 ` Peter Ujfalusi 2020-09-08 11:59 ` Peter Ujfalusi 2020-09-08 12:03 ` Peter Ujfalusi 2020-09-08 12:03 ` Peter Ujfalusi 2020-09-08 12:03 ` Peter Ujfalusi 2020-09-09 10:08 ` Camel Guo 2020-09-08 17:20 ` Mark Brown 2020-09-08 17:20 ` Mark Brown 2020-09-09 10:06 ` Camel Guo 2020-09-09 11:22 ` Mark Brown 2020-09-09 11:22 ` Mark Brown
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