* [PATCH v2] xhci: tegra: Delay for disabling LFPS detector
@ 2021-01-08 6:41 JC Kuo
2021-01-08 14:56 ` Mathias Nyman
0 siblings, 1 reply; 2+ messages in thread
From: JC Kuo @ 2021-01-08 6:41 UTC (permalink / raw)
To: mathias.nyman, gregkh, thierry.reding, jonathanh, robh
Cc: linux-tegra, linux-usb, nkristam, stable, JC Kuo
Occasionally, we are seeing some SuperSpeed devices resumes right after
being directed to U3. This commits add 500us delay to ensure LFPS
detector is disabled before sending ACK to firmware.
[ 16.099363] tegra-xusb 70090000.usb: entering ELPG
[ 16.104343] tegra-xusb 70090000.usb: 2-1 isn't suspended: 0x0c001203
[ 16.114576] tegra-xusb 70090000.usb: not all ports suspended: -16
[ 16.120789] tegra-xusb 70090000.usb: entering ELPG failed
The register write passes through a few flop stages of 32KHz clock domain.
NVIDIA ASIC designer reviewed RTL and suggests 500us delay.
Cc: stable@vger.kernel.org
Signed-off-by: JC Kuo <jckuo@nvidia.com>
---
drivers/usb/host/xhci-tegra.c | 6 ++++++
1 file changed, 6 insertions(+)
changes in v2:
describes how 500us was determined in commit message
cc stable@vger.kernel.org
diff --git a/drivers/usb/host/xhci-tegra.c b/drivers/usb/host/xhci-tegra.c
index 934be1686352..20cdc11f7dc6 100644
--- a/drivers/usb/host/xhci-tegra.c
+++ b/drivers/usb/host/xhci-tegra.c
@@ -623,6 +623,12 @@ static void tegra_xusb_mbox_handle(struct tegra_xusb *tegra,
enable);
if (err < 0)
break;
+
+ /*
+ * wait 500us for LFPS detector to be disabled before sending ACK
+ */
+ if (!enable)
+ usleep_range(500, 1000);
}
if (err < 0) {
--
2.25.1
^ permalink raw reply related [flat|nested] 2+ messages in thread
* Re: [PATCH v2] xhci: tegra: Delay for disabling LFPS detector
2021-01-08 6:41 [PATCH v2] xhci: tegra: Delay for disabling LFPS detector JC Kuo
@ 2021-01-08 14:56 ` Mathias Nyman
0 siblings, 0 replies; 2+ messages in thread
From: Mathias Nyman @ 2021-01-08 14:56 UTC (permalink / raw)
To: JC Kuo, gregkh, thierry.reding, jonathanh, robh
Cc: linux-tegra, linux-usb, nkristam, stable
On 8.1.2021 8.41, JC Kuo wrote:
> Occasionally, we are seeing some SuperSpeed devices resumes right after
> being directed to U3. This commits add 500us delay to ensure LFPS
> detector is disabled before sending ACK to firmware.
>
> [ 16.099363] tegra-xusb 70090000.usb: entering ELPG
> [ 16.104343] tegra-xusb 70090000.usb: 2-1 isn't suspended: 0x0c001203
> [ 16.114576] tegra-xusb 70090000.usb: not all ports suspended: -16
> [ 16.120789] tegra-xusb 70090000.usb: entering ELPG failed
>
> The register write passes through a few flop stages of 32KHz clock domain.
> NVIDIA ASIC designer reviewed RTL and suggests 500us delay.
>
> Cc: stable@vger.kernel.org
> Signed-off-by: JC Kuo <jckuo@nvidia.com>
> ---
> drivers/usb/host/xhci-tegra.c | 6 ++++++
> 1 file changed, 6 insertions(+)
>
> changes in v2:
> describes how 500us was determined in commit message
> cc stable@vger.kernel.org
>
Thanks, added.
-Mathias
^ permalink raw reply [flat|nested] 2+ messages in thread
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