From: Baruch Siach <baruch@tkos.co.il> To: "Thierry Reding" <thierry.reding@gmail.com>, "Uwe Kleine-König" <u.kleine-koenig@pengutronix.de>, "Lee Jones" <lee.jones@linaro.org> Cc: Baruch Siach <baruch@tkos.co.il>, Andy Gross <agross@kernel.org>, Bjorn Andersson <bjorn.andersson@linaro.org>, Balaji Prakash J <bjagadee@codeaurora.org>, Rob Herring <robh+dt@kernel.org>, Robert Marko <robert.marko@sartura.hr>, Kathiravan T <kathirav@codeaurora.org>, linux-pwm@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: [PATCH v8 3/4] dt-bindings: pwm: add IPQ6018 binding Date: Mon, 30 Aug 2021 14:46:26 +0300 [thread overview] Message-ID: <8238dfb5d5e4a40a995f047db36d9a7240431de5.1630323987.git.baruch@tkos.co.il> (raw) In-Reply-To: <5c95bcf62a9d08208a7da19f0b1cec0689502b9a.1630323987.git.baruch@tkos.co.il> DT binding for the PWM block in Qualcomm IPQ6018 SoC. Signed-off-by: Baruch Siach <baruch@tkos.co.il> --- This series does not convert the TCSR binding documentation to YAML. As a result, this commit adds new a dt_binding_check warning: /example-0/syscon@1937000: failed to match any schema with compatible: ['qcom,tcsr-ipq 6018', 'syscon', 'simple-mfd'] If that is a blocker to IPQ6018 PWM support, so be it. Patches will wait for someone else to push them further. v8: Add size cell to 'reg' (Rob) v7: Use 'reg' instead of 'offset' (Rob) Drop 'clock-names' and 'assigned-clock*' (Bjorn) Use single cell address/size in example node (Bjorn) Move '#pwm-cells' lower in example node (Bjorn) List 'reg' as required v6: Device node is child of TCSR; remove phandle (Rob Herring) Add assigned-clocks/assigned-clock-rates (Uwe Kleine-König) v5: Use qcom,pwm-regs for phandle instead of direct regs (Bjorn Andersson, Kathiravan T) v4: Update the binding example node as well (Rob Herring's bot) v3: s/qcom,pwm-ipq6018/qcom,ipq6018-pwm/ (Rob Herring) v2: Make #pwm-cells const (Rob Herring) --- .../devicetree/bindings/pwm/ipq-pwm.yaml | 52 +++++++++++++++++++ 1 file changed, 52 insertions(+) create mode 100644 Documentation/devicetree/bindings/pwm/ipq-pwm.yaml diff --git a/Documentation/devicetree/bindings/pwm/ipq-pwm.yaml b/Documentation/devicetree/bindings/pwm/ipq-pwm.yaml new file mode 100644 index 000000000000..96bc63e336bf --- /dev/null +++ b/Documentation/devicetree/bindings/pwm/ipq-pwm.yaml @@ -0,0 +1,52 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/pwm/ipq-pwm.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm IPQ6018 PWM controller + +maintainers: + - Baruch Siach <baruch@tkos.co.il> + +properties: + "#pwm-cells": + const: 2 + + compatible: + const: qcom,ipq6018-pwm + + reg: + description: Offset of PWM register in the TCSR block. + maxItems: 1 + + clocks: + maxItems: 1 + +required: + - compatible + - reg + - clocks + - "#pwm-cells" + +additionalProperties: false + +examples: + - | + #include <dt-bindings/clock/qcom,gcc-ipq6018.h> + + tcsr: syscon@1937000 { + compatible = "qcom,tcsr-ipq6018", "syscon", "simple-mfd"; + reg = <0x01937000 0x21000>; + #address-cells = <1>; + #size-cells = <1>; + + pwm: pwm@a010 { + compatible = "qcom,ipq6018-pwm"; + reg = <0xa010 0x20>; + clocks = <&gcc GCC_ADSS_PWM_CLK>; + assigned-clocks = <&gcc GCC_ADSS_PWM_CLK>; + assigned-clock-rates = <100000000>; + #pwm-cells = <2>; + }; + }; -- 2.33.0
WARNING: multiple messages have this Message-ID (diff)
From: Baruch Siach <baruch@tkos.co.il> To: "Thierry Reding" <thierry.reding@gmail.com>, "Uwe Kleine-König" <u.kleine-koenig@pengutronix.de>, "Lee Jones" <lee.jones@linaro.org> Cc: Baruch Siach <baruch@tkos.co.il>, Andy Gross <agross@kernel.org>, Bjorn Andersson <bjorn.andersson@linaro.org>, Balaji Prakash J <bjagadee@codeaurora.org>, Rob Herring <robh+dt@kernel.org>, Robert Marko <robert.marko@sartura.hr>, Kathiravan T <kathirav@codeaurora.org>, linux-pwm@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: [PATCH v8 3/4] dt-bindings: pwm: add IPQ6018 binding Date: Mon, 30 Aug 2021 14:46:26 +0300 [thread overview] Message-ID: <8238dfb5d5e4a40a995f047db36d9a7240431de5.1630323987.git.baruch@tkos.co.il> (raw) In-Reply-To: <5c95bcf62a9d08208a7da19f0b1cec0689502b9a.1630323987.git.baruch@tkos.co.il> DT binding for the PWM block in Qualcomm IPQ6018 SoC. Signed-off-by: Baruch Siach <baruch@tkos.co.il> --- This series does not convert the TCSR binding documentation to YAML. As a result, this commit adds new a dt_binding_check warning: /example-0/syscon@1937000: failed to match any schema with compatible: ['qcom,tcsr-ipq 6018', 'syscon', 'simple-mfd'] If that is a blocker to IPQ6018 PWM support, so be it. Patches will wait for someone else to push them further. v8: Add size cell to 'reg' (Rob) v7: Use 'reg' instead of 'offset' (Rob) Drop 'clock-names' and 'assigned-clock*' (Bjorn) Use single cell address/size in example node (Bjorn) Move '#pwm-cells' lower in example node (Bjorn) List 'reg' as required v6: Device node is child of TCSR; remove phandle (Rob Herring) Add assigned-clocks/assigned-clock-rates (Uwe Kleine-König) v5: Use qcom,pwm-regs for phandle instead of direct regs (Bjorn Andersson, Kathiravan T) v4: Update the binding example node as well (Rob Herring's bot) v3: s/qcom,pwm-ipq6018/qcom,ipq6018-pwm/ (Rob Herring) v2: Make #pwm-cells const (Rob Herring) --- .../devicetree/bindings/pwm/ipq-pwm.yaml | 52 +++++++++++++++++++ 1 file changed, 52 insertions(+) create mode 100644 Documentation/devicetree/bindings/pwm/ipq-pwm.yaml diff --git a/Documentation/devicetree/bindings/pwm/ipq-pwm.yaml b/Documentation/devicetree/bindings/pwm/ipq-pwm.yaml new file mode 100644 index 000000000000..96bc63e336bf --- /dev/null +++ b/Documentation/devicetree/bindings/pwm/ipq-pwm.yaml @@ -0,0 +1,52 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/pwm/ipq-pwm.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm IPQ6018 PWM controller + +maintainers: + - Baruch Siach <baruch@tkos.co.il> + +properties: + "#pwm-cells": + const: 2 + + compatible: + const: qcom,ipq6018-pwm + + reg: + description: Offset of PWM register in the TCSR block. + maxItems: 1 + + clocks: + maxItems: 1 + +required: + - compatible + - reg + - clocks + - "#pwm-cells" + +additionalProperties: false + +examples: + - | + #include <dt-bindings/clock/qcom,gcc-ipq6018.h> + + tcsr: syscon@1937000 { + compatible = "qcom,tcsr-ipq6018", "syscon", "simple-mfd"; + reg = <0x01937000 0x21000>; + #address-cells = <1>; + #size-cells = <1>; + + pwm: pwm@a010 { + compatible = "qcom,ipq6018-pwm"; + reg = <0xa010 0x20>; + clocks = <&gcc GCC_ADSS_PWM_CLK>; + assigned-clocks = <&gcc GCC_ADSS_PWM_CLK>; + assigned-clock-rates = <100000000>; + #pwm-cells = <2>; + }; + }; -- 2.33.0 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2021-08-30 11:46 UTC|newest] Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top 2021-08-30 11:46 [PATCH v8 1/4] dt-bindings: mfd: qcom,tcsr: document ipq6018 compatible Baruch Siach 2021-08-30 11:46 ` [PATCH v8 1/4] dt-bindings: mfd: qcom, tcsr: " Baruch Siach 2021-08-30 11:46 ` [PATCH v8 2/4] pwm: driver for qualcomm ipq6018 pwm block Baruch Siach 2021-08-30 11:46 ` Baruch Siach 2021-09-14 12:49 ` Uwe Kleine-König 2021-09-14 12:49 ` Uwe Kleine-König 2021-12-14 16:05 ` Baruch Siach 2021-12-14 16:05 ` Baruch Siach 2021-08-30 11:46 ` Baruch Siach [this message] 2021-08-30 11:46 ` [PATCH v8 3/4] dt-bindings: pwm: add IPQ6018 binding Baruch Siach 2021-08-31 19:02 ` Rob Herring 2021-08-31 19:02 ` Rob Herring 2021-08-30 11:46 ` [PATCH v8 4/4] arm64: dts: ipq6018: add pwm node Baruch Siach 2021-08-30 11:46 ` Baruch Siach 2021-09-22 14:10 ` [PATCH v8 1/4] dt-bindings: mfd: qcom,tcsr: document ipq6018 compatible Lee Jones 2021-09-22 14:10 ` Lee Jones 2021-11-04 9:27 ` Uwe Kleine-König 2021-11-04 9:27 ` Uwe Kleine-König
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