Re: [PATCH v23 07/14] drm/mediatek: add display merge async reset control

From: CK Hu <ck.hu@mediatek.com>
To: Nancy.Lin <nancy.lin@mediatek.com>,
	Rob Herring <robh+dt@kernel.org>,
	Matthias Brugger <matthias.bgg@gmail.com>,
	Chun-Kuang Hu <chunkuang.hu@kernel.org>,
	Philipp Zabel <p.zabel@pengutronix.de>, <wim@linux-watchdog.org>,
	AngeloGioacchino Del Regno
	<angelogioacchino.delregno@collabora.com>, <linux@roeck-us.net>
Cc: devicetree@vger.kernel.org, David Airlie <airlied@linux.ie>,
	"jason-jh . lin" <jason-jh.lin@mediatek.com>,
	singo.chang@mediatek.com, llvm@lists.linux.dev,
	Nick Desaulniers <ndesaulniers@google.com>,
	linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org,
	Project_Global_Chrome_Upstream_Group@mediatek.com,
	linux-mediatek@lists.infradead.org,
	Yongqiang Niu <yongqiang.niu@mediatek.com>,
	Nathan Chancellor <nathan@kernel.org>,
	linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH v23 07/14] drm/mediatek: add display merge async reset control
Date: Tue, 28 Jun 2022 09:39:35 +0800	[thread overview]
Message-ID: <839dc551443077a8b94ca06e926c531f504bc7a9.camel@mediatek.com> (raw)
In-Reply-To: <20220620091930.27797-8-nancy.lin@mediatek.com>

Hi, Nancy:

On Mon, 2022-06-20 at 17:19 +0800, Nancy.Lin wrote:
> Add merge async reset control in mtk_merge_stop. Async hw doesn't do
> self
> reset on each sof signal(start of frame), so need to reset the async
> to
> clear the hw status for the next merge start.

Applied to mediatek-drm-next [1], thanks.

[1] 
https://git.kernel.org/pub/scm/linux/kernel/git/chunkuang.hu/linux.git/log/?h=mediatek-drm-next

Regards,
CK

> 
> Signed-off-by: Nancy.Lin <nancy.lin@mediatek.com>
> Reviewed-by: CK Hu <ck.hu@mediatek.com>
> Reviewed-by: AngeloGioacchino Del Regno <
> angelogioacchino.delregno@collabora.com>
> Tested-by: AngeloGioacchino Del Regno <
> angelogioacchino.delregno@collabora.com>
> Tested-by: Bo-Chen Chen <rex-bc.chen@mediatek.com>
> ---
>  drivers/gpu/drm/mediatek/mtk_disp_merge.c | 11 +++++++++++
>  1 file changed, 11 insertions(+)
> 
> diff --git a/drivers/gpu/drm/mediatek/mtk_disp_merge.c
> b/drivers/gpu/drm/mediatek/mtk_disp_merge.c
> index 2e13d2fb429e..6428b6203ffe 100644
> --- a/drivers/gpu/drm/mediatek/mtk_disp_merge.c
> +++ b/drivers/gpu/drm/mediatek/mtk_disp_merge.c
> @@ -8,6 +8,7 @@
>  #include <linux/of_device.h>
>  #include <linux/of_irq.h>
>  #include <linux/platform_device.h>
> +#include <linux/reset.h>
>  #include <linux/soc/mediatek/mtk-cmdq.h>
>  
>  #include "mtk_drm_ddp_comp.h"
> @@ -67,6 +68,7 @@ struct mtk_disp_merge {
>  	struct cmdq_client_reg		cmdq_reg;
>  	bool				fifo_en;
>  	bool				mute_support;
> +	struct reset_control		*reset_ctl;
>  };
>  
>  void mtk_merge_start(struct device *dev)
> @@ -101,6 +103,9 @@ void mtk_merge_stop_cmdq(struct device *dev,
> struct cmdq_pkt *cmdq_pkt)
>  
>  	mtk_ddp_write(cmdq_pkt, 0, &priv->cmdq_reg, priv->regs,
>  		      DISP_REG_MERGE_CTRL);
> +
> +	if (priv->async_clk)
> +		reset_control_reset(priv->reset_ctl);
>  }
>  
>  static void mtk_merge_fifo_setting(struct mtk_disp_merge *priv,
> @@ -264,6 +269,12 @@ static int mtk_disp_merge_probe(struct
> platform_device *pdev)
>  		return PTR_ERR(priv->async_clk);
>  	}
>  
> +	if (priv->async_clk) {
> +		priv->reset_ctl =
> devm_reset_control_get_optional_exclusive(dev, NULL);
> +		if (IS_ERR(priv->reset_ctl))
> +			return PTR_ERR(priv->reset_ctl);
> +	}
> +
>  #if IS_REACHABLE(CONFIG_MTK_CMDQ)
>  	ret = cmdq_dev_get_client_reg(dev, &priv->cmdq_reg, 0);
>  	if (ret)