[U-Boot] Uboot send pull request

[U-Boot] Uboot send pull request

[uboot at andestech.com]

 Hi Tom,

 Please pull the following patch from u-boot-nds32 into your tree.
 Thanks!

The following changes since commit 06572f0301c18e63b887efc91803bb9467e55dbe:

  Merge git://www.denx.de/git/u-boot-ppc4xx (2016-09-27 12:48:18 -0400)

are available in the git repository at:


  git://git.denx.de/u-boot-nds32.git master

for you to fetch changes up to d607f6fa99a67dd1b40c08ba21ca6f3aaff933ce:

  nds32: Support relocation. (2016-09-29 15:38:10 +0800)

----------------------------------------------------------------
rick (1):
      nds32: Support relocation.

 arch/nds32/config.mk                       |    2 +-
 arch/nds32/cpu/n1213/ag101/lowlevel_init.S |   13 ++-
 arch/nds32/cpu/n1213/start.S               |  120 +++++++++++++++-------------
 arch/nds32/cpu/n1213/u-boot.lds            |   13 +--
 arch/nds32/include/asm/config.h            |    2 -
 include/configs/adp-ag101p.h               |    1 -
 6 files changed, 77 insertions(+), 74 deletions(-)

[U-Boot] Uboot send pull request

[Tom Rini]

On Thu, Sep 29, 2016 at 04:22:45PM +0800, uboot at andestech.com wrote:

>  Hi Tom,
> 
>  Please pull the following patch from u-boot-nds32 into your tree.
>  Thanks!
> 
> The following changes since commit 06572f0301c18e63b887efc91803bb9467e55dbe:
> 
>   Merge git://www.denx.de/git/u-boot-ppc4xx (2016-09-27 12:48:18 -0400)
> 
> are available in the git repository at:
> 
> 
>   git://git.denx.de/u-boot-nds32.git master
> 
> for you to fetch changes up to d607f6fa99a67dd1b40c08ba21ca6f3aaff933ce:
> 
>   nds32: Support relocation. (2016-09-29 15:38:10 +0800)
> 

Applied to u-boot/master, thanks!


-- 
Tom
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[U-Boot] Uboot send pull request

[Rick Chen]

Hi Tom

Please drop this mail.
It is wrong mail sending
Sorry about it.

B.R
Rick

> From: Open Source Project uboot
> Sent: Wednesday, June 05, 2019 6:21 PM
> To: trini at konsulko.com; u-boot at lists.denx.de; Open Source Project uboot; Rick Jian-Zhi Chen(陳建志)
> Subject: Uboot send pull request
>
> Hi Tom,
>
> Please pull some riscv update:
> 1. Add DM drivers to support RISC-V CPU and timer, plus some bug fixes.
> 2. Support SiFive UART
> 3. Rename ax25-ae350 defconfig
>
> https://travis-ci.org/rickchen36/u-boot-riscv/builds/469364551
>
> Thanks
>
> Rick
>
>
> The following changes since commit 1f2e948d6d53f77a2ddb2dde3531b0d5bc2815ad:
>
>   Prepare v2019.01-rc2 (2018-12-17 20:25:24 -0500)
>
> are available in the Git repository at:
>
>   git://git.denx.de/u-boot-riscv.git
>
> for you to fetch changes up to 368ff57805b03bebf99e97e703ce07aec721bc71:
>
>   doc: README.ae350: Sync for ax25-ae350 rename (2018-12-18 13:26:02 +0800)
>
> ----------------------------------------------------------------
> Anup Patel (4):
>       riscv: Introduce a Kconfig option for machine mode
>       riscv: Implement riscv_get_time() API using rdtime instruction
>       drivers: serial: Add SiFive UART driver
>       riscv: qemu: Imply SIFIVE_SERIAL for emulation
>
> Bin Meng (22):
>       dm: cpu: Add timebase frequency to the platdata
>       riscv: qemu: Create a simple-bus driver for the soc node
>       cpu: Add a RISC-V CPU driver
>       timer: Add generic driver for RISC-V privileged architecture defined timer
>       riscv: ax25: Hide the ax25-specific Kconfig option
>       riscv: Add a SYSCON driver for SiFive's Core Local Interruptor
>       riscv: qemu: Add platform-specific Kconfig options
>       riscv: Enlarge the default SYS_MALLOC_F_LEN
>       riscv: Probe cpus during boot
>       riscv: Remove non-DM version of print_cpuinfo()
>       riscv: Add CSR numbers
>       riscv: Add exception codes for xcause register
>       riscv: Update supports_extension() to use desc from cpu driver
>       riscv: Add indirect stringification to csr_xxx ops
>       riscv: Do some basic architecture level cpu initialization
>       riscv: Move trap handler codes to mtrap.S
>       riscv: Fix context restore before returning from trap handler
>       riscv: Return to previous privilege level after trap handling
>       riscv: Adjust the _exit_trap() position to come before handle_trap()
>       riscv: Save boot hart id to the global data
>       riscv: bootm: Change to use boot_hart from global data
>       riscv: Remove ae350.dts
>
> Lukas Auer (1):
>       riscv: add Kconfig entries for the code model
>
> Rick Chen (2):
>       riscv: configs: Rename ax25-ae350 defconfig
>       doc: README.ae350: Sync for ax25-ae350 rename
>
>  arch/riscv/Kconfig                                        |  60 +++++++++++++++++++++--
>  arch/riscv/Makefile                                       |   9 +++-
>  arch/riscv/cpu/Makefile                                   |   2 +-
>  arch/riscv/cpu/ax25/Kconfig                               |  17 +++++--
>  arch/riscv/cpu/ax25/cache.c                               |  12 ++---
>  arch/riscv/cpu/cpu.c                                      |  98 ++++++++++++++++++++++++++------------
>  arch/riscv/cpu/mtrap.S                                    | 103 ++++++++++++++++++++++++++++++++++++++++
>  arch/riscv/cpu/qemu/Kconfig                               |  12 +++++
>  arch/riscv/cpu/qemu/cpu.c                                 |  14 ++++++
>  arch/riscv/cpu/start.S                                    |  93 ++----------------------------------
>  arch/riscv/dts/ae350.dts                                  | 229 ----------------------------------------------------------------------------------------
>  arch/riscv/include/asm/csr.h                              |  16 ++++---
>  arch/riscv/include/asm/encoding.h                         | 236 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
>  arch/riscv/include/asm/global_data.h                      |   4 ++
>  arch/riscv/include/asm/syscon.h                           |  19 ++++++++
>  arch/riscv/lib/Makefile                                   |   2 +
>  arch/riscv/lib/asm-offsets.c                              |  19 ++++++++
>  arch/riscv/lib/bootm.c                                    |   2 +-
>  arch/riscv/lib/interrupts.c                               |  62 ++++++++++++------------
>  arch/riscv/lib/rdtime.c                                   |  38 +++++++++++++++
>  arch/riscv/lib/sifive_clint.c                             |  84 +++++++++++++++++++++++++++++++++
>  board/AndesTech/ax25-ae350/Kconfig                        |   4 ++
>  board/AndesTech/ax25-ae350/MAINTAINERS                    |   5 +-
>  board/emulation/qemu-riscv/Kconfig                        |   2 +
>  configs/{a25-ae350_32_defconfig => ae350_rv32_defconfig}  |   0
>  configs/{ax25-ae350_64_defconfig => ae350_rv64_defconfig} |   0
>  doc/README.ae350                                          |   2 +-
>  drivers/cpu/Kconfig                                       |   6 +++
>  drivers/cpu/Makefile                                      |   1 +
>  drivers/cpu/riscv_cpu.c                                   | 116 +++++++++++++++++++++++++++++++++++++++++++++
>  drivers/serial/Kconfig                                    |  13 +++++
>  drivers/serial/Makefile                                   |   1 +
>  drivers/serial/serial_sifive.c                            | 215 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
>  drivers/timer/Kconfig                                     |   7 +++
>  drivers/timer/Makefile                                    |   1 +
>  drivers/timer/riscv_timer.c                               |  56 ++++++++++++++++++++++
>  include/cpu.h                                             |   3 ++
>  37 files changed, 1154 insertions(+), 409 deletions(-)  create mode 100644 arch/riscv/cpu/mtrap.S  create mode 100644 arch/riscv/cpu/qemu/Kconfig  delete mode 100644 arch/riscv/dts/ae350.dts  create mode 100644 arch/riscv/include/asm/syscon.h  create mode 100644 arch/riscv/lib/asm-offsets.c  create mode 100644 arch/riscv/lib/rdtime.c  create mode 100644 arch/riscv/lib/sifive_clint.c  rename configs/{a25-ae350_32_defconfig => ae350_rv32_defconfig} (100%)  rename configs/{ax25-ae350_64_defconfig => ae350_rv64_defconfig} (100%)  create mode 100644 drivers/cpu/riscv_cpu.c  create mode 100644 drivers/serial/serial_sifive.c  create mode 100644 drivers/timer/riscv_timer.c
> CONFIDENTIALITY NOTICE:
>
> This e-mail (and its attachments) may contain confidential and legally privileged information or information protected from disclosure. If you are not the intended recipient, you are hereby notified that any disclosure, copying, distribution, or use of the information contained herein is strictly prohibited. In this case, please immediately notify the sender by return e-mail, delete the message (and any accompanying documents) and destroy all printed hard copies. Thank you for your cooperation.
>
> Copyright ANDES TECHNOLOGY CORPORATION - All Rights Reserved.

[U-Boot] Uboot send pull request

[uboot at andestech.com]

Hi Tom,

Please pull some riscv update:
1. Add DM drivers to support RISC-V CPU and timer, plus some bug fixes.
2. Support SiFive UART
3. Rename ax25-ae350 defconfig

https://travis-ci.org/rickchen36/u-boot-riscv/builds/469364551

Thanks

Rick


The following changes since commit 1f2e948d6d53f77a2ddb2dde3531b0d5bc2815ad:

  Prepare v2019.01-rc2 (2018-12-17 20:25:24 -0500)

are available in the Git repository at:

  git://git.denx.de/u-boot-riscv.git

for you to fetch changes up to 368ff57805b03bebf99e97e703ce07aec721bc71:

  doc: README.ae350: Sync for ax25-ae350 rename (2018-12-18 13:26:02 +0800)

----------------------------------------------------------------
Anup Patel (4):
      riscv: Introduce a Kconfig option for machine mode
      riscv: Implement riscv_get_time() API using rdtime instruction
      drivers: serial: Add SiFive UART driver
      riscv: qemu: Imply SIFIVE_SERIAL for emulation

Bin Meng (22):
      dm: cpu: Add timebase frequency to the platdata
      riscv: qemu: Create a simple-bus driver for the soc node
      cpu: Add a RISC-V CPU driver
      timer: Add generic driver for RISC-V privileged architecture defined timer
      riscv: ax25: Hide the ax25-specific Kconfig option
      riscv: Add a SYSCON driver for SiFive's Core Local Interruptor
      riscv: qemu: Add platform-specific Kconfig options
      riscv: Enlarge the default SYS_MALLOC_F_LEN
      riscv: Probe cpus during boot
      riscv: Remove non-DM version of print_cpuinfo()
      riscv: Add CSR numbers
      riscv: Add exception codes for xcause register
      riscv: Update supports_extension() to use desc from cpu driver
      riscv: Add indirect stringification to csr_xxx ops
      riscv: Do some basic architecture level cpu initialization
      riscv: Move trap handler codes to mtrap.S
      riscv: Fix context restore before returning from trap handler
      riscv: Return to previous privilege level after trap handling
      riscv: Adjust the _exit_trap() position to come before handle_trap()
      riscv: Save boot hart id to the global data
      riscv: bootm: Change to use boot_hart from global data
      riscv: Remove ae350.dts

Lukas Auer (1):
      riscv: add Kconfig entries for the code model

Rick Chen (2):
      riscv: configs: Rename ax25-ae350 defconfig
      doc: README.ae350: Sync for ax25-ae350 rename

 arch/riscv/Kconfig                                        |  60 +++++++++++++++++++++--
 arch/riscv/Makefile                                       |   9 +++-
 arch/riscv/cpu/Makefile                                   |   2 +-
 arch/riscv/cpu/ax25/Kconfig                               |  17 +++++--
 arch/riscv/cpu/ax25/cache.c                               |  12 ++---
 arch/riscv/cpu/cpu.c                                      |  98 ++++++++++++++++++++++++++------------
 arch/riscv/cpu/mtrap.S                                    | 103 ++++++++++++++++++++++++++++++++++++++++
 arch/riscv/cpu/qemu/Kconfig                               |  12 +++++
 arch/riscv/cpu/qemu/cpu.c                                 |  14 ++++++
 arch/riscv/cpu/start.S                                    |  93 ++----------------------------------
 arch/riscv/dts/ae350.dts                                  | 229 ----------------------------------------------------------------------------------------
 arch/riscv/include/asm/csr.h                              |  16 ++++---
 arch/riscv/include/asm/encoding.h                         | 236 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
 arch/riscv/include/asm/global_data.h                      |   4 ++
 arch/riscv/include/asm/syscon.h                           |  19 ++++++++
 arch/riscv/lib/Makefile                                   |   2 +
 arch/riscv/lib/asm-offsets.c                              |  19 ++++++++
 arch/riscv/lib/bootm.c                                    |   2 +-
 arch/riscv/lib/interrupts.c                               |  62 ++++++++++++------------
 arch/riscv/lib/rdtime.c                                   |  38 +++++++++++++++
 arch/riscv/lib/sifive_clint.c                             |  84 +++++++++++++++++++++++++++++++++
 board/AndesTech/ax25-ae350/Kconfig                        |   4 ++
 board/AndesTech/ax25-ae350/MAINTAINERS                    |   5 +-
 board/emulation/qemu-riscv/Kconfig                        |   2 +
 configs/{a25-ae350_32_defconfig => ae350_rv32_defconfig}  |   0
 configs/{ax25-ae350_64_defconfig => ae350_rv64_defconfig} |   0
 doc/README.ae350                                          |   2 +-
 drivers/cpu/Kconfig                                       |   6 +++
 drivers/cpu/Makefile                                      |   1 +
 drivers/cpu/riscv_cpu.c                                   | 116 +++++++++++++++++++++++++++++++++++++++++++++
 drivers/serial/Kconfig                                    |  13 +++++
 drivers/serial/Makefile                                   |   1 +
 drivers/serial/serial_sifive.c                            | 215 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
 drivers/timer/Kconfig                                     |   7 +++
 drivers/timer/Makefile                                    |   1 +
 drivers/timer/riscv_timer.c                               |  56 ++++++++++++++++++++++
 include/cpu.h                                             |   3 ++
 37 files changed, 1154 insertions(+), 409 deletions(-)
 create mode 100644 arch/riscv/cpu/mtrap.S
 create mode 100644 arch/riscv/cpu/qemu/Kconfig
 delete mode 100644 arch/riscv/dts/ae350.dts
 create mode 100644 arch/riscv/include/asm/syscon.h
 create mode 100644 arch/riscv/lib/asm-offsets.c
 create mode 100644 arch/riscv/lib/rdtime.c
 create mode 100644 arch/riscv/lib/sifive_clint.c
 rename configs/{a25-ae350_32_defconfig => ae350_rv32_defconfig} (100%)
 rename configs/{ax25-ae350_64_defconfig => ae350_rv64_defconfig} (100%)
 create mode 100644 drivers/cpu/riscv_cpu.c
 create mode 100644 drivers/serial/serial_sifive.c
 create mode 100644 drivers/timer/riscv_timer.c

[U-Boot] Uboot send pull request

[Tom Rini]

On Tue, Dec 18, 2018 at 06:09:33PM +0800, uboot at andestech.com wrote:

> Hi Tom,
> 
> Please pull some riscv update:
> 1. Add DM drivers to support RISC-V CPU and timer, plus some bug fixes.
> 2. Support SiFive UART
> 3. Rename ax25-ae350 defconfig
> 
> https://travis-ci.org/rickchen36/u-boot-riscv/builds/469364551
> 
> Thanks
> 
> Rick
> 
> 
> The following changes since commit 1f2e948d6d53f77a2ddb2dde3531b0d5bc2815ad:
> 
>   Prepare v2019.01-rc2 (2018-12-17 20:25:24 -0500)
> 
> are available in the Git repository at:
> 
>   git://git.denx.de/u-boot-riscv.git
> 
> for you to fetch changes up to 368ff57805b03bebf99e97e703ce07aec721bc71:
> 
>   doc: README.ae350: Sync for ax25-ae350 rename (2018-12-18 13:26:02 +0800)
> 

Applied to u-boot/master, thanks!


-- 
Tom
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[U-Boot] Uboot send pull request

[uboot at andestech.com]

Hi Tom,

Please pull some riscv update:
1. Add DM drivers to support RISC-V CPU and timer, plus some bug fixes.
2. Support SiFive UART
3. Rename ax25-ae350 defconfig

https://travis-ci.org/rickchen36/u-boot-riscv/builds/469364551

Thanks

Rick


The following changes since commit 1f2e948d6d53f77a2ddb2dde3531b0d5bc2815ad:

  Prepare v2019.01-rc2 (2018-12-17 20:25:24 -0500)

are available in the Git repository at:

  git://git.denx.de/u-boot-riscv.git

for you to fetch changes up to 368ff57805b03bebf99e97e703ce07aec721bc71:

  doc: README.ae350: Sync for ax25-ae350 rename (2018-12-18 13:26:02 +0800)

----------------------------------------------------------------
Anup Patel (4):
      riscv: Introduce a Kconfig option for machine mode
      riscv: Implement riscv_get_time() API using rdtime instruction
      drivers: serial: Add SiFive UART driver
      riscv: qemu: Imply SIFIVE_SERIAL for emulation

Bin Meng (22):
      dm: cpu: Add timebase frequency to the platdata
      riscv: qemu: Create a simple-bus driver for the soc node
      cpu: Add a RISC-V CPU driver
      timer: Add generic driver for RISC-V privileged architecture defined timer
      riscv: ax25: Hide the ax25-specific Kconfig option
      riscv: Add a SYSCON driver for SiFive's Core Local Interruptor
      riscv: qemu: Add platform-specific Kconfig options
      riscv: Enlarge the default SYS_MALLOC_F_LEN
      riscv: Probe cpus during boot
      riscv: Remove non-DM version of print_cpuinfo()
      riscv: Add CSR numbers
      riscv: Add exception codes for xcause register
      riscv: Update supports_extension() to use desc from cpu driver
      riscv: Add indirect stringification to csr_xxx ops
      riscv: Do some basic architecture level cpu initialization
      riscv: Move trap handler codes to mtrap.S
      riscv: Fix context restore before returning from trap handler
      riscv: Return to previous privilege level after trap handling
      riscv: Adjust the _exit_trap() position to come before handle_trap()
      riscv: Save boot hart id to the global data
      riscv: bootm: Change to use boot_hart from global data
      riscv: Remove ae350.dts

Lukas Auer (1):
      riscv: add Kconfig entries for the code model

Rick Chen (2):
      riscv: configs: Rename ax25-ae350 defconfig
      doc: README.ae350: Sync for ax25-ae350 rename

 arch/riscv/Kconfig                                        |  60 +++++++++++++++++++++--
 arch/riscv/Makefile                                       |   9 +++-
 arch/riscv/cpu/Makefile                                   |   2 +-
 arch/riscv/cpu/ax25/Kconfig                               |  17 +++++--
 arch/riscv/cpu/ax25/cache.c                               |  12 ++---
 arch/riscv/cpu/cpu.c                                      |  98 ++++++++++++++++++++++++++------------
 arch/riscv/cpu/mtrap.S                                    | 103 ++++++++++++++++++++++++++++++++++++++++
 arch/riscv/cpu/qemu/Kconfig                               |  12 +++++
 arch/riscv/cpu/qemu/cpu.c                                 |  14 ++++++
 arch/riscv/cpu/start.S                                    |  93 ++----------------------------------
 arch/riscv/dts/ae350.dts                                  | 229 ----------------------------------------------------------------------------------------
 arch/riscv/include/asm/csr.h                              |  16 ++++---
 arch/riscv/include/asm/encoding.h                         | 236 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
 arch/riscv/include/asm/global_data.h                      |   4 ++
 arch/riscv/include/asm/syscon.h                           |  19 ++++++++
 arch/riscv/lib/Makefile                                   |   2 +
 arch/riscv/lib/asm-offsets.c                              |  19 ++++++++
 arch/riscv/lib/bootm.c                                    |   2 +-
 arch/riscv/lib/interrupts.c                               |  62 ++++++++++++------------
 arch/riscv/lib/rdtime.c                                   |  38 +++++++++++++++
 arch/riscv/lib/sifive_clint.c                             |  84 +++++++++++++++++++++++++++++++++
 board/AndesTech/ax25-ae350/Kconfig                        |   4 ++
 board/AndesTech/ax25-ae350/MAINTAINERS                    |   5 +-
 board/emulation/qemu-riscv/Kconfig                        |   2 +
 configs/{a25-ae350_32_defconfig => ae350_rv32_defconfig}  |   0
 configs/{ax25-ae350_64_defconfig => ae350_rv64_defconfig} |   0
 doc/README.ae350                                          |   2 +-
 drivers/cpu/Kconfig                                       |   6 +++
 drivers/cpu/Makefile                                      |   1 +
 drivers/cpu/riscv_cpu.c                                   | 116 +++++++++++++++++++++++++++++++++++++++++++++
 drivers/serial/Kconfig                                    |  13 +++++
 drivers/serial/Makefile                                   |   1 +
 drivers/serial/serial_sifive.c                            | 215 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
 drivers/timer/Kconfig                                     |   7 +++
 drivers/timer/Makefile                                    |   1 +
 drivers/timer/riscv_timer.c                               |  56 ++++++++++++++++++++++
 include/cpu.h                                             |   3 ++
 37 files changed, 1154 insertions(+), 409 deletions(-)
 create mode 100644 arch/riscv/cpu/mtrap.S
 create mode 100644 arch/riscv/cpu/qemu/Kconfig
 delete mode 100644 arch/riscv/dts/ae350.dts
 create mode 100644 arch/riscv/include/asm/syscon.h
 create mode 100644 arch/riscv/lib/asm-offsets.c
 create mode 100644 arch/riscv/lib/rdtime.c
 create mode 100644 arch/riscv/lib/sifive_clint.c
 rename configs/{a25-ae350_32_defconfig => ae350_rv32_defconfig} (100%)
 rename configs/{ax25-ae350_64_defconfig => ae350_rv64_defconfig} (100%)
 create mode 100644 drivers/cpu/riscv_cpu.c
 create mode 100644 drivers/serial/serial_sifive.c
 create mode 100644 drivers/timer/riscv_timer.c

[U-Boot] Uboot send pull request

[uboot at andestech.com]

 Hi Tom,

Please pull some riscv update:
1. Fix BBL may be corrupted problem.
2. Support U-Boot run ib S-mode. 

https://travis-ci.org/rickchen36/u-boot-riscv/builds/463646974

Thanks

Rick


The following changes since commit 2e2a2a5d4f0c2e2642326d9000ce1f1553632e6a:

  Merge branch 'master' of git://git.denx.de/u-boot-sh (2018-12-04 19:22:31 -0500)

are available in the Git repository at:

  git://git.denx.de/u-boot-riscv.git

for you to fetch changes up to 48cbf6246052de10d35b616b5efb2f783904a49d:

  riscv: ax25-ae350: Pass dtb address to u-boot with a1 register (2018-12-05 14:14:16 +0800)

----------------------------------------------------------------
Anup Patel (3):
      riscv: Add kconfig option to run U-Boot in S-mode
      riscv: qemu: Use different SYS_TEXT_BASE for S-mode
      riscv: Add S-mode defconfigs for QEMU virt machine

Rick Chen (1):
      riscv: ax25-ae350: Pass dtb address to u-boot with a1 register

 arch/riscv/Kconfig                      |  5 +++++
 arch/riscv/cpu/start.S                  | 25 +++++++++++++++----------
 arch/riscv/include/asm/encoding.h       |  6 ++++++
 arch/riscv/lib/interrupts.c             | 31 ++++++++++++++++++++++---------
 board/AndesTech/ax25-ae350/ax25-ae350.c |  3 ++-
 board/emulation/qemu-riscv/Kconfig      |  3 ++-
 board/emulation/qemu-riscv/MAINTAINERS  |  2 ++
 configs/qemu-riscv32_smode_defconfig    | 10 ++++++++++
 configs/qemu-riscv64_smode_defconfig    | 11 +++++++++++
 9 files changed, 75 insertions(+), 21 deletions(-)
 create mode 100644 configs/qemu-riscv32_smode_defconfig
 create mode 100644 configs/qemu-riscv64_smode_defconfig

[U-Boot] Uboot send pull request

[Rick Chen]

Bin Meng <bmeng.cn@gmail.com> 於 2018年11月27日 週二 下午5:54寫道：
>
> Hi Rick,
>
> On Wed, Nov 21, 2018 at 4:53 PM Rick Chen <rickchen36@gmail.com> wrote:
> >
> > Bin Meng <bmeng.cn@gmail.com> 於 2018年11月21日 週三 下午3:18寫道：
> > >
> > > Hi Rick,
> > >
> > > On Wed, Nov 21, 2018 at 2:00 PM Rick Chen <rickchen36@gmail.com> wrote:
> > > >
> > > > > >
> > > > > > Do any of your above patches get v2 posted? At least I did not see any follow-up
> > > > > > response [1] regarding to "riscv: ax25-ae350: Pass dtb address to u-boot with a1
> > > > > > register"
> > > >
> > > > First of all you told me about that
> > > > board_fdt_blob_setup() should be completely removed.
> > > > Instead the simple fix should be add CONFIG_OF_PRIOR_STAGE
> > > > to ax25-ae350_defconfig.
> > > >
> > > > Then I explain you about that is for booting from flash.
> > > > And you said
> > > > In this case, we need support OF_CONTROL like other arch, eg:
> > > > CONFIG_OF_EMBED and CONFIG_OF_SEPARATE.
> > > >
> > > > In README, I don't find the limitation about when booting from flash,
> > > > it can not use  CONFIG_OF_BOARD.
> > > >
> > >
> > > Correct. However, when ax25-ae350's U-Boot boots from ROM, where does
> > > prior_stage_fdt_address get assigned to the ROM address? Besides, this
> > > variable is declared in fdtdec.h as follows:
> > >
> > > #if CONFIG_IS_ENABLED(OF_PRIOR_STAGE)
> > > extern phys_addr_t prior_stage_fdt_address;
> > > #endif
> > >
> > > It means only OF_PRIOR_STAGE will use this variable. But in your patch
> >
> > I have seen that declaration in fdtdec.h
> > But I was referred to
> > include\configs\bcmstb.h
> > extern phys_addr_t prior_stage_fdt_address;
> > and that is why I borrow prior_stage_fdt_address.
> >
>
> It looks to me that bcmstb.h was an ad-hoc hack of using
> prior_stage_fdt_address. I don't think it was originally meant to do
> such. It intends to work with OF_PRIOR_STAGE only.
>

I just refer to
bcmstb.c
phys_addr_t prior_stage_fdt_address BCMSTB_DATA_SECTION;
bcmstb.h
extern phys_addr_t prior_stage_fdt_address;

That is why I borrow and recycle to use it.


> > You do not point out this consideration directly, maybe that is why
> > we have some thinking is different.
> >
>
> Sorry I wasn't that clear, as I was expecting we continue discussing
> on that patch thread.
>

Yes.
I have reply some of your questions in another email.
Maybe we can move there and discuss further more. :)

Re: [PATCH v5 4/4] riscv: Remove redundant a2 store on DRAM base in start.S
https://www.mail-archive.com/u-boot at lists.denx.de/msg307101.html

B.R
Rick


> > > this was borrowed to support OF_BOARD, which is confusing I think. If
> > > U-Boot boots from reset vector, the canonical way to support DT is via
> > > CONFIG_OF_EMBED or CONFIG_OF_SEPARATE.
> > >
> > > > That is why ax25-ae350 use
> > > > CONFIG_OF_BOARD to support boot from RAM and ROM.
> > > > It is a flexible approach to meet Andes' HW mechanism.
> > > >
> > > > I think it is a configuration in ax25-ae350_defconfig.
> > > > It will not affect qemu-riscv32(64)_defconfig.
> > > >
> > >
> > > I understand it does not affect qemu riscv board. The thing is that I
> > > wasn't clear why you did that way for ax25-ae350.
> >
> > Actually I just want to remove the redundant code in start.S
> > -       li      t0, CONFIG_SYS_SDRAM_BASE
> > -       SREG    a2, 0(t0)
> > so borrowed prior_stage_fdt_address in CONFIG_OF_BOARD
> >
>
> Regards,
> Bin

[U-Boot] Uboot send pull request

[Bin Meng]

Hi Rick,

On Wed, Nov 21, 2018 at 4:53 PM Rick Chen <rickchen36@gmail.com> wrote:
>
> Bin Meng <bmeng.cn@gmail.com> 於 2018年11月21日 週三 下午3:18寫道：
> >
> > Hi Rick,
> >
> > On Wed, Nov 21, 2018 at 2:00 PM Rick Chen <rickchen36@gmail.com> wrote:
> > >
> > > > >
> > > > > Do any of your above patches get v2 posted? At least I did not see any follow-up
> > > > > response [1] regarding to "riscv: ax25-ae350: Pass dtb address to u-boot with a1
> > > > > register"
> > >
> > > First of all you told me about that
> > > board_fdt_blob_setup() should be completely removed.
> > > Instead the simple fix should be add CONFIG_OF_PRIOR_STAGE
> > > to ax25-ae350_defconfig.
> > >
> > > Then I explain you about that is for booting from flash.
> > > And you said
> > > In this case, we need support OF_CONTROL like other arch, eg:
> > > CONFIG_OF_EMBED and CONFIG_OF_SEPARATE.
> > >
> > > In README, I don't find the limitation about when booting from flash,
> > > it can not use  CONFIG_OF_BOARD.
> > >
> >
> > Correct. However, when ax25-ae350's U-Boot boots from ROM, where does
> > prior_stage_fdt_address get assigned to the ROM address? Besides, this
> > variable is declared in fdtdec.h as follows:
> >
> > #if CONFIG_IS_ENABLED(OF_PRIOR_STAGE)
> > extern phys_addr_t prior_stage_fdt_address;
> > #endif
> >
> > It means only OF_PRIOR_STAGE will use this variable. But in your patch
>
> I have seen that declaration in fdtdec.h
> But I was referred to
> include\configs\bcmstb.h
> extern phys_addr_t prior_stage_fdt_address;
> and that is why I borrow prior_stage_fdt_address.
>

It looks to me that bcmstb.h was an ad-hoc hack of using
prior_stage_fdt_address. I don't think it was originally meant to do
such. It intends to work with OF_PRIOR_STAGE only.

> You do not point out this consideration directly, maybe that is why
> we have some thinking is different.
>

Sorry I wasn't that clear, as I was expecting we continue discussing
on that patch thread.

> > this was borrowed to support OF_BOARD, which is confusing I think. If
> > U-Boot boots from reset vector, the canonical way to support DT is via
> > CONFIG_OF_EMBED or CONFIG_OF_SEPARATE.
> >
> > > That is why ax25-ae350 use
> > > CONFIG_OF_BOARD to support boot from RAM and ROM.
> > > It is a flexible approach to meet Andes' HW mechanism.
> > >
> > > I think it is a configuration in ax25-ae350_defconfig.
> > > It will not affect qemu-riscv32(64)_defconfig.
> > >
> >
> > I understand it does not affect qemu riscv board. The thing is that I
> > wasn't clear why you did that way for ax25-ae350.
>
> Actually I just want to remove the redundant code in start.S
> -       li      t0, CONFIG_SYS_SDRAM_BASE
> -       SREG    a2, 0(t0)
> so borrowed prior_stage_fdt_address in CONFIG_OF_BOARD
>

Regards,
Bin

[U-Boot] Uboot send pull request

[Rick Chen]

> > >  Hi Tom,
> > >
> > >  Please pull the following patch from u-boot-riscv into your tree.
> > >  Thanks!
> >
> > In the future can you please include a short summary here if you aren't using a
> > signed tag?  Thanks!

Hi Tom

Sorry about that !
I will use a signed tag or include a short summary in the future.

Thanks a lot.
Rick

> >
> > >
> > > The following changes since commit
> > 5830791d91d1200854ef78fcb32f808c8080f0f0:
> > >
> > >   Merge tag 'pull-tg18' of git://git.denx.de/u-boot-dm (2018-11-23
> > > 17:25:27 -0500)
> > >
> > > are available in the Git repository at:
> > >
> > >   git://git.denx.de/u-boot-riscv.git
> > >
> > > for you to fetch changes up to 52923c6db7f00e0197ec894c8c1bb8a7681974bb:
> > >
> > >   riscv: cache: Implement i/dcache [status, enable, disable]
> > > (2018-11-26 13:58:01 +0800)
> > >
> >
> > With a tweak to the MAINTAINERS file for the new configs, applied to
> > u-boot/master, thanks!
> >
> > --
> > Tom

[U-Boot] Uboot send pull request

[Tom Rini]

On Mon, Nov 26, 2018 at 02:18:29PM +0800, uboot at andestech.com wrote:

>  Hi Tom,
> 
>  Please pull the following patch from u-boot-riscv into your tree.
>  Thanks!

In the future can you please include a short summary here if you aren't
using a signed tag?  Thanks!

> 
> The following changes since commit 5830791d91d1200854ef78fcb32f808c8080f0f0:
> 
>   Merge tag 'pull-tg18' of git://git.denx.de/u-boot-dm (2018-11-23 17:25:27 -0500)
> 
> are available in the Git repository at:
> 
>   git://git.denx.de/u-boot-riscv.git
> 
> for you to fetch changes up to 52923c6db7f00e0197ec894c8c1bb8a7681974bb:
> 
>   riscv: cache: Implement i/dcache [status, enable, disable] (2018-11-26 13:58:01 +0800)
> 

With a tweak to the MAINTAINERS file for the new configs, applied to
u-boot/master, thanks!

-- 
Tom
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[U-Boot] Uboot send pull request

[uboot at andestech.com]

 Hi Tom,

 Please pull the following patch from u-boot-riscv into your tree.
 Thanks!

The following changes since commit 5830791d91d1200854ef78fcb32f808c8080f0f0:

  Merge tag 'pull-tg18' of git://git.denx.de/u-boot-dm (2018-11-23 17:25:27 -0500)

are available in the Git repository at:

  git://git.denx.de/u-boot-riscv.git

for you to fetch changes up to 52923c6db7f00e0197ec894c8c1bb8a7681974bb:

  riscv: cache: Implement i/dcache [status, enable, disable] (2018-11-26 13:58:01 +0800)

----------------------------------------------------------------
Bin Meng (1):
      Drop CONFIG_INIT_CRITICAL

Lukas Auer (27):
      tools: .gitignore: add prelink-riscv
      dts: riscv: update makefile to also clean the RISC-V dts directory
      riscv: rename CPU_RISCV_32/64 to match architecture names ARCH_RV32I/64I
      riscv: select CONFIG_PHYS_64BIT on RV64I systems
      riscv: add Kconfig entries for the C and A ISA extensions
      riscv: set -march and -mabi based on the Kconfig configuration
      riscv: enable -fdata-sections
      riscv: fix use of incorrectly sized variables
      riscv: make use of the barrier functions from Linux
      riscv: do not reimplement generic io functions
      riscv: complete the list of exception codes
      riscv: treat undefined exception codes as reserved
      riscv: hang on unhandled exceptions
      riscv: implement the invalidate_icache_* functions
      riscv: fix inconsistent use of spaces and tabs in start.S
      riscv: align mtvec on a 4-byte boundary
      riscv: remove unused labels in start.S
      riscv: do not blindly modify the mstatus CSR
      riscv: save hart ID and device tree passed by prior boot stage
      riscv: qemu: use device tree passed by prior boot stage
      riscv: qemu: support booting Linux
      riscv: align bootm implementation with that of other architectures
      distro_bootcmd: add VirtIO distro boot command
      riscv: qemu: enable distro boot
      dm: core: add missing prototype for ofnode_read_u64
      riscv: qemu: detect and boot the kernel passed by QEMU
      riscv: qemu: clear kernel-start/-end in device tree as workaround for BBL

Rick Chen (4):
      riscv: dts: Sync to Linux Kernel ae350 dts.
      configs: ax25-ae350: Separate ax25-ae350 for RV32/64I.
      riscv: dts: Add ae350_32.dts for RV32I
      riscv: cache: Implement i/dcache [status, enable, disable]

 arch/nds32/cpu/n1213/start.S                             |  51 --------------
 arch/riscv/Kconfig                                       |  34 ++++++---
 arch/riscv/Makefile                                      |  20 ++++++
 arch/riscv/config.mk                                     |   7 +-
 arch/riscv/cpu/ax25/Kconfig                              |   7 ++
 arch/riscv/cpu/ax25/Makefile                             |   1 +
 arch/riscv/cpu/ax25/cache.c                              |  95 +++++++++++++++++++++++++
 arch/riscv/cpu/ax25/cpu.c                                |   4 ++
 arch/riscv/cpu/cpu.c                                     |   6 ++
 arch/riscv/cpu/qemu/cpu.c                                |   2 +-
 arch/riscv/cpu/start.S                                   | 346 +++++++++++++++++++++++++++++++++++++++++++++-----------------------------------------------
 arch/riscv/dts/Makefile                                  |   1 -
 arch/riscv/dts/ae350.dts                                 | 107 +++++++++++++++++++++++++----
 arch/riscv/dts/ae350_32.dts                              | 229 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
 arch/riscv/dts/ae350_64.dts                              | 229 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
 arch/riscv/include/asm/barrier.h                         |  67 ++++++++++++++++++
 arch/riscv/include/asm/cache.h                           |   3 +
 arch/riscv/include/asm/io.h                              |  48 +++----------
 arch/riscv/include/asm/posix_types.h                     |   6 +-
 arch/riscv/include/asm/types.h                           |   4 ++
 arch/riscv/lib/bootm.c                                   |  97 ++++++++++++++++++--------
 arch/riscv/lib/cache.c                                   |  36 ++++++++--
 arch/riscv/lib/interrupts.c                              |  31 +++++++--
 arch/riscv/lib/setjmp.S                                  |   2 +-
 board/armltd/integrator/README                           |   4 +-
 board/emulation/qemu-riscv/Kconfig                       |   2 +
 board/emulation/qemu-riscv/qemu-riscv.c                  |  73 +++++++++++++++++---
 configs/{ax25-ae350_defconfig => a25-ae350_32_defconfig} |   3 +-
 configs/ax25-ae350_64_defconfig                          |  37 ++++++++++
 configs/qemu-riscv32_defconfig                           |   5 +-
 configs/qemu-riscv64_defconfig                           |   7 +-
 doc/README.distro                                        |   3 +-
 dts/Makefile                                             |   2 +-
 include/common.h                                         |   5 --
 include/config_distro_bootcmd.h                          |  21 ++++--
 include/configs/qemu-riscv.h                             |  28 ++++++++
 include/dm/ofnode.h                                      |  10 +++
 scripts/config_whitelist.txt                             |   1 -
 tools/.gitignore                                         |   1 +
 39 files changed, 1267 insertions(+), 368 deletions(-)
 create mode 100644 arch/riscv/cpu/ax25/Kconfig
 create mode 100644 arch/riscv/cpu/ax25/cache.c
 create mode 100644 arch/riscv/dts/ae350_32.dts
 create mode 100644 arch/riscv/dts/ae350_64.dts
 create mode 100644 arch/riscv/include/asm/barrier.h
 rename configs/{ax25-ae350_defconfig => a25-ae350_32_defconfig} (93%)
 create mode 100644 configs/ax25-ae350_64_defconfig

[U-Boot] Uboot send pull request

[Auer, Lukas]

Hi Rick,

On Thu, 2018-11-22 at 17:42 +0800, Rick Chen wrote:
> Auer, Lukas <lukas.auer@aisec.fraunhofer.de> 於 2018年11月22日 週四
> 下午5:18寫道：
> > 
> > Hi Rick,
> > 
> > On Thu, 2018-11-22 at 16:38 +0800, Rick Chen wrote:
> > > Auer, Lukas <lukas.auer@aisec.fraunhofer.de> 於 2018年11月21日 週三
> > > 下午9:09寫道：
> > > > 
> > > > Hi Rick,
> > > > 
> > > > On Wed, 2018-11-21 at 17:37 +0800, Rick Chen wrote:
> > > > > Hi Lukas
> > > > > 
> > > > > > > 
> > > > > > > Hi Rick,
> > > > > > > 
> > > > > > > Thanks for pulling my changes! I have some notes and
> > > > > > > questions on
> > > > > > > it.
> > > > > > > 
> > > > > > > I can't find all of your patches on the mailing list, for
> > > > > > > example
> > > > > > > the patch "configs:
> > > > > > > ax25-ae350: Enable DISPLAY_CPUINFO & DISPLAY_BOARDINFO".
> > > > > > > Others
> > > > > > > include
> > > > > > > changes, which have not been submitted to the mailing
> > > > > > > list.
> > > > > > > Please send all
> > > > > > > changes to the mailing list before including them in a
> > > > > > > pull
> > > > > > > request. This is really
> > > > > > > helpful for me and others, to be able to see if there are
> > > > > > > any
> > > > > > > conflicts with other
> > > > > > > patches currently under development or with other boards.
> > > > > > > 
> > > > > 
> > > > > That is my mistake. Forget to send it to mailing list.
> > > > > I will drop this patch.
> > > > > 
> > > > > > > Something seems to have gone wrong while applying the
> > > > > > > patch
> > > > > > > "riscv:
> > > > > > > enable -fdata-sections". This is one of my patches and
> > > > > > > part
> > > > > > > of
> > > > > > > the patch series.
> > > > > > > 
> > > > > 
> > > > > That is because your patch
> > > > > [PATCH v3 00/28] General fixes / cleanup for RISC-V and
> > > > > improvements
> > > > > to qemu-riscv
> > > > > still have some conflict with master.
> > > > > 
> > > > > It conflict with this commit
> > > > > Kbuild: add LDFLAGS_STANDALONE
> > > > > 
> > > > > I am hesitate to ask you to send v4 which shall rebase on
> > > > > master
> > > > > yesterday.
> > > > > Finally I decide to merge it by myself.
> > > > > 
> > > > > I am not sure it is inappropriate.
> > > > > Maybe I shall ask for you and wait for your v4 patchsets
> > > > > which
> > > > > are
> > > > > rebase on master, right ?
> > > > > 
> > > > 
> > > > Ok, I wasn't aware of that. In general, I think it is always
> > > > easier
> > > > if
> > > > you ask me to resend the patch series (or just the relevant
> > > > patch),
> > > > but
> > > > I don't know, how this is usually handled. I just saw that
> > > > there
> > > > are a
> > > > few reviewed-bys missing in some of the patches. So if you
> > > > want, I
> > > > can
> > > > add those, rebase on u-boot/master, and then send v4 to you.
> > > > 
> > > > > 
> > > > > > > Can you please consider removing your patch "riscv:
> > > > > > > cache:
> > > > > > > Implement i/dcache
> > > > > > > [status, enable, disable]" from this pull request and re-
> > > > > > > sending
> > > > > > > it with the next?
> > > > > > > There are still some points you did not reply to in my
> > > > > > > comments
> > > > > > > on v2 of your
> > > > > > > patch. For example, I think it makes sense to split this
> > > > > > > patch
> > > > > > > into multiple
> > > > > > > patches to make it clearer what it changes. If you want,
> > > > > > > I
> > > > > > > can
> > > > > > > re-send my
> > > > > > > comments in reply to v3 of your patch :)
> > > > > > > 
> > > > > 
> > > > > In my memory :
> > > > > 
> > > > > In v2
> > > > > you have some suggestions and I reply as below
> > > > > 
> > > > 
> > > > 
> > 
> > 
http://u-boot.10912.n7.nabble.com/PATCH-v2-riscv-cache-Implement-i-dcache-status-enable-disable-td346350.html
> > > > > 
> > > > > But in v3
> > > > > I do not remember you have any comments about v3
> > > > > 
> > > > 
> > > > 
> > 
> > 
http://u-boot.10912.n7.nabble.com/PATCH-v3-riscv-cache-Implement-i-dcache-status-enable-disable-td346902.html
> > > > > 
> > > > > Is it right ?
> > > > > 
> > > > > Rick
> > > > > 
> > > > 
> > > > In my last email to v2 I still expressed some concerns (for
> > > > example
> > > > the
> > > > order, in which you disable the caches), to which you did not
> > > > reply. Of
> > > 
> > > I think I do have responsed about the order issue clearly in
> > > previous
> > > mail at that time.
> > > 
> > > > course it is perfectly fine if you don't agree, but I would
> > > > really
> > > > appreciate a quick reply. Could be that I'm just wrong as well
> > > > :)
> > > > 
> > > > That is right, I did not restate my comments on your v3, which
> > > > I
> > > > should
> > > > have done. If you don't mind, I will send them now.
> > > 
> > > I have send v3 in 11/7. I have waited for about 2 weeks and then
> > > send
> > > PR.
> > > I still hope this patch can be accepted at this time merge work.
> > > After that you can send another patch to refine the flow you care
> > > about.
> > > How do you think about it ?
> > > 
> > 
> > Of course, my intention was not to delay this. Sure, that is ok for
> > me.
> > 
> 
> Very appreciate for your agreement :)
> 

If you find the time, I would appreciate your feedback on my notes to
your patch. Not to change anything in the patch, but for future
changes. :)

In particular, I think it would be good to be able to enable cache
support by default and I am not sure if we can flush the dcache with
the fence instruction.

> > Do you want me to send v4 of my patch series (rebased on u-
> > boot/master
> > and with the reviewed-bys)?
> 
> Actually I merge very carefully, I still do not know what is missing
> about reviewed-bys.
> I only know the Author name become Rick Chen from  Lukas Auer indeed.
> I am both ok if you want to resend v4 or not.
> Up to you !
> 

There are some reviewed-bys on the mailing list to v3, so there is
nothing missing from the actual patches.
I like patchwork to get a quick overview of the current state and tags
of the series (for example [1] for my patch series). It also gives the
option to download the complete series at once and including all the
tags sent over the mailing list, which is really useful especially for
large patch series.

I will send v4 since I already have it ready.

[1]: https://patchwork.ozlabs.org/project/uboot/list/?series=74999

> Next time if this kind of conflict happen again, I will inform you at
> the first time to avoid misunderstanding.
> 

Thanks! :)

Lukas

> Rick
> 
> > 
> > Thanks,
> > Lukas
> > 
> > > B.R
> > > Rick
> > > 
> > > 
> > > > 
> > > > Thanks,
> > > > Lukas
> > > > 
> > > > > 
> > > > > 
> > > > > 
> > > > > 
> > > > > 
> > > > > > > Thank you!
> > > > > > > Lukas
> > > > > > > 
> > > > > > > 
> > > > > > > >  arch/nds32/cpu/n1213/start.S                          
> > > > > > > >    |
> > > > > > > >   51
> > > > > > > > ---
> > > > > > > > -----------
> > > > > > > >  arch/riscv/Kconfig                                    
> > > > > > > >    |
> > > > > > > >   34
> > > > > > > > ++++++---
> > > > > > > >  arch/riscv/Makefile                                   
> > > > > > > >    |
> > > > > > > >   20
> > > > > > > > ++++++
> > > > > > > >  arch/riscv/config.mk                                  
> > > > > > > >    |
> > > > > > > >    7
> > > > > > > > +-
> > > > > > > >  arch/riscv/cpu/ax25/Kconfig                           
> > > > > > > >    |
> > > > > > > >    7
> > > > > > > > ++
> > > > > > > >  arch/riscv/cpu/ax25/Makefile                          
> > > > > > > >    |
> > > > > > > >    1
> > > > > > > > +
> > > > > > > >  arch/riscv/cpu/ax25/cache.c                           
> > > > > > > >    |
> > > > > > > >   95
> > > > > > > > ++++++++++++++++++++++++++
> > > > > > > >  arch/riscv/cpu/ax25/cpu.c                             
> > > > > > > >    |
> > > > > > > >    4
> > > > > > > > ++
> > > > > > > >  arch/riscv/cpu/cpu.c                                  
> > > > > > > >    |
> > > > > > > >    6
> > > > > > > > ++
> > > > > > > >  arch/riscv/cpu/qemu/cpu.c                             
> > > > > > > >    |
> > > > > > > >    2
> > > > > > > > +-
> > > > > > > >  arch/riscv/cpu/start.S                                
> > > > > > > >    |
> > > > > > > > 344
> > > > > > > > +++++++++++++++++++++++++++++++++++++++++++++--------
> > > > > > > > ----
> > > > > > > > ----
> > > > > > > > ------
> > > > > > > > -------------------------
> > > > > > > >  arch/riscv/dts/Makefile                               
> > > > > > > >    |
> > > > > > > >    1
> > > > > > > > -
> > > > > > > >  arch/riscv/dts/ae350.dts                              
> > > > > > > >    |
> > > > > > > > 107
> > > > > > > > +++++++++++++++++++++++++----
> > > > > > > >  arch/riscv/dts/ae350_32.dts                           
> > > > > > > >    |
> > > > > > > > 229
> > > > > > > > +++++++++++++++++++++++++++++++++++++++++++++++++++++++
> > > > > > > > ++++
> > > > > > > > ++
> > > > > > > >  arch/riscv/dts/ae350_64.dts                           
> > > > > > > >    |
> > > > > > > > 229
> > > > > > > > +++++++++++++++++++++++++++++++++++++++++++++++++++++++
> > > > > > > > ++++
> > > > > > > > ++
> > > > > > > >  arch/riscv/include/asm/barrier.h                      
> > > > > > > >    |
> > > > > > > >   67
> > > > > > > > ++++++++++++++++++
> > > > > > > >  arch/riscv/include/asm/cache.h                        
> > > > > > > >    |
> > > > > > > >    3
> > > > > > > > +
> > > > > > > >  arch/riscv/include/asm/io.h                           
> > > > > > > >    |
> > > > > > > >   48
> > > > > > > > +++
> > > > > > > > ----------
> > > > > > > >  arch/riscv/include/asm/posix_types.h                  
> > > > > > > >    |
> > > > > > > >    6
> > > > > > > > +-
> > > > > > > >  arch/riscv/include/asm/types.h                        
> > > > > > > >    |
> > > > > > > >    4
> > > > > > > > ++
> > > > > > > >  arch/riscv/lib/bootm.c                                
> > > > > > > >    |
> > > > > > > >   97
> > > > > > > > ++++++++++++++++++--------
> > > > > > > >  arch/riscv/lib/cache.c                                
> > > > > > > >    |
> > > > > > > >   36
> > > > > > > > ++++++++--
> > > > > > > >  arch/riscv/lib/interrupts.c                           
> > > > > > > >    |
> > > > > > > >   31
> > > > > > > > +++++++--
> > > > > > > >  arch/riscv/lib/setjmp.S                               
> > > > > > > >    |
> > > > > > > >    2
> > > > > > > > +-
> > > > > > > >  board/AndesTech/ax25-ae350/ax25-
> > > > > > > > ae350.c                  |   3
> > > > > > > > +-
> > > > > > > >  board/armltd/integrator/README                        
> > > > > > > >    |
> > > > > > > >    4
> > > > > > > > +-
> > > > > > > >  board/emulation/qemu-
> > > > > > > > riscv/Kconfig                       |   2
> > > > > > > > +
> > > > > > > >  board/emulation/qemu-riscv/qemu-
> > > > > > > > riscv.c                  |  73
> > > > > > > > +++++++++++++++++---
> > > > > > > >  configs/{ax25-ae350_defconfig => a25-
> > > > > > > > ae350_32_defconfig}
> > > > > > > > >   5
> > > > > > > > 
> > > > > > > > +-
> > > > > > > >  configs/ax25-
> > > > > > > > ae350_64_defconfig                          |  39
> > > > > > > > +++++++++++
> > > > > > > >  configs/qemu-
> > > > > > > > riscv32_defconfig                           |   5
> > > > > > > > +-
> > > > > > > >  configs/qemu-
> > > > > > > > riscv64_defconfig                           |   7
> > > > > > > > +-
> > > > > > > >  doc/README.distro                                     
> > > > > > > >    |
> > > > > > > >    3
> > > > > > > 
> > > > > > > +-
> > > > > > > >  dts/Makefile                                          
> > > > > > > >    |
> > > > > > > >    2
> > > > > > > > +-
> > > > > > > >  include/common.h                                      
> > > > > > > >    |
> > > > > > > >    5
> > > > > > > > --
> > > > > > > >  include/config_distro_bootcmd.h                       
> > > > > > > >    |
> > > > > > > >   21
> > > > > > > > ++++-
> > > > > > > > -
> > > > > > > >  include/configs/qemu-
> > > > > > > > riscv.h                             |  28
> > > > > > > > ++++++++
> > > > > > > >  include/dm/ofnode.h                                   
> > > > > > > >    |
> > > > > > > >   10
> > > > > > > 
> > > > > > > +++
> > > > > > > >  scripts/config_whitelist.txt                          
> > > > > > > >    |
> > > > > > > >    1
> > > > > > > > -
> > > > > > > >  tools/.gitignore                                      
> > > > > > > >    |
> > > > > > > >    1
> > > > > > > > +
> > > > > > > >  40 files changed, 1271 insertions(+), 369 deletions(-
> > > > > > > > )  create
> > > > > > > > mode
> > > > > > > > 100644 arch/riscv/cpu/ax25/Kconfig  create mode 100644
> > > > > > > > arch/riscv/cpu/ax25/cache.c  create mode 100644
> > > > > > > > arch/riscv/dts/ae350_32.dts  create mode 100644
> > > > > > > > arch/riscv/dts/ae350_64.dts  create mode 100644
> > > > > > > > arch/riscv/include/asm/barrier.h  rename configs/{ax25-
> > > > > > > > ae350_defconfig
> > > > > > > > => a25-ae350_32_defconfig}
> > > > > > > > (89%)
> > > > > > > >  create mode 100644 configs/ax25-ae350_64_defconfig
> > > > > > > > _______________________________________________
> > > > > > > > U-Boot mailing list
> > > > > > > > U-Boot at lists.denx.de
> > > > > > > > https://lists.denx.de/listinfo/u-boot
> > > > > > 
> > > > > > CONFIDENTIALITY NOTICE:
> > > > > > 
> > > > > > This e-mail (and its attachments) may contain confidential
> > > > > > and
> > > > > > legally privileged information or information protected
> > > > > > from
> > > > > > disclosure. If you are not the intended recipient, you are
> > > > > > hereby
> > > > > > notified that any disclosure, copying, distribution, or use
> > > > > > of
> > > > > > the
> > > > > > information contained herein is strictly prohibited. In
> > > > > > this
> > > > > > case,
> > > > > > please immediately notify the sender by return e-mail,
> > > > > > delete
> > > > > > the
> > > > > > message (and any accompanying documents) and destroy all
> > > > > > printed
> > > > > > hard copies. Thank you for your cooperation.
> > > > > > 
> > > > > > Copyright ANDES TECHNOLOGY CORPORATION - All Rights
> > > > > > Reserved.

[U-Boot] Uboot send pull request

[Rick Chen]

Auer, Lukas <lukas.auer@aisec.fraunhofer.de> 於 2018年11月22日 週四 下午5:18寫道：
>
> Hi Rick,
>
> On Thu, 2018-11-22 at 16:38 +0800, Rick Chen wrote:
> > Auer, Lukas <lukas.auer@aisec.fraunhofer.de> 於 2018年11月21日 週三
> > 下午9:09寫道：
> > >
> > > Hi Rick,
> > >
> > > On Wed, 2018-11-21 at 17:37 +0800, Rick Chen wrote:
> > > > Hi Lukas
> > > >
> > > > > >
> > > > > > Hi Rick,
> > > > > >
> > > > > > Thanks for pulling my changes! I have some notes and
> > > > > > questions on
> > > > > > it.
> > > > > >
> > > > > > I can't find all of your patches on the mailing list, for
> > > > > > example
> > > > > > the patch "configs:
> > > > > > ax25-ae350: Enable DISPLAY_CPUINFO & DISPLAY_BOARDINFO".
> > > > > > Others
> > > > > > include
> > > > > > changes, which have not been submitted to the mailing list.
> > > > > > Please send all
> > > > > > changes to the mailing list before including them in a pull
> > > > > > request. This is really
> > > > > > helpful for me and others, to be able to see if there are any
> > > > > > conflicts with other
> > > > > > patches currently under development or with other boards.
> > > > > >
> > > >
> > > > That is my mistake. Forget to send it to mailing list.
> > > > I will drop this patch.
> > > >
> > > > > > Something seems to have gone wrong while applying the patch
> > > > > > "riscv:
> > > > > > enable -fdata-sections". This is one of my patches and part
> > > > > > of
> > > > > > the patch series.
> > > > > >
> > > >
> > > > That is because your patch
> > > > [PATCH v3 00/28] General fixes / cleanup for RISC-V and
> > > > improvements
> > > > to qemu-riscv
> > > > still have some conflict with master.
> > > >
> > > > It conflict with this commit
> > > > Kbuild: add LDFLAGS_STANDALONE
> > > >
> > > > I am hesitate to ask you to send v4 which shall rebase on master
> > > > yesterday.
> > > > Finally I decide to merge it by myself.
> > > >
> > > > I am not sure it is inappropriate.
> > > > Maybe I shall ask for you and wait for your v4 patchsets which
> > > > are
> > > > rebase on master, right ?
> > > >
> > >
> > > Ok, I wasn't aware of that. In general, I think it is always easier
> > > if
> > > you ask me to resend the patch series (or just the relevant patch),
> > > but
> > > I don't know, how this is usually handled. I just saw that there
> > > are a
> > > few reviewed-bys missing in some of the patches. So if you want, I
> > > can
> > > add those, rebase on u-boot/master, and then send v4 to you.
> > >
> > > >
> > > > > > Can you please consider removing your patch "riscv: cache:
> > > > > > Implement i/dcache
> > > > > > [status, enable, disable]" from this pull request and re-
> > > > > > sending
> > > > > > it with the next?
> > > > > > There are still some points you did not reply to in my
> > > > > > comments
> > > > > > on v2 of your
> > > > > > patch. For example, I think it makes sense to split this
> > > > > > patch
> > > > > > into multiple
> > > > > > patches to make it clearer what it changes. If you want, I
> > > > > > can
> > > > > > re-send my
> > > > > > comments in reply to v3 of your patch :)
> > > > > >
> > > >
> > > > In my memory :
> > > >
> > > > In v2
> > > > you have some suggestions and I reply as below
> > > >
> > >
> > >
> http://u-boot.10912.n7.nabble.com/PATCH-v2-riscv-cache-Implement-i-dcache-status-enable-disable-td346350.html
> > > >
> > > > But in v3
> > > > I do not remember you have any comments about v3
> > > >
> > >
> > >
> http://u-boot.10912.n7.nabble.com/PATCH-v3-riscv-cache-Implement-i-dcache-status-enable-disable-td346902.html
> > > >
> > > > Is it right ?
> > > >
> > > > Rick
> > > >
> > >
> > > In my last email to v2 I still expressed some concerns (for example
> > > the
> > > order, in which you disable the caches), to which you did not
> > > reply. Of
> >
> > I think I do have responsed about the order issue clearly in previous
> > mail at that time.
> >
> > > course it is perfectly fine if you don't agree, but I would really
> > > appreciate a quick reply. Could be that I'm just wrong as well :)
> > >
> > > That is right, I did not restate my comments on your v3, which I
> > > should
> > > have done. If you don't mind, I will send them now.
> >
> > I have send v3 in 11/7. I have waited for about 2 weeks and then send
> > PR.
> > I still hope this patch can be accepted at this time merge work.
> > After that you can send another patch to refine the flow you care
> > about.
> > How do you think about it ?
> >
>
> Of course, my intention was not to delay this. Sure, that is ok for me.
>

Very appreciate for your agreement :)

> Do you want me to send v4 of my patch series (rebased on u-boot/master
> and with the reviewed-bys)?

Actually I merge very carefully, I still do not know what is missing
about reviewed-bys.
I only know the Author name become Rick Chen from  Lukas Auer indeed.
I am both ok if you want to resend v4 or not.
Up to you !

Next time if this kind of conflict happen again, I will inform you at
the first time to avoid misunderstanding.

Rick

>
> Thanks,
> Lukas
>
> > B.R
> > Rick
> >
> >
> > >
> > > Thanks,
> > > Lukas
> > >
> > > >
> > > >
> > > >
> > > >
> > > >
> > > > > > Thank you!
> > > > > > Lukas
> > > > > >
> > > > > >
> > > > > > >  arch/nds32/cpu/n1213/start.S                             |
> > > > > > >   51
> > > > > > > ---
> > > > > > > -----------
> > > > > > >  arch/riscv/Kconfig                                       |
> > > > > > >   34
> > > > > > > ++++++---
> > > > > > >  arch/riscv/Makefile                                      |
> > > > > > >   20
> > > > > > > ++++++
> > > > > > >  arch/riscv/config.mk                                     |
> > > > > > >    7
> > > > > > > +-
> > > > > > >  arch/riscv/cpu/ax25/Kconfig                              |
> > > > > > >    7
> > > > > > > ++
> > > > > > >  arch/riscv/cpu/ax25/Makefile                             |
> > > > > > >    1
> > > > > > > +
> > > > > > >  arch/riscv/cpu/ax25/cache.c                              |
> > > > > > >   95
> > > > > > > ++++++++++++++++++++++++++
> > > > > > >  arch/riscv/cpu/ax25/cpu.c                                |
> > > > > > >    4
> > > > > > > ++
> > > > > > >  arch/riscv/cpu/cpu.c                                     |
> > > > > > >    6
> > > > > > > ++
> > > > > > >  arch/riscv/cpu/qemu/cpu.c                                |
> > > > > > >    2
> > > > > > > +-
> > > > > > >  arch/riscv/cpu/start.S                                   |
> > > > > > > 344
> > > > > > > +++++++++++++++++++++++++++++++++++++++++++++------------
> > > > > > > ----
> > > > > > > ------
> > > > > > > -------------------------
> > > > > > >  arch/riscv/dts/Makefile                                  |
> > > > > > >    1
> > > > > > > -
> > > > > > >  arch/riscv/dts/ae350.dts                                 |
> > > > > > > 107
> > > > > > > +++++++++++++++++++++++++----
> > > > > > >  arch/riscv/dts/ae350_32.dts                              |
> > > > > > > 229
> > > > > > > +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
> > > > > > > ++
> > > > > > >  arch/riscv/dts/ae350_64.dts                              |
> > > > > > > 229
> > > > > > > +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
> > > > > > > ++
> > > > > > >  arch/riscv/include/asm/barrier.h                         |
> > > > > > >   67
> > > > > > > ++++++++++++++++++
> > > > > > >  arch/riscv/include/asm/cache.h                           |
> > > > > > >    3
> > > > > > > +
> > > > > > >  arch/riscv/include/asm/io.h                              |
> > > > > > >   48
> > > > > > > +++
> > > > > > > ----------
> > > > > > >  arch/riscv/include/asm/posix_types.h                     |
> > > > > > >    6
> > > > > > > +-
> > > > > > >  arch/riscv/include/asm/types.h                           |
> > > > > > >    4
> > > > > > > ++
> > > > > > >  arch/riscv/lib/bootm.c                                   |
> > > > > > >   97
> > > > > > > ++++++++++++++++++--------
> > > > > > >  arch/riscv/lib/cache.c                                   |
> > > > > > >   36
> > > > > > > ++++++++--
> > > > > > >  arch/riscv/lib/interrupts.c                              |
> > > > > > >   31
> > > > > > > +++++++--
> > > > > > >  arch/riscv/lib/setjmp.S                                  |
> > > > > > >    2
> > > > > > > +-
> > > > > > >  board/AndesTech/ax25-ae350/ax25-
> > > > > > > ae350.c                  |   3
> > > > > > > +-
> > > > > > >  board/armltd/integrator/README                           |
> > > > > > >    4
> > > > > > > +-
> > > > > > >  board/emulation/qemu-
> > > > > > > riscv/Kconfig                       |   2
> > > > > > > +
> > > > > > >  board/emulation/qemu-riscv/qemu-
> > > > > > > riscv.c                  |  73
> > > > > > > +++++++++++++++++---
> > > > > > >  configs/{ax25-ae350_defconfig => a25-ae350_32_defconfig}
> > > > > > > |   5
> > > > > > > +-
> > > > > > >  configs/ax25-
> > > > > > > ae350_64_defconfig                          |  39
> > > > > > > +++++++++++
> > > > > > >  configs/qemu-
> > > > > > > riscv32_defconfig                           |   5
> > > > > > > +-
> > > > > > >  configs/qemu-
> > > > > > > riscv64_defconfig                           |   7
> > > > > > > +-
> > > > > > >  doc/README.distro                                        |
> > > > > > >    3
> > > > > >
> > > > > > +-
> > > > > > >  dts/Makefile                                             |
> > > > > > >    2
> > > > > > > +-
> > > > > > >  include/common.h                                         |
> > > > > > >    5
> > > > > > > --
> > > > > > >  include/config_distro_bootcmd.h                          |
> > > > > > >   21
> > > > > > > ++++-
> > > > > > > -
> > > > > > >  include/configs/qemu-
> > > > > > > riscv.h                             |  28
> > > > > > > ++++++++
> > > > > > >  include/dm/ofnode.h                                      |
> > > > > > >   10
> > > > > >
> > > > > > +++
> > > > > > >  scripts/config_whitelist.txt                             |
> > > > > > >    1
> > > > > > > -
> > > > > > >  tools/.gitignore                                         |
> > > > > > >    1
> > > > > > > +
> > > > > > >  40 files changed, 1271 insertions(+), 369 deletions(-
> > > > > > > )  create
> > > > > > > mode
> > > > > > > 100644 arch/riscv/cpu/ax25/Kconfig  create mode 100644
> > > > > > > arch/riscv/cpu/ax25/cache.c  create mode 100644
> > > > > > > arch/riscv/dts/ae350_32.dts  create mode 100644
> > > > > > > arch/riscv/dts/ae350_64.dts  create mode 100644
> > > > > > > arch/riscv/include/asm/barrier.h  rename configs/{ax25-
> > > > > > > ae350_defconfig
> > > > > > > => a25-ae350_32_defconfig}
> > > > > > > (89%)
> > > > > > >  create mode 100644 configs/ax25-ae350_64_defconfig
> > > > > > > _______________________________________________
> > > > > > > U-Boot mailing list
> > > > > > > U-Boot at lists.denx.de
> > > > > > > https://lists.denx.de/listinfo/u-boot
> > > > >
> > > > > CONFIDENTIALITY NOTICE:
> > > > >
> > > > > This e-mail (and its attachments) may contain confidential and
> > > > > legally privileged information or information protected from
> > > > > disclosure. If you are not the intended recipient, you are
> > > > > hereby
> > > > > notified that any disclosure, copying, distribution, or use of
> > > > > the
> > > > > information contained herein is strictly prohibited. In this
> > > > > case,
> > > > > please immediately notify the sender by return e-mail, delete
> > > > > the
> > > > > message (and any accompanying documents) and destroy all
> > > > > printed
> > > > > hard copies. Thank you for your cooperation.
> > > > >
> > > > > Copyright ANDES TECHNOLOGY CORPORATION - All Rights Reserved.

[U-Boot] Uboot send pull request

[Auer, Lukas]

Hi Rick,

On Thu, 2018-11-22 at 16:38 +0800, Rick Chen wrote:
> Auer, Lukas <lukas.auer@aisec.fraunhofer.de> 於 2018年11月21日 週三
> 下午9:09寫道：
> > 
> > Hi Rick,
> > 
> > On Wed, 2018-11-21 at 17:37 +0800, Rick Chen wrote:
> > > Hi Lukas
> > > 
> > > > > 
> > > > > Hi Rick,
> > > > > 
> > > > > Thanks for pulling my changes! I have some notes and
> > > > > questions on
> > > > > it.
> > > > > 
> > > > > I can't find all of your patches on the mailing list, for
> > > > > example
> > > > > the patch "configs:
> > > > > ax25-ae350: Enable DISPLAY_CPUINFO & DISPLAY_BOARDINFO".
> > > > > Others
> > > > > include
> > > > > changes, which have not been submitted to the mailing list.
> > > > > Please send all
> > > > > changes to the mailing list before including them in a pull
> > > > > request. This is really
> > > > > helpful for me and others, to be able to see if there are any
> > > > > conflicts with other
> > > > > patches currently under development or with other boards.
> > > > > 
> > > 
> > > That is my mistake. Forget to send it to mailing list.
> > > I will drop this patch.
> > > 
> > > > > Something seems to have gone wrong while applying the patch
> > > > > "riscv:
> > > > > enable -fdata-sections". This is one of my patches and part
> > > > > of
> > > > > the patch series.
> > > > > 
> > > 
> > > That is because your patch
> > > [PATCH v3 00/28] General fixes / cleanup for RISC-V and
> > > improvements
> > > to qemu-riscv
> > > still have some conflict with master.
> > > 
> > > It conflict with this commit
> > > Kbuild: add LDFLAGS_STANDALONE
> > > 
> > > I am hesitate to ask you to send v4 which shall rebase on master
> > > yesterday.
> > > Finally I decide to merge it by myself.
> > > 
> > > I am not sure it is inappropriate.
> > > Maybe I shall ask for you and wait for your v4 patchsets which
> > > are
> > > rebase on master, right ?
> > > 
> > 
> > Ok, I wasn't aware of that. In general, I think it is always easier
> > if
> > you ask me to resend the patch series (or just the relevant patch),
> > but
> > I don't know, how this is usually handled. I just saw that there
> > are a
> > few reviewed-bys missing in some of the patches. So if you want, I
> > can
> > add those, rebase on u-boot/master, and then send v4 to you.
> > 
> > > 
> > > > > Can you please consider removing your patch "riscv: cache:
> > > > > Implement i/dcache
> > > > > [status, enable, disable]" from this pull request and re-
> > > > > sending
> > > > > it with the next?
> > > > > There are still some points you did not reply to in my
> > > > > comments
> > > > > on v2 of your
> > > > > patch. For example, I think it makes sense to split this
> > > > > patch
> > > > > into multiple
> > > > > patches to make it clearer what it changes. If you want, I
> > > > > can
> > > > > re-send my
> > > > > comments in reply to v3 of your patch :)
> > > > > 
> > > 
> > > In my memory :
> > > 
> > > In v2
> > > you have some suggestions and I reply as below
> > > 
> > 
> > 
http://u-boot.10912.n7.nabble.com/PATCH-v2-riscv-cache-Implement-i-dcache-status-enable-disable-td346350.html
> > > 
> > > But in v3
> > > I do not remember you have any comments about v3
> > > 
> > 
> > 
http://u-boot.10912.n7.nabble.com/PATCH-v3-riscv-cache-Implement-i-dcache-status-enable-disable-td346902.html
> > > 
> > > Is it right ?
> > > 
> > > Rick
> > > 
> > 
> > In my last email to v2 I still expressed some concerns (for example
> > the
> > order, in which you disable the caches), to which you did not
> > reply. Of
> 
> I think I do have responsed about the order issue clearly in previous
> mail at that time.
> 
> > course it is perfectly fine if you don't agree, but I would really
> > appreciate a quick reply. Could be that I'm just wrong as well :)
> > 
> > That is right, I did not restate my comments on your v3, which I
> > should
> > have done. If you don't mind, I will send them now.
> 
> I have send v3 in 11/7. I have waited for about 2 weeks and then send
> PR.
> I still hope this patch can be accepted at this time merge work.
> After that you can send another patch to refine the flow you care
> about.
> How do you think about it ?
> 

Of course, my intention was not to delay this. Sure, that is ok for me.

Do you want me to send v4 of my patch series (rebased on u-boot/master
and with the reviewed-bys)?

Thanks,
Lukas

> B.R
> Rick
> 
> 
> > 
> > Thanks,
> > Lukas
> > 
> > > 
> > > 
> > > 
> > > 
> > > 
> > > > > Thank you!
> > > > > Lukas
> > > > > 
> > > > > 
> > > > > >  arch/nds32/cpu/n1213/start.S                             |
> > > > > >   51
> > > > > > ---
> > > > > > -----------
> > > > > >  arch/riscv/Kconfig                                       |
> > > > > >   34
> > > > > > ++++++---
> > > > > >  arch/riscv/Makefile                                      |
> > > > > >   20
> > > > > > ++++++
> > > > > >  arch/riscv/config.mk                                     |
> > > > > >    7
> > > > > > +-
> > > > > >  arch/riscv/cpu/ax25/Kconfig                              |
> > > > > >    7
> > > > > > ++
> > > > > >  arch/riscv/cpu/ax25/Makefile                             |
> > > > > >    1
> > > > > > +
> > > > > >  arch/riscv/cpu/ax25/cache.c                              |
> > > > > >   95
> > > > > > ++++++++++++++++++++++++++
> > > > > >  arch/riscv/cpu/ax25/cpu.c                                |
> > > > > >    4
> > > > > > ++
> > > > > >  arch/riscv/cpu/cpu.c                                     |
> > > > > >    6
> > > > > > ++
> > > > > >  arch/riscv/cpu/qemu/cpu.c                                |
> > > > > >    2
> > > > > > +-
> > > > > >  arch/riscv/cpu/start.S                                   |
> > > > > > 344
> > > > > > +++++++++++++++++++++++++++++++++++++++++++++------------
> > > > > > ----
> > > > > > ------
> > > > > > -------------------------
> > > > > >  arch/riscv/dts/Makefile                                  |
> > > > > >    1
> > > > > > -
> > > > > >  arch/riscv/dts/ae350.dts                                 |
> > > > > > 107
> > > > > > +++++++++++++++++++++++++----
> > > > > >  arch/riscv/dts/ae350_32.dts                              |
> > > > > > 229
> > > > > > +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
> > > > > > ++
> > > > > >  arch/riscv/dts/ae350_64.dts                              |
> > > > > > 229
> > > > > > +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
> > > > > > ++
> > > > > >  arch/riscv/include/asm/barrier.h                         |
> > > > > >   67
> > > > > > ++++++++++++++++++
> > > > > >  arch/riscv/include/asm/cache.h                           |
> > > > > >    3
> > > > > > +
> > > > > >  arch/riscv/include/asm/io.h                              |
> > > > > >   48
> > > > > > +++
> > > > > > ----------
> > > > > >  arch/riscv/include/asm/posix_types.h                     |
> > > > > >    6
> > > > > > +-
> > > > > >  arch/riscv/include/asm/types.h                           |
> > > > > >    4
> > > > > > ++
> > > > > >  arch/riscv/lib/bootm.c                                   |
> > > > > >   97
> > > > > > ++++++++++++++++++--------
> > > > > >  arch/riscv/lib/cache.c                                   |
> > > > > >   36
> > > > > > ++++++++--
> > > > > >  arch/riscv/lib/interrupts.c                              |
> > > > > >   31
> > > > > > +++++++--
> > > > > >  arch/riscv/lib/setjmp.S                                  |
> > > > > >    2
> > > > > > +-
> > > > > >  board/AndesTech/ax25-ae350/ax25-
> > > > > > ae350.c                  |   3
> > > > > > +-
> > > > > >  board/armltd/integrator/README                           |
> > > > > >    4
> > > > > > +-
> > > > > >  board/emulation/qemu-
> > > > > > riscv/Kconfig                       |   2
> > > > > > +
> > > > > >  board/emulation/qemu-riscv/qemu-
> > > > > > riscv.c                  |  73
> > > > > > +++++++++++++++++---
> > > > > >  configs/{ax25-ae350_defconfig => a25-ae350_32_defconfig}
> > > > > > |   5
> > > > > > +-
> > > > > >  configs/ax25-
> > > > > > ae350_64_defconfig                          |  39
> > > > > > +++++++++++
> > > > > >  configs/qemu-
> > > > > > riscv32_defconfig                           |   5
> > > > > > +-
> > > > > >  configs/qemu-
> > > > > > riscv64_defconfig                           |   7
> > > > > > +-
> > > > > >  doc/README.distro                                        |
> > > > > >    3
> > > > > 
> > > > > +-
> > > > > >  dts/Makefile                                             |
> > > > > >    2
> > > > > > +-
> > > > > >  include/common.h                                         |
> > > > > >    5
> > > > > > --
> > > > > >  include/config_distro_bootcmd.h                          |
> > > > > >   21
> > > > > > ++++-
> > > > > > -
> > > > > >  include/configs/qemu-
> > > > > > riscv.h                             |  28
> > > > > > ++++++++
> > > > > >  include/dm/ofnode.h                                      |
> > > > > >   10
> > > > > 
> > > > > +++
> > > > > >  scripts/config_whitelist.txt                             |
> > > > > >    1
> > > > > > -
> > > > > >  tools/.gitignore                                         |
> > > > > >    1
> > > > > > +
> > > > > >  40 files changed, 1271 insertions(+), 369 deletions(-
> > > > > > )  create
> > > > > > mode
> > > > > > 100644 arch/riscv/cpu/ax25/Kconfig  create mode 100644
> > > > > > arch/riscv/cpu/ax25/cache.c  create mode 100644
> > > > > > arch/riscv/dts/ae350_32.dts  create mode 100644
> > > > > > arch/riscv/dts/ae350_64.dts  create mode 100644
> > > > > > arch/riscv/include/asm/barrier.h  rename configs/{ax25-
> > > > > > ae350_defconfig
> > > > > > => a25-ae350_32_defconfig}
> > > > > > (89%)
> > > > > >  create mode 100644 configs/ax25-ae350_64_defconfig
> > > > > > _______________________________________________
> > > > > > U-Boot mailing list
> > > > > > U-Boot at lists.denx.de
> > > > > > https://lists.denx.de/listinfo/u-boot
> > > > 
> > > > CONFIDENTIALITY NOTICE:
> > > > 
> > > > This e-mail (and its attachments) may contain confidential and
> > > > legally privileged information or information protected from
> > > > disclosure. If you are not the intended recipient, you are
> > > > hereby
> > > > notified that any disclosure, copying, distribution, or use of
> > > > the
> > > > information contained herein is strictly prohibited. In this
> > > > case,
> > > > please immediately notify the sender by return e-mail, delete
> > > > the
> > > > message (and any accompanying documents) and destroy all
> > > > printed
> > > > hard copies. Thank you for your cooperation.
> > > > 
> > > > Copyright ANDES TECHNOLOGY CORPORATION - All Rights Reserved.

[U-Boot] Uboot send pull request

[Rick Chen]

Auer, Lukas <lukas.auer@aisec.fraunhofer.de> 於 2018年11月21日 週三 下午9:09寫道：
>
> Hi Rick,
>
> On Wed, 2018-11-21 at 17:37 +0800, Rick Chen wrote:
> > Hi Lukas
> >
> > > >
> > > > Hi Rick,
> > > >
> > > > Thanks for pulling my changes! I have some notes and questions on
> > > > it.
> > > >
> > > > I can't find all of your patches on the mailing list, for example
> > > > the patch "configs:
> > > > ax25-ae350: Enable DISPLAY_CPUINFO & DISPLAY_BOARDINFO". Others
> > > > include
> > > > changes, which have not been submitted to the mailing list.
> > > > Please send all
> > > > changes to the mailing list before including them in a pull
> > > > request. This is really
> > > > helpful for me and others, to be able to see if there are any
> > > > conflicts with other
> > > > patches currently under development or with other boards.
> > > >
> >
> > That is my mistake. Forget to send it to mailing list.
> > I will drop this patch.
> >
> > > > Something seems to have gone wrong while applying the patch
> > > > "riscv:
> > > > enable -fdata-sections". This is one of my patches and part of
> > > > the patch series.
> > > >
> >
> > That is because your patch
> > [PATCH v3 00/28] General fixes / cleanup for RISC-V and improvements
> > to qemu-riscv
> > still have some conflict with master.
> >
> > It conflict with this commit
> > Kbuild: add LDFLAGS_STANDALONE
> >
> > I am hesitate to ask you to send v4 which shall rebase on master
> > yesterday.
> > Finally I decide to merge it by myself.
> >
> > I am not sure it is inappropriate.
> > Maybe I shall ask for you and wait for your v4 patchsets which are
> > rebase on master, right ?
> >
>
> Ok, I wasn't aware of that. In general, I think it is always easier if
> you ask me to resend the patch series (or just the relevant patch), but
> I don't know, how this is usually handled. I just saw that there are a
> few reviewed-bys missing in some of the patches. So if you want, I can
> add those, rebase on u-boot/master, and then send v4 to you.
>
> >
> > > > Can you please consider removing your patch "riscv: cache:
> > > > Implement i/dcache
> > > > [status, enable, disable]" from this pull request and re- sending
> > > > it with the next?
> > > > There are still some points you did not reply to in my comments
> > > > on v2 of your
> > > > patch. For example, I think it makes sense to split this patch
> > > > into multiple
> > > > patches to make it clearer what it changes. If you want, I can
> > > > re-send my
> > > > comments in reply to v3 of your patch :)
> > > >
> >
> > In my memory :
> >
> > In v2
> > you have some suggestions and I reply as below
> >
> http://u-boot.10912.n7.nabble.com/PATCH-v2-riscv-cache-Implement-i-dcache-status-enable-disable-td346350.html
> >
> > But in v3
> > I do not remember you have any comments about v3
> >
> http://u-boot.10912.n7.nabble.com/PATCH-v3-riscv-cache-Implement-i-dcache-status-enable-disable-td346902.html
> >
> > Is it right ?
> >
> > Rick
> >
>
> In my last email to v2 I still expressed some concerns (for example the
> order, in which you disable the caches), to which you did not reply. Of

I think I do have responsed about the order issue clearly in previous
mail at that time.

> course it is perfectly fine if you don't agree, but I would really
> appreciate a quick reply. Could be that I'm just wrong as well :)
>
> That is right, I did not restate my comments on your v3, which I should
> have done. If you don't mind, I will send them now.

I have send v3 in 11/7. I have waited for about 2 weeks and then send PR.
I still hope this patch can be accepted at this time merge work.
After that you can send another patch to refine the flow you care about.
How do you think about it ?

B.R
Rick


>
> Thanks,
> Lukas
>
> >
> >
> >
> >
> >
> > > > Thank you!
> > > > Lukas
> > > >
> > > >
> > > > >  arch/nds32/cpu/n1213/start.S                             |  51
> > > > > ---
> > > > > -----------
> > > > >  arch/riscv/Kconfig                                       |  34
> > > > > ++++++---
> > > > >  arch/riscv/Makefile                                      |  20
> > > > > ++++++
> > > > >  arch/riscv/config.mk                                     |   7
> > > > > +-
> > > > >  arch/riscv/cpu/ax25/Kconfig                              |   7
> > > > > ++
> > > > >  arch/riscv/cpu/ax25/Makefile                             |   1
> > > > > +
> > > > >  arch/riscv/cpu/ax25/cache.c                              |  95
> > > > > ++++++++++++++++++++++++++
> > > > >  arch/riscv/cpu/ax25/cpu.c                                |   4
> > > > > ++
> > > > >  arch/riscv/cpu/cpu.c                                     |   6
> > > > > ++
> > > > >  arch/riscv/cpu/qemu/cpu.c                                |   2
> > > > > +-
> > > > >  arch/riscv/cpu/start.S                                   | 344
> > > > > +++++++++++++++++++++++++++++++++++++++++++++----------------
> > > > > ------
> > > > > -------------------------
> > > > >  arch/riscv/dts/Makefile                                  |   1
> > > > > -
> > > > >  arch/riscv/dts/ae350.dts                                 | 107
> > > > > +++++++++++++++++++++++++----
> > > > >  arch/riscv/dts/ae350_32.dts                              | 229
> > > > > +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
> > > > >  arch/riscv/dts/ae350_64.dts                              | 229
> > > > > +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
> > > > >  arch/riscv/include/asm/barrier.h                         |  67
> > > > > ++++++++++++++++++
> > > > >  arch/riscv/include/asm/cache.h                           |   3
> > > > > +
> > > > >  arch/riscv/include/asm/io.h                              |  48
> > > > > +++
> > > > > ----------
> > > > >  arch/riscv/include/asm/posix_types.h                     |   6
> > > > > +-
> > > > >  arch/riscv/include/asm/types.h                           |   4
> > > > > ++
> > > > >  arch/riscv/lib/bootm.c                                   |  97
> > > > > ++++++++++++++++++--------
> > > > >  arch/riscv/lib/cache.c                                   |  36
> > > > > ++++++++--
> > > > >  arch/riscv/lib/interrupts.c                              |  31
> > > > > +++++++--
> > > > >  arch/riscv/lib/setjmp.S                                  |   2
> > > > > +-
> > > > >  board/AndesTech/ax25-ae350/ax25-ae350.c                  |   3
> > > > > +-
> > > > >  board/armltd/integrator/README                           |   4
> > > > > +-
> > > > >  board/emulation/qemu-riscv/Kconfig                       |   2
> > > > > +
> > > > >  board/emulation/qemu-riscv/qemu-riscv.c                  |  73
> > > > > +++++++++++++++++---
> > > > >  configs/{ax25-ae350_defconfig => a25-ae350_32_defconfig} |   5
> > > > > +-
> > > > >  configs/ax25-ae350_64_defconfig                          |  39
> > > > > +++++++++++
> > > > >  configs/qemu-riscv32_defconfig                           |   5
> > > > > +-
> > > > >  configs/qemu-riscv64_defconfig                           |   7
> > > > > +-
> > > > >  doc/README.distro                                        |   3
> > > >
> > > > +-
> > > > >  dts/Makefile                                             |   2
> > > > > +-
> > > > >  include/common.h                                         |   5
> > > > > --
> > > > >  include/config_distro_bootcmd.h                          |  21
> > > > > ++++-
> > > > > -
> > > > >  include/configs/qemu-riscv.h                             |  28
> > > > > ++++++++
> > > > >  include/dm/ofnode.h                                      |  10
> > > >
> > > > +++
> > > > >  scripts/config_whitelist.txt                             |   1
> > > > > -
> > > > >  tools/.gitignore                                         |   1
> > > > > +
> > > > >  40 files changed, 1271 insertions(+), 369 deletions(-)  create
> > > > > mode
> > > > > 100644 arch/riscv/cpu/ax25/Kconfig  create mode 100644
> > > > > arch/riscv/cpu/ax25/cache.c  create mode 100644
> > > > > arch/riscv/dts/ae350_32.dts  create mode 100644
> > > > > arch/riscv/dts/ae350_64.dts  create mode 100644
> > > > > arch/riscv/include/asm/barrier.h  rename configs/{ax25-
> > > > > ae350_defconfig
> > > > > => a25-ae350_32_defconfig}
> > > > > (89%)
> > > > >  create mode 100644 configs/ax25-ae350_64_defconfig
> > > > > _______________________________________________
> > > > > U-Boot mailing list
> > > > > U-Boot at lists.denx.de
> > > > > https://lists.denx.de/listinfo/u-boot
> > >
> > > CONFIDENTIALITY NOTICE:
> > >
> > > This e-mail (and its attachments) may contain confidential and
> > > legally privileged information or information protected from
> > > disclosure. If you are not the intended recipient, you are hereby
> > > notified that any disclosure, copying, distribution, or use of the
> > > information contained herein is strictly prohibited. In this case,
> > > please immediately notify the sender by return e-mail, delete the
> > > message (and any accompanying documents) and destroy all printed
> > > hard copies. Thank you for your cooperation.
> > >
> > > Copyright ANDES TECHNOLOGY CORPORATION - All Rights Reserved.

[U-Boot] Uboot send pull request

[Auer, Lukas]

Hi Rick,

On Wed, 2018-11-21 at 17:37 +0800, Rick Chen wrote:
> Hi Lukas
> 
> > > 
> > > Hi Rick,
> > > 
> > > Thanks for pulling my changes! I have some notes and questions on
> > > it.
> > > 
> > > I can't find all of your patches on the mailing list, for example
> > > the patch "configs:
> > > ax25-ae350: Enable DISPLAY_CPUINFO & DISPLAY_BOARDINFO". Others
> > > include
> > > changes, which have not been submitted to the mailing list.
> > > Please send all
> > > changes to the mailing list before including them in a pull
> > > request. This is really
> > > helpful for me and others, to be able to see if there are any
> > > conflicts with other
> > > patches currently under development or with other boards.
> > > 
> 
> That is my mistake. Forget to send it to mailing list.
> I will drop this patch.
> 
> > > Something seems to have gone wrong while applying the patch
> > > "riscv:
> > > enable -fdata-sections". This is one of my patches and part of
> > > the patch series.
> > > 
> 
> That is because your patch
> [PATCH v3 00/28] General fixes / cleanup for RISC-V and improvements
> to qemu-riscv
> still have some conflict with master.
> 
> It conflict with this commit
> Kbuild: add LDFLAGS_STANDALONE
> 
> I am hesitate to ask you to send v4 which shall rebase on master
> yesterday.
> Finally I decide to merge it by myself.
> 
> I am not sure it is inappropriate.
> Maybe I shall ask for you and wait for your v4 patchsets which are
> rebase on master, right ?
> 

Ok, I wasn't aware of that. In general, I think it is always easier if
you ask me to resend the patch series (or just the relevant patch), but
I don't know, how this is usually handled. I just saw that there are a
few reviewed-bys missing in some of the patches. So if you want, I can
add those, rebase on u-boot/master, and then send v4 to you.

> 
> > > Can you please consider removing your patch "riscv: cache:
> > > Implement i/dcache
> > > [status, enable, disable]" from this pull request and re- sending
> > > it with the next?
> > > There are still some points you did not reply to in my comments
> > > on v2 of your
> > > patch. For example, I think it makes sense to split this patch
> > > into multiple
> > > patches to make it clearer what it changes. If you want, I can
> > > re-send my
> > > comments in reply to v3 of your patch :)
> > > 
> 
> In my memory :
> 
> In v2
> you have some suggestions and I reply as below
> 
http://u-boot.10912.n7.nabble.com/PATCH-v2-riscv-cache-Implement-i-dcache-status-enable-disable-td346350.html
> 
> But in v3
> I do not remember you have any comments about v3
> 
http://u-boot.10912.n7.nabble.com/PATCH-v3-riscv-cache-Implement-i-dcache-status-enable-disable-td346902.html
> 
> Is it right ?
> 
> Rick
> 

In my last email to v2 I still expressed some concerns (for example the
order, in which you disable the caches), to which you did not reply. Of
course it is perfectly fine if you don't agree, but I would really
appreciate a quick reply. Could be that I'm just wrong as well :)

That is right, I did not restate my comments on your v3, which I should
have done. If you don't mind, I will send them now.

Thanks,
Lukas

> 
> 
> 
> 
> 
> > > Thank you!
> > > Lukas
> > > 
> > > 
> > > >  arch/nds32/cpu/n1213/start.S                             |  51
> > > > ---
> > > > -----------
> > > >  arch/riscv/Kconfig                                       |  34
> > > > ++++++---
> > > >  arch/riscv/Makefile                                      |  20
> > > > ++++++
> > > >  arch/riscv/config.mk                                     |   7
> > > > +-
> > > >  arch/riscv/cpu/ax25/Kconfig                              |   7
> > > > ++
> > > >  arch/riscv/cpu/ax25/Makefile                             |   1
> > > > +
> > > >  arch/riscv/cpu/ax25/cache.c                              |  95
> > > > ++++++++++++++++++++++++++
> > > >  arch/riscv/cpu/ax25/cpu.c                                |   4
> > > > ++
> > > >  arch/riscv/cpu/cpu.c                                     |   6
> > > > ++
> > > >  arch/riscv/cpu/qemu/cpu.c                                |   2
> > > > +-
> > > >  arch/riscv/cpu/start.S                                   | 344
> > > > +++++++++++++++++++++++++++++++++++++++++++++----------------
> > > > ------
> > > > -------------------------
> > > >  arch/riscv/dts/Makefile                                  |   1
> > > > -
> > > >  arch/riscv/dts/ae350.dts                                 | 107
> > > > +++++++++++++++++++++++++----
> > > >  arch/riscv/dts/ae350_32.dts                              | 229
> > > > +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
> > > >  arch/riscv/dts/ae350_64.dts                              | 229
> > > > +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
> > > >  arch/riscv/include/asm/barrier.h                         |  67
> > > > ++++++++++++++++++
> > > >  arch/riscv/include/asm/cache.h                           |   3
> > > > +
> > > >  arch/riscv/include/asm/io.h                              |  48
> > > > +++
> > > > ----------
> > > >  arch/riscv/include/asm/posix_types.h                     |   6
> > > > +-
> > > >  arch/riscv/include/asm/types.h                           |   4
> > > > ++
> > > >  arch/riscv/lib/bootm.c                                   |  97
> > > > ++++++++++++++++++--------
> > > >  arch/riscv/lib/cache.c                                   |  36
> > > > ++++++++--
> > > >  arch/riscv/lib/interrupts.c                              |  31
> > > > +++++++--
> > > >  arch/riscv/lib/setjmp.S                                  |   2
> > > > +-
> > > >  board/AndesTech/ax25-ae350/ax25-ae350.c                  |   3 
> > > > +-
> > > >  board/armltd/integrator/README                           |   4
> > > > +-
> > > >  board/emulation/qemu-riscv/Kconfig                       |   2 
> > > > +
> > > >  board/emulation/qemu-riscv/qemu-riscv.c                  |  73
> > > > +++++++++++++++++---
> > > >  configs/{ax25-ae350_defconfig => a25-ae350_32_defconfig} |   5
> > > > +-
> > > >  configs/ax25-ae350_64_defconfig                          |  39
> > > > +++++++++++
> > > >  configs/qemu-riscv32_defconfig                           |   5 
> > > > +-
> > > >  configs/qemu-riscv64_defconfig                           |   7 
> > > > +-
> > > >  doc/README.distro                                        |   3
> > > 
> > > +-
> > > >  dts/Makefile                                             |   2
> > > > +-
> > > >  include/common.h                                         |   5
> > > > --
> > > >  include/config_distro_bootcmd.h                          |  21
> > > > ++++-
> > > > -
> > > >  include/configs/qemu-riscv.h                             |  28
> > > > ++++++++
> > > >  include/dm/ofnode.h                                      |  10
> > > 
> > > +++
> > > >  scripts/config_whitelist.txt                             |   1
> > > > -
> > > >  tools/.gitignore                                         |   1
> > > > +
> > > >  40 files changed, 1271 insertions(+), 369 deletions(-)  create 
> > > > mode
> > > > 100644 arch/riscv/cpu/ax25/Kconfig  create mode 100644
> > > > arch/riscv/cpu/ax25/cache.c  create mode 100644
> > > > arch/riscv/dts/ae350_32.dts  create mode 100644
> > > > arch/riscv/dts/ae350_64.dts  create mode 100644
> > > > arch/riscv/include/asm/barrier.h  rename configs/{ax25-
> > > > ae350_defconfig
> > > > => a25-ae350_32_defconfig}
> > > > (89%)
> > > >  create mode 100644 configs/ax25-ae350_64_defconfig
> > > > _______________________________________________
> > > > U-Boot mailing list
> > > > U-Boot at lists.denx.de
> > > > https://lists.denx.de/listinfo/u-boot
> > 
> > CONFIDENTIALITY NOTICE:
> > 
> > This e-mail (and its attachments) may contain confidential and
> > legally privileged information or information protected from
> > disclosure. If you are not the intended recipient, you are hereby
> > notified that any disclosure, copying, distribution, or use of the
> > information contained herein is strictly prohibited. In this case,
> > please immediately notify the sender by return e-mail, delete the
> > message (and any accompanying documents) and destroy all printed
> > hard copies. Thank you for your cooperation.
> > 
> > Copyright ANDES TECHNOLOGY CORPORATION - All Rights Reserved.

[U-Boot] Uboot send pull request

[Rick Chen]

Hi Lukas

> >
> > Hi Rick,
> >
> > Thanks for pulling my changes! I have some notes and questions on it.
> >
> > I can't find all of your patches on the mailing list, for example the patch "configs:
> > ax25-ae350: Enable DISPLAY_CPUINFO & DISPLAY_BOARDINFO". Others include
> > changes, which have not been submitted to the mailing list. Please send all
> > changes to the mailing list before including them in a pull request. This is really
> > helpful for me and others, to be able to see if there are any conflicts with other
> > patches currently under development or with other boards.
> >

That is my mistake. Forget to send it to mailing list.
I will drop this patch.

> > Something seems to have gone wrong while applying the patch "riscv:
> > enable -fdata-sections". This is one of my patches and part of the patch series.
> >

That is because your patch
[PATCH v3 00/28] General fixes / cleanup for RISC-V and improvements
to qemu-riscv
still have some conflict with master.

It conflict with this commit
Kbuild: add LDFLAGS_STANDALONE

I am hesitate to ask you to send v4 which shall rebase on master yesterday.
Finally I decide to merge it by myself.

I am not sure it is inappropriate.
Maybe I shall ask for you and wait for your v4 patchsets which are
rebase on master, right ?


> > Can you please consider removing your patch "riscv: cache: Implement i/dcache
> > [status, enable, disable]" from this pull request and re- sending it with the next?
> > There are still some points you did not reply to in my comments on v2 of your
> > patch. For example, I think it makes sense to split this patch into multiple
> > patches to make it clearer what it changes. If you want, I can re-send my
> > comments in reply to v3 of your patch :)
> >

In my memory :

In v2
you have some suggestions and I reply as below
http://u-boot.10912.n7.nabble.com/PATCH-v2-riscv-cache-Implement-i-dcache-status-enable-disable-td346350.html

But in v3
I do not remember you have any comments about v3
http://u-boot.10912.n7.nabble.com/PATCH-v3-riscv-cache-Implement-i-dcache-status-enable-disable-td346902.html

Is it right ?

Rick






> > Thank you!
> > Lukas
> >
> >
> > >  arch/nds32/cpu/n1213/start.S                             |  51 ---
> > > -----------
> > >  arch/riscv/Kconfig                                       |  34
> > > ++++++---
> > >  arch/riscv/Makefile                                      |  20
> > > ++++++
> > >  arch/riscv/config.mk                                     |   7 +-
> > >  arch/riscv/cpu/ax25/Kconfig                              |   7 ++
> > >  arch/riscv/cpu/ax25/Makefile                             |   1 +
> > >  arch/riscv/cpu/ax25/cache.c                              |  95
> > > ++++++++++++++++++++++++++
> > >  arch/riscv/cpu/ax25/cpu.c                                |   4 ++
> > >  arch/riscv/cpu/cpu.c                                     |   6 ++
> > >  arch/riscv/cpu/qemu/cpu.c                                |   2 +-
> > >  arch/riscv/cpu/start.S                                   | 344
> > > +++++++++++++++++++++++++++++++++++++++++++++----------------------
> > > -------------------------
> > >  arch/riscv/dts/Makefile                                  |   1 -
> > >  arch/riscv/dts/ae350.dts                                 | 107
> > > +++++++++++++++++++++++++----
> > >  arch/riscv/dts/ae350_32.dts                              | 229
> > > +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
> > >  arch/riscv/dts/ae350_64.dts                              | 229
> > > +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
> > >  arch/riscv/include/asm/barrier.h                         |  67
> > > ++++++++++++++++++
> > >  arch/riscv/include/asm/cache.h                           |   3 +
> > >  arch/riscv/include/asm/io.h                              |  48 +++
> > > ----------
> > >  arch/riscv/include/asm/posix_types.h                     |   6 +-
> > >  arch/riscv/include/asm/types.h                           |   4 ++
> > >  arch/riscv/lib/bootm.c                                   |  97
> > > ++++++++++++++++++--------
> > >  arch/riscv/lib/cache.c                                   |  36
> > > ++++++++--
> > >  arch/riscv/lib/interrupts.c                              |  31
> > > +++++++--
> > >  arch/riscv/lib/setjmp.S                                  |   2 +-
> > >  board/AndesTech/ax25-ae350/ax25-ae350.c                  |   3 +-
> > >  board/armltd/integrator/README                           |   4 +-
> > >  board/emulation/qemu-riscv/Kconfig                       |   2 +
> > >  board/emulation/qemu-riscv/qemu-riscv.c                  |  73
> > > +++++++++++++++++---
> > >  configs/{ax25-ae350_defconfig => a25-ae350_32_defconfig} |   5 +-
> > >  configs/ax25-ae350_64_defconfig                          |  39
> > > +++++++++++
> > >  configs/qemu-riscv32_defconfig                           |   5 +-
> > >  configs/qemu-riscv64_defconfig                           |   7 +-
> > >  doc/README.distro                                        |   3
> > +-
> > >  dts/Makefile                                             |   2 +-
> > >  include/common.h                                         |   5 --
> > >  include/config_distro_bootcmd.h                          |  21 ++++-
> > > -
> > >  include/configs/qemu-riscv.h                             |  28
> > > ++++++++
> > >  include/dm/ofnode.h                                      |  10
> > +++
> > >  scripts/config_whitelist.txt                             |   1 -
> > >  tools/.gitignore                                         |   1 +
> > >  40 files changed, 1271 insertions(+), 369 deletions(-)  create mode
> > > 100644 arch/riscv/cpu/ax25/Kconfig  create mode 100644
> > > arch/riscv/cpu/ax25/cache.c  create mode 100644
> > > arch/riscv/dts/ae350_32.dts  create mode 100644
> > > arch/riscv/dts/ae350_64.dts  create mode 100644
> > > arch/riscv/include/asm/barrier.h  rename configs/{ax25-ae350_defconfig
> > > => a25-ae350_32_defconfig}
> > > (89%)
> > >  create mode 100644 configs/ax25-ae350_64_defconfig
> > > _______________________________________________
> > > U-Boot mailing list
> > > U-Boot at lists.denx.de
> > > https://lists.denx.de/listinfo/u-boot
> CONFIDENTIALITY NOTICE:
>
> This e-mail (and its attachments) may contain confidential and legally privileged information or information protected from disclosure. If you are not the intended recipient, you are hereby notified that any disclosure, copying, distribution, or use of the information contained herein is strictly prohibited. In this case, please immediately notify the sender by return e-mail, delete the message (and any accompanying documents) and destroy all printed hard copies. Thank you for your cooperation.
>
> Copyright ANDES TECHNOLOGY CORPORATION - All Rights Reserved.

[U-Boot] Uboot send pull request

[Rick Chen]

Rick Chen <rickchen36@gmail.com> 於 2018年11月21日 週三 下午4:53寫道：
>
> Bin Meng <bmeng.cn@gmail.com> 於 2018年11月21日 週三 下午3:18寫道：
> >
> > Hi Rick,
> >
> > On Wed, Nov 21, 2018 at 2:00 PM Rick Chen <rickchen36@gmail.com> wrote:
> > >
> > > > >
> > > > > Do any of your above patches get v2 posted? At least I did not see any follow-up
> > > > > response [1] regarding to "riscv: ax25-ae350: Pass dtb address to u-boot with a1
> > > > > register"
> > >
> > > First of all you told me about that
> > > board_fdt_blob_setup() should be completely removed.
> > > Instead the simple fix should be add CONFIG_OF_PRIOR_STAGE
> > > to ax25-ae350_defconfig.
> > >
> > > Then I explain you about that is for booting from flash.
> > > And you said
> > > In this case, we need support OF_CONTROL like other arch, eg:
> > > CONFIG_OF_EMBED and CONFIG_OF_SEPARATE.
> > >
> > > In README, I don't find the limitation about when booting from flash,
> > > it can not use  CONFIG_OF_BOARD.
> > >
> >
> > Correct. However, when ax25-ae350's U-Boot boots from ROM, where does
> > prior_stage_fdt_address get assigned to the ROM address? Besides, this
> > variable is declared in fdtdec.h as follows:
> >
> > #if CONFIG_IS_ENABLED(OF_PRIOR_STAGE)
> > extern phys_addr_t prior_stage_fdt_address;
> > #endif
> >
> > It means only OF_PRIOR_STAGE will use this variable. But in your patch
>
> I have seen that declaration in fdtdec.h
> But I was referred to
> include\configs\bcmstb.h
> extern phys_addr_t prior_stage_fdt_address;
> and that is why I borrow prior_stage_fdt_address.
>
> You do not point out this consideration directly, maybe that is why
> we have some thinking is different.
>
> > this was borrowed to support OF_BOARD, which is confusing I think. If
> > U-Boot boots from reset vector, the canonical way to support DT is via
> > CONFIG_OF_EMBED or CONFIG_OF_SEPARATE.
> >
> > > That is why ax25-ae350 use
> > > CONFIG_OF_BOARD to support boot from RAM and ROM.
> > > It is a flexible approach to meet Andes' HW mechanism.
> > >
> > > I think it is a configuration in ax25-ae350_defconfig.
> > > It will not affect qemu-riscv32(64)_defconfig.
> > >
> >
> > I understand it does not affect qemu riscv board. The thing is that I
> > wasn't clear why you did that way for ax25-ae350.
>
> Actually I just want to remove the redundant code in start.S
> -       li      t0, CONFIG_SYS_SDRAM_BASE
> -       SREG    a2, 0(t0)
> so borrowed prior_stage_fdt_address in CONFIG_OF_BOARD
>

Maybe I can keep CONFIG_SYS_SDRAM_BASE
and modify it as below
       li      t0, CONFIG_SYS_SDRAM_BASE
       SREG    a1, 0(t0)

But it is a little weird here.


>
> Rick
>
>
>
> >
> > > That is why I do not prepare v2 to modify it as
> > > CONFIG_OF_EMBED or CONFIG_OF_SEPARATE
> > > as your willingness.
> > >
> >
> > Regards,
> > Bin

[U-Boot] Uboot send pull request

[Rick Chen]

Bin Meng <bmeng.cn@gmail.com> 於 2018年11月21日 週三 下午3:18寫道：
>
> Hi Rick,
>
> On Wed, Nov 21, 2018 at 2:00 PM Rick Chen <rickchen36@gmail.com> wrote:
> >
> > > >
> > > > Do any of your above patches get v2 posted? At least I did not see any follow-up
> > > > response [1] regarding to "riscv: ax25-ae350: Pass dtb address to u-boot with a1
> > > > register"
> >
> > First of all you told me about that
> > board_fdt_blob_setup() should be completely removed.
> > Instead the simple fix should be add CONFIG_OF_PRIOR_STAGE
> > to ax25-ae350_defconfig.
> >
> > Then I explain you about that is for booting from flash.
> > And you said
> > In this case, we need support OF_CONTROL like other arch, eg:
> > CONFIG_OF_EMBED and CONFIG_OF_SEPARATE.
> >
> > In README, I don't find the limitation about when booting from flash,
> > it can not use  CONFIG_OF_BOARD.
> >
>
> Correct. However, when ax25-ae350's U-Boot boots from ROM, where does
> prior_stage_fdt_address get assigned to the ROM address? Besides, this
> variable is declared in fdtdec.h as follows:
>
> #if CONFIG_IS_ENABLED(OF_PRIOR_STAGE)
> extern phys_addr_t prior_stage_fdt_address;
> #endif
>
> It means only OF_PRIOR_STAGE will use this variable. But in your patch

I have seen that declaration in fdtdec.h
But I was referred to
include\configs\bcmstb.h
extern phys_addr_t prior_stage_fdt_address;
and that is why I borrow prior_stage_fdt_address.

You do not point out this consideration directly, maybe that is why
we have some thinking is different.

> this was borrowed to support OF_BOARD, which is confusing I think. If
> U-Boot boots from reset vector, the canonical way to support DT is via
> CONFIG_OF_EMBED or CONFIG_OF_SEPARATE.
>
> > That is why ax25-ae350 use
> > CONFIG_OF_BOARD to support boot from RAM and ROM.
> > It is a flexible approach to meet Andes' HW mechanism.
> >
> > I think it is a configuration in ax25-ae350_defconfig.
> > It will not affect qemu-riscv32(64)_defconfig.
> >
>
> I understand it does not affect qemu riscv board. The thing is that I
> wasn't clear why you did that way for ax25-ae350.

Actually I just want to remove the redundant code in start.S
-       li      t0, CONFIG_SYS_SDRAM_BASE
-       SREG    a2, 0(t0)
so borrowed prior_stage_fdt_address in CONFIG_OF_BOARD


Rick



>
> > That is why I do not prepare v2 to modify it as
> > CONFIG_OF_EMBED or CONFIG_OF_SEPARATE
> > as your willingness.
> >
>
> Regards,
> Bin

[U-Boot] Uboot send pull request

[Bin Meng]

Hi Rick,

On Wed, Nov 21, 2018 at 2:00 PM Rick Chen <rickchen36@gmail.com> wrote:
>
> > >
> > > Do any of your above patches get v2 posted? At least I did not see any follow-up
> > > response [1] regarding to "riscv: ax25-ae350: Pass dtb address to u-boot with a1
> > > register"
>
> First of all you told me about that
> board_fdt_blob_setup() should be completely removed.
> Instead the simple fix should be add CONFIG_OF_PRIOR_STAGE
> to ax25-ae350_defconfig.
>
> Then I explain you about that is for booting from flash.
> And you said
> In this case, we need support OF_CONTROL like other arch, eg:
> CONFIG_OF_EMBED and CONFIG_OF_SEPARATE.
>
> In README, I don't find the limitation about when booting from flash,
> it can not use  CONFIG_OF_BOARD.
>

Correct. However, when ax25-ae350's U-Boot boots from ROM, where does
prior_stage_fdt_address get assigned to the ROM address? Besides, this
variable is declared in fdtdec.h as follows:

#if CONFIG_IS_ENABLED(OF_PRIOR_STAGE)
extern phys_addr_t prior_stage_fdt_address;
#endif

It means only OF_PRIOR_STAGE will use this variable. But in your patch
this was borrowed to support OF_BOARD, which is confusing I think. If
U-Boot boots from reset vector, the canonical way to support DT is via
CONFIG_OF_EMBED or CONFIG_OF_SEPARATE.

> That is why ax25-ae350 use
> CONFIG_OF_BOARD to support boot from RAM and ROM.
> It is a flexible approach to meet Andes' HW mechanism.
>
> I think it is a configuration in ax25-ae350_defconfig.
> It will not affect qemu-riscv32(64)_defconfig.
>

I understand it does not affect qemu riscv board. The thing is that I
wasn't clear why you did that way for ax25-ae350.

> That is why I do not prepare v2 to modify it as
> CONFIG_OF_EMBED or CONFIG_OF_SEPARATE
> as your willingness.
>

Regards,
Bin

[U-Boot] Uboot send pull request

[Rick Chen]

> >
> > Do any of your above patches get v2 posted? At least I did not see any follow-up
> > response [1] regarding to "riscv: ax25-ae350: Pass dtb address to u-boot with a1
> > register"

First of all you told me about that
board_fdt_blob_setup() should be completely removed.
Instead the simple fix should be add CONFIG_OF_PRIOR_STAGE
to ax25-ae350_defconfig.

Then I explain you about that is for booting from flash.
And you said
In this case, we need support OF_CONTROL like other arch, eg:
CONFIG_OF_EMBED and CONFIG_OF_SEPARATE.

In README, I don't find the limitation about when booting from flash,
it can not use  CONFIG_OF_BOARD.

That is why ax25-ae350 use
CONFIG_OF_BOARD to support boot from RAM and ROM.
It is a flexible approach to meet Andes' HW mechanism.

I think it is a configuration in ax25-ae350_defconfig.
It will not affect qemu-riscv32(64)_defconfig.

That is why I do not prepare v2 to modify it as
CONFIG_OF_EMBED or CONFIG_OF_SEPARATE
as your willingness.

B.R
Rick


> > >
> > > [snip]
> > >
> > > [1] https://lists.denx.de/pipermail/u-boot/2018-October/345903.html
> > >
> > > Regards,
> > > Bin

[U-Boot] Uboot send pull request

[Tom Rini]

On Tue, Nov 20, 2018 at 06:18:07PM +0800, uboot at andestech.com wrote:

>  Hi Tom,
> 
>  Please pull the following patch from u-boot-riscv into your tree.
>  Thanks!
> 
> The following changes since commit d73d81fd85e4a030ade42c4b2d13466d45090aa3:
> 
>   Merge tag 'mips-pull-2018-11-18' of git://git.denx.de/u-boot-mips (2018-11-18 15:47:16 -0500)
> 
> are available in the Git repository at:
> 
>   git://git.denx.de/u-boot-riscv.git
> 
> for you to fetch changes up to f1b8761952aca2cdd91f42dbfd26c656072f2d11:
> 
>   riscv: ax25-ae350: Pass dtb address to u-boot with a1 register (2018-11-20 14:37:31 +0800)
> 
> ----------------------------------------------------------------
> Bin Meng (1):
>       Drop CONFIG_INIT_CRITICAL
> 
> Lukas Auer (26):
>       tools: .gitignore: add prelink-riscv
>       dts: riscv: update makefile to also clean the RISC-V dts directory
>       riscv: rename CPU_RISCV_32/64 to match architecture names ARCH_RV32I/64I
>       riscv: select CONFIG_PHYS_64BIT on RV64I systems
>       riscv: add Kconfig entries for the C and A ISA extensions
>       riscv: set -march and -mabi based on the Kconfig configuration
>       riscv: fix use of incorrectly sized variables
>       riscv: make use of the barrier functions from Linux
>       riscv: do not reimplement generic io functions
>       riscv: complete the list of exception codes
>       riscv: treat undefined exception codes as reserved
>       riscv: hang on unhandled exceptions
>       riscv: implement the invalidate_icache_* functions
>       riscv: fix inconsistent use of spaces and tabs in start.S
>       riscv: align mtvec on a 4-byte boundary
>       riscv: remove unused labels in start.S
>       riscv: do not blindly modify the mstatus CSR
>       riscv: save hart ID and device tree passed by prior boot stage
>       riscv: qemu: use device tree passed by prior boot stage
>       riscv: qemu: support booting Linux
>       riscv: align bootm implementation with that of other architectures
>       distro_bootcmd: add VirtIO distro boot command
>       riscv: qemu: enable distro boot
>       dm: core: add missing prototype for ofnode_read_u64
>       riscv: qemu: detect and boot the kernel passed by QEMU
>       riscv: qemu: clear kernel-start/-end in device tree as workaround for BBL
> 
> Rick Chen (7):
>       riscv: enable -fdata-sections
>       riscv: dts: Sync to Linux Kernel ae350 dts.
>       configs: ax25-ae350: Separate ax25-ae350 for RV32/64I.
>       riscv: dts: Add ae350_32.dts for RV32I
>       configs: ax25-ae350: Enable DISPLAY_CPUINFO & DISPLAY_BOARDINFO
>       riscv: cache: Implement i/dcache [status, enable, disable]
>       riscv: ax25-ae350: Pass dtb address to u-boot with a1 register

Since it seems like there's a lot of relevant feedback on this specific
PR I'm going to wait for that to be addressed or (I suspect more likely)
a new PR to be sent, thanks!

-- 
Tom
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[U-Boot] Uboot send pull request

[Auer, Lukas]

On Tue, 2018-11-20 at 18:18 +0800, uboot at andestech.com wrote:
>  Hi Tom,
> 
>  Please pull the following patch from u-boot-riscv into your tree.
>  Thanks!
> 
> The following changes since commit
> d73d81fd85e4a030ade42c4b2d13466d45090aa3:
> 
>   Merge tag 'mips-pull-2018-11-18' of git://git.denx.de/u-boot-mips
> (2018-11-18 15:47:16 -0500)
> 
> are available in the Git repository at:
> 
>   git://git.denx.de/u-boot-riscv.git
> 
> for you to fetch changes up to
> f1b8761952aca2cdd91f42dbfd26c656072f2d11:
> 
>   riscv: ax25-ae350: Pass dtb address to u-boot with a1 register
> (2018-11-20 14:37:31 +0800)
> 
> ----------------------------------------------------------------
> Bin Meng (1):
>       Drop CONFIG_INIT_CRITICAL
> 
> Lukas Auer (26):
>       tools: .gitignore: add prelink-riscv
>       dts: riscv: update makefile to also clean the RISC-V dts
> directory
>       riscv: rename CPU_RISCV_32/64 to match architecture names
> ARCH_RV32I/64I
>       riscv: select CONFIG_PHYS_64BIT on RV64I systems
>       riscv: add Kconfig entries for the C and A ISA extensions
>       riscv: set -march and -mabi based on the Kconfig configuration
>       riscv: fix use of incorrectly sized variables
>       riscv: make use of the barrier functions from Linux
>       riscv: do not reimplement generic io functions
>       riscv: complete the list of exception codes
>       riscv: treat undefined exception codes as reserved
>       riscv: hang on unhandled exceptions
>       riscv: implement the invalidate_icache_* functions
>       riscv: fix inconsistent use of spaces and tabs in start.S
>       riscv: align mtvec on a 4-byte boundary
>       riscv: remove unused labels in start.S
>       riscv: do not blindly modify the mstatus CSR
>       riscv: save hart ID and device tree passed by prior boot stage
>       riscv: qemu: use device tree passed by prior boot stage
>       riscv: qemu: support booting Linux
>       riscv: align bootm implementation with that of other
> architectures
>       distro_bootcmd: add VirtIO distro boot command
>       riscv: qemu: enable distro boot
>       dm: core: add missing prototype for ofnode_read_u64
>       riscv: qemu: detect and boot the kernel passed by QEMU
>       riscv: qemu: clear kernel-start/-end in device tree as
> workaround for BBL
> 
> Rick Chen (7):
>       riscv: enable -fdata-sections
>       riscv: dts: Sync to Linux Kernel ae350 dts.
>       configs: ax25-ae350: Separate ax25-ae350 for RV32/64I.
>       riscv: dts: Add ae350_32.dts for RV32I
>       configs: ax25-ae350: Enable DISPLAY_CPUINFO & DISPLAY_BOARDINFO
>       riscv: cache: Implement i/dcache [status, enable, disable]
>       riscv: ax25-ae350: Pass dtb address to u-boot with a1 register
> 

Hi Rick,

Thanks for pulling my changes! I have some notes and questions on it.

I can't find all of your patches on the mailing list, for example the
patch "configs: ax25-ae350: Enable DISPLAY_CPUINFO &
DISPLAY_BOARDINFO". Others include changes, which have not been
submitted to the mailing list. Please send all changes to the mailing
list before including them in a pull request. This is really helpful
for me and others, to be able to see if there are any conflicts with
other patches currently under development or with other boards.

Something seems to have gone wrong while applying the patch "riscv:
enable -fdata-sections". This is one of my patches and part of the
patch series.

Can you please consider removing your patch "riscv: cache: Implement
i/dcache [status, enable, disable]" from this pull request and re-
sending it with the next? There are still some points you did not reply
to in my comments on v2 of your patch. For example, I think it makes
sense to split this patch into multiple patches to make it clearer what
it changes. If you want, I can re-send my comments in reply to v3 of
your patch :)

Thank you!
Lukas


>  arch/nds32/cpu/n1213/start.S                             |  51 ---
> -----------
>  arch/riscv/Kconfig                                       |  34
> ++++++---
>  arch/riscv/Makefile                                      |  20
> ++++++
>  arch/riscv/config.mk                                     |   7 +-
>  arch/riscv/cpu/ax25/Kconfig                              |   7 ++
>  arch/riscv/cpu/ax25/Makefile                             |   1 +
>  arch/riscv/cpu/ax25/cache.c                              |  95
> ++++++++++++++++++++++++++
>  arch/riscv/cpu/ax25/cpu.c                                |   4 ++
>  arch/riscv/cpu/cpu.c                                     |   6 ++
>  arch/riscv/cpu/qemu/cpu.c                                |   2 +-
>  arch/riscv/cpu/start.S                                   | 344
> +++++++++++++++++++++++++++++++++++++++++++++----------------------
> -------------------------
>  arch/riscv/dts/Makefile                                  |   1 -
>  arch/riscv/dts/ae350.dts                                 | 107
> +++++++++++++++++++++++++----
>  arch/riscv/dts/ae350_32.dts                              | 229
> +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
>  arch/riscv/dts/ae350_64.dts                              | 229
> +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
>  arch/riscv/include/asm/barrier.h                         |  67
> ++++++++++++++++++
>  arch/riscv/include/asm/cache.h                           |   3 +
>  arch/riscv/include/asm/io.h                              |  48 +++
> ----------
>  arch/riscv/include/asm/posix_types.h                     |   6 +-
>  arch/riscv/include/asm/types.h                           |   4 ++
>  arch/riscv/lib/bootm.c                                   |  97
> ++++++++++++++++++--------
>  arch/riscv/lib/cache.c                                   |  36
> ++++++++--
>  arch/riscv/lib/interrupts.c                              |  31
> +++++++--
>  arch/riscv/lib/setjmp.S                                  |   2 +-
>  board/AndesTech/ax25-ae350/ax25-ae350.c                  |   3 +-
>  board/armltd/integrator/README                           |   4 +-
>  board/emulation/qemu-riscv/Kconfig                       |   2 +
>  board/emulation/qemu-riscv/qemu-riscv.c                  |  73
> +++++++++++++++++---
>  configs/{ax25-ae350_defconfig => a25-ae350_32_defconfig} |   5 +-
>  configs/ax25-ae350_64_defconfig                          |  39
> +++++++++++
>  configs/qemu-riscv32_defconfig                           |   5 +-
>  configs/qemu-riscv64_defconfig                           |   7 +-
>  doc/README.distro                                        |   3 +-
>  dts/Makefile                                             |   2 +-
>  include/common.h                                         |   5 --
>  include/config_distro_bootcmd.h                          |  21 ++++-
> -
>  include/configs/qemu-riscv.h                             |  28
> ++++++++
>  include/dm/ofnode.h                                      |  10 +++
>  scripts/config_whitelist.txt                             |   1 -
>  tools/.gitignore                                         |   1 +
>  40 files changed, 1271 insertions(+), 369 deletions(-)
>  create mode 100644 arch/riscv/cpu/ax25/Kconfig
>  create mode 100644 arch/riscv/cpu/ax25/cache.c
>  create mode 100644 arch/riscv/dts/ae350_32.dts
>  create mode 100644 arch/riscv/dts/ae350_64.dts
>  create mode 100644 arch/riscv/include/asm/barrier.h
>  rename configs/{ax25-ae350_defconfig => a25-ae350_32_defconfig}
> (89%)
>  create mode 100644 configs/ax25-ae350_64_defconfig
> _______________________________________________
> U-Boot mailing list
> U-Boot at lists.denx.de
> https://lists.denx.de/listinfo/u-boot

[U-Boot] Uboot send pull request

[Bin Meng]

Hi Rick,

On Tue, Nov 20, 2018 at 6:33 PM <uboot@andestech.com> wrote:
>
>  Hi Tom,
>
>  Please pull the following patch from u-boot-riscv into your tree.
>  Thanks!
>
> The following changes since commit d73d81fd85e4a030ade42c4b2d13466d45090aa3:
>
>   Merge tag 'mips-pull-2018-11-18' of git://git.denx.de/u-boot-mips (2018-11-18 15:47:16 -0500)
>
> are available in the Git repository at:
>
>   git://git.denx.de/u-boot-riscv.git
>
> for you to fetch changes up to f1b8761952aca2cdd91f42dbfd26c656072f2d11:
>
>   riscv: ax25-ae350: Pass dtb address to u-boot with a1 register (2018-11-20 14:37:31 +0800)
>
> ----------------------------------------------------------------
> Bin Meng (1):
>       Drop CONFIG_INIT_CRITICAL
>
> Lukas Auer (26):
>       tools: .gitignore: add prelink-riscv
>       dts: riscv: update makefile to also clean the RISC-V dts directory
>       riscv: rename CPU_RISCV_32/64 to match architecture names ARCH_RV32I/64I
>       riscv: select CONFIG_PHYS_64BIT on RV64I systems
>       riscv: add Kconfig entries for the C and A ISA extensions
>       riscv: set -march and -mabi based on the Kconfig configuration
>       riscv: fix use of incorrectly sized variables
>       riscv: make use of the barrier functions from Linux
>       riscv: do not reimplement generic io functions
>       riscv: complete the list of exception codes
>       riscv: treat undefined exception codes as reserved
>       riscv: hang on unhandled exceptions
>       riscv: implement the invalidate_icache_* functions
>       riscv: fix inconsistent use of spaces and tabs in start.S
>       riscv: align mtvec on a 4-byte boundary
>       riscv: remove unused labels in start.S
>       riscv: do not blindly modify the mstatus CSR
>       riscv: save hart ID and device tree passed by prior boot stage
>       riscv: qemu: use device tree passed by prior boot stage
>       riscv: qemu: support booting Linux
>       riscv: align bootm implementation with that of other architectures
>       distro_bootcmd: add VirtIO distro boot command
>       riscv: qemu: enable distro boot
>       dm: core: add missing prototype for ofnode_read_u64
>       riscv: qemu: detect and boot the kernel passed by QEMU
>       riscv: qemu: clear kernel-start/-end in device tree as workaround for BBL
>
> Rick Chen (7):
>       riscv: enable -fdata-sections
>       riscv: dts: Sync to Linux Kernel ae350 dts.
>       configs: ax25-ae350: Separate ax25-ae350 for RV32/64I.
>       riscv: dts: Add ae350_32.dts for RV32I
>       configs: ax25-ae350: Enable DISPLAY_CPUINFO & DISPLAY_BOARDINFO
>       riscv: cache: Implement i/dcache [status, enable, disable]
>       riscv: ax25-ae350: Pass dtb address to u-boot with a1 register
>

Do any of your above patches get v2 posted? At least I did not see any
follow-up response [1] regarding to "riscv: ax25-ae350: Pass dtb
address to u-boot with a1 register"

[snip]

[1] https://lists.denx.de/pipermail/u-boot/2018-October/345903.html

Regards,
Bin

[U-Boot] Uboot send pull request

[uboot at andestech.com]

 Hi Tom,

 Please pull the following patch from u-boot-riscv into your tree.
 Thanks!

The following changes since commit d73d81fd85e4a030ade42c4b2d13466d45090aa3:

  Merge tag 'mips-pull-2018-11-18' of git://git.denx.de/u-boot-mips (2018-11-18 15:47:16 -0500)

are available in the Git repository at:

  git://git.denx.de/u-boot-riscv.git

for you to fetch changes up to f1b8761952aca2cdd91f42dbfd26c656072f2d11:

  riscv: ax25-ae350: Pass dtb address to u-boot with a1 register (2018-11-20 14:37:31 +0800)

----------------------------------------------------------------
Bin Meng (1):
      Drop CONFIG_INIT_CRITICAL

Lukas Auer (26):
      tools: .gitignore: add prelink-riscv
      dts: riscv: update makefile to also clean the RISC-V dts directory
      riscv: rename CPU_RISCV_32/64 to match architecture names ARCH_RV32I/64I
      riscv: select CONFIG_PHYS_64BIT on RV64I systems
      riscv: add Kconfig entries for the C and A ISA extensions
      riscv: set -march and -mabi based on the Kconfig configuration
      riscv: fix use of incorrectly sized variables
      riscv: make use of the barrier functions from Linux
      riscv: do not reimplement generic io functions
      riscv: complete the list of exception codes
      riscv: treat undefined exception codes as reserved
      riscv: hang on unhandled exceptions
      riscv: implement the invalidate_icache_* functions
      riscv: fix inconsistent use of spaces and tabs in start.S
      riscv: align mtvec on a 4-byte boundary
      riscv: remove unused labels in start.S
      riscv: do not blindly modify the mstatus CSR
      riscv: save hart ID and device tree passed by prior boot stage
      riscv: qemu: use device tree passed by prior boot stage
      riscv: qemu: support booting Linux
      riscv: align bootm implementation with that of other architectures
      distro_bootcmd: add VirtIO distro boot command
      riscv: qemu: enable distro boot
      dm: core: add missing prototype for ofnode_read_u64
      riscv: qemu: detect and boot the kernel passed by QEMU
      riscv: qemu: clear kernel-start/-end in device tree as workaround for BBL

Rick Chen (7):
      riscv: enable -fdata-sections
      riscv: dts: Sync to Linux Kernel ae350 dts.
      configs: ax25-ae350: Separate ax25-ae350 for RV32/64I.
      riscv: dts: Add ae350_32.dts for RV32I
      configs: ax25-ae350: Enable DISPLAY_CPUINFO & DISPLAY_BOARDINFO
      riscv: cache: Implement i/dcache [status, enable, disable]
      riscv: ax25-ae350: Pass dtb address to u-boot with a1 register

 arch/nds32/cpu/n1213/start.S                             |  51 --------------
 arch/riscv/Kconfig                                       |  34 ++++++---
 arch/riscv/Makefile                                      |  20 ++++++
 arch/riscv/config.mk                                     |   7 +-
 arch/riscv/cpu/ax25/Kconfig                              |   7 ++
 arch/riscv/cpu/ax25/Makefile                             |   1 +
 arch/riscv/cpu/ax25/cache.c                              |  95 ++++++++++++++++++++++++++
 arch/riscv/cpu/ax25/cpu.c                                |   4 ++
 arch/riscv/cpu/cpu.c                                     |   6 ++
 arch/riscv/cpu/qemu/cpu.c                                |   2 +-
 arch/riscv/cpu/start.S                                   | 344 +++++++++++++++++++++++++++++++++++++++++++++-----------------------------------------------
 arch/riscv/dts/Makefile                                  |   1 -
 arch/riscv/dts/ae350.dts                                 | 107 +++++++++++++++++++++++++----
 arch/riscv/dts/ae350_32.dts                              | 229 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
 arch/riscv/dts/ae350_64.dts                              | 229 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
 arch/riscv/include/asm/barrier.h                         |  67 ++++++++++++++++++
 arch/riscv/include/asm/cache.h                           |   3 +
 arch/riscv/include/asm/io.h                              |  48 +++----------
 arch/riscv/include/asm/posix_types.h                     |   6 +-
 arch/riscv/include/asm/types.h                           |   4 ++
 arch/riscv/lib/bootm.c                                   |  97 ++++++++++++++++++--------
 arch/riscv/lib/cache.c                                   |  36 ++++++++--
 arch/riscv/lib/interrupts.c                              |  31 +++++++--
 arch/riscv/lib/setjmp.S                                  |   2 +-
 board/AndesTech/ax25-ae350/ax25-ae350.c                  |   3 +-
 board/armltd/integrator/README                           |   4 +-
 board/emulation/qemu-riscv/Kconfig                       |   2 +
 board/emulation/qemu-riscv/qemu-riscv.c                  |  73 +++++++++++++++++---
 configs/{ax25-ae350_defconfig => a25-ae350_32_defconfig} |   5 +-
 configs/ax25-ae350_64_defconfig                          |  39 +++++++++++
 configs/qemu-riscv32_defconfig                           |   5 +-
 configs/qemu-riscv64_defconfig                           |   7 +-
 doc/README.distro                                        |   3 +-
 dts/Makefile                                             |   2 +-
 include/common.h                                         |   5 --
 include/config_distro_bootcmd.h                          |  21 ++++--
 include/configs/qemu-riscv.h                             |  28 ++++++++
 include/dm/ofnode.h                                      |  10 +++
 scripts/config_whitelist.txt                             |   1 -
 tools/.gitignore                                         |   1 +
 40 files changed, 1271 insertions(+), 369 deletions(-)
 create mode 100644 arch/riscv/cpu/ax25/Kconfig
 create mode 100644 arch/riscv/cpu/ax25/cache.c
 create mode 100644 arch/riscv/dts/ae350_32.dts
 create mode 100644 arch/riscv/dts/ae350_64.dts
 create mode 100644 arch/riscv/include/asm/barrier.h
 rename configs/{ax25-ae350_defconfig => a25-ae350_32_defconfig} (89%)
 create mode 100644 configs/ax25-ae350_64_defconfig

[U-Boot] Uboot send pull request

[Tom Rini]

On Wed, Oct 03, 2018 at 06:16:21PM +0800, uboot at andestech.com wrote:

>  Hi Tom,
> 
>  Please pull the following patch from u-boot-riscv into your tree.
>  Thanks!
> 
> The following changes since commit 592cd5defd4f71d34ffcbd8dd3326bc10f662e20:
> 
>   Merge branch 'master' of git://git.denx.de/u-boot-spi (2018-10-02 17:01:46 -0400)
> 
> are available in the git repository at:
> 
>   git://git.denx.de/u-boot-riscv.git
> 
> for you to fetch changes up to 5845f6612372a63877b2175e058a841e1237ffd6:
> 
>   riscv: allow native compilation (2018-10-03 17:49:44 +0800)
> 

Applied to u-boot/master, thanks!


-- 
Tom
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[U-Boot] Uboot send pull request

[uboot at andestech.com]

 Hi Tom,

 Please pull the following patch from u-boot-riscv into your tree.
 Thanks!

The following changes since commit 592cd5defd4f71d34ffcbd8dd3326bc10f662e20:

  Merge branch 'master' of git://git.denx.de/u-boot-spi (2018-10-02 17:01:46 -0400)

are available in the git repository at:

  git://git.denx.de/u-boot-riscv.git

for you to fetch changes up to 5845f6612372a63877b2175e058a841e1237ffd6:

  riscv: allow native compilation (2018-10-03 17:49:44 +0800)

----------------------------------------------------------------
Bin Meng (17):
      riscv: kconfig: Normalize architecture name spelling
      riscv: Remove setup.h
      riscv: bootm: Correct the 1st kernel argument to hart id
      riscv: Remove mach type
      riscv: cmd: bdinfo: Print the relocation address
      riscv: Move the linker script to the CPU root directory
      riscv: Fix coding style issues in the linker script
      riscv: Explicitly pass -march and -mabi to the compiler
      riscv: Add a helper routine to print CPU information
      riscv: Remove CSR read/write defines in encoding.h
      riscv: bootm: Pass mhartid CSR value to kernel
      riscv: Make start.S available for all targets
      riscv: ae350: Clean up mixed tabs and spaces in the dts
      riscv: kconfig: Select DM and OF_CONTROL
      riscv: kconfig: Imply DM support for some common drivers
      riscv: Add QEMU virt board support
      riscv: Move do_reset() to a common place

Heinrich Schuchardt (1):
      riscv: allow native compilation

Rick Chen (1):
      riscv: cosmetic: Reword do_reset() printf message.

 arch/Kconfig                            |  14 +++++++-
 arch/riscv/Kconfig                      |  10 ++++--
 arch/riscv/Makefile                     |   3 +-
 arch/riscv/config.mk                    |  12 +++----
 arch/riscv/cpu/Makefile                 |   7 ++++
 arch/riscv/cpu/ax25/Makefile            |   2 --
 arch/riscv/cpu/ax25/cpu.c               |   9 ------
 arch/riscv/cpu/cpu.c                    |  49 ++++++++++++++++++++++++++++
 arch/riscv/cpu/qemu/Makefile            |   6 ++++
 arch/riscv/cpu/qemu/cpu.c               |  21 ++++++++++++
 arch/riscv/cpu/qemu/dram.c              |  17 ++++++++++
 arch/riscv/cpu/{ax25 => }/start.S       |   0
 arch/riscv/cpu/{ax25 => }/u-boot.lds    |  60 +++++++++++++++++-----------------
 arch/riscv/dts/ae350.dts                | 177 ++++++++++++++++++++++++++++++++++++++++++++++++++-------------------------------------------------
 arch/riscv/include/asm/bootm.h          |  13 --------
 arch/riscv/include/asm/csr.h            | 124 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
 arch/riscv/include/asm/encoding.h       |  50 +++-------------------------
 arch/riscv/include/asm/mach-types.h     |  29 -----------------
 arch/riscv/include/asm/setup.h          | 194 -------------------------------------------------------------------------------------------------------------
 arch/riscv/include/asm/u-boot.h         |   1 -
 arch/riscv/lib/Makefile                 |   1 +
 arch/riscv/lib/bootm.c                  |  20 ++++--------
 arch/riscv/lib/reset.c                  |  17 ++++++++++
 board/AndesTech/ax25-ae350/ax25-ae350.c |   2 --
 board/emulation/qemu-riscv/Kconfig      |  22 +++++++++++++
 board/emulation/qemu-riscv/MAINTAINERS  |   7 ++++
 board/emulation/qemu-riscv/Makefile     |   5 +++
 board/emulation/qemu-riscv/qemu-riscv.c |  23 +++++++++++++
 cmd/bdinfo.c                            |   3 +-
 configs/ax25-ae350_defconfig            |  10 ------
 configs/qemu-riscv32_defconfig          |   6 ++++
 configs/qemu-riscv64_defconfig          |   7 ++++
 doc/README.qemu-riscv                   |  46 ++++++++++++++++++++++++++
 include/configs/qemu-riscv.h            |  21 ++++++++++++
 34 files changed, 538 insertions(+), 450 deletions(-)
 create mode 100644 arch/riscv/cpu/Makefile
 create mode 100644 arch/riscv/cpu/cpu.c
 create mode 100644 arch/riscv/cpu/qemu/Makefile
 create mode 100644 arch/riscv/cpu/qemu/cpu.c
 create mode 100644 arch/riscv/cpu/qemu/dram.c
 rename arch/riscv/cpu/{ax25 => }/start.S (100%)
 rename arch/riscv/cpu/{ax25 => }/u-boot.lds (54%)
 delete mode 100644 arch/riscv/include/asm/bootm.h
 create mode 100644 arch/riscv/include/asm/csr.h
 delete mode 100644 arch/riscv/include/asm/mach-types.h
 delete mode 100644 arch/riscv/include/asm/setup.h
 create mode 100644 arch/riscv/lib/reset.c
 create mode 100644 board/emulation/qemu-riscv/Kconfig
 create mode 100644 board/emulation/qemu-riscv/MAINTAINERS
 create mode 100644 board/emulation/qemu-riscv/Makefile
 create mode 100644 board/emulation/qemu-riscv/qemu-riscv.c
 create mode 100644 configs/qemu-riscv32_defconfig
 create mode 100644 configs/qemu-riscv64_defconfig
 create mode 100644 doc/README.qemu-riscv
 create mode 100644 include/configs/qemu-riscv.h

[U-Boot] Uboot send pull request

[Tom Rini]

On Wed, May 30, 2018 at 04:33:14PM +0800, uboot at andestech.com wrote:

>  Hi Tom,
> 
>  Please pull the following patch from u-boot-riscv into your tree.
>  Thanks!
> 
> The following changes since commit c3c863880479edeb5b08226e622d13c91326e4a7:
> 
>   add FIT data-position & data-offset property support (2018-05-26 18:19:19 -0400)
> 
> are available in the Git repository at:
> 
>   git://git.denx.de/u-boot-riscv.git
> 
> for you to fetch changes up to 6ffea11b89099d72029bc644f7664736ee7ca667:
> 
>   travis.yml: Support RISC-V 64-bit (2018-05-30 16:21:30 +0800)
> 

Applied to u-boot/master, thanks!


-- 
Tom
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[U-Boot] Uboot send pull request

[uboot at andestech.com]

 Hi Tom,

 Please pull the following patch from u-boot-riscv into your tree.
 Thanks!

The following changes since commit c3c863880479edeb5b08226e622d13c91326e4a7:

  add FIT data-position & data-offset property support (2018-05-26 18:19:19 -0400)

are available in the Git repository at:

  git://git.denx.de/u-boot-riscv.git

for you to fetch changes up to 6ffea11b89099d72029bc644f7664736ee7ca667:

  travis.yml: Support RISC-V 64-bit (2018-05-30 16:21:30 +0800)

----------------------------------------------------------------
Alexander Graf (7):
      riscv: Add setjmp/longjmp code
      riscv: Enable function sections
      riscv: Add EFI application infrastructure
      riscv: Add board_quiesce_devices stub
      efi_loader: Use EFI_CACHELINE_SIZE in the image loader too
      distro: Extend with RISC-V defines
      riscv: nx25: Enable distro boot

Rick Chen (16):
      efi_loader: Enable RISC-V support
      SPDX: Convert single license tags to Linux Kernel style
      riscv: cpu: nx25: Rename as ax25
      board: nx25-ae250: Rename as ax25-ae350
      configs: nx25-ae250:Rename as ax25-ae350
      doc: ae250: Rename as ae350
      configs: ax25-ae350: Set 64-bit as default configuration
      spi: atcspi200: Fix compiler warning
      net: ftmac100: Fix compiler warning
      riscv: dts: Sync DT with Linux Kernel
      mmc: ftsdc010_mci: Sync compatible with DT mmc node
      configs: ax25-ae350: Support cfi flash
      riscv: dts: Support cfi flash
      board: ax25-ae350: Support cfi flash
      mtd: ftsmc020: Drop unsed code
      travis.yml: Support RISC-V 64-bit

 .travis.yml                                                          |   6 ++--
 arch/riscv/Kconfig                                                   |   6 ++--
 arch/riscv/config.mk                                                 |   7 +++-
 arch/riscv/cpu/{nx25 => ax25}/Makefile                               |   0
 arch/riscv/cpu/{nx25 => ax25}/cpu.c                                  |   2 +-
 arch/riscv/cpu/{nx25 => ax25}/start.S                                |   0
 arch/riscv/cpu/{nx25 => ax25}/u-boot.lds                             |  18 +++++++++-
 arch/riscv/dts/Makefile                                              |   2 +-
 arch/riscv/dts/ae250.dts                                             |  97 ---------------------------------------------------
 arch/riscv/dts/ae350.dts                                             | 149 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
 arch/riscv/include/asm/mach-types.h                                  |  10 +++---
 arch/riscv/include/asm/setjmp.h                                      |  25 ++++++++++++++
 arch/riscv/include/asm/u-boot-riscv.h                                |   1 +
 arch/riscv/lib/Makefile                                              |  12 +++++++
 arch/riscv/lib/bootm.c                                               |   4 +++
 arch/riscv/lib/crt0_riscv_efi.S                                      | 151 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
 arch/riscv/lib/elf_riscv32_efi.lds                                   |  71 ++++++++++++++++++++++++++++++++++++++
 arch/riscv/lib/elf_riscv64_efi.lds                                   |  71 ++++++++++++++++++++++++++++++++++++++
 arch/riscv/lib/reloc_riscv_efi.c                                     |  98 ++++++++++++++++++++++++++++++++++++++++++++++++++++
 arch/riscv/lib/setjmp.S                                              |  65 +++++++++++++++++++++++++++++++++++
 board/AndesTech/{nx25-ae250 => ax25-ae350}/Kconfig                   |  10 +++---
 board/AndesTech/ax25-ae350/MAINTAINERS                               |   6 ++++
 board/AndesTech/{nx25-ae250 => ax25-ae350}/Makefile                  |   2 +-
 board/AndesTech/{nx25-ae250/nx25-ae250.c => ax25-ae350/ax25-ae350.c} |  36 ++++++++++++++++++-
 board/AndesTech/nx25-ae250/MAINTAINERS                               |   6 ----
 cmd/Kconfig                                                          |   2 +-
 configs/{nx25-ae250_defconfig => ax25-ae350_defconfig}               |  11 ++++--
 doc/{README.NX25 => README.AX25}                                     |   2 +-
 doc/{README.ae250 => README.ae350}                                   |  34 +++++++++---------
 drivers/mmc/ftsdc010_mci.c                                           |   2 +-
 drivers/mtd/Makefile                                                 |   1 -
 drivers/mtd/ftsmc020.c                                               |  37 --------------------
 drivers/net/ftmac100.c                                               |  14 ++++----
 drivers/spi/atcspi200_spi.c                                          |   6 ++--
 include/config_distro_bootcmd.h                                      |  11 ++++++
 include/configs/{nx25-ae250.h => ax25-ae350.h}                       |  55 +++++++++++++++++++++++++++++
 include/efi_loader.h                                                 |   7 ++++
 lib/efi_loader/Kconfig                                               |   2 +-
 lib/efi_loader/efi_image_loader.c                                    |   2 +-
 lib/efi_loader/efi_runtime.c                                         |  44 ++++++++++++++++++------
 40 files changed, 878 insertions(+), 207 deletions(-)
 rename arch/riscv/cpu/{nx25 => ax25}/Makefile (100%)
 rename arch/riscv/cpu/{nx25 => ax25}/cpu.c (93%)
 rename arch/riscv/cpu/{nx25 => ax25}/start.S (100%)
 rename arch/riscv/cpu/{nx25 => ax25}/u-boot.lds (71%)
 delete mode 100644 arch/riscv/dts/ae250.dts
 create mode 100644 arch/riscv/dts/ae350.dts
 create mode 100644 arch/riscv/include/asm/setjmp.h
 create mode 100644 arch/riscv/lib/crt0_riscv_efi.S
 create mode 100644 arch/riscv/lib/elf_riscv32_efi.lds
 create mode 100644 arch/riscv/lib/elf_riscv64_efi.lds
 create mode 100644 arch/riscv/lib/reloc_riscv_efi.c
 create mode 100644 arch/riscv/lib/setjmp.S
 rename board/AndesTech/{nx25-ae250 => ax25-ae350}/Kconfig (70%)
 create mode 100644 board/AndesTech/ax25-ae350/MAINTAINERS
 rename board/AndesTech/{nx25-ae250 => ax25-ae350}/Makefile (87%)
 rename board/AndesTech/{nx25-ae250/nx25-ae250.c => ax25-ae350/ax25-ae350.c} (70%)
 delete mode 100644 board/AndesTech/nx25-ae250/MAINTAINERS
 rename configs/{nx25-ae250_defconfig => ax25-ae350_defconfig} (78%)
 rename doc/{README.NX25 => README.AX25} (95%)
 rename doc/{README.ae250 => README.ae350} (93%)
 delete mode 100644 drivers/mtd/ftsmc020.c
 rename include/configs/{nx25-ae250.h => ax25-ae350.h} (62%)

[U-Boot] Uboot send pull request

[Tom Rini]

On Tue, May 29, 2018 at 02:56:07PM +0800, uboot at andestech.com wrote:

>  Hi Tom,
> 
>  Please pull the following patch from u-boot-riscv into your tree.
>  Thanks!
> 
> The following changes since commit c3c863880479edeb5b08226e622d13c91326e4a7:
> 
>   add FIT data-position & data-offset property support (2018-05-26 18:19:19 -0400)
> 
> are available in the Git repository at:
> 
>   git://git.denx.de/u-boot-riscv.git
> 
> for you to fetch changes up to 9171ab8836511ab1e65e120b7288acd6d5baac70:
> 
>   mtd: ftsmc020: Drop unsed code (2018-05-29 14:45:04 +0800)
> 

The toolchain that we fetch for travis-ci chokes on this:
https://travis-ci.org/trini/u-boot/jobs/385147373

Please add another commit to fix this, thanks!

-- 
Tom
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[U-Boot] Uboot send pull request

[uboot at andestech.com]

 Hi Tom,

 Please pull the following patch from u-boot-riscv into your tree.
 Thanks!

The following changes since commit c3c863880479edeb5b08226e622d13c91326e4a7:

  add FIT data-position & data-offset property support (2018-05-26 18:19:19 -0400)

are available in the Git repository at:

  git://git.denx.de/u-boot-riscv.git

for you to fetch changes up to 9171ab8836511ab1e65e120b7288acd6d5baac70:

  mtd: ftsmc020: Drop unsed code (2018-05-29 14:45:04 +0800)

----------------------------------------------------------------
Alexander Graf (7):
      riscv: Add setjmp/longjmp code
      riscv: Enable function sections
      riscv: Add EFI application infrastructure
      riscv: Add board_quiesce_devices stub
      efi_loader: Use EFI_CACHELINE_SIZE in the image loader too
      distro: Extend with RISC-V defines
      riscv: nx25: Enable distro boot

Rick Chen (15):
      efi_loader: Enable RISC-V support
      SPDX: Convert single license tags to Linux Kernel style
      riscv: cpu: nx25: Rename as ax25
      board: nx25-ae250: Rename as ax25-ae350
      configs: nx25-ae250:Rename as ax25-ae350
      doc: ae250: Rename as ae350
      configs: ax25-ae350: Set 64-bit as default configuration
      spi: atcspi200: Fix compiler warning
      net: ftmac100: Fix compiler warning
      riscv: dts: Sync DT with Linux Kernel
      mmc: ftsdc010_mci: Sync compatible with DT mmc node
      configs: ax25-ae350: Support cfi flash
      riscv: dts: Support cfi flash
      board: ax25-ae350: Support cfi flash
      mtd: ftsmc020: Drop unsed code

 arch/riscv/Kconfig                                                   |   6 ++--
 arch/riscv/config.mk                                                 |   7 +++-
 arch/riscv/cpu/{nx25 => ax25}/Makefile                               |   0
 arch/riscv/cpu/{nx25 => ax25}/cpu.c                                  |   2 +-
 arch/riscv/cpu/{nx25 => ax25}/start.S                                |   0
 arch/riscv/cpu/{nx25 => ax25}/u-boot.lds                             |  18 +++++++++-
 arch/riscv/dts/Makefile                                              |   2 +-
 arch/riscv/dts/ae250.dts                                             |  97 ---------------------------------------------------
 arch/riscv/dts/ae350.dts                                             | 149 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
 arch/riscv/include/asm/mach-types.h                                  |  10 +++---
 arch/riscv/include/asm/setjmp.h                                      |  25 ++++++++++++++
 arch/riscv/include/asm/u-boot-riscv.h                                |   1 +
 arch/riscv/lib/Makefile                                              |  12 +++++++
 arch/riscv/lib/bootm.c                                               |   4 +++
 arch/riscv/lib/crt0_riscv_efi.S                                      | 151 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
 arch/riscv/lib/elf_riscv32_efi.lds                                   |  71 ++++++++++++++++++++++++++++++++++++++
 arch/riscv/lib/elf_riscv64_efi.lds                                   |  71 ++++++++++++++++++++++++++++++++++++++
 arch/riscv/lib/reloc_riscv_efi.c                                     |  98 ++++++++++++++++++++++++++++++++++++++++++++++++++++
 arch/riscv/lib/setjmp.S                                              |  65 +++++++++++++++++++++++++++++++++++
 board/AndesTech/{nx25-ae250 => ax25-ae350}/Kconfig                   |  10 +++---
 board/AndesTech/ax25-ae350/MAINTAINERS                               |   6 ++++
 board/AndesTech/{nx25-ae250 => ax25-ae350}/Makefile                  |   2 +-
 board/AndesTech/{nx25-ae250/nx25-ae250.c => ax25-ae350/ax25-ae350.c} |  36 ++++++++++++++++++-
 board/AndesTech/nx25-ae250/MAINTAINERS                               |   6 ----
 cmd/Kconfig                                                          |   2 +-
 configs/{nx25-ae250_defconfig => ax25-ae350_defconfig}               |  11 ++++--
 doc/{README.NX25 => README.AX25}                                     |   2 +-
 doc/{README.ae250 => README.ae350}                                   |  34 +++++++++---------
 drivers/mmc/ftsdc010_mci.c                                           |   2 +-
 drivers/mtd/Makefile                                                 |   1 -
 drivers/mtd/ftsmc020.c                                               |  37 --------------------
 drivers/net/ftmac100.c                                               |  14 ++++----
 drivers/spi/atcspi200_spi.c                                          |   6 ++--
 include/config_distro_bootcmd.h                                      |  11 ++++++
 include/configs/{nx25-ae250.h => ax25-ae350.h}                       |  55 +++++++++++++++++++++++++++++
 include/efi_loader.h                                                 |   7 ++++
 lib/efi_loader/Kconfig                                               |   2 +-
 lib/efi_loader/efi_image_loader.c                                    |   2 +-
 lib/efi_loader/efi_runtime.c                                         |  44 ++++++++++++++++++------
 39 files changed, 875 insertions(+), 204 deletions(-)
 rename arch/riscv/cpu/{nx25 => ax25}/Makefile (100%)
 rename arch/riscv/cpu/{nx25 => ax25}/cpu.c (93%)
 rename arch/riscv/cpu/{nx25 => ax25}/start.S (100%)
 rename arch/riscv/cpu/{nx25 => ax25}/u-boot.lds (71%)
 delete mode 100644 arch/riscv/dts/ae250.dts
 create mode 100644 arch/riscv/dts/ae350.dts
 create mode 100644 arch/riscv/include/asm/setjmp.h
 create mode 100644 arch/riscv/lib/crt0_riscv_efi.S
 create mode 100644 arch/riscv/lib/elf_riscv32_efi.lds
 create mode 100644 arch/riscv/lib/elf_riscv64_efi.lds
 create mode 100644 arch/riscv/lib/reloc_riscv_efi.c
 create mode 100644 arch/riscv/lib/setjmp.S
 rename board/AndesTech/{nx25-ae250 => ax25-ae350}/Kconfig (70%)
 create mode 100644 board/AndesTech/ax25-ae350/MAINTAINERS
 rename board/AndesTech/{nx25-ae250 => ax25-ae350}/Makefile (87%)
 rename board/AndesTech/{nx25-ae250/nx25-ae250.c => ax25-ae350/ax25-ae350.c} (70%)
 delete mode 100644 board/AndesTech/nx25-ae250/MAINTAINERS
 rename configs/{nx25-ae250_defconfig => ax25-ae350_defconfig} (78%)
 rename doc/{README.NX25 => README.AX25} (95%)
 rename doc/{README.ae250 => README.ae350} (93%)
 delete mode 100644 drivers/mtd/ftsmc020.c
 rename include/configs/{nx25-ae250.h => ax25-ae350.h} (62%)

[U-Boot] Uboot send pull request

[Tom Rini]

On Fri, Mar 30, 2018 at 03:05:25PM +0800, uboot at andestech.com wrote:

>  Hi Tom,
> 
>  Please pull the following patch from u-boot-riscv into your tree.
>  Thanks!
> 
> The following changes since commit 81cf7c8d45935a295991fe2cd1df286f0f47511f:
> 
>   Merge git://git.denx.de/u-boot-ubi (2018-03-25 12:02:13 -0400)
> 
> are available in the Git repository at:
> 
>   git://git.denx.de/u-boot-riscv.git
> 
> for you to fetch changes up to d58717e42559189a226ea800173147399c8edef9:
> 
>   riscv: ae250: Support DT provided by the board at runtime (2018-03-30 13:13:56 +0800)
> 

Applied to u-boot/master, thanks!


-- 
Tom
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[U-Boot] Uboot send pull request

[uboot at andestech.com]

 Hi Tom,

 Please pull the following patch from u-boot-riscv into your tree.
 Thanks!

The following changes since commit 81cf7c8d45935a295991fe2cd1df286f0f47511f:

  Merge git://git.denx.de/u-boot-ubi (2018-03-25 12:02:13 -0400)

are available in the Git repository at:

  git://git.denx.de/u-boot-riscv.git

for you to fetch changes up to d58717e42559189a226ea800173147399c8edef9:

  riscv: ae250: Support DT provided by the board at runtime (2018-03-30 13:13:56 +0800)

----------------------------------------------------------------
Rick Chen (20):
      riscv: checkpatch: Fix Macro argument reuse
      riscv: checkpatch: Fix use of volatile
      riscv: checkpatch: Fix alignment should match open parenthesis
      riscv: checkpatch: Fix missing a blank line after declarations
      riscv: checkpatch: Fix static const char * array declarations
      riscv: bootm: Support to boot riscv-linux
      riscv: bootm: Remove ATAGS
      tools: mkimage: Support RISC-V arch
      doc: ae250: Describe riscv-linux booting via u-boot
      mmc: ftsdc010: Support High-Speed mode
      riscv: dts: AE250 support sd High-Speed mode
      nds32: dts: AG101P support sd High-Speed mode
      mmc: ftsdc010: Drop non-dm code
      board: Drop ftsdc010 non-dm code
      Drop CONFIG_FTSDC010_BASE
      Drop CONFIG_FTSDC010_NUMBER
      mmc: ftsdc010: Migrate CONFIG_FTSDC010_SDIO to Kconfig
      mmc: ftsdc010: Merge nds32_mmc to ftsdc010
      configs: Drop CONFIG_MMC_NDS32
      riscv: ae250: Support DT provided by the board at runtime

 arch/nds32/dts/ag101p.dts                 |   1 +
 arch/nds32/include/asm/arch-ae3xx/ae3xx.h |   2 -
 arch/nds32/include/asm/arch-ag101/ag101.h |   2 -
 arch/nds32/include/asm/arch-ag102/ag102.h |   2 -
 arch/riscv/cpu/nx25/start.S               |   2 +
 arch/riscv/dts/ae250.dts                  |   1 +
 arch/riscv/include/asm/bootm.h            |  49 ------------------------
 arch/riscv/include/asm/encoding.h         |  16 +++++---
 arch/riscv/include/asm/global_data.h      |   2 +-
 arch/riscv/include/asm/io.h               |  23 +++++-------
 arch/riscv/include/asm/posix_types.h      |  12 ++++--
 arch/riscv/include/asm/ptrace.h           |   9 ++---
 arch/riscv/include/asm/setup.h            |  10 +++--
 arch/riscv/include/asm/string.h           |  12 ++++--
 arch/riscv/lib/bootm.c                    | 185 +++---------------------------------------------------------------------------------------
 arch/riscv/lib/interrupts.c               |   2 +-
 board/AndesTech/adp-ae3xx/adp-ae3xx.c     |  11 ------
 board/AndesTech/adp-ag101p/adp-ag101p.c   |  11 ------
 board/AndesTech/nx25-ae250/nx25-ae250.c   |  14 +++----
 common/image.c                            |   1 +
 configs/adp-ae3xx_defconfig               |   2 +-
 configs/adp-ag101p_defconfig              |   2 +-
 configs/nx25-ae250_defconfig              |   3 +-
 doc/README.ae250                          | 148 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++---
 drivers/mmc/Kconfig                       |  14 +++----
 drivers/mmc/Makefile                      |   1 -
 drivers/mmc/ftsdc010_mci.c                | 219 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++----------------------------------------------
 drivers/mmc/ftsdc010_mci.h                |  15 --------
 drivers/mmc/nds32_mmc.c                   | 136 ------------------------------------------------------------------
 include/configs/adp-ae3xx.h               |   6 ---
 include/configs/adp-ag101p.h              |   6 ---
 include/configs/nx25-ae250.h              |  18 ++-------
 scripts/config_whitelist.txt              |   4 --
 33 files changed, 347 insertions(+), 594 deletions(-)
 delete mode 100644 drivers/mmc/nds32_mmc.c

[U-Boot] Uboot send pull request

[Tom Rini]

On Thu, Nov 30, 2017 at 10:35:57AM +0800, uboot at andestech.com wrote:

>  Hi Tom,
> 
>  Please pull the following patch from u-boot-nds32 into your tree.
>  Thanks!
> 
> The following changes since commit b06c46de632c55f4c39d404c6f0f65e414b31050:
> 
>   Merge tag 'xilinx-for-v2018.01' of git://www.denx.de/git/u-boot-microblaze (2017-11-29 08:26:07 -0500)
> 
> are available in the git repository at:
> 
> 
>   git://git.denx.de/u-boot-nds32.git
> 
> for you to fetch changes up to 872cd42e706983b2efa928ec038f1f80d5eb5e87:
> 
>   dt-bindings: spi: Add andestech atcspi200 spi binding doc (2017-11-30 09:45:29 +0800)
> 

Applied to u-boot/master, thanks!


-- 
Tom
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[U-Boot] Uboot send pull request

[uboot at andestech.com]

 Hi Tom,

 Please pull the following patch from u-boot-nds32 into your tree.
 Thanks!

The following changes since commit b06c46de632c55f4c39d404c6f0f65e414b31050:

  Merge tag 'xilinx-for-v2018.01' of git://www.denx.de/git/u-boot-microblaze (2017-11-29 08:26:07 -0500)

are available in the git repository at:


  git://git.denx.de/u-boot-nds32.git

for you to fetch changes up to 872cd42e706983b2efa928ec038f1f80d5eb5e87:

  dt-bindings: spi: Add andestech atcspi200 spi binding doc (2017-11-30 09:45:29 +0800)

----------------------------------------------------------------
Rick Chen (9):
      ae3xx: timer: Fix ae3xx timer work abnormal in 64 bit.
      ae3xx: timer: Rename AE3XX to ATCPIT100
      cosmetic: atcpit100_timer: Rename function name as atcpit100
      cosmetic: atcpit100_timer: Use device api to get platdata
      dt-bindings: timer: Add andestech atcpit100 timer
      atcpit100: timer: Remove arch dependency.
      spi: nds_ae3xx: Rename nds_ae3xx_spi as atcspi200_spi
      cosmetic: atcspi200: Rename function name as atcspi200
      dt-bindings: spi: Add andestech atcspi200 spi binding doc

 configs/adp-ae3xx_defconfig                        |    4 +-
 doc/device-tree-bindings/spi/spi-atcspi200.txt     |   37 ++++++++
 doc/device-tree-bindings/timer/atcpit100_timer.txt |   31 +++++++
 drivers/spi/Kconfig                                |   10 +-
 drivers/spi/Makefile                               |    2 +-
 drivers/spi/{nds_ae3xx_spi.c => atcspi200_spi.c}   |   96 ++++++++++----------
 drivers/timer/Kconfig                              |    9 +-
 drivers/timer/Makefile                             |    2 +-
 drivers/timer/{ae3xx_timer.c => atcpit100_timer.c} |   38 ++++----
 9 files changed, 149 insertions(+), 80 deletions(-)
 create mode 100644 doc/device-tree-bindings/spi/spi-atcspi200.txt
 create mode 100644 doc/device-tree-bindings/timer/atcpit100_timer.txt
 rename drivers/spi/{nds_ae3xx_spi.c => atcspi200_spi.c} (80%)
 rename drivers/timer/{ae3xx_timer.c => atcpit100_timer.c} (67%)
warn: No branch of git://git.denx.de/u-boot-nds32.git is at:
warn:   872cd42: dt-bindings: spi: Add andestech atcspi200 spi binding doc

[U-Boot] Uboot send pull request

[Tom Rini]

On Thu, Sep 28, 2017 at 01:25:40PM +0800, uboot at andestech.com wrote:

>  Hi Tom,
> 
>  Please pull the following patch from u-boot-nds32 into your tree.
>  Thanks!
> 
> The following changes since commit 6e9b109aa9bcdd094e77da9fb03de8b44da8eb9d:
> 
>   Merge git://git.denx.de/u-boot-usb (2017-09-27 09:39:48 -0400)
> 
> are available in the git repository at:
> 
> 
>   git://git.denx.de/u-boot-nds32.git master
> 
> for you to fetch changes up to 9c7ffc94dce3d7438a19576a833d96956ca7f3eb:
> 
>   nds32: Fix io.h warning message about readb (2017-09-28 13:16:54 +0800)
> 

Applied to u-boot/master, thanks!

-- 
Tom
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[U-Boot] Uboot send pull request

[uboot at andestech.com]

 Hi Tom,

 Please pull the following patch from u-boot-nds32 into your tree.
 Thanks!

The following changes since commit 6e9b109aa9bcdd094e77da9fb03de8b44da8eb9d:

  Merge git://git.denx.de/u-boot-usb (2017-09-27 09:39:48 -0400)

are available in the git repository at:


  git://git.denx.de/u-boot-nds32.git master

for you to fetch changes up to 9c7ffc94dce3d7438a19576a833d96956ca7f3eb:

  nds32: Fix io.h warning message about readb (2017-09-28 13:16:54 +0800)

----------------------------------------------------------------
rick (1):
      nds32: Fix io.h warning message about readb

 arch/nds32/include/asm/io.h |   12 ++++++------
 1 file changed, 6 insertions(+), 6 deletions(-)

[U-Boot] Uboot send pull request

[Tom Rini]

On Thu, Sep 21, 2017 at 10:45:08AM +0800, uboot at andestech.com wrote:

>  Hi Tom,
> 
>  Please pull the following patch from u-boot-nds32 into your tree.
>  Thanks!
> 
> The following changes since commit e884656c2c0b2406b9bf99ea76f5a8c75128a331:
> 
>   Merge git://www.denx.de/git/u-boot-imx (2017-09-20 12:32:34 -0400)
> 
> are available in the git repository at:
> 
> 
>   git://git.denx.de/u-boot-nds32.git master
> 
> for you to fetch changes up to 7155cd2e6e7824ab60fbfc755d546d45b1d15e7b:
> 
>   nds32: spi: Support spi dm driver. (2017-09-21 10:30:22 +0800)
> 

Applied to u-boot/master, thanks!


-- 
Tom
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[U-Boot] Uboot send pull request

[uboot at andestech.com]

 Hi Tom,

 Please pull the following patch from u-boot-nds32 into your tree.
 Thanks!

The following changes since commit e884656c2c0b2406b9bf99ea76f5a8c75128a331:

  Merge git://www.denx.de/git/u-boot-imx (2017-09-20 12:32:34 -0400)

are available in the git repository at:


  git://git.denx.de/u-boot-nds32.git master

for you to fetch changes up to 7155cd2e6e7824ab60fbfc755d546d45b1d15e7b:

  nds32: spi: Support spi dm driver. (2017-09-21 10:30:22 +0800)

----------------------------------------------------------------
rick (8):
      nds32: board: Fix andestech adp-ae3xx.c make fail problem.
      nds32: bootm: Fix warning of struct tag_serialnr declared
      nds32: ftmac100: support cache enable.
      nds32: ftmac100 support cache enable.
      nds32: ftmac100: Fix write mac addr fail problem.
      nds32: mtd: add spi flash id MX25U16335E.
      nds32: board: Support SPI driver.
      nds32: spi: Support spi dm driver.

 arch/nds32/cpu/n1213/start.S          |   29 +-
 arch/nds32/dts/ae3xx.dts              |   23 ++
 arch/nds32/include/asm/bootm.h        |    2 +
 arch/nds32/include/asm/io.h           |   21 ++
 arch/nds32/lib/bootm.c                |    1 -
 board/AndesTech/adp-ae3xx/adp-ae3xx.c |    1 +
 configs/adp-ae3xx_defconfig           |   10 +-
 drivers/mtd/spi/spi_flash_ids.c       |    1 +
 drivers/net/ftmac100.c                |   12 +-
 drivers/spi/Kconfig                   |    7 +
 drivers/spi/Makefile                  |    1 +
 drivers/spi/nds_ae3xx_spi.c           |  499 +++++++++++++++++++++++++++++++++
 include/configs/adp-ae3xx.h           |   18 +-
 include/configs/adp-ag101p.h          |    3 +-
 14 files changed, 615 insertions(+), 13 deletions(-)
 create mode 100644 drivers/spi/nds_ae3xx_spi.c

[U-Boot] Uboot send pull request

[Tom Rini]

On Wed, Sep 13, 2017 at 09:39:10AM +0800, uboot at andestech.com wrote:

>  Hi Tom,
> 
>  Please pull the following patch from u-boot-nds32 into your tree.
>  Thanks!
> 
> The following changes since commit 8a33cb8b6bdf8a35f931fcc3d8aa15254cfc4b23:
> 
>   Merge git://git.denx.de/u-boot-fsl-qoriq (2017-09-12 12:02:50 -0400)
> 
> are available in the git repository at:
> 
> 
>   git://git.denx.de/u-boot-nds32.git master
> 
> for you to fetch changes up to 2d7417f517d734b53b6f1906d9b28cdcaf0cb7eb:
> 
>   nds32: bootm: Fix warning of struct tag_serialnr declared (2017-09-13 09:20:52 +0800)
> 
> ----------------------------------------------------------------
> rick (2):
>       nds32: board: Fix andestech adp-ae3xx.c make fail problem.
>       nds32: bootm: Fix warning of struct tag_serialnr declared
> 
>  arch/nds32/include/asm/bootm.h        |    2 ++
>  arch/nds32/lib/bootm.c                |    1 -
>  board/AndesTech/adp-ae3xx/adp-ae3xx.c |    1 +
>  3 files changed, 3 insertions(+), 1 deletion(-)

These patches haven't been posted for even 24 hours I think.  I'm going
to look at this PR next week, so that if people want, they can comment
on them.  Thanks!

-- 
Tom
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[U-Boot] Uboot send pull request

[uboot at andestech.com]

 Hi Tom,

 Please pull the following patch from u-boot-nds32 into your tree.
 Thanks!

The following changes since commit 8a33cb8b6bdf8a35f931fcc3d8aa15254cfc4b23:

  Merge git://git.denx.de/u-boot-fsl-qoriq (2017-09-12 12:02:50 -0400)

are available in the git repository at:


  git://git.denx.de/u-boot-nds32.git master

for you to fetch changes up to 2d7417f517d734b53b6f1906d9b28cdcaf0cb7eb:

  nds32: bootm: Fix warning of struct tag_serialnr declared (2017-09-13 09:20:52 +0800)

----------------------------------------------------------------
rick (2):
      nds32: board: Fix andestech adp-ae3xx.c make fail problem.
      nds32: bootm: Fix warning of struct tag_serialnr declared

 arch/nds32/include/asm/bootm.h        |    2 ++
 arch/nds32/lib/bootm.c                |    1 -
 board/AndesTech/adp-ae3xx/adp-ae3xx.c |    1 +
 3 files changed, 3 insertions(+), 1 deletion(-)

[U-Boot] Uboot send pull request

[uboot at andestech.com]

 Hi Tom,

 Please pull the following patch from u-boot-nds32 into your tree.
 Thanks!

The following changes since commit ccbbada0a59fead35495409d0c2c7bcb22a40278:

  Merge branch 'master' of git://git.denx.de/u-boot-mmc (2017-05-30 14:07:23 -0400)

are available in the git repository at:


  git://git.denx.de/u-boot-nds32.git master

for you to fetch changes up to 4099090fd0ed9c03d6b90c1382921e7184946878:

  nds32: board: Support ftsdc010 DM. (2017-06-01 09:11:19 +0800)

----------------------------------------------------------------
rick (3):
      nds32: mmc: Support ftsdc010 DM.
      nds32: dts: Support ftsdc010 DM.
      nds32: board: Support ftsdc010 DM.

 arch/nds32/dts/ae3xx.dts                |    8 ++
 arch/nds32/dts/ag101p.dts               |    8 ++
 board/AndesTech/adp-ae3xx/adp-ae3xx.c   |    4 +-
 board/AndesTech/adp-ag101p/adp-ag101p.c |    7 +-
 configs/adp-ae3xx_defconfig             |    5 ++
 configs/adp-ag101p_defconfig            |    5 ++
 drivers/mmc/Kconfig                     |   12 +++
 drivers/mmc/Makefile                    |    1 +
 drivers/mmc/ftsdc010_mci.c              |  140 ++++++++++++++++++++++++-------
 drivers/mmc/ftsdc010_mci.h              |   54 ++++++++++++
 drivers/mmc/nds32_mmc.c                 |  139 ++++++++++++++++++++++++++++++
 include/configs/adp-ae3xx.h             |    1 -
 include/configs/adp-ag101p.h            |    1 -
 13 files changed, 344 insertions(+), 41 deletions(-)
 create mode 100644 drivers/mmc/ftsdc010_mci.h
 create mode 100644 drivers/mmc/nds32_mmc.c

[U-Boot] Uboot send pull request

[Tom Rini]

On Wed, May 24, 2017 at 09:36:29AM +0800, uboot at andestech.com wrote:

>  Hi Tom,
> 
>  Please pull the following patch from u-boot-nds32 into your tree.
>  Thanks!
> 
> The following changes since commit be71a179bdd935336fb0bee8283be729144ac965:
> 
>   nds32: eth: Support ftmac100 DM. (2017-05-23 13:48:27 +0800)
> 
> are available in the git repository at:
> 
>   git://git.denx.de/u-boot-nds32.git master
> 
> for you to fetch changes up to be71a179bdd935336fb0bee8283be729144ac965:
> 
>   nds32: eth: Support ftmac100 DM. (2017-05-23 13:48:27 +0800)

Applied to u-boot/master, thanks!

-- 
Tom
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[U-Boot] Uboot send pull request

[uboot at andestech.com]

 Hi Tom,

 Please pull the following patch from u-boot-nds32 into your tree.
 Thanks!

The following changes since commit be71a179bdd935336fb0bee8283be729144ac965:

  nds32: eth: Support ftmac100 DM. (2017-05-23 13:48:27 +0800)

are available in the git repository at:

  git://git.denx.de/u-boot-nds32.git master

for you to fetch changes up to be71a179bdd935336fb0bee8283be729144ac965:

  nds32: eth: Support ftmac100 DM. (2017-05-23 13:48:27 +0800)

[U-Boot] Uboot send pull request

[Tom Rini]

On Mon, May 22, 2017 at 03:00:29PM +0800, uboot at andestech.com wrote:

>  Hi Tom,
> 
>  Please pull the following patch from u-boot-nds32 into your tree.
>  Thanks!
> 
> The following changes since commit 86132af799d51e8e94d87dc56a071f325f369e0c:
> 
>   nds32: Support AG101P serial DM. (2017-05-22 14:05:33 +0800)
> 
> are available in the git repository at:
> 
>   git://git.denx.de/u-boot-nds32.git master
> 
> for you to fetch changes up to b841b6e94662b3b21a56d6ecaab64dcdfb0d311c:
> 
>   nds32: Support AE3XX platform. (2017-05-22 14:05:46 +0800)
> 

Applied to u-boot/master, thanks!


-- 
Tom
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[U-Boot] Uboot send pull request

[uboot at andestech.com]

 Hi Tom,

 Please pull the following patch from u-boot-nds32 into your tree.
 Thanks!

The following changes since commit 86132af799d51e8e94d87dc56a071f325f369e0c:

  nds32: Support AG101P serial DM. (2017-05-22 14:05:33 +0800)

are available in the git repository at:

  git://git.denx.de/u-boot-nds32.git master

for you to fetch changes up to b841b6e94662b3b21a56d6ecaab64dcdfb0d311c:

  nds32: Support AE3XX platform. (2017-05-22 14:05:46 +0800)

----------------------------------------------------------------
rick (2):
      nds32: Support AG101P timer DM.
      nds32: Support AE3XX platform.

 arch/nds32/Kconfig                         |    4 +
 arch/nds32/cpu/n1213/Makefile              |    1 +
 arch/nds32/cpu/n1213/ae3xx/Makefile        |   18 ++
 arch/nds32/cpu/n1213/ae3xx/cpu.c           |   45 +++++
 arch/nds32/cpu/n1213/ae3xx/lowlevel_init.S |  148 ++++++++++++++++
 arch/nds32/cpu/n1213/ae3xx/timer.c         |   16 ++
 arch/nds32/cpu/n1213/ae3xx/watchdog.S      |   17 ++
 arch/nds32/cpu/n1213/ag101/Makefile        |    3 -
 arch/nds32/cpu/n1213/ag101/cpu.c           |    8 +-
 arch/nds32/cpu/n1213/ag101/lowlevel_init.S |   59 +++----
 arch/nds32/cpu/n1213/ag101/timer.c         |    3 +-
 arch/nds32/cpu/n1213/start.S               |   40 ++++-
 arch/nds32/dts/Makefile                    |    1 +
 arch/nds32/dts/ae3xx.dts                   |   65 +++++++
 arch/nds32/dts/ag101p.dts                  |    8 +
 arch/nds32/include/asm/arch-ae3xx/ae3xx.h  |   54 ++++++
 arch/nds32/include/asm/bootm.h             |   65 +++++++
 arch/nds32/include/asm/cache.h             |   23 ++-
 arch/nds32/include/asm/mach-types.h        |    1 +
 arch/nds32/lib/Makefile                    |    1 +
 arch/nds32/lib/boot.c                      |   20 +++
 arch/nds32/lib/bootm.c                     |   23 ++-
 arch/nds32/lib/cache.c                     |  197 +++++++++++++++++----
 board/AndesTech/adp-ae3xx/Kconfig          |   18 ++
 board/AndesTech/adp-ae3xx/MAINTAINERS      |    6 +
 board/AndesTech/adp-ae3xx/Makefile         |    8 +
 board/AndesTech/adp-ae3xx/adp-ae3xx.c      |   86 +++++++++
 board/AndesTech/adp-ag101p/adp-ag101p.c    |    9 +-
 configs/adp-ae3xx_defconfig                |   25 +++
 configs/adp-ag101p_defconfig               |    3 +
 drivers/timer/Kconfig                      |   12 ++
 drivers/timer/Makefile                     |    2 +
 drivers/timer/ae3xx_timer.c                |  117 +++++++++++++
 drivers/timer/ag101p_timer.c               |  122 +++++++++++++
 include/configs/adp-ae3xx.h                |  260 ++++++++++++++++++++++++++++
 include/configs/adp-ag101p.h               |   27 ++-
 36 files changed, 1403 insertions(+), 112 deletions(-)
 create mode 100644 arch/nds32/cpu/n1213/ae3xx/Makefile
 create mode 100644 arch/nds32/cpu/n1213/ae3xx/cpu.c
 create mode 100644 arch/nds32/cpu/n1213/ae3xx/lowlevel_init.S
 create mode 100644 arch/nds32/cpu/n1213/ae3xx/timer.c
 create mode 100644 arch/nds32/cpu/n1213/ae3xx/watchdog.S
 create mode 100644 arch/nds32/dts/ae3xx.dts
 create mode 100644 arch/nds32/include/asm/arch-ae3xx/ae3xx.h
 create mode 100644 arch/nds32/include/asm/bootm.h
 create mode 100644 arch/nds32/lib/boot.c
 create mode 100644 board/AndesTech/adp-ae3xx/Kconfig
 create mode 100644 board/AndesTech/adp-ae3xx/MAINTAINERS
 create mode 100644 board/AndesTech/adp-ae3xx/Makefile
 create mode 100644 board/AndesTech/adp-ae3xx/adp-ae3xx.c
 create mode 100644 configs/adp-ae3xx_defconfig
 create mode 100644 drivers/timer/ae3xx_timer.c
 create mode 100644 drivers/timer/ag101p_timer.c
 create mode 100644 include/configs/adp-ae3xx.h

[U-Boot] Uboot send pull request

[Tom Rini]

On Fri, Dec 02, 2016 at 06:08:53PM +0900, Jaehoon Chung wrote:
> On 12/02/2016 04:44 PM, uboot at andestech.com wrote:
> >  Hi Tom,
> > 
> >  Please pull the following patch from u-boot-nds32 into your tree.
> >  Thanks!
> > 
> > The following changes since commit 9ae0e14350758e6447c90615ff4df530549a45e2:
> > 
> >   Merge git://www.denx.de/git/u-boot-marvell (2016-12-01 09:24:02 -0500)
> > 
> > are available in the git repository at:
> > 
> > 
> >   git://git.denx.de/u-boot-nds32.git master
> > 
> > for you to fetch changes up to 07ce9147e919be25d8928e54b4cd23460ff44a7f:
> > 
> >   nds32: Support eth DM. (2016-12-02 14:46:15 +0800)
> > 
> > ----------------------------------------------------------------
> > rick (6):
> >       nds32: Support serial DM.
> >       nds32: Support timer DM.
> >       nds32: mmc: Support mmc DM.
> >       nds32: mmc: Support mmc DM.
> >       nds32: mmc: Support mmc DM.
> >       nds32: Support eth DM.
> 
> Even though I don't know how Tom thinks about this PR, I don't agree this PR.
> There are no review and ack about your patches.

Indeed, these were just posted and haven't gotten any review comments
from anyone yet, it's a bit too soon to pull, thanks!

-- 
Tom
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[U-Boot] Uboot send pull request

[Jaehoon Chung]

On 12/02/2016 04:44 PM, uboot at andestech.com wrote:
>  Hi Tom,
> 
>  Please pull the following patch from u-boot-nds32 into your tree.
>  Thanks!
> 
> The following changes since commit 9ae0e14350758e6447c90615ff4df530549a45e2:
> 
>   Merge git://www.denx.de/git/u-boot-marvell (2016-12-01 09:24:02 -0500)
> 
> are available in the git repository at:
> 
> 
>   git://git.denx.de/u-boot-nds32.git master
> 
> for you to fetch changes up to 07ce9147e919be25d8928e54b4cd23460ff44a7f:
> 
>   nds32: Support eth DM. (2016-12-02 14:46:15 +0800)
> 
> ----------------------------------------------------------------
> rick (6):
>       nds32: Support serial DM.
>       nds32: Support timer DM.
>       nds32: mmc: Support mmc DM.
>       nds32: mmc: Support mmc DM.
>       nds32: mmc: Support mmc DM.
>       nds32: Support eth DM.

Even though I don't know how Tom thinks about this PR, I don't agree this PR.
There are no review and ack about your patches.

Best Regards,
Jaehoon Chung

> 
>  arch/Kconfig                            |    1 +
>  arch/nds32/cpu/n1213/ag101/timer.c      |    3 +-
>  arch/nds32/cpu/n1213/start.S            |   13 +-
>  arch/nds32/dts/Makefile                 |   14 ++
>  arch/nds32/dts/ag101p.dts               |   71 ++++++++
>  arch/nds32/include/asm/config.h         |    1 +
>  board/AndesTech/adp-ag101p/adp-ag101p.c |    7 +-
>  configs/adp-ag101p_defconfig            |   14 ++
>  drivers/mmc/Kconfig                     |    7 +
>  drivers/mmc/Makefile                    |    1 +
>  drivers/mmc/ftsdc010_mci.c              |  106 +++++++++---
>  drivers/mmc/nds32_mmc.c                 |  140 +++++++++++++++
>  drivers/net/Kconfig                     |    5 +
>  drivers/net/ftmac100.c                  |  281 +++++++++++++++++++++++++------
>  drivers/timer/Kconfig                   |    6 +
>  drivers/timer/Makefile                  |    1 +
>  drivers/timer/ag101p_timer.c            |  122 ++++++++++++++
>  include/configs/adp-ag101p.h            |   14 +-
>  include/faraday/ftsdc010.h              |   41 +++++
>  19 files changed, 752 insertions(+), 96 deletions(-)
>  create mode 100644 arch/nds32/dts/Makefile
>  create mode 100644 arch/nds32/dts/ag101p.dts
>  create mode 100644 drivers/mmc/nds32_mmc.c
>  create mode 100644 drivers/timer/ag101p_timer.c
> _______________________________________________
> U-Boot mailing list
> U-Boot at lists.denx.de
> http://lists.denx.de/mailman/listinfo/u-boot
> 
> 
> 

[U-Boot] Uboot send pull request

[uboot at andestech.com]

 Hi Tom,

 Please pull the following patch from u-boot-nds32 into your tree.
 Thanks!

The following changes since commit 9ae0e14350758e6447c90615ff4df530549a45e2:

  Merge git://www.denx.de/git/u-boot-marvell (2016-12-01 09:24:02 -0500)

are available in the git repository at:


  git://git.denx.de/u-boot-nds32.git master

for you to fetch changes up to 07ce9147e919be25d8928e54b4cd23460ff44a7f:

  nds32: Support eth DM. (2016-12-02 14:46:15 +0800)

----------------------------------------------------------------
rick (6):
      nds32: Support serial DM.
      nds32: Support timer DM.
      nds32: mmc: Support mmc DM.
      nds32: mmc: Support mmc DM.
      nds32: mmc: Support mmc DM.
      nds32: Support eth DM.

 arch/Kconfig                            |    1 +
 arch/nds32/cpu/n1213/ag101/timer.c      |    3 +-
 arch/nds32/cpu/n1213/start.S            |   13 +-
 arch/nds32/dts/Makefile                 |   14 ++
 arch/nds32/dts/ag101p.dts               |   71 ++++++++
 arch/nds32/include/asm/config.h         |    1 +
 board/AndesTech/adp-ag101p/adp-ag101p.c |    7 +-
 configs/adp-ag101p_defconfig            |   14 ++
 drivers/mmc/Kconfig                     |    7 +
 drivers/mmc/Makefile                    |    1 +
 drivers/mmc/ftsdc010_mci.c              |  106 +++++++++---
 drivers/mmc/nds32_mmc.c                 |  140 +++++++++++++++
 drivers/net/Kconfig                     |    5 +
 drivers/net/ftmac100.c                  |  281 +++++++++++++++++++++++++------
 drivers/timer/Kconfig                   |    6 +
 drivers/timer/Makefile                  |    1 +
 drivers/timer/ag101p_timer.c            |  122 ++++++++++++++
 include/configs/adp-ag101p.h            |   14 +-
 include/faraday/ftsdc010.h              |   41 +++++
 19 files changed, 752 insertions(+), 96 deletions(-)
 create mode 100644 arch/nds32/dts/Makefile
 create mode 100644 arch/nds32/dts/ag101p.dts
 create mode 100644 drivers/mmc/nds32_mmc.c
 create mode 100644 drivers/timer/ag101p_timer.c

[U-Boot] Uboot send pull request

[Tom Rini]

On Thu, Jan 21, 2016 at 02:48:11PM +0800, uboot at andestech.com wrote:

>  Hi Tom,
> 
>  Please pull the following patch from u-boot-nds32 into your tree.
>  Thanks!
> 
> The following changes since commit 077678eb0c226e52a1f90edabd3369ab26065b32:
> 
>   Merge git://git.denx.de/u-boot-dm (2016-01-12 18:12:42 -0500)
> 
> are available in the git repository at:
> 
> 
>   git://git.denx.de/u-boot-nds32.git master
> 
> for you to fetch changes up to b19cc6bf2160e09607e141fe0fc571701070d1d6:
> 
>   nds32: Fix compile error. (2016-01-21 10:41:43 +0800)
> 

Applied to u-boot/master, thanks!


-- 
Tom
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[U-Boot] Uboot send pull request

[uboot at andestech.com]

 Hi Tom,

 Please pull the following patch from u-boot-nds32 into your tree.
 Thanks!

The following changes since commit 077678eb0c226e52a1f90edabd3369ab26065b32:

  Merge git://git.denx.de/u-boot-dm (2016-01-12 18:12:42 -0500)

are available in the git repository at:


  git://git.denx.de/u-boot-nds32.git master

for you to fetch changes up to b19cc6bf2160e09607e141fe0fc571701070d1d6:

  nds32: Fix compile error. (2016-01-21 10:41:43 +0800)

----------------------------------------------------------------
rick (1):
      nds32: Fix compile error.

 arch/nds32/cpu/n1213/start.S         |    2 +-
 arch/nds32/include/asm/macro.h       |   22 +++++++++++-----------
 arch/nds32/include/asm/posix_types.h |    4 ++++
 3 files changed, 16 insertions(+), 12 deletions(-)

[U-Boot] Uboot send pull request

[uboot at andestech.com]

 Hi Tom,

 Please pull the following patch from u-boot-nds32 into your tree.
 Thanks!

The following changes since commit 077678eb0c226e52a1f90edabd3369ab26065b32:

  Merge git://git.denx.de/u-boot-dm (2016-01-12 18:12:42 -0500)

are available in the git repository at:


  git://git.denx.de/u-boot-nds32.git master

for you to fetch changes up to b19cc6bf2160e09607e141fe0fc571701070d1d6:

  nds32: Fix compile error. (2016-01-21 10:41:43 +0800)

----------------------------------------------------------------
rick (1):
      nds32: Fix compile error.

 arch/nds32/cpu/n1213/start.S         |    2 +-
 arch/nds32/include/asm/macro.h       |   22 +++++++++++-----------
 arch/nds32/include/asm/posix_types.h |    4 ++++
 3 files changed, 16 insertions(+), 12 deletions(-)

[U-Boot] Uboot send pull request

[uboot at andestech.com]

Hi Tom,

Please pull the following patch from u-boot-nds32 into your tree.
Thanks!

The following changes since commit d05bfd0586ccebe96e31976459c8ef45ec65e109:

  Merge branch 'master' of git://git.denx.de/u-boot-i2c (2013-08-06 09:49:06 -0400)

are available in the git repository at:

  git://git.denx.de/u-boot-nds32.git master

Andes (1):
      nds32: Change of NDS32 Custodian

ken kuo (2):
      nds32: introduce DMA allocation API
      nds32: fix the missing COBJS-y change

 MAINTAINERS                          |    2 +-
 arch/nds32/include/asm/dma-mapping.h |   33 +++++++++++++++++++++++++++++++++
 board/AndesTech/adp-ag102/Makefile   |    2 +-
 3 files changed, 35 insertions(+), 2 deletions(-)
 create mode 100644 arch/nds32/include/asm/dma-mapping.h