[PATCH] mtd: rawnand: stm32_fmc2: add NAND Write Protect support

[PATCH] mtd: rawnand: stm32_fmc2: add NAND Write Protect support

[Christophe Kerello]

This patch adds the support of the WP# signal. WP will be disabled
before the first access to the NAND flash.

Signed-off-by: Christophe Kerello <christophe.kerello@foss.st.com>
---

 drivers/mtd/nand/raw/stm32_fmc2_nand.c | 9 +++++++++
 1 file changed, 9 insertions(+)

diff --git a/drivers/mtd/nand/raw/stm32_fmc2_nand.c b/drivers/mtd/nand/raw/stm32_fmc2_nand.c
index eee65949d77..fb3279b405e 100644
--- a/drivers/mtd/nand/raw/stm32_fmc2_nand.c
+++ b/drivers/mtd/nand/raw/stm32_fmc2_nand.c
@@ -12,6 +12,7 @@
 #include <log.h>
 #include <nand.h>
 #include <reset.h>
+#include <asm/gpio.h>
 #include <dm/device_compat.h>
 #include <linux/bitfield.h>
 #include <linux/bitops.h>
@@ -149,6 +150,7 @@ struct stm32_fmc2_timings {
 struct stm32_fmc2_nand {
 	struct nand_chip chip;
 	struct stm32_fmc2_timings timings;
+	struct gpio_desc wp_gpio;
 	int ncs;
 	int cs_used[FMC2_MAX_CE];
 };
@@ -824,6 +826,9 @@ static int stm32_fmc2_nfc_parse_child(struct stm32_fmc2_nfc *nfc, ofnode node)
 		nand->cs_used[i] = cs[i];
 	}
 
+	gpio_request_by_name_nodev(node, "wp-gpios", 0, &nand->wp_gpio,
+				   GPIOD_IS_OUT | GPIOD_IS_OUT_ACTIVE);
+
 	nand->chip.flash_node = node;
 
 	return 0;
@@ -972,6 +977,10 @@ static int stm32_fmc2_nfc_probe(struct udevice *dev)
 	chip->ecc.size = FMC2_ECC_STEP_SIZE;
 	chip->ecc.strength = FMC2_ECC_BCH8;
 
+	/* Disable Write Protect */
+	if (dm_gpio_is_valid(&nand->wp_gpio))
+		dm_gpio_set_value(&nand->wp_gpio, 0);
+
 	ret = nand_scan_ident(mtd, nand->ncs, NULL);
 	if (ret)
 		return ret;
-- 
2.25.1

Re: [PATCH] mtd: rawnand: stm32_fmc2: add NAND Write Protect support

[Patrice CHOTARD]

Hi Christophe

On 2/22/22 17:38, Christophe Kerello wrote:
> This patch adds the support of the WP# signal. WP will be disabled
> before the first access to the NAND flash.
> 
> Signed-off-by: Christophe Kerello <christophe.kerello@foss.st.com>
> ---
> 
>  drivers/mtd/nand/raw/stm32_fmc2_nand.c | 9 +++++++++
>  1 file changed, 9 insertions(+)
> 
> diff --git a/drivers/mtd/nand/raw/stm32_fmc2_nand.c b/drivers/mtd/nand/raw/stm32_fmc2_nand.c
> index eee65949d77..fb3279b405e 100644
> --- a/drivers/mtd/nand/raw/stm32_fmc2_nand.c
> +++ b/drivers/mtd/nand/raw/stm32_fmc2_nand.c
> @@ -12,6 +12,7 @@
>  #include <log.h>
>  #include <nand.h>
>  #include <reset.h>
> +#include <asm/gpio.h>
>  #include <dm/device_compat.h>
>  #include <linux/bitfield.h>
>  #include <linux/bitops.h>
> @@ -149,6 +150,7 @@ struct stm32_fmc2_timings {
>  struct stm32_fmc2_nand {
>  	struct nand_chip chip;
>  	struct stm32_fmc2_timings timings;
> +	struct gpio_desc wp_gpio;
>  	int ncs;
>  	int cs_used[FMC2_MAX_CE];
>  };
> @@ -824,6 +826,9 @@ static int stm32_fmc2_nfc_parse_child(struct stm32_fmc2_nfc *nfc, ofnode node)
>  		nand->cs_used[i] = cs[i];
>  	}
>  
> +	gpio_request_by_name_nodev(node, "wp-gpios", 0, &nand->wp_gpio,
> +				   GPIOD_IS_OUT | GPIOD_IS_OUT_ACTIVE);
> +
>  	nand->chip.flash_node = node;
>  
>  	return 0;
> @@ -972,6 +977,10 @@ static int stm32_fmc2_nfc_probe(struct udevice *dev)
>  	chip->ecc.size = FMC2_ECC_STEP_SIZE;
>  	chip->ecc.strength = FMC2_ECC_BCH8;
>  
> +	/* Disable Write Protect */
> +	if (dm_gpio_is_valid(&nand->wp_gpio))
> +		dm_gpio_set_value(&nand->wp_gpio, 0);
> +
>  	ret = nand_scan_ident(mtd, nand->ncs, NULL);
>  	if (ret)
>  		return ret;
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>

Thanks
Patrice

Re: [PATCH] mtd: rawnand: stm32_fmc2: add NAND Write Protect support

[Patrice CHOTARD]

Hi Christophe

On 2/22/22 17:38, Christophe Kerello wrote:
> This patch adds the support of the WP# signal. WP will be disabled
> before the first access to the NAND flash.
> 
> Signed-off-by: Christophe Kerello <christophe.kerello@foss.st.com>
> ---
> 
>  drivers/mtd/nand/raw/stm32_fmc2_nand.c | 9 +++++++++
>  1 file changed, 9 insertions(+)
> 
> diff --git a/drivers/mtd/nand/raw/stm32_fmc2_nand.c b/drivers/mtd/nand/raw/stm32_fmc2_nand.c
> index eee65949d77..fb3279b405e 100644
> --- a/drivers/mtd/nand/raw/stm32_fmc2_nand.c
> +++ b/drivers/mtd/nand/raw/stm32_fmc2_nand.c
> @@ -12,6 +12,7 @@
>  #include <log.h>
>  #include <nand.h>
>  #include <reset.h>
> +#include <asm/gpio.h>
>  #include <dm/device_compat.h>
>  #include <linux/bitfield.h>
>  #include <linux/bitops.h>
> @@ -149,6 +150,7 @@ struct stm32_fmc2_timings {
>  struct stm32_fmc2_nand {
>  	struct nand_chip chip;
>  	struct stm32_fmc2_timings timings;
> +	struct gpio_desc wp_gpio;
>  	int ncs;
>  	int cs_used[FMC2_MAX_CE];
>  };
> @@ -824,6 +826,9 @@ static int stm32_fmc2_nfc_parse_child(struct stm32_fmc2_nfc *nfc, ofnode node)
>  		nand->cs_used[i] = cs[i];
>  	}
>  
> +	gpio_request_by_name_nodev(node, "wp-gpios", 0, &nand->wp_gpio,
> +				   GPIOD_IS_OUT | GPIOD_IS_OUT_ACTIVE);
> +
>  	nand->chip.flash_node = node;
>  
>  	return 0;
> @@ -972,6 +977,10 @@ static int stm32_fmc2_nfc_probe(struct udevice *dev)
>  	chip->ecc.size = FMC2_ECC_STEP_SIZE;
>  	chip->ecc.strength = FMC2_ECC_BCH8;
>  
> +	/* Disable Write Protect */
> +	if (dm_gpio_is_valid(&nand->wp_gpio))
> +		dm_gpio_set_value(&nand->wp_gpio, 0);
> +
>  	ret = nand_scan_ident(mtd, nand->ncs, NULL);
>  	if (ret)
>  		return ret;

Applied to u-boot-stm32

Thanks
Patrice