* [PATCH v7 0/9] add support for WCN6750
@ 2022-04-29 17:04 ` Manikanta Pubbisetty
0 siblings, 0 replies; 36+ messages in thread
From: Manikanta Pubbisetty @ 2022-04-29 17:04 UTC (permalink / raw)
To: ath11k; +Cc: linux-wireless, devicetree, robh, mka, Manikanta Pubbisetty
WCN6750 is non-DBS 2x2 11AX chipset. Unlike QCA6390/WCN6855 which
are DBS (dual band simultaneous) solutions (2 LMACs), WCN6750 has a
single LMAC supporting 2G, 5G and 6G bands. It can be operated only
on one band at any given point.
WCN6750 is a PCIe device. Unlike other supported ATH11K PCIe devices
which are directly attached to APSS (Application Processor SubSystem),
WCN6750 is not attached to APSS, it is attached to the WPSS
(Wireless Processor SubSystem) Q6 processor, the FW which runs on the
Q6 processor will enumerate the PCIe device. Since APSS is unaware of
such a device, it has to be registered as a platform device(AHB) to the
kernel for device probing. Like other AHB devices, remoteproc APIs are
used to boot up or shutdown of WCN6750.
WCN6750 uses both AHB and PCIe ATH11K APIs for it's operation.
It uses AHB APIs for device probe and booting of the remote processor.
Once device is booted up, it uses ATH11K PCIe APIs for initialization
and register access. Hence, it is referred as hybrid bus device in
the rest of this series.
Since the chip is enumerated by WPSS Q6, device information like
BAR and BAR size is not known to the APSS processor. A new QMI message
called device info QMI request will be sent to the target for fetching
these details.
STA and AP modes are supported; Basic connectivity and ping are
verified in both the modes.
An important point to note is that though WCN6750 is a PCIe device,
it cannot be attached to any other platform except on Qualcomm
Snapdragon SoCs due to the aforementioned reasons.
Tested-on: WCN6750 hw1.0 AHB WLAN.MSL.1.0.1-00887-QCAMSLSWPLZ-1
Tested-on: WCN6855 hw2.0 PCI WLAN.HSP.1.1-01720.1-QCAHSPSWPL_V1_V2_SILICONZ_LITE-1
Tested-on: QCN9074 hw1.0 PCI WLAN.HK.2.5.0.1-01100-QCAHKSWPL_SILICONZ-1
Tested-on: IPQ8074 hw2.0 AHB WLAN.HK.2.4.0.1-00192-QCAHKSWPL_SILICONZ-1
Manikanta Pubbisetty (9):
dt: bindings: net: add bindings of WCN6750 for ath11k
ath11k: Move parameters in bus_params to hw_params
ath11k: Add HW params for WCN6750
ath11k: Add register access logic for WCN6750
ath11k: Fetch device information via QMI for WCN6750
ath11k: Add QMI changes for WCN6750
ath11k: HAL changes to support WCN6750
ath11k: Datapath changes to support WCN6750
ath11k: Add support for WCN6750 device
---
V7:
- Moved bus_params to hw_params (ath11k: Move parameters in bus_params to hw_params)
- Removed patch "ath11k: Add bus params for WCN6750"
- Minor commit log changes
- Rebased on ToT SHAID: cfd3557af835ad2ab2dc8d617ea69aae2067d411
V6:
- Initialized the bus_params fields for AHB/PCI devices which were not previously initialized
- Commit log changes in the patch "ath11k: Datapath changes to support WCN6750"
- Rebased on ToT SHAID: 3637b73b8e805d011202e2bf10947f2d206695d4
V5:
- Rebased on ToT SHAID: 01be26cde012478db958d9bde530877c46031e76
- Added Reviewed-by: tag to the DT binding patch
V4:
- Addressed comments on DT binding (Matthias Kaehlcke <mka@chromium.org>)
- Rebased on ToT SHAID: 607c3dc2750382befa0f3f20063943bd058a2bc1
V3:
- Patch series with 19 patches is split in 2 patch series, this is the second one
- Rebased on ToT SHAID: 7316a74e54318d0cd648242b18ea83cdef6dda96
- Addessed DT binding concerns
- PCI common code is moved to ath11k.ko
- Added a new HW param for WCN6750 which uses fixed firmware memory, this is
needed to differentiate WCN6750 from other ATH11K chipsets
- Modified the logic in patch "ath11k: Add support for WCN6750 device" based on the latest DT binding
V2:
- Rebased on ToT
- Addressed comments on DT binding
.../bindings/net/wireless/qcom,ath11k.yaml | 361 ++++++++++++------
drivers/net/wireless/ath/ath11k/Makefile | 5 +-
drivers/net/wireless/ath/ath11k/ahb.c | 153 +++++++-
drivers/net/wireless/ath/ath11k/core.c | 125 +++++-
drivers/net/wireless/ath/ath11k/core.h | 14 +-
drivers/net/wireless/ath/ath11k/hal.c | 15 +-
drivers/net/wireless/ath/ath11k/hal.h | 15 +-
drivers/net/wireless/ath/ath11k/hw.c | 166 ++++++++
drivers/net/wireless/ath/ath11k/hw.h | 18 +
drivers/net/wireless/ath/ath11k/pci.c | 14 +-
drivers/net/wireless/ath/ath11k/pcic.c | 77 ++--
drivers/net/wireless/ath/ath11k/qmi.c | 242 ++++++++++--
drivers/net/wireless/ath/ath11k/qmi.h | 26 +-
13 files changed, 984 insertions(+), 247 deletions(-)
--
2.35.1
--
ath11k mailing list
ath11k@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/ath11k
^ permalink raw reply [flat|nested] 36+ messages in thread
* [PATCH v7 1/9] dt: bindings: net: add bindings of WCN6750 for ath11k
2022-04-29 17:04 ` Manikanta Pubbisetty
@ 2022-04-29 17:04 ` Manikanta Pubbisetty
-1 siblings, 0 replies; 36+ messages in thread
From: Manikanta Pubbisetty @ 2022-04-29 17:04 UTC (permalink / raw)
To: ath11k; +Cc: linux-wireless, devicetree, robh, mka, Manikanta Pubbisetty
WCN6750 is the WLAN chip on Qualcomm Snapdragon SoC SC7280;
Though being a PCIe based solution, it is not attached to
the APSS processor (Application Processor SubSystem), it is
instead attached to another tiny processor called WPSS Q6
processor (Wireless Processor SubSystem) on the SC7280 MSM,
where the WLAN firmware runs, and it is the WLAN firmware
running on the Q6 processor which enumerates WCN6750, as a
result APPS processor would never know such a device being
present in the system and would not detect the WCN6750
hardware unless and otherwise WCN6750 is registered as a
platform device. This is the reason behind adding WCN6750
WLAN node in the device tree.
Add WCN6750 wireless driver support, its based on ath11k driver.
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Manikanta Pubbisetty <quic_mpubbise@quicinc.com>
---
.../bindings/net/wireless/qcom,ath11k.yaml | 361 ++++++++++++------
1 file changed, 252 insertions(+), 109 deletions(-)
diff --git a/Documentation/devicetree/bindings/net/wireless/qcom,ath11k.yaml b/Documentation/devicetree/bindings/net/wireless/qcom,ath11k.yaml
index cdf7b873b419..6b32caa8311c 100644
--- a/Documentation/devicetree/bindings/net/wireless/qcom,ath11k.yaml
+++ b/Documentation/devicetree/bindings/net/wireless/qcom,ath11k.yaml
@@ -20,120 +20,17 @@ properties:
enum:
- qcom,ipq8074-wifi
- qcom,ipq6018-wifi
+ - qcom,wcn6750-wifi
reg:
maxItems: 1
interrupts:
- items:
- - description: misc-pulse1 interrupt events
- - description: misc-latch interrupt events
- - description: sw exception interrupt events
- - description: watchdog interrupt events
- - description: interrupt event for ring CE0
- - description: interrupt event for ring CE1
- - description: interrupt event for ring CE2
- - description: interrupt event for ring CE3
- - description: interrupt event for ring CE4
- - description: interrupt event for ring CE5
- - description: interrupt event for ring CE6
- - description: interrupt event for ring CE7
- - description: interrupt event for ring CE8
- - description: interrupt event for ring CE9
- - description: interrupt event for ring CE10
- - description: interrupt event for ring CE11
- - description: interrupt event for ring host2wbm-desc-feed
- - description: interrupt event for ring host2reo-re-injection
- - description: interrupt event for ring host2reo-command
- - description: interrupt event for ring host2rxdma-monitor-ring3
- - description: interrupt event for ring host2rxdma-monitor-ring2
- - description: interrupt event for ring host2rxdma-monitor-ring1
- - description: interrupt event for ring reo2ost-exception
- - description: interrupt event for ring wbm2host-rx-release
- - description: interrupt event for ring reo2host-status
- - description: interrupt event for ring reo2host-destination-ring4
- - description: interrupt event for ring reo2host-destination-ring3
- - description: interrupt event for ring reo2host-destination-ring2
- - description: interrupt event for ring reo2host-destination-ring1
- - description: interrupt event for ring rxdma2host-monitor-destination-mac3
- - description: interrupt event for ring rxdma2host-monitor-destination-mac2
- - description: interrupt event for ring rxdma2host-monitor-destination-mac1
- - description: interrupt event for ring ppdu-end-interrupts-mac3
- - description: interrupt event for ring ppdu-end-interrupts-mac2
- - description: interrupt event for ring ppdu-end-interrupts-mac1
- - description: interrupt event for ring rxdma2host-monitor-status-ring-mac3
- - description: interrupt event for ring rxdma2host-monitor-status-ring-mac2
- - description: interrupt event for ring rxdma2host-monitor-status-ring-mac1
- - description: interrupt event for ring host2rxdma-host-buf-ring-mac3
- - description: interrupt event for ring host2rxdma-host-buf-ring-mac2
- - description: interrupt event for ring host2rxdma-host-buf-ring-mac1
- - description: interrupt event for ring rxdma2host-destination-ring-mac3
- - description: interrupt event for ring rxdma2host-destination-ring-mac2
- - description: interrupt event for ring rxdma2host-destination-ring-mac1
- - description: interrupt event for ring host2tcl-input-ring4
- - description: interrupt event for ring host2tcl-input-ring3
- - description: interrupt event for ring host2tcl-input-ring2
- - description: interrupt event for ring host2tcl-input-ring1
- - description: interrupt event for ring wbm2host-tx-completions-ring3
- - description: interrupt event for ring wbm2host-tx-completions-ring2
- - description: interrupt event for ring wbm2host-tx-completions-ring1
- - description: interrupt event for ring tcl2host-status-ring
-
+ minItems: 32
+ maxItems: 52
interrupt-names:
- items:
- - const: misc-pulse1
- - const: misc-latch
- - const: sw-exception
- - const: watchdog
- - const: ce0
- - const: ce1
- - const: ce2
- - const: ce3
- - const: ce4
- - const: ce5
- - const: ce6
- - const: ce7
- - const: ce8
- - const: ce9
- - const: ce10
- - const: ce11
- - const: host2wbm-desc-feed
- - const: host2reo-re-injection
- - const: host2reo-command
- - const: host2rxdma-monitor-ring3
- - const: host2rxdma-monitor-ring2
- - const: host2rxdma-monitor-ring1
- - const: reo2ost-exception
- - const: wbm2host-rx-release
- - const: reo2host-status
- - const: reo2host-destination-ring4
- - const: reo2host-destination-ring3
- - const: reo2host-destination-ring2
- - const: reo2host-destination-ring1
- - const: rxdma2host-monitor-destination-mac3
- - const: rxdma2host-monitor-destination-mac2
- - const: rxdma2host-monitor-destination-mac1
- - const: ppdu-end-interrupts-mac3
- - const: ppdu-end-interrupts-mac2
- - const: ppdu-end-interrupts-mac1
- - const: rxdma2host-monitor-status-ring-mac3
- - const: rxdma2host-monitor-status-ring-mac2
- - const: rxdma2host-monitor-status-ring-mac1
- - const: host2rxdma-host-buf-ring-mac3
- - const: host2rxdma-host-buf-ring-mac2
- - const: host2rxdma-host-buf-ring-mac1
- - const: rxdma2host-destination-ring-mac3
- - const: rxdma2host-destination-ring-mac2
- - const: rxdma2host-destination-ring-mac1
- - const: host2tcl-input-ring4
- - const: host2tcl-input-ring3
- - const: host2tcl-input-ring2
- - const: host2tcl-input-ring1
- - const: wbm2host-tx-completions-ring3
- - const: wbm2host-tx-completions-ring2
- - const: wbm2host-tx-completions-ring1
- - const: tcl2host-status-ring
+ maxItems: 52
qcom,rproc:
$ref: /schemas/types.yaml#/definitions/phandle
@@ -151,20 +48,205 @@ properties:
board-2.bin for designs with colliding bus and device specific ids
memory-region:
- maxItems: 1
+ minItems: 1
+ maxItems: 2
description:
phandle to a node describing reserved memory (System RAM memory)
used by ath11k firmware (see bindings/reserved-memory/reserved-memory.txt)
+ iommus:
+ minItems: 1
+ maxItems: 2
+
+ wifi-firmware:
+ type: object
+ description: |
+ WCN6750 wifi node can contain one optional firmware subnode.
+ Firmware subnode is needed when the platform does not have Trustzone.
+ required:
+ - iommus
+
required:
- compatible
- reg
- interrupts
- - interrupt-names
- qcom,rproc
additionalProperties: false
+allOf:
+ - if:
+ properties:
+ compatible:
+ contains:
+ enum:
+ - qcom,ipq8074-wifi
+ - qcom,ipq6018-wifi
+ then:
+ properties:
+ interrupts:
+ items:
+ - description: misc-pulse1 interrupt events
+ - description: misc-latch interrupt events
+ - description: sw exception interrupt events
+ - description: watchdog interrupt events
+ - description: interrupt event for ring CE0
+ - description: interrupt event for ring CE1
+ - description: interrupt event for ring CE2
+ - description: interrupt event for ring CE3
+ - description: interrupt event for ring CE4
+ - description: interrupt event for ring CE5
+ - description: interrupt event for ring CE6
+ - description: interrupt event for ring CE7
+ - description: interrupt event for ring CE8
+ - description: interrupt event for ring CE9
+ - description: interrupt event for ring CE10
+ - description: interrupt event for ring CE11
+ - description: interrupt event for ring host2wbm-desc-feed
+ - description: interrupt event for ring host2reo-re-injection
+ - description: interrupt event for ring host2reo-command
+ - description: interrupt event for ring host2rxdma-monitor-ring3
+ - description: interrupt event for ring host2rxdma-monitor-ring2
+ - description: interrupt event for ring host2rxdma-monitor-ring1
+ - description: interrupt event for ring reo2ost-exception
+ - description: interrupt event for ring wbm2host-rx-release
+ - description: interrupt event for ring reo2host-status
+ - description: interrupt event for ring reo2host-destination-ring4
+ - description: interrupt event for ring reo2host-destination-ring3
+ - description: interrupt event for ring reo2host-destination-ring2
+ - description: interrupt event for ring reo2host-destination-ring1
+ - description: interrupt event for ring rxdma2host-monitor-destination-mac3
+ - description: interrupt event for ring rxdma2host-monitor-destination-mac2
+ - description: interrupt event for ring rxdma2host-monitor-destination-mac1
+ - description: interrupt event for ring ppdu-end-interrupts-mac3
+ - description: interrupt event for ring ppdu-end-interrupts-mac2
+ - description: interrupt event for ring ppdu-end-interrupts-mac1
+ - description: interrupt event for ring rxdma2host-monitor-status-ring-mac3
+ - description: interrupt event for ring rxdma2host-monitor-status-ring-mac2
+ - description: interrupt event for ring rxdma2host-monitor-status-ring-mac1
+ - description: interrupt event for ring host2rxdma-host-buf-ring-mac3
+ - description: interrupt event for ring host2rxdma-host-buf-ring-mac2
+ - description: interrupt event for ring host2rxdma-host-buf-ring-mac1
+ - description: interrupt event for ring rxdma2host-destination-ring-mac3
+ - description: interrupt event for ring rxdma2host-destination-ring-mac2
+ - description: interrupt event for ring rxdma2host-destination-ring-mac1
+ - description: interrupt event for ring host2tcl-input-ring4
+ - description: interrupt event for ring host2tcl-input-ring3
+ - description: interrupt event for ring host2tcl-input-ring2
+ - description: interrupt event for ring host2tcl-input-ring1
+ - description: interrupt event for ring wbm2host-tx-completions-ring3
+ - description: interrupt event for ring wbm2host-tx-completions-ring2
+ - description: interrupt event for ring wbm2host-tx-completions-ring1
+ - description: interrupt event for ring tcl2host-status-ring
+ interrupt-names:
+ items:
+ - const: misc-pulse1
+ - const: misc-latch
+ - const: sw-exception
+ - const: watchdog
+ - const: ce0
+ - const: ce1
+ - const: ce2
+ - const: ce3
+ - const: ce4
+ - const: ce5
+ - const: ce6
+ - const: ce7
+ - const: ce8
+ - const: ce9
+ - const: ce10
+ - const: ce11
+ - const: host2wbm-desc-feed
+ - const: host2reo-re-injection
+ - const: host2reo-command
+ - const: host2rxdma-monitor-ring3
+ - const: host2rxdma-monitor-ring2
+ - const: host2rxdma-monitor-ring1
+ - const: reo2ost-exception
+ - const: wbm2host-rx-release
+ - const: reo2host-status
+ - const: reo2host-destination-ring4
+ - const: reo2host-destination-ring3
+ - const: reo2host-destination-ring2
+ - const: reo2host-destination-ring1
+ - const: rxdma2host-monitor-destination-mac3
+ - const: rxdma2host-monitor-destination-mac2
+ - const: rxdma2host-monitor-destination-mac1
+ - const: ppdu-end-interrupts-mac3
+ - const: ppdu-end-interrupts-mac2
+ - const: ppdu-end-interrupts-mac1
+ - const: rxdma2host-monitor-status-ring-mac3
+ - const: rxdma2host-monitor-status-ring-mac2
+ - const: rxdma2host-monitor-status-ring-mac1
+ - const: host2rxdma-host-buf-ring-mac3
+ - const: host2rxdma-host-buf-ring-mac2
+ - const: host2rxdma-host-buf-ring-mac1
+ - const: rxdma2host-destination-ring-mac3
+ - const: rxdma2host-destination-ring-mac2
+ - const: rxdma2host-destination-ring-mac1
+ - const: host2tcl-input-ring4
+ - const: host2tcl-input-ring3
+ - const: host2tcl-input-ring2
+ - const: host2tcl-input-ring1
+ - const: wbm2host-tx-completions-ring3
+ - const: wbm2host-tx-completions-ring2
+ - const: wbm2host-tx-completions-ring1
+ - const: tcl2host-status-ring
+
+ - if:
+ properties:
+ compatible:
+ contains:
+ enum:
+ - qcom,ipq8074-wifi
+ - qcom,ipq6018-wifi
+ then:
+ required:
+ - interrupt-names
+
+ - if:
+ properties:
+ compatible:
+ contains:
+ enum:
+ - qcom,wcn6750-wifi
+ then:
+ properties:
+ interrupts:
+ items:
+ - description: interrupt event for ring CE1
+ - description: interrupt event for ring CE2
+ - description: interrupt event for ring CE3
+ - description: interrupt event for ring CE4
+ - description: interrupt event for ring CE5
+ - description: interrupt event for ring CE6
+ - description: interrupt event for ring CE7
+ - description: interrupt event for ring CE8
+ - description: interrupt event for ring CE9
+ - description: interrupt event for ring CE10
+ - description: interrupt event for ring DP1
+ - description: interrupt event for ring DP2
+ - description: interrupt event for ring DP3
+ - description: interrupt event for ring DP4
+ - description: interrupt event for ring DP5
+ - description: interrupt event for ring DP6
+ - description: interrupt event for ring DP7
+ - description: interrupt event for ring DP8
+ - description: interrupt event for ring DP9
+ - description: interrupt event for ring DP10
+ - description: interrupt event for ring DP11
+ - description: interrupt event for ring DP12
+ - description: interrupt event for ring DP13
+ - description: interrupt event for ring DP14
+ - description: interrupt event for ring DP15
+ - description: interrupt event for ring DP16
+ - description: interrupt event for ring DP17
+ - description: interrupt event for ring DP18
+ - description: interrupt event for ring DP19
+ - description: interrupt event for ring DP20
+ - description: interrupt event for ring DP21
+ - description: interrupt event for ring DP22
+
examples:
- |
@@ -309,3 +391,64 @@ examples:
};
};
};
+
+ - |
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+
+ reserved-memory {
+ #address-cells = <2>;
+ #size-cells = <2>;
+
+ wlan_ce_mem: memory@4cd000 {
+ no-map;
+ reg = <0x0 0x004cd000 0x0 0x1000>;
+ };
+
+ wlan_fw_mem: memory@80c00000 {
+ no-map;
+ reg = <0x0 0x80c00000 0x0 0xc00000>;
+ };
+ };
+
+ wifi: wifi@17a10040 {
+ compatible = "qcom,wcn6750-wifi";
+ reg = <0x17a10040 0x0>;
+ iommus = <&apps_smmu 0x1c00 0x1>;
+ interrupts = <GIC_SPI 768 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 769 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 770 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 771 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 772 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 773 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 774 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 775 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 776 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 777 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 778 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 779 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 780 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 781 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 782 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 783 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 784 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 785 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 786 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 787 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 788 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 789 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 790 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 791 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 792 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 793 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 794 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 795 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 796 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 797 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 798 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 799 IRQ_TYPE_EDGE_RISING>;
+ qcom,rproc = <&remoteproc_wpss>;
+ memory-region = <&wlan_fw_mem>, <&wlan_ce_mem>;
+ wifi-firmware {
+ iommus = <&apps_smmu 0x1c02 0x1>;
+ };
+ };
--
2.35.1
^ permalink raw reply related [flat|nested] 36+ messages in thread* [PATCH v7 1/9] dt: bindings: net: add bindings of WCN6750 for ath11k
@ 2022-04-29 17:04 ` Manikanta Pubbisetty
0 siblings, 0 replies; 36+ messages in thread
From: Manikanta Pubbisetty @ 2022-04-29 17:04 UTC (permalink / raw)
To: ath11k; +Cc: linux-wireless, devicetree, robh, mka, Manikanta Pubbisetty
WCN6750 is the WLAN chip on Qualcomm Snapdragon SoC SC7280;
Though being a PCIe based solution, it is not attached to
the APSS processor (Application Processor SubSystem), it is
instead attached to another tiny processor called WPSS Q6
processor (Wireless Processor SubSystem) on the SC7280 MSM,
where the WLAN firmware runs, and it is the WLAN firmware
running on the Q6 processor which enumerates WCN6750, as a
result APPS processor would never know such a device being
present in the system and would not detect the WCN6750
hardware unless and otherwise WCN6750 is registered as a
platform device. This is the reason behind adding WCN6750
WLAN node in the device tree.
Add WCN6750 wireless driver support, its based on ath11k driver.
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Manikanta Pubbisetty <quic_mpubbise@quicinc.com>
---
.../bindings/net/wireless/qcom,ath11k.yaml | 361 ++++++++++++------
1 file changed, 252 insertions(+), 109 deletions(-)
diff --git a/Documentation/devicetree/bindings/net/wireless/qcom,ath11k.yaml b/Documentation/devicetree/bindings/net/wireless/qcom,ath11k.yaml
index cdf7b873b419..6b32caa8311c 100644
--- a/Documentation/devicetree/bindings/net/wireless/qcom,ath11k.yaml
+++ b/Documentation/devicetree/bindings/net/wireless/qcom,ath11k.yaml
@@ -20,120 +20,17 @@ properties:
enum:
- qcom,ipq8074-wifi
- qcom,ipq6018-wifi
+ - qcom,wcn6750-wifi
reg:
maxItems: 1
interrupts:
- items:
- - description: misc-pulse1 interrupt events
- - description: misc-latch interrupt events
- - description: sw exception interrupt events
- - description: watchdog interrupt events
- - description: interrupt event for ring CE0
- - description: interrupt event for ring CE1
- - description: interrupt event for ring CE2
- - description: interrupt event for ring CE3
- - description: interrupt event for ring CE4
- - description: interrupt event for ring CE5
- - description: interrupt event for ring CE6
- - description: interrupt event for ring CE7
- - description: interrupt event for ring CE8
- - description: interrupt event for ring CE9
- - description: interrupt event for ring CE10
- - description: interrupt event for ring CE11
- - description: interrupt event for ring host2wbm-desc-feed
- - description: interrupt event for ring host2reo-re-injection
- - description: interrupt event for ring host2reo-command
- - description: interrupt event for ring host2rxdma-monitor-ring3
- - description: interrupt event for ring host2rxdma-monitor-ring2
- - description: interrupt event for ring host2rxdma-monitor-ring1
- - description: interrupt event for ring reo2ost-exception
- - description: interrupt event for ring wbm2host-rx-release
- - description: interrupt event for ring reo2host-status
- - description: interrupt event for ring reo2host-destination-ring4
- - description: interrupt event for ring reo2host-destination-ring3
- - description: interrupt event for ring reo2host-destination-ring2
- - description: interrupt event for ring reo2host-destination-ring1
- - description: interrupt event for ring rxdma2host-monitor-destination-mac3
- - description: interrupt event for ring rxdma2host-monitor-destination-mac2
- - description: interrupt event for ring rxdma2host-monitor-destination-mac1
- - description: interrupt event for ring ppdu-end-interrupts-mac3
- - description: interrupt event for ring ppdu-end-interrupts-mac2
- - description: interrupt event for ring ppdu-end-interrupts-mac1
- - description: interrupt event for ring rxdma2host-monitor-status-ring-mac3
- - description: interrupt event for ring rxdma2host-monitor-status-ring-mac2
- - description: interrupt event for ring rxdma2host-monitor-status-ring-mac1
- - description: interrupt event for ring host2rxdma-host-buf-ring-mac3
- - description: interrupt event for ring host2rxdma-host-buf-ring-mac2
- - description: interrupt event for ring host2rxdma-host-buf-ring-mac1
- - description: interrupt event for ring rxdma2host-destination-ring-mac3
- - description: interrupt event for ring rxdma2host-destination-ring-mac2
- - description: interrupt event for ring rxdma2host-destination-ring-mac1
- - description: interrupt event for ring host2tcl-input-ring4
- - description: interrupt event for ring host2tcl-input-ring3
- - description: interrupt event for ring host2tcl-input-ring2
- - description: interrupt event for ring host2tcl-input-ring1
- - description: interrupt event for ring wbm2host-tx-completions-ring3
- - description: interrupt event for ring wbm2host-tx-completions-ring2
- - description: interrupt event for ring wbm2host-tx-completions-ring1
- - description: interrupt event for ring tcl2host-status-ring
-
+ minItems: 32
+ maxItems: 52
interrupt-names:
- items:
- - const: misc-pulse1
- - const: misc-latch
- - const: sw-exception
- - const: watchdog
- - const: ce0
- - const: ce1
- - const: ce2
- - const: ce3
- - const: ce4
- - const: ce5
- - const: ce6
- - const: ce7
- - const: ce8
- - const: ce9
- - const: ce10
- - const: ce11
- - const: host2wbm-desc-feed
- - const: host2reo-re-injection
- - const: host2reo-command
- - const: host2rxdma-monitor-ring3
- - const: host2rxdma-monitor-ring2
- - const: host2rxdma-monitor-ring1
- - const: reo2ost-exception
- - const: wbm2host-rx-release
- - const: reo2host-status
- - const: reo2host-destination-ring4
- - const: reo2host-destination-ring3
- - const: reo2host-destination-ring2
- - const: reo2host-destination-ring1
- - const: rxdma2host-monitor-destination-mac3
- - const: rxdma2host-monitor-destination-mac2
- - const: rxdma2host-monitor-destination-mac1
- - const: ppdu-end-interrupts-mac3
- - const: ppdu-end-interrupts-mac2
- - const: ppdu-end-interrupts-mac1
- - const: rxdma2host-monitor-status-ring-mac3
- - const: rxdma2host-monitor-status-ring-mac2
- - const: rxdma2host-monitor-status-ring-mac1
- - const: host2rxdma-host-buf-ring-mac3
- - const: host2rxdma-host-buf-ring-mac2
- - const: host2rxdma-host-buf-ring-mac1
- - const: rxdma2host-destination-ring-mac3
- - const: rxdma2host-destination-ring-mac2
- - const: rxdma2host-destination-ring-mac1
- - const: host2tcl-input-ring4
- - const: host2tcl-input-ring3
- - const: host2tcl-input-ring2
- - const: host2tcl-input-ring1
- - const: wbm2host-tx-completions-ring3
- - const: wbm2host-tx-completions-ring2
- - const: wbm2host-tx-completions-ring1
- - const: tcl2host-status-ring
+ maxItems: 52
qcom,rproc:
$ref: /schemas/types.yaml#/definitions/phandle
@@ -151,20 +48,205 @@ properties:
board-2.bin for designs with colliding bus and device specific ids
memory-region:
- maxItems: 1
+ minItems: 1
+ maxItems: 2
description:
phandle to a node describing reserved memory (System RAM memory)
used by ath11k firmware (see bindings/reserved-memory/reserved-memory.txt)
+ iommus:
+ minItems: 1
+ maxItems: 2
+
+ wifi-firmware:
+ type: object
+ description: |
+ WCN6750 wifi node can contain one optional firmware subnode.
+ Firmware subnode is needed when the platform does not have Trustzone.
+ required:
+ - iommus
+
required:
- compatible
- reg
- interrupts
- - interrupt-names
- qcom,rproc
additionalProperties: false
+allOf:
+ - if:
+ properties:
+ compatible:
+ contains:
+ enum:
+ - qcom,ipq8074-wifi
+ - qcom,ipq6018-wifi
+ then:
+ properties:
+ interrupts:
+ items:
+ - description: misc-pulse1 interrupt events
+ - description: misc-latch interrupt events
+ - description: sw exception interrupt events
+ - description: watchdog interrupt events
+ - description: interrupt event for ring CE0
+ - description: interrupt event for ring CE1
+ - description: interrupt event for ring CE2
+ - description: interrupt event for ring CE3
+ - description: interrupt event for ring CE4
+ - description: interrupt event for ring CE5
+ - description: interrupt event for ring CE6
+ - description: interrupt event for ring CE7
+ - description: interrupt event for ring CE8
+ - description: interrupt event for ring CE9
+ - description: interrupt event for ring CE10
+ - description: interrupt event for ring CE11
+ - description: interrupt event for ring host2wbm-desc-feed
+ - description: interrupt event for ring host2reo-re-injection
+ - description: interrupt event for ring host2reo-command
+ - description: interrupt event for ring host2rxdma-monitor-ring3
+ - description: interrupt event for ring host2rxdma-monitor-ring2
+ - description: interrupt event for ring host2rxdma-monitor-ring1
+ - description: interrupt event for ring reo2ost-exception
+ - description: interrupt event for ring wbm2host-rx-release
+ - description: interrupt event for ring reo2host-status
+ - description: interrupt event for ring reo2host-destination-ring4
+ - description: interrupt event for ring reo2host-destination-ring3
+ - description: interrupt event for ring reo2host-destination-ring2
+ - description: interrupt event for ring reo2host-destination-ring1
+ - description: interrupt event for ring rxdma2host-monitor-destination-mac3
+ - description: interrupt event for ring rxdma2host-monitor-destination-mac2
+ - description: interrupt event for ring rxdma2host-monitor-destination-mac1
+ - description: interrupt event for ring ppdu-end-interrupts-mac3
+ - description: interrupt event for ring ppdu-end-interrupts-mac2
+ - description: interrupt event for ring ppdu-end-interrupts-mac1
+ - description: interrupt event for ring rxdma2host-monitor-status-ring-mac3
+ - description: interrupt event for ring rxdma2host-monitor-status-ring-mac2
+ - description: interrupt event for ring rxdma2host-monitor-status-ring-mac1
+ - description: interrupt event for ring host2rxdma-host-buf-ring-mac3
+ - description: interrupt event for ring host2rxdma-host-buf-ring-mac2
+ - description: interrupt event for ring host2rxdma-host-buf-ring-mac1
+ - description: interrupt event for ring rxdma2host-destination-ring-mac3
+ - description: interrupt event for ring rxdma2host-destination-ring-mac2
+ - description: interrupt event for ring rxdma2host-destination-ring-mac1
+ - description: interrupt event for ring host2tcl-input-ring4
+ - description: interrupt event for ring host2tcl-input-ring3
+ - description: interrupt event for ring host2tcl-input-ring2
+ - description: interrupt event for ring host2tcl-input-ring1
+ - description: interrupt event for ring wbm2host-tx-completions-ring3
+ - description: interrupt event for ring wbm2host-tx-completions-ring2
+ - description: interrupt event for ring wbm2host-tx-completions-ring1
+ - description: interrupt event for ring tcl2host-status-ring
+ interrupt-names:
+ items:
+ - const: misc-pulse1
+ - const: misc-latch
+ - const: sw-exception
+ - const: watchdog
+ - const: ce0
+ - const: ce1
+ - const: ce2
+ - const: ce3
+ - const: ce4
+ - const: ce5
+ - const: ce6
+ - const: ce7
+ - const: ce8
+ - const: ce9
+ - const: ce10
+ - const: ce11
+ - const: host2wbm-desc-feed
+ - const: host2reo-re-injection
+ - const: host2reo-command
+ - const: host2rxdma-monitor-ring3
+ - const: host2rxdma-monitor-ring2
+ - const: host2rxdma-monitor-ring1
+ - const: reo2ost-exception
+ - const: wbm2host-rx-release
+ - const: reo2host-status
+ - const: reo2host-destination-ring4
+ - const: reo2host-destination-ring3
+ - const: reo2host-destination-ring2
+ - const: reo2host-destination-ring1
+ - const: rxdma2host-monitor-destination-mac3
+ - const: rxdma2host-monitor-destination-mac2
+ - const: rxdma2host-monitor-destination-mac1
+ - const: ppdu-end-interrupts-mac3
+ - const: ppdu-end-interrupts-mac2
+ - const: ppdu-end-interrupts-mac1
+ - const: rxdma2host-monitor-status-ring-mac3
+ - const: rxdma2host-monitor-status-ring-mac2
+ - const: rxdma2host-monitor-status-ring-mac1
+ - const: host2rxdma-host-buf-ring-mac3
+ - const: host2rxdma-host-buf-ring-mac2
+ - const: host2rxdma-host-buf-ring-mac1
+ - const: rxdma2host-destination-ring-mac3
+ - const: rxdma2host-destination-ring-mac2
+ - const: rxdma2host-destination-ring-mac1
+ - const: host2tcl-input-ring4
+ - const: host2tcl-input-ring3
+ - const: host2tcl-input-ring2
+ - const: host2tcl-input-ring1
+ - const: wbm2host-tx-completions-ring3
+ - const: wbm2host-tx-completions-ring2
+ - const: wbm2host-tx-completions-ring1
+ - const: tcl2host-status-ring
+
+ - if:
+ properties:
+ compatible:
+ contains:
+ enum:
+ - qcom,ipq8074-wifi
+ - qcom,ipq6018-wifi
+ then:
+ required:
+ - interrupt-names
+
+ - if:
+ properties:
+ compatible:
+ contains:
+ enum:
+ - qcom,wcn6750-wifi
+ then:
+ properties:
+ interrupts:
+ items:
+ - description: interrupt event for ring CE1
+ - description: interrupt event for ring CE2
+ - description: interrupt event for ring CE3
+ - description: interrupt event for ring CE4
+ - description: interrupt event for ring CE5
+ - description: interrupt event for ring CE6
+ - description: interrupt event for ring CE7
+ - description: interrupt event for ring CE8
+ - description: interrupt event for ring CE9
+ - description: interrupt event for ring CE10
+ - description: interrupt event for ring DP1
+ - description: interrupt event for ring DP2
+ - description: interrupt event for ring DP3
+ - description: interrupt event for ring DP4
+ - description: interrupt event for ring DP5
+ - description: interrupt event for ring DP6
+ - description: interrupt event for ring DP7
+ - description: interrupt event for ring DP8
+ - description: interrupt event for ring DP9
+ - description: interrupt event for ring DP10
+ - description: interrupt event for ring DP11
+ - description: interrupt event for ring DP12
+ - description: interrupt event for ring DP13
+ - description: interrupt event for ring DP14
+ - description: interrupt event for ring DP15
+ - description: interrupt event for ring DP16
+ - description: interrupt event for ring DP17
+ - description: interrupt event for ring DP18
+ - description: interrupt event for ring DP19
+ - description: interrupt event for ring DP20
+ - description: interrupt event for ring DP21
+ - description: interrupt event for ring DP22
+
examples:
- |
@@ -309,3 +391,64 @@ examples:
};
};
};
+
+ - |
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+
+ reserved-memory {
+ #address-cells = <2>;
+ #size-cells = <2>;
+
+ wlan_ce_mem: memory@4cd000 {
+ no-map;
+ reg = <0x0 0x004cd000 0x0 0x1000>;
+ };
+
+ wlan_fw_mem: memory@80c00000 {
+ no-map;
+ reg = <0x0 0x80c00000 0x0 0xc00000>;
+ };
+ };
+
+ wifi: wifi@17a10040 {
+ compatible = "qcom,wcn6750-wifi";
+ reg = <0x17a10040 0x0>;
+ iommus = <&apps_smmu 0x1c00 0x1>;
+ interrupts = <GIC_SPI 768 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 769 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 770 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 771 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 772 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 773 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 774 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 775 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 776 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 777 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 778 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 779 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 780 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 781 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 782 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 783 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 784 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 785 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 786 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 787 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 788 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 789 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 790 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 791 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 792 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 793 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 794 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 795 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 796 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 797 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 798 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 799 IRQ_TYPE_EDGE_RISING>;
+ qcom,rproc = <&remoteproc_wpss>;
+ memory-region = <&wlan_fw_mem>, <&wlan_ce_mem>;
+ wifi-firmware {
+ iommus = <&apps_smmu 0x1c02 0x1>;
+ };
+ };
--
2.35.1
--
ath11k mailing list
ath11k@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/ath11k
^ permalink raw reply related [flat|nested] 36+ messages in thread* Re: [PATCH v7 1/9] dt: bindings: net: add bindings of WCN6750 for ath11k
2022-04-29 17:04 ` Manikanta Pubbisetty
@ 2022-05-02 13:59 ` Kalle Valo
-1 siblings, 0 replies; 36+ messages in thread
From: Kalle Valo @ 2022-05-02 13:59 UTC (permalink / raw)
To: Manikanta Pubbisetty
Cc: ath11k, linux-wireless, devicetree, robh, mka, Manikanta Pubbisetty
Manikanta Pubbisetty <quic_mpubbise@quicinc.com> wrote:
> WCN6750 is the WLAN chip on Qualcomm Snapdragon SoC SC7280;
> Though being a PCIe based solution, it is not attached to
> the APSS processor (Application Processor SubSystem), it is
> instead attached to another tiny processor called WPSS Q6
> processor (Wireless Processor SubSystem) on the SC7280 MSM,
> where the WLAN firmware runs, and it is the WLAN firmware
> running on the Q6 processor which enumerates WCN6750, as a
> result APPS processor would never know such a device being
> present in the system and would not detect the WCN6750
> hardware unless and otherwise WCN6750 is registered as a
> platform device. This is the reason behind adding WCN6750
> WLAN node in the device tree.
>
> Add WCN6750 wireless driver support, its based on ath11k driver.
>
> Reviewed-by: Rob Herring <robh@kernel.org>
> Signed-off-by: Manikanta Pubbisetty <quic_mpubbise@quicinc.com>
> Signed-off-by: Kalle Valo <quic_kvalo@quicinc.com>
9 patches applied to ath-next branch of ath.git, thanks.
00fd24089b81 dt: bindings: net: add bindings of WCN6750 for ath11k
92c1858e4399 ath11k: Move parameters in bus_params to hw_params
d1e1edfde035 ath11k: Add HW params for WCN6750
56c8ccf331bd ath11k: Add register access logic for WCN6750
676f8905fff9 ath11k: Fetch device information via QMI for WCN6750
73d3e71306fe ath11k: Add QMI changes for WCN6750
49890d9c93d5 ath11k: HAL changes to support WCN6750
e67ba1973917 ath11k: Datapath changes to support WCN6750
00402f49d26f ath11k: Add support for WCN6750 device
--
https://patchwork.kernel.org/project/linux-wireless/patch/20220429170502.20080-2-quic_mpubbise@quicinc.com/
https://wireless.wiki.kernel.org/en/developers/documentation/submittingpatches
^ permalink raw reply [flat|nested] 36+ messages in thread
* Re: [PATCH v7 1/9] dt: bindings: net: add bindings of WCN6750 for ath11k
@ 2022-05-02 13:59 ` Kalle Valo
0 siblings, 0 replies; 36+ messages in thread
From: Kalle Valo @ 2022-05-02 13:59 UTC (permalink / raw)
To: Manikanta Pubbisetty
Cc: ath11k, linux-wireless, devicetree, robh, mka, Manikanta Pubbisetty
Manikanta Pubbisetty <quic_mpubbise@quicinc.com> wrote:
> WCN6750 is the WLAN chip on Qualcomm Snapdragon SoC SC7280;
> Though being a PCIe based solution, it is not attached to
> the APSS processor (Application Processor SubSystem), it is
> instead attached to another tiny processor called WPSS Q6
> processor (Wireless Processor SubSystem) on the SC7280 MSM,
> where the WLAN firmware runs, and it is the WLAN firmware
> running on the Q6 processor which enumerates WCN6750, as a
> result APPS processor would never know such a device being
> present in the system and would not detect the WCN6750
> hardware unless and otherwise WCN6750 is registered as a
> platform device. This is the reason behind adding WCN6750
> WLAN node in the device tree.
>
> Add WCN6750 wireless driver support, its based on ath11k driver.
>
> Reviewed-by: Rob Herring <robh@kernel.org>
> Signed-off-by: Manikanta Pubbisetty <quic_mpubbise@quicinc.com>
> Signed-off-by: Kalle Valo <quic_kvalo@quicinc.com>
9 patches applied to ath-next branch of ath.git, thanks.
00fd24089b81 dt: bindings: net: add bindings of WCN6750 for ath11k
92c1858e4399 ath11k: Move parameters in bus_params to hw_params
d1e1edfde035 ath11k: Add HW params for WCN6750
56c8ccf331bd ath11k: Add register access logic for WCN6750
676f8905fff9 ath11k: Fetch device information via QMI for WCN6750
73d3e71306fe ath11k: Add QMI changes for WCN6750
49890d9c93d5 ath11k: HAL changes to support WCN6750
e67ba1973917 ath11k: Datapath changes to support WCN6750
00402f49d26f ath11k: Add support for WCN6750 device
--
https://patchwork.kernel.org/project/linux-wireless/patch/20220429170502.20080-2-quic_mpubbise@quicinc.com/
https://wireless.wiki.kernel.org/en/developers/documentation/submittingpatches
--
ath11k mailing list
ath11k@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/ath11k
^ permalink raw reply [flat|nested] 36+ messages in thread
* [PATCH v7 2/9] ath11k: Move parameters in bus_params to hw_params
2022-04-29 17:04 ` Manikanta Pubbisetty
@ 2022-04-29 17:04 ` Manikanta Pubbisetty
-1 siblings, 0 replies; 36+ messages in thread
From: Manikanta Pubbisetty @ 2022-04-29 17:04 UTC (permalink / raw)
To: ath11k; +Cc: linux-wireless, devicetree, robh, mka, Manikanta Pubbisetty
In ath11k, bus_params were added with an intention to hold
parameters related to bus (AHB/PCI), but this is not true
as some bus parameters being different between chipsets of
the same bus.
With the addition of WCN6750 to ath11k, bus parameters are
going to be entirely different among AHB devices. Therefore,
it is wise to move bus_params to hw_params and get rid of
bus_params entirely.
Also, mhi_support parameter is not used anywhere in the driver,
remove it from bus_params.
Tested-on: WCN6750 hw1.0 AHB WLAN.MSL.1.0.1-00887-QCAMSLSWPLZ-1
Signed-off-by: Manikanta Pubbisetty <quic_mpubbise@quicinc.com>
---
drivers/net/wireless/ath/ath11k/ahb.c | 11 ++--------
drivers/net/wireless/ath/ath11k/core.c | 28 +++++++++++++++++++++++---
drivers/net/wireless/ath/ath11k/core.h | 12 +----------
drivers/net/wireless/ath/ath11k/hw.h | 4 ++++
drivers/net/wireless/ath/ath11k/pci.c | 14 +++----------
drivers/net/wireless/ath/ath11k/pcic.c | 4 ++--
drivers/net/wireless/ath/ath11k/qmi.c | 23 +++++++++++----------
7 files changed, 49 insertions(+), 47 deletions(-)
diff --git a/drivers/net/wireless/ath/ath11k/ahb.c b/drivers/net/wireless/ath/ath11k/ahb.c
index f407d4af2074..49d79cfbf21c 100644
--- a/drivers/net/wireless/ath/ath11k/ahb.c
+++ b/drivers/net/wireless/ath/ath11k/ahb.c
@@ -1,6 +1,7 @@
// SPDX-License-Identifier: BSD-3-Clause-Clear
/*
* Copyright (c) 2018-2019 The Linux Foundation. All rights reserved.
+ * Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved.
*/
#include <linux/module.h>
@@ -28,13 +29,6 @@ static const struct of_device_id ath11k_ahb_of_match[] = {
MODULE_DEVICE_TABLE(of, ath11k_ahb_of_match);
-static const struct ath11k_bus_params ath11k_ahb_bus_params = {
- .mhi_support = false,
- .m3_fw_support = false,
- .fixed_bdf_addr = true,
- .fixed_mem_region = true,
-};
-
#define ATH11K_IRQ_CE0_OFFSET 4
static const char *irq_name[ATH11K_IRQ_NUM_MAX] = {
@@ -685,8 +679,7 @@ static int ath11k_ahb_probe(struct platform_device *pdev)
}
ab = ath11k_core_alloc(&pdev->dev, sizeof(struct ath11k_ahb),
- ATH11K_BUS_AHB,
- &ath11k_ahb_bus_params);
+ ATH11K_BUS_AHB);
if (!ab) {
dev_err(&pdev->dev, "failed to allocate ath11k base\n");
return -ENOMEM;
diff --git a/drivers/net/wireless/ath/ath11k/core.c b/drivers/net/wireless/ath/ath11k/core.c
index 7e074b7716e7..19b5bb06c7e8 100644
--- a/drivers/net/wireless/ath/ath11k/core.c
+++ b/drivers/net/wireless/ath/ath11k/core.c
@@ -102,6 +102,10 @@ static const struct ath11k_hw_params ath11k_hw_params[] = {
.dbr_debug_support = true,
.global_reset = false,
.bios_sar_capa = NULL,
+ .m3_fw_support = false,
+ .fixed_bdf_addr = true,
+ .fixed_mem_region = true,
+ .static_window_map = false,
},
{
.hw_rev = ATH11K_HW_IPQ6018_HW10,
@@ -169,6 +173,10 @@ static const struct ath11k_hw_params ath11k_hw_params[] = {
.dbr_debug_support = true,
.global_reset = false,
.bios_sar_capa = NULL,
+ .m3_fw_support = false,
+ .fixed_bdf_addr = true,
+ .fixed_mem_region = true,
+ .static_window_map = false,
},
{
.name = "qca6390 hw2.0",
@@ -235,6 +243,10 @@ static const struct ath11k_hw_params ath11k_hw_params[] = {
.dbr_debug_support = false,
.global_reset = true,
.bios_sar_capa = NULL,
+ .m3_fw_support = true,
+ .fixed_bdf_addr = false,
+ .fixed_mem_region = false,
+ .static_window_map = false,
},
{
.name = "qcn9074 hw1.0",
@@ -301,6 +313,10 @@ static const struct ath11k_hw_params ath11k_hw_params[] = {
.dbr_debug_support = true,
.global_reset = false,
.bios_sar_capa = NULL,
+ .m3_fw_support = true,
+ .fixed_bdf_addr = false,
+ .fixed_mem_region = false,
+ .static_window_map = true,
},
{
.name = "wcn6855 hw2.0",
@@ -367,6 +383,10 @@ static const struct ath11k_hw_params ath11k_hw_params[] = {
.dbr_debug_support = false,
.global_reset = true,
.bios_sar_capa = &ath11k_hw_sar_capa_wcn6855,
+ .m3_fw_support = true,
+ .fixed_bdf_addr = false,
+ .fixed_mem_region = false,
+ .static_window_map = false,
},
{
.name = "wcn6855 hw2.1",
@@ -432,6 +452,10 @@ static const struct ath11k_hw_params ath11k_hw_params[] = {
.dbr_debug_support = false,
.global_reset = true,
.bios_sar_capa = &ath11k_hw_sar_capa_wcn6855,
+ .m3_fw_support = true,
+ .fixed_bdf_addr = false,
+ .fixed_mem_region = false,
+ .static_window_map = false,
},
};
@@ -1730,8 +1754,7 @@ void ath11k_core_free(struct ath11k_base *ab)
EXPORT_SYMBOL(ath11k_core_free);
struct ath11k_base *ath11k_core_alloc(struct device *dev, size_t priv_size,
- enum ath11k_bus bus,
- const struct ath11k_bus_params *bus_params)
+ enum ath11k_bus bus)
{
struct ath11k_base *ab;
@@ -1770,7 +1793,6 @@ struct ath11k_base *ath11k_core_alloc(struct device *dev, size_t priv_size,
init_completion(&ab->wow.wakeup_completed);
ab->dev = dev;
- ab->bus_params = *bus_params;
ab->hif.bus = bus;
return ab;
diff --git a/drivers/net/wireless/ath/ath11k/core.h b/drivers/net/wireless/ath/ath11k/core.h
index 7a505531acf9..d8ab28413d95 100644
--- a/drivers/net/wireless/ath/ath11k/core.h
+++ b/drivers/net/wireless/ath/ath11k/core.h
@@ -748,14 +748,6 @@ struct ath11k_board_data {
size_t len;
};
-struct ath11k_bus_params {
- bool mhi_support;
- bool m3_fw_support;
- bool fixed_bdf_addr;
- bool fixed_mem_region;
- bool static_window_map;
-};
-
struct ath11k_pci_ops {
int (*wakeup)(struct ath11k_base *ab);
void (*release)(struct ath11k_base *ab);
@@ -887,7 +879,6 @@ struct ath11k_base {
int bd_api;
struct ath11k_hw_params hw_params;
- struct ath11k_bus_params bus_params;
const struct firmware *cal_file;
@@ -1135,8 +1126,7 @@ int ath11k_core_pre_init(struct ath11k_base *ab);
int ath11k_core_init(struct ath11k_base *ath11k);
void ath11k_core_deinit(struct ath11k_base *ath11k);
struct ath11k_base *ath11k_core_alloc(struct device *dev, size_t priv_size,
- enum ath11k_bus bus,
- const struct ath11k_bus_params *bus_params);
+ enum ath11k_bus bus);
void ath11k_core_free(struct ath11k_base *ath11k);
int ath11k_core_fetch_bdf(struct ath11k_base *ath11k,
struct ath11k_board_data *bd);
diff --git a/drivers/net/wireless/ath/ath11k/hw.h b/drivers/net/wireless/ath/ath11k/hw.h
index b7ece3d5678c..09fa020bfee4 100644
--- a/drivers/net/wireless/ath/ath11k/hw.h
+++ b/drivers/net/wireless/ath/ath11k/hw.h
@@ -196,6 +196,10 @@ struct ath11k_hw_params {
bool dbr_debug_support;
bool global_reset;
const struct cfg80211_sar_capa *bios_sar_capa;
+ bool m3_fw_support;
+ bool fixed_bdf_addr;
+ bool fixed_mem_region;
+ bool static_window_map;
};
struct ath11k_hw_ops {
diff --git a/drivers/net/wireless/ath/ath11k/pci.c b/drivers/net/wireless/ath/ath11k/pci.c
index 024661a17008..dedf1b88ddf6 100644
--- a/drivers/net/wireless/ath/ath11k/pci.c
+++ b/drivers/net/wireless/ath/ath11k/pci.c
@@ -115,13 +115,6 @@ static const struct ath11k_pci_ops ath11k_pci_ops_qcn9074 = {
.window_read32 = ath11k_pci_window_read32,
};
-static const struct ath11k_bus_params ath11k_pci_bus_params = {
- .mhi_support = true,
- .m3_fw_support = true,
- .fixed_bdf_addr = false,
- .fixed_mem_region = false,
-};
-
static const struct ath11k_msi_config msi_config_one_msi = {
.total_vectors = 1,
.total_users = 4,
@@ -593,7 +586,7 @@ static int ath11k_pci_power_up(struct ath11k_base *ab)
return ret;
}
- if (ab->bus_params.static_window_map)
+ if (ab->hw_params.static_window_map)
ath11k_pci_select_static_window(ab_pci);
return 0;
@@ -706,8 +699,8 @@ static int ath11k_pci_probe(struct pci_dev *pdev,
u32 soc_hw_version_major, soc_hw_version_minor, addr;
int ret;
- ab = ath11k_core_alloc(&pdev->dev, sizeof(*ab_pci), ATH11K_BUS_PCI,
- &ath11k_pci_bus_params);
+ ab = ath11k_core_alloc(&pdev->dev, sizeof(*ab_pci), ATH11K_BUS_PCI);
+
if (!ab) {
dev_err(&pdev->dev, "failed to allocate ath11k base\n");
return -ENOMEM;
@@ -764,7 +757,6 @@ static int ath11k_pci_probe(struct pci_dev *pdev,
ab->pci.ops = &ath11k_pci_ops_qca6390;
break;
case QCN9074_DEVICE_ID:
- ab->bus_params.static_window_map = true;
ab->pci.ops = &ath11k_pci_ops_qcn9074;
ab->hw_rev = ATH11K_HW_QCN9074_HW10;
break;
diff --git a/drivers/net/wireless/ath/ath11k/pcic.c b/drivers/net/wireless/ath/ath11k/pcic.c
index 63c678aea29e..7a920d65023f 100644
--- a/drivers/net/wireless/ath/ath11k/pcic.c
+++ b/drivers/net/wireless/ath/ath11k/pcic.c
@@ -163,7 +163,7 @@ void ath11k_pcic_write32(struct ath11k_base *ab, u32 offset, u32 value)
if (offset < ATH11K_PCI_WINDOW_START) {
iowrite32(value, ab->mem + offset);
} else {
- if (ab->bus_params.static_window_map)
+ if (ab->hw_params.static_window_map)
window_start = ath11k_pcic_get_window_start(ab, offset);
else
window_start = ATH11K_PCI_WINDOW_START;
@@ -198,7 +198,7 @@ u32 ath11k_pcic_read32(struct ath11k_base *ab, u32 offset)
if (offset < ATH11K_PCI_WINDOW_START) {
val = ioread32(ab->mem + offset);
} else {
- if (ab->bus_params.static_window_map)
+ if (ab->hw_params.static_window_map)
window_start = ath11k_pcic_get_window_start(ab, offset);
else
window_start = ATH11K_PCI_WINDOW_START;
diff --git a/drivers/net/wireless/ath/ath11k/qmi.c b/drivers/net/wireless/ath/ath11k/qmi.c
index 0442faa3b7af..c89e76108237 100644
--- a/drivers/net/wireless/ath/ath11k/qmi.c
+++ b/drivers/net/wireless/ath/ath11k/qmi.c
@@ -1,6 +1,7 @@
// SPDX-License-Identifier: BSD-3-Clause-Clear
/*
* Copyright (c) 2018-2019 The Linux Foundation. All rights reserved.
+ * Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved.
*/
#include <linux/elf.h>
@@ -1648,7 +1649,7 @@ static int ath11k_qmi_host_cap_send(struct ath11k_base *ab)
req.bdf_support_valid = 1;
req.bdf_support = 1;
- if (ab->bus_params.m3_fw_support) {
+ if (ab->hw_params.m3_fw_support) {
req.m3_support_valid = 1;
req.m3_support = 1;
req.m3_cache_support_valid = 1;
@@ -1803,7 +1804,7 @@ static int ath11k_qmi_respond_fw_mem_request(struct ath11k_base *ab)
* failure to FW and FW will then request mulitple blocks of small
* chunk size memory.
*/
- if (!(ab->bus_params.fixed_mem_region ||
+ if (!(ab->hw_params.fixed_mem_region ||
test_bit(ATH11K_FLAG_FIXED_MEM_RGN, &ab->dev_flags)) &&
ab->qmi.target_mem_delayed) {
delayed = true;
@@ -1873,7 +1874,7 @@ static void ath11k_qmi_free_target_mem_chunk(struct ath11k_base *ab)
int i;
for (i = 0; i < ab->qmi.mem_seg_count; i++) {
- if ((ab->bus_params.fixed_mem_region ||
+ if ((ab->hw_params.fixed_mem_region ||
test_bit(ATH11K_FLAG_FIXED_MEM_RGN, &ab->dev_flags)) &&
ab->qmi.target_mem[i].iaddr)
iounmap(ab->qmi.target_mem[i].iaddr);
@@ -2124,7 +2125,7 @@ static int ath11k_qmi_load_file_target_mem(struct ath11k_base *ab,
memset(&resp, 0, sizeof(resp));
- if (ab->bus_params.fixed_bdf_addr) {
+ if (ab->hw_params.fixed_bdf_addr) {
bdf_addr = ioremap(ab->hw_params.bdf_addr, ab->hw_params.fw.board_size);
if (!bdf_addr) {
ath11k_warn(ab, "qmi ioremap error for bdf_addr\n");
@@ -2153,7 +2154,7 @@ static int ath11k_qmi_load_file_target_mem(struct ath11k_base *ab,
req->end = 1;
}
- if (ab->bus_params.fixed_bdf_addr ||
+ if (ab->hw_params.fixed_bdf_addr ||
type == ATH11K_QMI_FILE_TYPE_EEPROM) {
req->data_valid = 0;
req->end = 1;
@@ -2162,7 +2163,7 @@ static int ath11k_qmi_load_file_target_mem(struct ath11k_base *ab,
memcpy(req->data, temp, req->data_len);
}
- if (ab->bus_params.fixed_bdf_addr) {
+ if (ab->hw_params.fixed_bdf_addr) {
if (type == ATH11K_QMI_FILE_TYPE_CALDATA)
bdf_addr += ab->hw_params.fw.cal_offset;
@@ -2201,7 +2202,7 @@ static int ath11k_qmi_load_file_target_mem(struct ath11k_base *ab,
goto err_iounmap;
}
- if (ab->bus_params.fixed_bdf_addr ||
+ if (ab->hw_params.fixed_bdf_addr ||
type == ATH11K_QMI_FILE_TYPE_EEPROM) {
remaining = 0;
} else {
@@ -2214,7 +2215,7 @@ static int ath11k_qmi_load_file_target_mem(struct ath11k_base *ab,
}
err_iounmap:
- if (ab->bus_params.fixed_bdf_addr)
+ if (ab->hw_params.fixed_bdf_addr)
iounmap(bdf_addr);
err_free_req:
@@ -2353,7 +2354,7 @@ static void ath11k_qmi_m3_free(struct ath11k_base *ab)
{
struct m3_mem_region *m3_mem = &ab->qmi.m3_mem;
- if (!ab->bus_params.m3_fw_support || !m3_mem->vaddr)
+ if (!ab->hw_params.m3_fw_support || !m3_mem->vaddr)
return;
dma_free_coherent(ab->dev, m3_mem->size,
@@ -2373,7 +2374,7 @@ static int ath11k_qmi_wlanfw_m3_info_send(struct ath11k_base *ab)
memset(&req, 0, sizeof(req));
memset(&resp, 0, sizeof(resp));
- if (ab->bus_params.m3_fw_support) {
+ if (ab->hw_params.m3_fw_support) {
ret = ath11k_qmi_m3_load(ab);
if (ret) {
ath11k_err(ab, "failed to load m3 firmware: %d", ret);
@@ -2792,7 +2793,7 @@ static void ath11k_qmi_msg_mem_request_cb(struct qmi_handle *qmi_hdl,
msg->mem_seg[i].type, msg->mem_seg[i].size);
}
- if (ab->bus_params.fixed_mem_region ||
+ if (ab->hw_params.fixed_mem_region ||
test_bit(ATH11K_FLAG_FIXED_MEM_RGN, &ab->dev_flags)) {
ret = ath11k_qmi_assign_target_mem_chunk(ab);
if (ret) {
--
2.35.1
^ permalink raw reply related [flat|nested] 36+ messages in thread* [PATCH v7 2/9] ath11k: Move parameters in bus_params to hw_params
@ 2022-04-29 17:04 ` Manikanta Pubbisetty
0 siblings, 0 replies; 36+ messages in thread
From: Manikanta Pubbisetty @ 2022-04-29 17:04 UTC (permalink / raw)
To: ath11k; +Cc: linux-wireless, devicetree, robh, mka, Manikanta Pubbisetty
In ath11k, bus_params were added with an intention to hold
parameters related to bus (AHB/PCI), but this is not true
as some bus parameters being different between chipsets of
the same bus.
With the addition of WCN6750 to ath11k, bus parameters are
going to be entirely different among AHB devices. Therefore,
it is wise to move bus_params to hw_params and get rid of
bus_params entirely.
Also, mhi_support parameter is not used anywhere in the driver,
remove it from bus_params.
Tested-on: WCN6750 hw1.0 AHB WLAN.MSL.1.0.1-00887-QCAMSLSWPLZ-1
Signed-off-by: Manikanta Pubbisetty <quic_mpubbise@quicinc.com>
---
drivers/net/wireless/ath/ath11k/ahb.c | 11 ++--------
drivers/net/wireless/ath/ath11k/core.c | 28 +++++++++++++++++++++++---
drivers/net/wireless/ath/ath11k/core.h | 12 +----------
drivers/net/wireless/ath/ath11k/hw.h | 4 ++++
drivers/net/wireless/ath/ath11k/pci.c | 14 +++----------
drivers/net/wireless/ath/ath11k/pcic.c | 4 ++--
drivers/net/wireless/ath/ath11k/qmi.c | 23 +++++++++++----------
7 files changed, 49 insertions(+), 47 deletions(-)
diff --git a/drivers/net/wireless/ath/ath11k/ahb.c b/drivers/net/wireless/ath/ath11k/ahb.c
index f407d4af2074..49d79cfbf21c 100644
--- a/drivers/net/wireless/ath/ath11k/ahb.c
+++ b/drivers/net/wireless/ath/ath11k/ahb.c
@@ -1,6 +1,7 @@
// SPDX-License-Identifier: BSD-3-Clause-Clear
/*
* Copyright (c) 2018-2019 The Linux Foundation. All rights reserved.
+ * Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved.
*/
#include <linux/module.h>
@@ -28,13 +29,6 @@ static const struct of_device_id ath11k_ahb_of_match[] = {
MODULE_DEVICE_TABLE(of, ath11k_ahb_of_match);
-static const struct ath11k_bus_params ath11k_ahb_bus_params = {
- .mhi_support = false,
- .m3_fw_support = false,
- .fixed_bdf_addr = true,
- .fixed_mem_region = true,
-};
-
#define ATH11K_IRQ_CE0_OFFSET 4
static const char *irq_name[ATH11K_IRQ_NUM_MAX] = {
@@ -685,8 +679,7 @@ static int ath11k_ahb_probe(struct platform_device *pdev)
}
ab = ath11k_core_alloc(&pdev->dev, sizeof(struct ath11k_ahb),
- ATH11K_BUS_AHB,
- &ath11k_ahb_bus_params);
+ ATH11K_BUS_AHB);
if (!ab) {
dev_err(&pdev->dev, "failed to allocate ath11k base\n");
return -ENOMEM;
diff --git a/drivers/net/wireless/ath/ath11k/core.c b/drivers/net/wireless/ath/ath11k/core.c
index 7e074b7716e7..19b5bb06c7e8 100644
--- a/drivers/net/wireless/ath/ath11k/core.c
+++ b/drivers/net/wireless/ath/ath11k/core.c
@@ -102,6 +102,10 @@ static const struct ath11k_hw_params ath11k_hw_params[] = {
.dbr_debug_support = true,
.global_reset = false,
.bios_sar_capa = NULL,
+ .m3_fw_support = false,
+ .fixed_bdf_addr = true,
+ .fixed_mem_region = true,
+ .static_window_map = false,
},
{
.hw_rev = ATH11K_HW_IPQ6018_HW10,
@@ -169,6 +173,10 @@ static const struct ath11k_hw_params ath11k_hw_params[] = {
.dbr_debug_support = true,
.global_reset = false,
.bios_sar_capa = NULL,
+ .m3_fw_support = false,
+ .fixed_bdf_addr = true,
+ .fixed_mem_region = true,
+ .static_window_map = false,
},
{
.name = "qca6390 hw2.0",
@@ -235,6 +243,10 @@ static const struct ath11k_hw_params ath11k_hw_params[] = {
.dbr_debug_support = false,
.global_reset = true,
.bios_sar_capa = NULL,
+ .m3_fw_support = true,
+ .fixed_bdf_addr = false,
+ .fixed_mem_region = false,
+ .static_window_map = false,
},
{
.name = "qcn9074 hw1.0",
@@ -301,6 +313,10 @@ static const struct ath11k_hw_params ath11k_hw_params[] = {
.dbr_debug_support = true,
.global_reset = false,
.bios_sar_capa = NULL,
+ .m3_fw_support = true,
+ .fixed_bdf_addr = false,
+ .fixed_mem_region = false,
+ .static_window_map = true,
},
{
.name = "wcn6855 hw2.0",
@@ -367,6 +383,10 @@ static const struct ath11k_hw_params ath11k_hw_params[] = {
.dbr_debug_support = false,
.global_reset = true,
.bios_sar_capa = &ath11k_hw_sar_capa_wcn6855,
+ .m3_fw_support = true,
+ .fixed_bdf_addr = false,
+ .fixed_mem_region = false,
+ .static_window_map = false,
},
{
.name = "wcn6855 hw2.1",
@@ -432,6 +452,10 @@ static const struct ath11k_hw_params ath11k_hw_params[] = {
.dbr_debug_support = false,
.global_reset = true,
.bios_sar_capa = &ath11k_hw_sar_capa_wcn6855,
+ .m3_fw_support = true,
+ .fixed_bdf_addr = false,
+ .fixed_mem_region = false,
+ .static_window_map = false,
},
};
@@ -1730,8 +1754,7 @@ void ath11k_core_free(struct ath11k_base *ab)
EXPORT_SYMBOL(ath11k_core_free);
struct ath11k_base *ath11k_core_alloc(struct device *dev, size_t priv_size,
- enum ath11k_bus bus,
- const struct ath11k_bus_params *bus_params)
+ enum ath11k_bus bus)
{
struct ath11k_base *ab;
@@ -1770,7 +1793,6 @@ struct ath11k_base *ath11k_core_alloc(struct device *dev, size_t priv_size,
init_completion(&ab->wow.wakeup_completed);
ab->dev = dev;
- ab->bus_params = *bus_params;
ab->hif.bus = bus;
return ab;
diff --git a/drivers/net/wireless/ath/ath11k/core.h b/drivers/net/wireless/ath/ath11k/core.h
index 7a505531acf9..d8ab28413d95 100644
--- a/drivers/net/wireless/ath/ath11k/core.h
+++ b/drivers/net/wireless/ath/ath11k/core.h
@@ -748,14 +748,6 @@ struct ath11k_board_data {
size_t len;
};
-struct ath11k_bus_params {
- bool mhi_support;
- bool m3_fw_support;
- bool fixed_bdf_addr;
- bool fixed_mem_region;
- bool static_window_map;
-};
-
struct ath11k_pci_ops {
int (*wakeup)(struct ath11k_base *ab);
void (*release)(struct ath11k_base *ab);
@@ -887,7 +879,6 @@ struct ath11k_base {
int bd_api;
struct ath11k_hw_params hw_params;
- struct ath11k_bus_params bus_params;
const struct firmware *cal_file;
@@ -1135,8 +1126,7 @@ int ath11k_core_pre_init(struct ath11k_base *ab);
int ath11k_core_init(struct ath11k_base *ath11k);
void ath11k_core_deinit(struct ath11k_base *ath11k);
struct ath11k_base *ath11k_core_alloc(struct device *dev, size_t priv_size,
- enum ath11k_bus bus,
- const struct ath11k_bus_params *bus_params);
+ enum ath11k_bus bus);
void ath11k_core_free(struct ath11k_base *ath11k);
int ath11k_core_fetch_bdf(struct ath11k_base *ath11k,
struct ath11k_board_data *bd);
diff --git a/drivers/net/wireless/ath/ath11k/hw.h b/drivers/net/wireless/ath/ath11k/hw.h
index b7ece3d5678c..09fa020bfee4 100644
--- a/drivers/net/wireless/ath/ath11k/hw.h
+++ b/drivers/net/wireless/ath/ath11k/hw.h
@@ -196,6 +196,10 @@ struct ath11k_hw_params {
bool dbr_debug_support;
bool global_reset;
const struct cfg80211_sar_capa *bios_sar_capa;
+ bool m3_fw_support;
+ bool fixed_bdf_addr;
+ bool fixed_mem_region;
+ bool static_window_map;
};
struct ath11k_hw_ops {
diff --git a/drivers/net/wireless/ath/ath11k/pci.c b/drivers/net/wireless/ath/ath11k/pci.c
index 024661a17008..dedf1b88ddf6 100644
--- a/drivers/net/wireless/ath/ath11k/pci.c
+++ b/drivers/net/wireless/ath/ath11k/pci.c
@@ -115,13 +115,6 @@ static const struct ath11k_pci_ops ath11k_pci_ops_qcn9074 = {
.window_read32 = ath11k_pci_window_read32,
};
-static const struct ath11k_bus_params ath11k_pci_bus_params = {
- .mhi_support = true,
- .m3_fw_support = true,
- .fixed_bdf_addr = false,
- .fixed_mem_region = false,
-};
-
static const struct ath11k_msi_config msi_config_one_msi = {
.total_vectors = 1,
.total_users = 4,
@@ -593,7 +586,7 @@ static int ath11k_pci_power_up(struct ath11k_base *ab)
return ret;
}
- if (ab->bus_params.static_window_map)
+ if (ab->hw_params.static_window_map)
ath11k_pci_select_static_window(ab_pci);
return 0;
@@ -706,8 +699,8 @@ static int ath11k_pci_probe(struct pci_dev *pdev,
u32 soc_hw_version_major, soc_hw_version_minor, addr;
int ret;
- ab = ath11k_core_alloc(&pdev->dev, sizeof(*ab_pci), ATH11K_BUS_PCI,
- &ath11k_pci_bus_params);
+ ab = ath11k_core_alloc(&pdev->dev, sizeof(*ab_pci), ATH11K_BUS_PCI);
+
if (!ab) {
dev_err(&pdev->dev, "failed to allocate ath11k base\n");
return -ENOMEM;
@@ -764,7 +757,6 @@ static int ath11k_pci_probe(struct pci_dev *pdev,
ab->pci.ops = &ath11k_pci_ops_qca6390;
break;
case QCN9074_DEVICE_ID:
- ab->bus_params.static_window_map = true;
ab->pci.ops = &ath11k_pci_ops_qcn9074;
ab->hw_rev = ATH11K_HW_QCN9074_HW10;
break;
diff --git a/drivers/net/wireless/ath/ath11k/pcic.c b/drivers/net/wireless/ath/ath11k/pcic.c
index 63c678aea29e..7a920d65023f 100644
--- a/drivers/net/wireless/ath/ath11k/pcic.c
+++ b/drivers/net/wireless/ath/ath11k/pcic.c
@@ -163,7 +163,7 @@ void ath11k_pcic_write32(struct ath11k_base *ab, u32 offset, u32 value)
if (offset < ATH11K_PCI_WINDOW_START) {
iowrite32(value, ab->mem + offset);
} else {
- if (ab->bus_params.static_window_map)
+ if (ab->hw_params.static_window_map)
window_start = ath11k_pcic_get_window_start(ab, offset);
else
window_start = ATH11K_PCI_WINDOW_START;
@@ -198,7 +198,7 @@ u32 ath11k_pcic_read32(struct ath11k_base *ab, u32 offset)
if (offset < ATH11K_PCI_WINDOW_START) {
val = ioread32(ab->mem + offset);
} else {
- if (ab->bus_params.static_window_map)
+ if (ab->hw_params.static_window_map)
window_start = ath11k_pcic_get_window_start(ab, offset);
else
window_start = ATH11K_PCI_WINDOW_START;
diff --git a/drivers/net/wireless/ath/ath11k/qmi.c b/drivers/net/wireless/ath/ath11k/qmi.c
index 0442faa3b7af..c89e76108237 100644
--- a/drivers/net/wireless/ath/ath11k/qmi.c
+++ b/drivers/net/wireless/ath/ath11k/qmi.c
@@ -1,6 +1,7 @@
// SPDX-License-Identifier: BSD-3-Clause-Clear
/*
* Copyright (c) 2018-2019 The Linux Foundation. All rights reserved.
+ * Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved.
*/
#include <linux/elf.h>
@@ -1648,7 +1649,7 @@ static int ath11k_qmi_host_cap_send(struct ath11k_base *ab)
req.bdf_support_valid = 1;
req.bdf_support = 1;
- if (ab->bus_params.m3_fw_support) {
+ if (ab->hw_params.m3_fw_support) {
req.m3_support_valid = 1;
req.m3_support = 1;
req.m3_cache_support_valid = 1;
@@ -1803,7 +1804,7 @@ static int ath11k_qmi_respond_fw_mem_request(struct ath11k_base *ab)
* failure to FW and FW will then request mulitple blocks of small
* chunk size memory.
*/
- if (!(ab->bus_params.fixed_mem_region ||
+ if (!(ab->hw_params.fixed_mem_region ||
test_bit(ATH11K_FLAG_FIXED_MEM_RGN, &ab->dev_flags)) &&
ab->qmi.target_mem_delayed) {
delayed = true;
@@ -1873,7 +1874,7 @@ static void ath11k_qmi_free_target_mem_chunk(struct ath11k_base *ab)
int i;
for (i = 0; i < ab->qmi.mem_seg_count; i++) {
- if ((ab->bus_params.fixed_mem_region ||
+ if ((ab->hw_params.fixed_mem_region ||
test_bit(ATH11K_FLAG_FIXED_MEM_RGN, &ab->dev_flags)) &&
ab->qmi.target_mem[i].iaddr)
iounmap(ab->qmi.target_mem[i].iaddr);
@@ -2124,7 +2125,7 @@ static int ath11k_qmi_load_file_target_mem(struct ath11k_base *ab,
memset(&resp, 0, sizeof(resp));
- if (ab->bus_params.fixed_bdf_addr) {
+ if (ab->hw_params.fixed_bdf_addr) {
bdf_addr = ioremap(ab->hw_params.bdf_addr, ab->hw_params.fw.board_size);
if (!bdf_addr) {
ath11k_warn(ab, "qmi ioremap error for bdf_addr\n");
@@ -2153,7 +2154,7 @@ static int ath11k_qmi_load_file_target_mem(struct ath11k_base *ab,
req->end = 1;
}
- if (ab->bus_params.fixed_bdf_addr ||
+ if (ab->hw_params.fixed_bdf_addr ||
type == ATH11K_QMI_FILE_TYPE_EEPROM) {
req->data_valid = 0;
req->end = 1;
@@ -2162,7 +2163,7 @@ static int ath11k_qmi_load_file_target_mem(struct ath11k_base *ab,
memcpy(req->data, temp, req->data_len);
}
- if (ab->bus_params.fixed_bdf_addr) {
+ if (ab->hw_params.fixed_bdf_addr) {
if (type == ATH11K_QMI_FILE_TYPE_CALDATA)
bdf_addr += ab->hw_params.fw.cal_offset;
@@ -2201,7 +2202,7 @@ static int ath11k_qmi_load_file_target_mem(struct ath11k_base *ab,
goto err_iounmap;
}
- if (ab->bus_params.fixed_bdf_addr ||
+ if (ab->hw_params.fixed_bdf_addr ||
type == ATH11K_QMI_FILE_TYPE_EEPROM) {
remaining = 0;
} else {
@@ -2214,7 +2215,7 @@ static int ath11k_qmi_load_file_target_mem(struct ath11k_base *ab,
}
err_iounmap:
- if (ab->bus_params.fixed_bdf_addr)
+ if (ab->hw_params.fixed_bdf_addr)
iounmap(bdf_addr);
err_free_req:
@@ -2353,7 +2354,7 @@ static void ath11k_qmi_m3_free(struct ath11k_base *ab)
{
struct m3_mem_region *m3_mem = &ab->qmi.m3_mem;
- if (!ab->bus_params.m3_fw_support || !m3_mem->vaddr)
+ if (!ab->hw_params.m3_fw_support || !m3_mem->vaddr)
return;
dma_free_coherent(ab->dev, m3_mem->size,
@@ -2373,7 +2374,7 @@ static int ath11k_qmi_wlanfw_m3_info_send(struct ath11k_base *ab)
memset(&req, 0, sizeof(req));
memset(&resp, 0, sizeof(resp));
- if (ab->bus_params.m3_fw_support) {
+ if (ab->hw_params.m3_fw_support) {
ret = ath11k_qmi_m3_load(ab);
if (ret) {
ath11k_err(ab, "failed to load m3 firmware: %d", ret);
@@ -2792,7 +2793,7 @@ static void ath11k_qmi_msg_mem_request_cb(struct qmi_handle *qmi_hdl,
msg->mem_seg[i].type, msg->mem_seg[i].size);
}
- if (ab->bus_params.fixed_mem_region ||
+ if (ab->hw_params.fixed_mem_region ||
test_bit(ATH11K_FLAG_FIXED_MEM_RGN, &ab->dev_flags)) {
ret = ath11k_qmi_assign_target_mem_chunk(ab);
if (ret) {
--
2.35.1
--
ath11k mailing list
ath11k@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/ath11k
^ permalink raw reply related [flat|nested] 36+ messages in thread
* [PATCH v7 3/9] ath11k: Add HW params for WCN6750
2022-04-29 17:04 ` Manikanta Pubbisetty
@ 2022-04-29 17:04 ` Manikanta Pubbisetty
-1 siblings, 0 replies; 36+ messages in thread
From: Manikanta Pubbisetty @ 2022-04-29 17:04 UTC (permalink / raw)
To: ath11k; +Cc: linux-wireless, devicetree, robh, mka, Manikanta Pubbisetty
WCN6750 is a PCIe based solution that is attached to and enumerated
by the WPSS (Wireless Processor SubSystem) Q6 processor.
Though it is a PCIe device, since it is not attached to APSS processor
(Application Processor SubSystem), APSS will be unaware of such a decice
and hence it is registered to the APSS processor as a platform device(AHB).
Because of this hybrid nature, it is called as a hybrid bus device.
A new variable hybrid_bus_type is defined in hw_params to indicate the
hybrid nature of the device.
Add HW params for WCN6750.
Tested-on: WCN6750 hw1.0 AHB WLAN.MSL.1.0.1-00887-QCAMSLSWPLZ-1
Tested-on: WCN6855 hw2.0 PCI WLAN.HSP.1.1-01720.1-QCAHSPSWPL_V1_V2_SILICONZ_LITE-1
Tested-on: QCN9074 hw1.0 PCI WLAN.HK.2.5.0.1-01100-QCAHKSWPL_SILICONZ-1
Tested-on: IPQ8074 hw2.0 AHB WLAN.HK.2.4.0.1-00192-QCAHKSWPL_SILICONZ-1
Signed-off-by: Manikanta Pubbisetty <quic_mpubbise@quicinc.com>
---
drivers/net/wireless/ath/ath11k/core.c | 72 ++++++++++++++++++++++++++
drivers/net/wireless/ath/ath11k/core.h | 1 +
drivers/net/wireless/ath/ath11k/hw.h | 1 +
drivers/net/wireless/ath/ath11k/qmi.h | 2 +
4 files changed, 76 insertions(+)
diff --git a/drivers/net/wireless/ath/ath11k/core.c b/drivers/net/wireless/ath/ath11k/core.c
index 19b5bb06c7e8..dc1084532cef 100644
--- a/drivers/net/wireless/ath/ath11k/core.c
+++ b/drivers/net/wireless/ath/ath11k/core.c
@@ -106,6 +106,7 @@ static const struct ath11k_hw_params ath11k_hw_params[] = {
.fixed_bdf_addr = true,
.fixed_mem_region = true,
.static_window_map = false,
+ .hybrid_bus_type = false,
},
{
.hw_rev = ATH11K_HW_IPQ6018_HW10,
@@ -177,6 +178,7 @@ static const struct ath11k_hw_params ath11k_hw_params[] = {
.fixed_bdf_addr = true,
.fixed_mem_region = true,
.static_window_map = false,
+ .hybrid_bus_type = false,
},
{
.name = "qca6390 hw2.0",
@@ -247,6 +249,7 @@ static const struct ath11k_hw_params ath11k_hw_params[] = {
.fixed_bdf_addr = false,
.fixed_mem_region = false,
.static_window_map = false,
+ .hybrid_bus_type = false,
},
{
.name = "qcn9074 hw1.0",
@@ -317,6 +320,7 @@ static const struct ath11k_hw_params ath11k_hw_params[] = {
.fixed_bdf_addr = false,
.fixed_mem_region = false,
.static_window_map = true,
+ .hybrid_bus_type = false,
},
{
.name = "wcn6855 hw2.0",
@@ -387,6 +391,7 @@ static const struct ath11k_hw_params ath11k_hw_params[] = {
.fixed_bdf_addr = false,
.fixed_mem_region = false,
.static_window_map = false,
+ .hybrid_bus_type = false,
},
{
.name = "wcn6855 hw2.1",
@@ -456,6 +461,73 @@ static const struct ath11k_hw_params ath11k_hw_params[] = {
.fixed_bdf_addr = false,
.fixed_mem_region = false,
.static_window_map = false,
+ .hybrid_bus_type = false,
+ },
+ {
+ .name = "wcn6750 hw1.0",
+ .hw_rev = ATH11K_HW_WCN6750_HW10,
+ .fw = {
+ .dir = "WCN6750/hw1.0",
+ .board_size = 256 * 1024,
+ .cal_offset = 128 * 1024,
+ },
+ .max_radios = 1,
+ .bdf_addr = 0x4B0C0000,
+ .ring_mask = &ath11k_hw_ring_mask_qca6390,
+ .internal_sleep_clock = false,
+ .qmi_service_ins_id = ATH11K_QMI_WLFW_SERVICE_INS_ID_V01_WCN6750,
+ .host_ce_config = ath11k_host_ce_config_qca6390,
+ .ce_count = 9,
+ .target_ce_config = ath11k_target_ce_config_wlan_qca6390,
+ .target_ce_count = 9,
+ .svc_to_ce_map = ath11k_target_service_to_ce_map_wlan_qca6390,
+ .svc_to_ce_map_len = 14,
+ .rfkill_pin = 0,
+ .rfkill_cfg = 0,
+ .rfkill_on_level = 0,
+ .single_pdev_only = true,
+ .rxdma1_enable = false,
+ .num_rxmda_per_pdev = 1,
+ .rx_mac_buf_ring = true,
+ .vdev_start_delay = true,
+ .htt_peer_map_v2 = false,
+
+ .spectral = {
+ .fft_sz = 0,
+ .fft_pad_sz = 0,
+ .summary_pad_sz = 0,
+ .fft_hdr_len = 0,
+ .max_fft_bins = 0,
+ },
+
+ .interface_modes = BIT(NL80211_IFTYPE_STATION) |
+ BIT(NL80211_IFTYPE_AP),
+ .supports_monitor = false,
+ .supports_shadow_regs = true,
+ .idle_ps = true,
+ .supports_sta_ps = true,
+ .cold_boot_calib = false,
+ .fw_mem_mode = 0,
+ .num_vdevs = 16 + 1,
+ .num_peers = 512,
+ .supports_suspend = false,
+ .supports_regdb = true,
+ .fix_l1ss = false,
+ .credit_flow = true,
+ .max_tx_ring = DP_TCL_NUM_RING_MAX_QCA6390,
+ .hal_params = &ath11k_hw_hal_params_qca6390,
+ .supports_dynamic_smps_6ghz = false,
+ .alloc_cacheable_memory = false,
+ .supports_rssi_stats = true,
+ .fw_wmi_diag_event = false,
+ .current_cc_support = true,
+ .dbr_debug_support = false,
+ .global_reset = false,
+ .bios_sar_capa = NULL,
+ .m3_fw_support = false,
+ .fixed_bdf_addr = false,
+ .fixed_mem_region = false,
+ .hybrid_bus_type = true,
},
};
diff --git a/drivers/net/wireless/ath/ath11k/core.h b/drivers/net/wireless/ath/ath11k/core.h
index d8ab28413d95..fdea44627125 100644
--- a/drivers/net/wireless/ath/ath11k/core.h
+++ b/drivers/net/wireless/ath/ath11k/core.h
@@ -140,6 +140,7 @@ enum ath11k_hw_rev {
ATH11K_HW_QCN9074_HW10,
ATH11K_HW_WCN6855_HW20,
ATH11K_HW_WCN6855_HW21,
+ ATH11K_HW_WCN6750_HW10,
};
enum ath11k_firmware_mode {
diff --git a/drivers/net/wireless/ath/ath11k/hw.h b/drivers/net/wireless/ath/ath11k/hw.h
index 09fa020bfee4..03eb5dfd4a5e 100644
--- a/drivers/net/wireless/ath/ath11k/hw.h
+++ b/drivers/net/wireless/ath/ath11k/hw.h
@@ -200,6 +200,7 @@ struct ath11k_hw_params {
bool fixed_bdf_addr;
bool fixed_mem_region;
bool static_window_map;
+ bool hybrid_bus_type;
};
struct ath11k_hw_ops {
diff --git a/drivers/net/wireless/ath/ath11k/qmi.h b/drivers/net/wireless/ath/ath11k/qmi.h
index 61678de56ac7..e0201e184733 100644
--- a/drivers/net/wireless/ath/ath11k/qmi.h
+++ b/drivers/net/wireless/ath/ath11k/qmi.h
@@ -1,6 +1,7 @@
/* SPDX-License-Identifier: BSD-3-Clause-Clear */
/*
* Copyright (c) 2018-2019 The Linux Foundation. All rights reserved.
+ * Copyright (c) 2022, Qualcomm Innovation Center, Inc. All rights reserved.
*/
#ifndef ATH11K_QMI_H
@@ -20,6 +21,7 @@
#define ATH11K_QMI_WLFW_SERVICE_INS_ID_V01_QCA6390 0x01
#define ATH11K_QMI_WLFW_SERVICE_INS_ID_V01_IPQ8074 0x02
#define ATH11K_QMI_WLFW_SERVICE_INS_ID_V01_QCN9074 0x07
+#define ATH11K_QMI_WLFW_SERVICE_INS_ID_V01_WCN6750 0x03
#define ATH11K_QMI_WLANFW_MAX_TIMESTAMP_LEN_V01 32
#define ATH11K_QMI_RESP_LEN_MAX 8192
#define ATH11K_QMI_WLANFW_MAX_NUM_MEM_SEG_V01 52
--
2.35.1
^ permalink raw reply related [flat|nested] 36+ messages in thread* [PATCH v7 3/9] ath11k: Add HW params for WCN6750
@ 2022-04-29 17:04 ` Manikanta Pubbisetty
0 siblings, 0 replies; 36+ messages in thread
From: Manikanta Pubbisetty @ 2022-04-29 17:04 UTC (permalink / raw)
To: ath11k; +Cc: linux-wireless, devicetree, robh, mka, Manikanta Pubbisetty
WCN6750 is a PCIe based solution that is attached to and enumerated
by the WPSS (Wireless Processor SubSystem) Q6 processor.
Though it is a PCIe device, since it is not attached to APSS processor
(Application Processor SubSystem), APSS will be unaware of such a decice
and hence it is registered to the APSS processor as a platform device(AHB).
Because of this hybrid nature, it is called as a hybrid bus device.
A new variable hybrid_bus_type is defined in hw_params to indicate the
hybrid nature of the device.
Add HW params for WCN6750.
Tested-on: WCN6750 hw1.0 AHB WLAN.MSL.1.0.1-00887-QCAMSLSWPLZ-1
Tested-on: WCN6855 hw2.0 PCI WLAN.HSP.1.1-01720.1-QCAHSPSWPL_V1_V2_SILICONZ_LITE-1
Tested-on: QCN9074 hw1.0 PCI WLAN.HK.2.5.0.1-01100-QCAHKSWPL_SILICONZ-1
Tested-on: IPQ8074 hw2.0 AHB WLAN.HK.2.4.0.1-00192-QCAHKSWPL_SILICONZ-1
Signed-off-by: Manikanta Pubbisetty <quic_mpubbise@quicinc.com>
---
drivers/net/wireless/ath/ath11k/core.c | 72 ++++++++++++++++++++++++++
drivers/net/wireless/ath/ath11k/core.h | 1 +
drivers/net/wireless/ath/ath11k/hw.h | 1 +
drivers/net/wireless/ath/ath11k/qmi.h | 2 +
4 files changed, 76 insertions(+)
diff --git a/drivers/net/wireless/ath/ath11k/core.c b/drivers/net/wireless/ath/ath11k/core.c
index 19b5bb06c7e8..dc1084532cef 100644
--- a/drivers/net/wireless/ath/ath11k/core.c
+++ b/drivers/net/wireless/ath/ath11k/core.c
@@ -106,6 +106,7 @@ static const struct ath11k_hw_params ath11k_hw_params[] = {
.fixed_bdf_addr = true,
.fixed_mem_region = true,
.static_window_map = false,
+ .hybrid_bus_type = false,
},
{
.hw_rev = ATH11K_HW_IPQ6018_HW10,
@@ -177,6 +178,7 @@ static const struct ath11k_hw_params ath11k_hw_params[] = {
.fixed_bdf_addr = true,
.fixed_mem_region = true,
.static_window_map = false,
+ .hybrid_bus_type = false,
},
{
.name = "qca6390 hw2.0",
@@ -247,6 +249,7 @@ static const struct ath11k_hw_params ath11k_hw_params[] = {
.fixed_bdf_addr = false,
.fixed_mem_region = false,
.static_window_map = false,
+ .hybrid_bus_type = false,
},
{
.name = "qcn9074 hw1.0",
@@ -317,6 +320,7 @@ static const struct ath11k_hw_params ath11k_hw_params[] = {
.fixed_bdf_addr = false,
.fixed_mem_region = false,
.static_window_map = true,
+ .hybrid_bus_type = false,
},
{
.name = "wcn6855 hw2.0",
@@ -387,6 +391,7 @@ static const struct ath11k_hw_params ath11k_hw_params[] = {
.fixed_bdf_addr = false,
.fixed_mem_region = false,
.static_window_map = false,
+ .hybrid_bus_type = false,
},
{
.name = "wcn6855 hw2.1",
@@ -456,6 +461,73 @@ static const struct ath11k_hw_params ath11k_hw_params[] = {
.fixed_bdf_addr = false,
.fixed_mem_region = false,
.static_window_map = false,
+ .hybrid_bus_type = false,
+ },
+ {
+ .name = "wcn6750 hw1.0",
+ .hw_rev = ATH11K_HW_WCN6750_HW10,
+ .fw = {
+ .dir = "WCN6750/hw1.0",
+ .board_size = 256 * 1024,
+ .cal_offset = 128 * 1024,
+ },
+ .max_radios = 1,
+ .bdf_addr = 0x4B0C0000,
+ .ring_mask = &ath11k_hw_ring_mask_qca6390,
+ .internal_sleep_clock = false,
+ .qmi_service_ins_id = ATH11K_QMI_WLFW_SERVICE_INS_ID_V01_WCN6750,
+ .host_ce_config = ath11k_host_ce_config_qca6390,
+ .ce_count = 9,
+ .target_ce_config = ath11k_target_ce_config_wlan_qca6390,
+ .target_ce_count = 9,
+ .svc_to_ce_map = ath11k_target_service_to_ce_map_wlan_qca6390,
+ .svc_to_ce_map_len = 14,
+ .rfkill_pin = 0,
+ .rfkill_cfg = 0,
+ .rfkill_on_level = 0,
+ .single_pdev_only = true,
+ .rxdma1_enable = false,
+ .num_rxmda_per_pdev = 1,
+ .rx_mac_buf_ring = true,
+ .vdev_start_delay = true,
+ .htt_peer_map_v2 = false,
+
+ .spectral = {
+ .fft_sz = 0,
+ .fft_pad_sz = 0,
+ .summary_pad_sz = 0,
+ .fft_hdr_len = 0,
+ .max_fft_bins = 0,
+ },
+
+ .interface_modes = BIT(NL80211_IFTYPE_STATION) |
+ BIT(NL80211_IFTYPE_AP),
+ .supports_monitor = false,
+ .supports_shadow_regs = true,
+ .idle_ps = true,
+ .supports_sta_ps = true,
+ .cold_boot_calib = false,
+ .fw_mem_mode = 0,
+ .num_vdevs = 16 + 1,
+ .num_peers = 512,
+ .supports_suspend = false,
+ .supports_regdb = true,
+ .fix_l1ss = false,
+ .credit_flow = true,
+ .max_tx_ring = DP_TCL_NUM_RING_MAX_QCA6390,
+ .hal_params = &ath11k_hw_hal_params_qca6390,
+ .supports_dynamic_smps_6ghz = false,
+ .alloc_cacheable_memory = false,
+ .supports_rssi_stats = true,
+ .fw_wmi_diag_event = false,
+ .current_cc_support = true,
+ .dbr_debug_support = false,
+ .global_reset = false,
+ .bios_sar_capa = NULL,
+ .m3_fw_support = false,
+ .fixed_bdf_addr = false,
+ .fixed_mem_region = false,
+ .hybrid_bus_type = true,
},
};
diff --git a/drivers/net/wireless/ath/ath11k/core.h b/drivers/net/wireless/ath/ath11k/core.h
index d8ab28413d95..fdea44627125 100644
--- a/drivers/net/wireless/ath/ath11k/core.h
+++ b/drivers/net/wireless/ath/ath11k/core.h
@@ -140,6 +140,7 @@ enum ath11k_hw_rev {
ATH11K_HW_QCN9074_HW10,
ATH11K_HW_WCN6855_HW20,
ATH11K_HW_WCN6855_HW21,
+ ATH11K_HW_WCN6750_HW10,
};
enum ath11k_firmware_mode {
diff --git a/drivers/net/wireless/ath/ath11k/hw.h b/drivers/net/wireless/ath/ath11k/hw.h
index 09fa020bfee4..03eb5dfd4a5e 100644
--- a/drivers/net/wireless/ath/ath11k/hw.h
+++ b/drivers/net/wireless/ath/ath11k/hw.h
@@ -200,6 +200,7 @@ struct ath11k_hw_params {
bool fixed_bdf_addr;
bool fixed_mem_region;
bool static_window_map;
+ bool hybrid_bus_type;
};
struct ath11k_hw_ops {
diff --git a/drivers/net/wireless/ath/ath11k/qmi.h b/drivers/net/wireless/ath/ath11k/qmi.h
index 61678de56ac7..e0201e184733 100644
--- a/drivers/net/wireless/ath/ath11k/qmi.h
+++ b/drivers/net/wireless/ath/ath11k/qmi.h
@@ -1,6 +1,7 @@
/* SPDX-License-Identifier: BSD-3-Clause-Clear */
/*
* Copyright (c) 2018-2019 The Linux Foundation. All rights reserved.
+ * Copyright (c) 2022, Qualcomm Innovation Center, Inc. All rights reserved.
*/
#ifndef ATH11K_QMI_H
@@ -20,6 +21,7 @@
#define ATH11K_QMI_WLFW_SERVICE_INS_ID_V01_QCA6390 0x01
#define ATH11K_QMI_WLFW_SERVICE_INS_ID_V01_IPQ8074 0x02
#define ATH11K_QMI_WLFW_SERVICE_INS_ID_V01_QCN9074 0x07
+#define ATH11K_QMI_WLFW_SERVICE_INS_ID_V01_WCN6750 0x03
#define ATH11K_QMI_WLANFW_MAX_TIMESTAMP_LEN_V01 32
#define ATH11K_QMI_RESP_LEN_MAX 8192
#define ATH11K_QMI_WLANFW_MAX_NUM_MEM_SEG_V01 52
--
2.35.1
--
ath11k mailing list
ath11k@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/ath11k
^ permalink raw reply related [flat|nested] 36+ messages in thread
* [PATCH v7 4/9] ath11k: Add register access logic for WCN6750
2022-04-29 17:04 ` Manikanta Pubbisetty
@ 2022-04-29 17:04 ` Manikanta Pubbisetty
-1 siblings, 0 replies; 36+ messages in thread
From: Manikanta Pubbisetty @ 2022-04-29 17:04 UTC (permalink / raw)
To: ath11k; +Cc: linux-wireless, devicetree, robh, mka, Manikanta Pubbisetty
WCN6750 uses static window mapping to access the HW registers.
Unlike QCN9074 which uses 3rd window for UMAC and 2nd window
for CE register access, WCN6750 uses 1st window for UMAC
and 2nd window for CE registers.
Also, refactor the code so that WCN6750 can use the existing
ath11k_pci_read32/write32() APIs for accessing the registers.
Tested-on: WCN6750 hw1.0 AHB WLAN.MSL.1.0.1-00887-QCAMSLSWPLZ-1
Tested-on: WCN6855 hw2.0 PCI WLAN.HSP.1.1-01720.1-QCAHSPSWPL_V1_V2_SILICONZ_LITE-1
Tested-on: QCN9074 hw1.0 PCI WLAN.HK.2.5.0.1-01100-QCAHKSWPL_SILICONZ-1
Tested-on: IPQ8074 hw2.0 AHB WLAN.HK.2.4.0.1-00192-QCAHKSWPL_SILICONZ-1
Signed-off-by: Manikanta Pubbisetty <quic_mpubbise@quicinc.com>
---
drivers/net/wireless/ath/ath11k/core.c | 15 +++++++
drivers/net/wireless/ath/ath11k/hw.h | 2 +
drivers/net/wireless/ath/ath11k/pcic.c | 54 +++++++++-----------------
3 files changed, 36 insertions(+), 35 deletions(-)
diff --git a/drivers/net/wireless/ath/ath11k/core.c b/drivers/net/wireless/ath/ath11k/core.c
index dc1084532cef..3be4327b4d9c 100644
--- a/drivers/net/wireless/ath/ath11k/core.c
+++ b/drivers/net/wireless/ath/ath11k/core.c
@@ -107,6 +107,8 @@ static const struct ath11k_hw_params ath11k_hw_params[] = {
.fixed_mem_region = true,
.static_window_map = false,
.hybrid_bus_type = false,
+ .dp_window_idx = 0,
+ .ce_window_idx = 0,
},
{
.hw_rev = ATH11K_HW_IPQ6018_HW10,
@@ -179,6 +181,8 @@ static const struct ath11k_hw_params ath11k_hw_params[] = {
.fixed_mem_region = true,
.static_window_map = false,
.hybrid_bus_type = false,
+ .dp_window_idx = 0,
+ .ce_window_idx = 0,
},
{
.name = "qca6390 hw2.0",
@@ -250,6 +254,8 @@ static const struct ath11k_hw_params ath11k_hw_params[] = {
.fixed_mem_region = false,
.static_window_map = false,
.hybrid_bus_type = false,
+ .dp_window_idx = 0,
+ .ce_window_idx = 0,
},
{
.name = "qcn9074 hw1.0",
@@ -321,6 +327,8 @@ static const struct ath11k_hw_params ath11k_hw_params[] = {
.fixed_mem_region = false,
.static_window_map = true,
.hybrid_bus_type = false,
+ .dp_window_idx = 3,
+ .ce_window_idx = 2,
},
{
.name = "wcn6855 hw2.0",
@@ -392,6 +400,8 @@ static const struct ath11k_hw_params ath11k_hw_params[] = {
.fixed_mem_region = false,
.static_window_map = false,
.hybrid_bus_type = false,
+ .dp_window_idx = 0,
+ .ce_window_idx = 0,
},
{
.name = "wcn6855 hw2.1",
@@ -462,6 +472,8 @@ static const struct ath11k_hw_params ath11k_hw_params[] = {
.fixed_mem_region = false,
.static_window_map = false,
.hybrid_bus_type = false,
+ .dp_window_idx = 0,
+ .ce_window_idx = 0,
},
{
.name = "wcn6750 hw1.0",
@@ -527,7 +539,10 @@ static const struct ath11k_hw_params ath11k_hw_params[] = {
.m3_fw_support = false,
.fixed_bdf_addr = false,
.fixed_mem_region = false,
+ .static_window_map = true,
.hybrid_bus_type = true,
+ .dp_window_idx = 1,
+ .ce_window_idx = 2,
},
};
diff --git a/drivers/net/wireless/ath/ath11k/hw.h b/drivers/net/wireless/ath/ath11k/hw.h
index 03eb5dfd4a5e..b63538084215 100644
--- a/drivers/net/wireless/ath/ath11k/hw.h
+++ b/drivers/net/wireless/ath/ath11k/hw.h
@@ -201,6 +201,8 @@ struct ath11k_hw_params {
bool fixed_mem_region;
bool static_window_map;
bool hybrid_bus_type;
+ u8 dp_window_idx;
+ u8 ce_window_idx;
};
struct ath11k_hw_ops {
diff --git a/drivers/net/wireless/ath/ath11k/pcic.c b/drivers/net/wireless/ath/ath11k/pcic.c
index 7a920d65023f..46cf96d3e1d2 100644
--- a/drivers/net/wireless/ath/ath11k/pcic.c
+++ b/drivers/net/wireless/ath/ath11k/pcic.c
@@ -134,16 +134,13 @@ EXPORT_SYMBOL(ath11k_pcic_init_msi_config);
static inline u32 ath11k_pcic_get_window_start(struct ath11k_base *ab,
u32 offset)
{
- u32 window_start;
+ u32 window_start = 0;
- /* If offset lies within DP register range, use 3rd window */
if ((offset ^ HAL_SEQ_WCSS_UMAC_OFFSET) < ATH11K_PCI_WINDOW_RANGE_MASK)
- window_start = 3 * ATH11K_PCI_WINDOW_START;
- /* If offset lies within CE register range, use 2nd window */
- else if ((offset ^ HAL_CE_WFSS_CE_REG_BASE) < ATH11K_PCI_WINDOW_RANGE_MASK)
- window_start = 2 * ATH11K_PCI_WINDOW_START;
- else
- window_start = ATH11K_PCI_WINDOW_START;
+ window_start = ab->hw_params.dp_window_idx * ATH11K_PCI_WINDOW_START;
+ else if ((offset ^ HAL_SEQ_WCSS_UMAC_CE0_SRC_REG(ab)) <
+ ATH11K_PCI_WINDOW_RANGE_MASK)
+ window_start = ab->hw_params.ce_window_idx * ATH11K_PCI_WINDOW_START;
return window_start;
}
@@ -162,19 +159,12 @@ void ath11k_pcic_write32(struct ath11k_base *ab, u32 offset, u32 value)
if (offset < ATH11K_PCI_WINDOW_START) {
iowrite32(value, ab->mem + offset);
- } else {
- if (ab->hw_params.static_window_map)
- window_start = ath11k_pcic_get_window_start(ab, offset);
- else
- window_start = ATH11K_PCI_WINDOW_START;
-
- if (window_start == ATH11K_PCI_WINDOW_START &&
- ab->pci.ops->window_write32) {
- ab->pci.ops->window_write32(ab, offset, value);
- } else {
- iowrite32(value, ab->mem + window_start +
- (offset & ATH11K_PCI_WINDOW_RANGE_MASK));
- }
+ } else if (ab->hw_params.static_window_map) {
+ window_start = ath11k_pcic_get_window_start(ab, offset);
+ iowrite32(value, ab->mem + window_start +
+ (offset & ATH11K_PCI_WINDOW_RANGE_MASK));
+ } else if (ab->pci.ops->window_write32) {
+ ab->pci.ops->window_write32(ab, offset, value);
}
if (test_bit(ATH11K_FLAG_DEVICE_INIT_DONE, &ab->dev_flags) &&
@@ -185,7 +175,8 @@ void ath11k_pcic_write32(struct ath11k_base *ab, u32 offset, u32 value)
u32 ath11k_pcic_read32(struct ath11k_base *ab, u32 offset)
{
- u32 val, window_start;
+ u32 val = 0;
+ u32 window_start;
int ret = 0;
/* for offset beyond BAR + 4K - 32, may
@@ -197,19 +188,12 @@ u32 ath11k_pcic_read32(struct ath11k_base *ab, u32 offset)
if (offset < ATH11K_PCI_WINDOW_START) {
val = ioread32(ab->mem + offset);
- } else {
- if (ab->hw_params.static_window_map)
- window_start = ath11k_pcic_get_window_start(ab, offset);
- else
- window_start = ATH11K_PCI_WINDOW_START;
-
- if (window_start == ATH11K_PCI_WINDOW_START &&
- ab->pci.ops->window_read32) {
- val = ab->pci.ops->window_read32(ab, offset);
- } else {
- val = ioread32(ab->mem + window_start +
- (offset & ATH11K_PCI_WINDOW_RANGE_MASK));
- }
+ } else if (ab->hw_params.static_window_map) {
+ window_start = ath11k_pcic_get_window_start(ab, offset);
+ val = ioread32(ab->mem + window_start +
+ (offset & ATH11K_PCI_WINDOW_RANGE_MASK));
+ } else if (ab->pci.ops->window_read32) {
+ val = ab->pci.ops->window_read32(ab, offset);
}
if (test_bit(ATH11K_FLAG_DEVICE_INIT_DONE, &ab->dev_flags) &&
--
2.35.1
^ permalink raw reply related [flat|nested] 36+ messages in thread* [PATCH v7 4/9] ath11k: Add register access logic for WCN6750
@ 2022-04-29 17:04 ` Manikanta Pubbisetty
0 siblings, 0 replies; 36+ messages in thread
From: Manikanta Pubbisetty @ 2022-04-29 17:04 UTC (permalink / raw)
To: ath11k; +Cc: linux-wireless, devicetree, robh, mka, Manikanta Pubbisetty
WCN6750 uses static window mapping to access the HW registers.
Unlike QCN9074 which uses 3rd window for UMAC and 2nd window
for CE register access, WCN6750 uses 1st window for UMAC
and 2nd window for CE registers.
Also, refactor the code so that WCN6750 can use the existing
ath11k_pci_read32/write32() APIs for accessing the registers.
Tested-on: WCN6750 hw1.0 AHB WLAN.MSL.1.0.1-00887-QCAMSLSWPLZ-1
Tested-on: WCN6855 hw2.0 PCI WLAN.HSP.1.1-01720.1-QCAHSPSWPL_V1_V2_SILICONZ_LITE-1
Tested-on: QCN9074 hw1.0 PCI WLAN.HK.2.5.0.1-01100-QCAHKSWPL_SILICONZ-1
Tested-on: IPQ8074 hw2.0 AHB WLAN.HK.2.4.0.1-00192-QCAHKSWPL_SILICONZ-1
Signed-off-by: Manikanta Pubbisetty <quic_mpubbise@quicinc.com>
---
drivers/net/wireless/ath/ath11k/core.c | 15 +++++++
drivers/net/wireless/ath/ath11k/hw.h | 2 +
drivers/net/wireless/ath/ath11k/pcic.c | 54 +++++++++-----------------
3 files changed, 36 insertions(+), 35 deletions(-)
diff --git a/drivers/net/wireless/ath/ath11k/core.c b/drivers/net/wireless/ath/ath11k/core.c
index dc1084532cef..3be4327b4d9c 100644
--- a/drivers/net/wireless/ath/ath11k/core.c
+++ b/drivers/net/wireless/ath/ath11k/core.c
@@ -107,6 +107,8 @@ static const struct ath11k_hw_params ath11k_hw_params[] = {
.fixed_mem_region = true,
.static_window_map = false,
.hybrid_bus_type = false,
+ .dp_window_idx = 0,
+ .ce_window_idx = 0,
},
{
.hw_rev = ATH11K_HW_IPQ6018_HW10,
@@ -179,6 +181,8 @@ static const struct ath11k_hw_params ath11k_hw_params[] = {
.fixed_mem_region = true,
.static_window_map = false,
.hybrid_bus_type = false,
+ .dp_window_idx = 0,
+ .ce_window_idx = 0,
},
{
.name = "qca6390 hw2.0",
@@ -250,6 +254,8 @@ static const struct ath11k_hw_params ath11k_hw_params[] = {
.fixed_mem_region = false,
.static_window_map = false,
.hybrid_bus_type = false,
+ .dp_window_idx = 0,
+ .ce_window_idx = 0,
},
{
.name = "qcn9074 hw1.0",
@@ -321,6 +327,8 @@ static const struct ath11k_hw_params ath11k_hw_params[] = {
.fixed_mem_region = false,
.static_window_map = true,
.hybrid_bus_type = false,
+ .dp_window_idx = 3,
+ .ce_window_idx = 2,
},
{
.name = "wcn6855 hw2.0",
@@ -392,6 +400,8 @@ static const struct ath11k_hw_params ath11k_hw_params[] = {
.fixed_mem_region = false,
.static_window_map = false,
.hybrid_bus_type = false,
+ .dp_window_idx = 0,
+ .ce_window_idx = 0,
},
{
.name = "wcn6855 hw2.1",
@@ -462,6 +472,8 @@ static const struct ath11k_hw_params ath11k_hw_params[] = {
.fixed_mem_region = false,
.static_window_map = false,
.hybrid_bus_type = false,
+ .dp_window_idx = 0,
+ .ce_window_idx = 0,
},
{
.name = "wcn6750 hw1.0",
@@ -527,7 +539,10 @@ static const struct ath11k_hw_params ath11k_hw_params[] = {
.m3_fw_support = false,
.fixed_bdf_addr = false,
.fixed_mem_region = false,
+ .static_window_map = true,
.hybrid_bus_type = true,
+ .dp_window_idx = 1,
+ .ce_window_idx = 2,
},
};
diff --git a/drivers/net/wireless/ath/ath11k/hw.h b/drivers/net/wireless/ath/ath11k/hw.h
index 03eb5dfd4a5e..b63538084215 100644
--- a/drivers/net/wireless/ath/ath11k/hw.h
+++ b/drivers/net/wireless/ath/ath11k/hw.h
@@ -201,6 +201,8 @@ struct ath11k_hw_params {
bool fixed_mem_region;
bool static_window_map;
bool hybrid_bus_type;
+ u8 dp_window_idx;
+ u8 ce_window_idx;
};
struct ath11k_hw_ops {
diff --git a/drivers/net/wireless/ath/ath11k/pcic.c b/drivers/net/wireless/ath/ath11k/pcic.c
index 7a920d65023f..46cf96d3e1d2 100644
--- a/drivers/net/wireless/ath/ath11k/pcic.c
+++ b/drivers/net/wireless/ath/ath11k/pcic.c
@@ -134,16 +134,13 @@ EXPORT_SYMBOL(ath11k_pcic_init_msi_config);
static inline u32 ath11k_pcic_get_window_start(struct ath11k_base *ab,
u32 offset)
{
- u32 window_start;
+ u32 window_start = 0;
- /* If offset lies within DP register range, use 3rd window */
if ((offset ^ HAL_SEQ_WCSS_UMAC_OFFSET) < ATH11K_PCI_WINDOW_RANGE_MASK)
- window_start = 3 * ATH11K_PCI_WINDOW_START;
- /* If offset lies within CE register range, use 2nd window */
- else if ((offset ^ HAL_CE_WFSS_CE_REG_BASE) < ATH11K_PCI_WINDOW_RANGE_MASK)
- window_start = 2 * ATH11K_PCI_WINDOW_START;
- else
- window_start = ATH11K_PCI_WINDOW_START;
+ window_start = ab->hw_params.dp_window_idx * ATH11K_PCI_WINDOW_START;
+ else if ((offset ^ HAL_SEQ_WCSS_UMAC_CE0_SRC_REG(ab)) <
+ ATH11K_PCI_WINDOW_RANGE_MASK)
+ window_start = ab->hw_params.ce_window_idx * ATH11K_PCI_WINDOW_START;
return window_start;
}
@@ -162,19 +159,12 @@ void ath11k_pcic_write32(struct ath11k_base *ab, u32 offset, u32 value)
if (offset < ATH11K_PCI_WINDOW_START) {
iowrite32(value, ab->mem + offset);
- } else {
- if (ab->hw_params.static_window_map)
- window_start = ath11k_pcic_get_window_start(ab, offset);
- else
- window_start = ATH11K_PCI_WINDOW_START;
-
- if (window_start == ATH11K_PCI_WINDOW_START &&
- ab->pci.ops->window_write32) {
- ab->pci.ops->window_write32(ab, offset, value);
- } else {
- iowrite32(value, ab->mem + window_start +
- (offset & ATH11K_PCI_WINDOW_RANGE_MASK));
- }
+ } else if (ab->hw_params.static_window_map) {
+ window_start = ath11k_pcic_get_window_start(ab, offset);
+ iowrite32(value, ab->mem + window_start +
+ (offset & ATH11K_PCI_WINDOW_RANGE_MASK));
+ } else if (ab->pci.ops->window_write32) {
+ ab->pci.ops->window_write32(ab, offset, value);
}
if (test_bit(ATH11K_FLAG_DEVICE_INIT_DONE, &ab->dev_flags) &&
@@ -185,7 +175,8 @@ void ath11k_pcic_write32(struct ath11k_base *ab, u32 offset, u32 value)
u32 ath11k_pcic_read32(struct ath11k_base *ab, u32 offset)
{
- u32 val, window_start;
+ u32 val = 0;
+ u32 window_start;
int ret = 0;
/* for offset beyond BAR + 4K - 32, may
@@ -197,19 +188,12 @@ u32 ath11k_pcic_read32(struct ath11k_base *ab, u32 offset)
if (offset < ATH11K_PCI_WINDOW_START) {
val = ioread32(ab->mem + offset);
- } else {
- if (ab->hw_params.static_window_map)
- window_start = ath11k_pcic_get_window_start(ab, offset);
- else
- window_start = ATH11K_PCI_WINDOW_START;
-
- if (window_start == ATH11K_PCI_WINDOW_START &&
- ab->pci.ops->window_read32) {
- val = ab->pci.ops->window_read32(ab, offset);
- } else {
- val = ioread32(ab->mem + window_start +
- (offset & ATH11K_PCI_WINDOW_RANGE_MASK));
- }
+ } else if (ab->hw_params.static_window_map) {
+ window_start = ath11k_pcic_get_window_start(ab, offset);
+ val = ioread32(ab->mem + window_start +
+ (offset & ATH11K_PCI_WINDOW_RANGE_MASK));
+ } else if (ab->pci.ops->window_read32) {
+ val = ab->pci.ops->window_read32(ab, offset);
}
if (test_bit(ATH11K_FLAG_DEVICE_INIT_DONE, &ab->dev_flags) &&
--
2.35.1
--
ath11k mailing list
ath11k@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/ath11k
^ permalink raw reply related [flat|nested] 36+ messages in thread* Re: [PATCH v7 4/9] ath11k: Add register access logic for WCN6750
2022-04-29 17:04 ` Manikanta Pubbisetty
@ 2022-05-02 9:12 ` Kalle Valo
-1 siblings, 0 replies; 36+ messages in thread
From: Kalle Valo @ 2022-05-02 9:12 UTC (permalink / raw)
To: Manikanta Pubbisetty; +Cc: ath11k, linux-wireless, devicetree, robh, mka
Manikanta Pubbisetty <quic_mpubbise@quicinc.com> writes:
> WCN6750 uses static window mapping to access the HW registers.
> Unlike QCN9074 which uses 3rd window for UMAC and 2nd window
> for CE register access, WCN6750 uses 1st window for UMAC
> and 2nd window for CE registers.
>
> Also, refactor the code so that WCN6750 can use the existing
> ath11k_pci_read32/write32() APIs for accessing the registers.
>
> Tested-on: WCN6750 hw1.0 AHB WLAN.MSL.1.0.1-00887-QCAMSLSWPLZ-1
> Tested-on: WCN6855 hw2.0 PCI WLAN.HSP.1.1-01720.1-QCAHSPSWPL_V1_V2_SILICONZ_LITE-1
> Tested-on: QCN9074 hw1.0 PCI WLAN.HK.2.5.0.1-01100-QCAHKSWPL_SILICONZ-1
> Tested-on: IPQ8074 hw2.0 AHB WLAN.HK.2.4.0.1-00192-QCAHKSWPL_SILICONZ-1
>
> Signed-off-by: Manikanta Pubbisetty <quic_mpubbise@quicinc.com>
[...]
> {
> .name = "wcn6750 hw1.0",
> @@ -527,7 +539,10 @@ static const struct ath11k_hw_params ath11k_hw_params[] = {
> .m3_fw_support = false,
> .fixed_bdf_addr = false,
> .fixed_mem_region = false,
> + .static_window_map = true,
> .hybrid_bus_type = true,
> + .dp_window_idx = 1,
> + .ce_window_idx = 2,
> },
In the pending branch I moved setting of static_window_map to patch 3.
--
https://patchwork.kernel.org/project/linux-wireless/list/
https://wireless.wiki.kernel.org/en/developers/documentation/submittingpatches
^ permalink raw reply [flat|nested] 36+ messages in thread* Re: [PATCH v7 4/9] ath11k: Add register access logic for WCN6750
@ 2022-05-02 9:12 ` Kalle Valo
0 siblings, 0 replies; 36+ messages in thread
From: Kalle Valo @ 2022-05-02 9:12 UTC (permalink / raw)
To: Manikanta Pubbisetty; +Cc: ath11k, linux-wireless, devicetree, robh, mka
Manikanta Pubbisetty <quic_mpubbise@quicinc.com> writes:
> WCN6750 uses static window mapping to access the HW registers.
> Unlike QCN9074 which uses 3rd window for UMAC and 2nd window
> for CE register access, WCN6750 uses 1st window for UMAC
> and 2nd window for CE registers.
>
> Also, refactor the code so that WCN6750 can use the existing
> ath11k_pci_read32/write32() APIs for accessing the registers.
>
> Tested-on: WCN6750 hw1.0 AHB WLAN.MSL.1.0.1-00887-QCAMSLSWPLZ-1
> Tested-on: WCN6855 hw2.0 PCI WLAN.HSP.1.1-01720.1-QCAHSPSWPL_V1_V2_SILICONZ_LITE-1
> Tested-on: QCN9074 hw1.0 PCI WLAN.HK.2.5.0.1-01100-QCAHKSWPL_SILICONZ-1
> Tested-on: IPQ8074 hw2.0 AHB WLAN.HK.2.4.0.1-00192-QCAHKSWPL_SILICONZ-1
>
> Signed-off-by: Manikanta Pubbisetty <quic_mpubbise@quicinc.com>
[...]
> {
> .name = "wcn6750 hw1.0",
> @@ -527,7 +539,10 @@ static const struct ath11k_hw_params ath11k_hw_params[] = {
> .m3_fw_support = false,
> .fixed_bdf_addr = false,
> .fixed_mem_region = false,
> + .static_window_map = true,
> .hybrid_bus_type = true,
> + .dp_window_idx = 1,
> + .ce_window_idx = 2,
> },
In the pending branch I moved setting of static_window_map to patch 3.
--
https://patchwork.kernel.org/project/linux-wireless/list/
https://wireless.wiki.kernel.org/en/developers/documentation/submittingpatches
--
ath11k mailing list
ath11k@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/ath11k
^ permalink raw reply [flat|nested] 36+ messages in thread
* Re: [PATCH v7 4/9] ath11k: Add register access logic for WCN6750
2022-04-29 17:04 ` Manikanta Pubbisetty
@ 2022-05-25 18:46 ` Maxime Bizon
-1 siblings, 0 replies; 36+ messages in thread
From: Maxime Bizon @ 2022-05-25 18:46 UTC (permalink / raw)
To: Manikanta Pubbisetty, ath11k; +Cc: linux-wireless, devicetree, robh, mka
On Fri, 2022-04-29 at 22:34 +0530, Manikanta Pubbisetty wrote:
Hello Manikanta,
> Tested-on: QCN9074 hw1.0 PCI WLAN.HK.2.5.0.1-01100-
> QCAHKSWPL_SILICONZ-1
Nope your patch breaks QCN9074:
[ 13.660963] ath11k_pci 0000:03:00.0: failed to set pcie link register 0x01e0e0a8: 0xffffffff != 0x00000010
[ 13.675994] ath11k_pci 0000:03:00.0: failed to set sysclk: -110
device still seem to work though
> @@ -134,16 +134,13 @@ EXPORT_SYMBOL(ath11k_pcic_init_msi_config);
> static inline u32 ath11k_pcic_get_window_start(struct ath11k_base *ab,
> u32 offset)
> {
> - u32 window_start;
> + u32 window_start = 0;
>
> - /* If offset lies within DP register range, use 3rd window */
> if ((offset ^ HAL_SEQ_WCSS_UMAC_OFFSET) < ATH11K_PCI_WINDOW_RANGE_MASK)
> - window_start = 3 * ATH11K_PCI_WINDOW_START;
> - /* If offset lies within CE register range, use 2nd window */
> - else if ((offset ^ HAL_CE_WFSS_CE_REG_BASE) < ATH11K_PCI_WINDOW_RANGE_MASK)
> - window_start = 2 * ATH11K_PCI_WINDOW_START;
> - else
> - window_start = ATH11K_PCI_WINDOW_START;
> + window_start = ab->hw_params.dp_window_idx * ATH11K_PCI_WINDOW_START;
> + else if ((offset ^ HAL_SEQ_WCSS_UMAC_CE0_SRC_REG(ab)) <
> + ATH11K_PCI_WINDOW_RANGE_MASK)
> + window_start = ab->hw_params.ce_window_idx * ATH11K_PCI_WINDOW_START;
>
> return window_start;
> }
for some offsets, previous code could return ATH11K_PCI_WINDOW_START,
whereas new code now returns 0
> @@ -162,19 +159,12 @@ void ath11k_pcic_write32(struct ath11k_base *ab, u32 offset, u32 value)
>
> if (offset < ATH11K_PCI_WINDOW_START) {
> iowrite32(value, ab->mem + offset);
> - } else {
> - if (ab->hw_params.static_window_map)
> - window_start = ath11k_pcic_get_window_start(ab, offset);
> - else
> - window_start = ATH11K_PCI_WINDOW_START;
> -
> - if (window_start == ATH11K_PCI_WINDOW_START &&
> - ab->pci.ops->window_write32) {
> - ab->pci.ops->window_write32(ab, offset, value);
> - } else {
> - iowrite32(value, ab->mem + window_start +
> - (offset & ATH11K_PCI_WINDOW_RANGE_MASK));
> - }
> + } else if (ab->hw_params.static_window_map) {
> + window_start = ath11k_pcic_get_window_start(ab, offset);
> + iowrite32(value, ab->mem + window_start +
> + (offset & ATH11K_PCI_WINDOW_RANGE_MASK));
> + } else if (ab->pci.ops->window_write32) {
> + ab->pci.ops->window_write32(ab, offset, value);
> }
>
with previous code on QCN9074, when ath11k_pcic_get_window_start()
returned ATH11K_PCI_WINDOW_START, then it would call window_write32()
with new code on QCN9074, static_window_map is true, so window_write32
will never be called.
> u32 ath11k_pcic_read32(struct ath11k_base *ab, u32 offset)
ditto here
--
Maxime
^ permalink raw reply [flat|nested] 36+ messages in thread* Re: [PATCH v7 4/9] ath11k: Add register access logic for WCN6750
@ 2022-05-25 18:46 ` Maxime Bizon
0 siblings, 0 replies; 36+ messages in thread
From: Maxime Bizon @ 2022-05-25 18:46 UTC (permalink / raw)
To: Manikanta Pubbisetty, ath11k; +Cc: linux-wireless, devicetree, robh, mka
On Fri, 2022-04-29 at 22:34 +0530, Manikanta Pubbisetty wrote:
Hello Manikanta,
> Tested-on: QCN9074 hw1.0 PCI WLAN.HK.2.5.0.1-01100-
> QCAHKSWPL_SILICONZ-1
Nope your patch breaks QCN9074:
[ 13.660963] ath11k_pci 0000:03:00.0: failed to set pcie link register 0x01e0e0a8: 0xffffffff != 0x00000010
[ 13.675994] ath11k_pci 0000:03:00.0: failed to set sysclk: -110
device still seem to work though
> @@ -134,16 +134,13 @@ EXPORT_SYMBOL(ath11k_pcic_init_msi_config);
> static inline u32 ath11k_pcic_get_window_start(struct ath11k_base *ab,
> u32 offset)
> {
> - u32 window_start;
> + u32 window_start = 0;
>
> - /* If offset lies within DP register range, use 3rd window */
> if ((offset ^ HAL_SEQ_WCSS_UMAC_OFFSET) < ATH11K_PCI_WINDOW_RANGE_MASK)
> - window_start = 3 * ATH11K_PCI_WINDOW_START;
> - /* If offset lies within CE register range, use 2nd window */
> - else if ((offset ^ HAL_CE_WFSS_CE_REG_BASE) < ATH11K_PCI_WINDOW_RANGE_MASK)
> - window_start = 2 * ATH11K_PCI_WINDOW_START;
> - else
> - window_start = ATH11K_PCI_WINDOW_START;
> + window_start = ab->hw_params.dp_window_idx * ATH11K_PCI_WINDOW_START;
> + else if ((offset ^ HAL_SEQ_WCSS_UMAC_CE0_SRC_REG(ab)) <
> + ATH11K_PCI_WINDOW_RANGE_MASK)
> + window_start = ab->hw_params.ce_window_idx * ATH11K_PCI_WINDOW_START;
>
> return window_start;
> }
for some offsets, previous code could return ATH11K_PCI_WINDOW_START,
whereas new code now returns 0
> @@ -162,19 +159,12 @@ void ath11k_pcic_write32(struct ath11k_base *ab, u32 offset, u32 value)
>
> if (offset < ATH11K_PCI_WINDOW_START) {
> iowrite32(value, ab->mem + offset);
> - } else {
> - if (ab->hw_params.static_window_map)
> - window_start = ath11k_pcic_get_window_start(ab, offset);
> - else
> - window_start = ATH11K_PCI_WINDOW_START;
> -
> - if (window_start == ATH11K_PCI_WINDOW_START &&
> - ab->pci.ops->window_write32) {
> - ab->pci.ops->window_write32(ab, offset, value);
> - } else {
> - iowrite32(value, ab->mem + window_start +
> - (offset & ATH11K_PCI_WINDOW_RANGE_MASK));
> - }
> + } else if (ab->hw_params.static_window_map) {
> + window_start = ath11k_pcic_get_window_start(ab, offset);
> + iowrite32(value, ab->mem + window_start +
> + (offset & ATH11K_PCI_WINDOW_RANGE_MASK));
> + } else if (ab->pci.ops->window_write32) {
> + ab->pci.ops->window_write32(ab, offset, value);
> }
>
with previous code on QCN9074, when ath11k_pcic_get_window_start()
returned ATH11K_PCI_WINDOW_START, then it would call window_write32()
with new code on QCN9074, static_window_map is true, so window_write32
will never be called.
> u32 ath11k_pcic_read32(struct ath11k_base *ab, u32 offset)
ditto here
--
Maxime
--
ath11k mailing list
ath11k@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/ath11k
^ permalink raw reply [flat|nested] 36+ messages in thread* Re: [PATCH v7 4/9] ath11k: Add register access logic for WCN6750
2022-05-25 18:46 ` Maxime Bizon
@ 2022-05-26 3:42 ` Manikanta Pubbisetty
-1 siblings, 0 replies; 36+ messages in thread
From: Manikanta Pubbisetty @ 2022-05-26 3:42 UTC (permalink / raw)
To: mbizon, ath11k; +Cc: linux-wireless, devicetree, robh, mka
On 5/26/2022 12:16 AM, Maxime Bizon wrote:
>
> On Fri, 2022-04-29 at 22:34 +0530, Manikanta Pubbisetty wrote:
>
> Hello Manikanta,
>
>> Tested-on: QCN9074 hw1.0 PCI WLAN.HK.2.5.0.1-01100-
>> QCAHKSWPL_SILICONZ-1
>
> Nope your patch breaks QCN9074:
>
> [ 13.660963] ath11k_pci 0000:03:00.0: failed to set pcie link register 0x01e0e0a8: 0xffffffff != 0x00000010
> [ 13.675994] ath11k_pci 0000:03:00.0: failed to set sysclk: -110
>
> device still seem to work though
Thanks for letting me know about this, IIRC I don't remember
encountering this problem in my testing. Just for my understanding, have
you reverted this change and confirmed that these errors go away ?
>
>> @@ -134,16 +134,13 @@ EXPORT_SYMBOL(ath11k_pcic_init_msi_config);
>> static inline u32 ath11k_pcic_get_window_start(struct ath11k_base *ab,
>> u32 offset)
>> {
>> - u32 window_start;
>> + u32 window_start = 0;
>>
>> - /* If offset lies within DP register range, use 3rd window */
>> if ((offset ^ HAL_SEQ_WCSS_UMAC_OFFSET) < ATH11K_PCI_WINDOW_RANGE_MASK)
>> - window_start = 3 * ATH11K_PCI_WINDOW_START;
>> - /* If offset lies within CE register range, use 2nd window */
>> - else if ((offset ^ HAL_CE_WFSS_CE_REG_BASE) < ATH11K_PCI_WINDOW_RANGE_MASK)
>> - window_start = 2 * ATH11K_PCI_WINDOW_START;
>> - else
>> - window_start = ATH11K_PCI_WINDOW_START;
>> + window_start = ab->hw_params.dp_window_idx * ATH11K_PCI_WINDOW_START;
>> + else if ((offset ^ HAL_SEQ_WCSS_UMAC_CE0_SRC_REG(ab)) <
>> + ATH11K_PCI_WINDOW_RANGE_MASK)
>> + window_start = ab->hw_params.ce_window_idx * ATH11K_PCI_WINDOW_START;
>>
>> return window_start;
>> }
>
>
> for some offsets, previous code could return ATH11K_PCI_WINDOW_START,
> whereas new code now returns 0
>
>
>> @@ -162,19 +159,12 @@ void ath11k_pcic_write32(struct ath11k_base *ab, u32 offset, u32 value)
>>
>> if (offset < ATH11K_PCI_WINDOW_START) {
>> iowrite32(value, ab->mem + offset);
>> - } else {
>> - if (ab->hw_params.static_window_map)
>> - window_start = ath11k_pcic_get_window_start(ab, offset);
>> - else
>> - window_start = ATH11K_PCI_WINDOW_START;
>> -
>> - if (window_start == ATH11K_PCI_WINDOW_START &&
>> - ab->pci.ops->window_write32) {
>> - ab->pci.ops->window_write32(ab, offset, value);
>> - } else {
>> - iowrite32(value, ab->mem + window_start +
>> - (offset & ATH11K_PCI_WINDOW_RANGE_MASK));
>> - }
>> + } else if (ab->hw_params.static_window_map) {
>> + window_start = ath11k_pcic_get_window_start(ab, offset);
>> + iowrite32(value, ab->mem + window_start +
>> + (offset & ATH11K_PCI_WINDOW_RANGE_MASK));
>> + } else if (ab->pci.ops->window_write32) {
>> + ab->pci.ops->window_write32(ab, offset, value);
>> }
>>
>
> with previous code on QCN9074, when ath11k_pcic_get_window_start()
> returned ATH11K_PCI_WINDOW_START, then it would call window_write32()
>
> with new code on QCN9074, static_window_map is true, so window_write32
> will never be called.
>
>> u32 ath11k_pcic_read32(struct ath11k_base *ab, u32 offset)
>
> ditto here
>
If you could please confirm that reverting this change helps, I can send
a patch to fix this.
Thanks,
Manikanta
^ permalink raw reply [flat|nested] 36+ messages in thread* Re: [PATCH v7 4/9] ath11k: Add register access logic for WCN6750
@ 2022-05-26 3:42 ` Manikanta Pubbisetty
0 siblings, 0 replies; 36+ messages in thread
From: Manikanta Pubbisetty @ 2022-05-26 3:42 UTC (permalink / raw)
To: mbizon, ath11k; +Cc: linux-wireless, devicetree, robh, mka
On 5/26/2022 12:16 AM, Maxime Bizon wrote:
>
> On Fri, 2022-04-29 at 22:34 +0530, Manikanta Pubbisetty wrote:
>
> Hello Manikanta,
>
>> Tested-on: QCN9074 hw1.0 PCI WLAN.HK.2.5.0.1-01100-
>> QCAHKSWPL_SILICONZ-1
>
> Nope your patch breaks QCN9074:
>
> [ 13.660963] ath11k_pci 0000:03:00.0: failed to set pcie link register 0x01e0e0a8: 0xffffffff != 0x00000010
> [ 13.675994] ath11k_pci 0000:03:00.0: failed to set sysclk: -110
>
> device still seem to work though
Thanks for letting me know about this, IIRC I don't remember
encountering this problem in my testing. Just for my understanding, have
you reverted this change and confirmed that these errors go away ?
>
>> @@ -134,16 +134,13 @@ EXPORT_SYMBOL(ath11k_pcic_init_msi_config);
>> static inline u32 ath11k_pcic_get_window_start(struct ath11k_base *ab,
>> u32 offset)
>> {
>> - u32 window_start;
>> + u32 window_start = 0;
>>
>> - /* If offset lies within DP register range, use 3rd window */
>> if ((offset ^ HAL_SEQ_WCSS_UMAC_OFFSET) < ATH11K_PCI_WINDOW_RANGE_MASK)
>> - window_start = 3 * ATH11K_PCI_WINDOW_START;
>> - /* If offset lies within CE register range, use 2nd window */
>> - else if ((offset ^ HAL_CE_WFSS_CE_REG_BASE) < ATH11K_PCI_WINDOW_RANGE_MASK)
>> - window_start = 2 * ATH11K_PCI_WINDOW_START;
>> - else
>> - window_start = ATH11K_PCI_WINDOW_START;
>> + window_start = ab->hw_params.dp_window_idx * ATH11K_PCI_WINDOW_START;
>> + else if ((offset ^ HAL_SEQ_WCSS_UMAC_CE0_SRC_REG(ab)) <
>> + ATH11K_PCI_WINDOW_RANGE_MASK)
>> + window_start = ab->hw_params.ce_window_idx * ATH11K_PCI_WINDOW_START;
>>
>> return window_start;
>> }
>
>
> for some offsets, previous code could return ATH11K_PCI_WINDOW_START,
> whereas new code now returns 0
>
>
>> @@ -162,19 +159,12 @@ void ath11k_pcic_write32(struct ath11k_base *ab, u32 offset, u32 value)
>>
>> if (offset < ATH11K_PCI_WINDOW_START) {
>> iowrite32(value, ab->mem + offset);
>> - } else {
>> - if (ab->hw_params.static_window_map)
>> - window_start = ath11k_pcic_get_window_start(ab, offset);
>> - else
>> - window_start = ATH11K_PCI_WINDOW_START;
>> -
>> - if (window_start == ATH11K_PCI_WINDOW_START &&
>> - ab->pci.ops->window_write32) {
>> - ab->pci.ops->window_write32(ab, offset, value);
>> - } else {
>> - iowrite32(value, ab->mem + window_start +
>> - (offset & ATH11K_PCI_WINDOW_RANGE_MASK));
>> - }
>> + } else if (ab->hw_params.static_window_map) {
>> + window_start = ath11k_pcic_get_window_start(ab, offset);
>> + iowrite32(value, ab->mem + window_start +
>> + (offset & ATH11K_PCI_WINDOW_RANGE_MASK));
>> + } else if (ab->pci.ops->window_write32) {
>> + ab->pci.ops->window_write32(ab, offset, value);
>> }
>>
>
> with previous code on QCN9074, when ath11k_pcic_get_window_start()
> returned ATH11K_PCI_WINDOW_START, then it would call window_write32()
>
> with new code on QCN9074, static_window_map is true, so window_write32
> will never be called.
>
>> u32 ath11k_pcic_read32(struct ath11k_base *ab, u32 offset)
>
> ditto here
>
If you could please confirm that reverting this change helps, I can send
a patch to fix this.
Thanks,
Manikanta
--
ath11k mailing list
ath11k@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/ath11k
^ permalink raw reply [flat|nested] 36+ messages in thread* Re: [PATCH v7 4/9] ath11k: Add register access logic for WCN6750
2022-05-26 3:42 ` Manikanta Pubbisetty
@ 2022-05-30 14:19 ` Maxime Bizon
-1 siblings, 0 replies; 36+ messages in thread
From: Maxime Bizon @ 2022-05-30 14:19 UTC (permalink / raw)
To: Manikanta Pubbisetty, ath11k; +Cc: linux-wireless, devicetree, robh, mka
On Thu, 2022-05-26 at 09:12 +0530, Manikanta Pubbisetty wrote:
>
> Thanks for letting me know about this, IIRC I don't remember
> encountering this problem in my testing. Just for my understanding,
> have you reverted this change and confirmed that these errors go away
> ?
I first confirmed the register location was indeed incorrect, then I
fixed it like this:
--- a/drivers/net/wireless/ath/ath11k/pcic.c
+++ b/drivers/net/wireless/ath/ath11k/pcic.c
@@ -143,7 +143,7 @@ EXPORT_SYMBOL(ath11k_pcic_init_msi_config);
static inline u32 ath11k_pcic_get_window_start(struct ath11k_base *ab,
u32 offset)
{
- u32 window_start = 0;
+ u32 window_start = ATH11K_PCI_WINDOW_START;
if ((offset ^ HAL_SEQ_WCSS_UMAC_OFFSET) < ATH11K_PCI_WINDOW_RANGE_MASK)
window_start = ab->hw_params.dp_window_idx * ATH11K_PCI_WINDOW_START;
@@ -170,8 +170,12 @@ void ath11k_pcic_write32(struct ath11k_base *ab, u32 offset, u32 value)
iowrite32(value, ab->mem + offset);
} else if (ab->hw_params.static_window_map) {
window_start = ath11k_pcic_get_window_start(ab, offset);
- iowrite32(value, ab->mem + window_start +
- (offset & ATH11K_PCI_WINDOW_RANGE_MASK));
+ if (window_start == ATH11K_PCI_WINDOW_START &&
+ ab->pci.ops->window_write32)
+ ab->pci.ops->window_write32(ab, offset, value);
+ else
+ iowrite32(value, ab->mem + window_start +
+ (offset & ATH11K_PCI_WINDOW_RANGE_MASK));
} else if (ab->pci.ops->window_write32) {
ab->pci.ops->window_write32(ab, offset, value);
}
@@ -200,8 +204,12 @@ u32 ath11k_pcic_read32(struct ath11k_base *ab, u32 offset)
val = ioread32(ab->mem + offset);
} else if (ab->hw_params.static_window_map) {
window_start = ath11k_pcic_get_window_start(ab, offset);
- val = ioread32(ab->mem + window_start +
- (offset & ATH11K_PCI_WINDOW_RANGE_MASK));
+ if (window_start == ATH11K_PCI_WINDOW_START &&
+ ab->pci.ops->window_read32)
+ val = ab->pci.ops->window_read32(ab, offset);
+ else
+ val = ioread32(ab->mem + window_start +
+ (offset & ATH11K_PCI_WINDOW_RANGE_MASK));
} else if (ab->pci.ops->window_read32) {
val = ab->pci.ops->window_read32(ab, offset);
}
--
Maxime
--
ath11k mailing list
ath11k@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/ath11k
^ permalink raw reply [flat|nested] 36+ messages in thread* Re: [PATCH v7 4/9] ath11k: Add register access logic for WCN6750
@ 2022-05-30 14:19 ` Maxime Bizon
0 siblings, 0 replies; 36+ messages in thread
From: Maxime Bizon @ 2022-05-30 14:19 UTC (permalink / raw)
To: Manikanta Pubbisetty, ath11k; +Cc: linux-wireless, devicetree, robh, mka
On Thu, 2022-05-26 at 09:12 +0530, Manikanta Pubbisetty wrote:
>
> Thanks for letting me know about this, IIRC I don't remember
> encountering this problem in my testing. Just for my understanding,
> have you reverted this change and confirmed that these errors go away
> ?
I first confirmed the register location was indeed incorrect, then I
fixed it like this:
--- a/drivers/net/wireless/ath/ath11k/pcic.c
+++ b/drivers/net/wireless/ath/ath11k/pcic.c
@@ -143,7 +143,7 @@ EXPORT_SYMBOL(ath11k_pcic_init_msi_config);
static inline u32 ath11k_pcic_get_window_start(struct ath11k_base *ab,
u32 offset)
{
- u32 window_start = 0;
+ u32 window_start = ATH11K_PCI_WINDOW_START;
if ((offset ^ HAL_SEQ_WCSS_UMAC_OFFSET) < ATH11K_PCI_WINDOW_RANGE_MASK)
window_start = ab->hw_params.dp_window_idx * ATH11K_PCI_WINDOW_START;
@@ -170,8 +170,12 @@ void ath11k_pcic_write32(struct ath11k_base *ab, u32 offset, u32 value)
iowrite32(value, ab->mem + offset);
} else if (ab->hw_params.static_window_map) {
window_start = ath11k_pcic_get_window_start(ab, offset);
- iowrite32(value, ab->mem + window_start +
- (offset & ATH11K_PCI_WINDOW_RANGE_MASK));
+ if (window_start == ATH11K_PCI_WINDOW_START &&
+ ab->pci.ops->window_write32)
+ ab->pci.ops->window_write32(ab, offset, value);
+ else
+ iowrite32(value, ab->mem + window_start +
+ (offset & ATH11K_PCI_WINDOW_RANGE_MASK));
} else if (ab->pci.ops->window_write32) {
ab->pci.ops->window_write32(ab, offset, value);
}
@@ -200,8 +204,12 @@ u32 ath11k_pcic_read32(struct ath11k_base *ab, u32 offset)
val = ioread32(ab->mem + offset);
} else if (ab->hw_params.static_window_map) {
window_start = ath11k_pcic_get_window_start(ab, offset);
- val = ioread32(ab->mem + window_start +
- (offset & ATH11K_PCI_WINDOW_RANGE_MASK));
+ if (window_start == ATH11K_PCI_WINDOW_START &&
+ ab->pci.ops->window_read32)
+ val = ab->pci.ops->window_read32(ab, offset);
+ else
+ val = ioread32(ab->mem + window_start +
+ (offset & ATH11K_PCI_WINDOW_RANGE_MASK));
} else if (ab->pci.ops->window_read32) {
val = ab->pci.ops->window_read32(ab, offset);
}
--
Maxime
^ permalink raw reply [flat|nested] 36+ messages in thread* Re: [PATCH v7 4/9] ath11k: Add register access logic for WCN6750
2022-05-30 14:19 ` Maxime Bizon
@ 2022-05-30 16:17 ` Kalle Valo
-1 siblings, 0 replies; 36+ messages in thread
From: Kalle Valo @ 2022-05-30 16:17 UTC (permalink / raw)
To: Maxime Bizon
Cc: Manikanta Pubbisetty, ath11k, linux-wireless, devicetree, robh, mka
Maxime Bizon <mbizon@freebox.fr> writes:
> On Thu, 2022-05-26 at 09:12 +0530, Manikanta Pubbisetty wrote:
>
>>
>> Thanks for letting me know about this, IIRC I don't remember
>> encountering this problem in my testing. Just for my understanding,
>> have you reverted this change and confirmed that these errors go away
>> ?
>
> I first confirmed the register location was indeed incorrect, then I
> fixed it like this:
Looks good to me. Can you submit that as a proper patch?
--
https://patchwork.kernel.org/project/linux-wireless/list/
https://wireless.wiki.kernel.org/en/developers/documentation/submittingpatches
^ permalink raw reply [flat|nested] 36+ messages in thread
* Re: [PATCH v7 4/9] ath11k: Add register access logic for WCN6750
@ 2022-05-30 16:17 ` Kalle Valo
0 siblings, 0 replies; 36+ messages in thread
From: Kalle Valo @ 2022-05-30 16:17 UTC (permalink / raw)
To: Maxime Bizon
Cc: Manikanta Pubbisetty, ath11k, linux-wireless, devicetree, robh, mka
Maxime Bizon <mbizon@freebox.fr> writes:
> On Thu, 2022-05-26 at 09:12 +0530, Manikanta Pubbisetty wrote:
>
>>
>> Thanks for letting me know about this, IIRC I don't remember
>> encountering this problem in my testing. Just for my understanding,
>> have you reverted this change and confirmed that these errors go away
>> ?
>
> I first confirmed the register location was indeed incorrect, then I
> fixed it like this:
Looks good to me. Can you submit that as a proper patch?
--
https://patchwork.kernel.org/project/linux-wireless/list/
https://wireless.wiki.kernel.org/en/developers/documentation/submittingpatches
--
ath11k mailing list
ath11k@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/ath11k
^ permalink raw reply [flat|nested] 36+ messages in thread
* Re: [PATCH v7 4/9] ath11k: Add register access logic for WCN6750
2022-05-30 16:17 ` Kalle Valo
@ 2022-05-30 16:22 ` Maxime Bizon
-1 siblings, 0 replies; 36+ messages in thread
From: Maxime Bizon @ 2022-05-30 16:22 UTC (permalink / raw)
To: Kalle Valo
Cc: Manikanta Pubbisetty, ath11k, linux-wireless, devicetree, robh, mka
On Mon, 2022-05-30 at 19:17 +0300, Kalle Valo wrote:
> Looks good to me. Can you submit that as a proper patch?
I'd prefer that patch to come from someone with actual knowledge of the
hardware, I basically did a blind revert
--
Maxime
^ permalink raw reply [flat|nested] 36+ messages in thread
* [PATCH v7 5/9] ath11k: Fetch device information via QMI for WCN6750
2022-04-29 17:04 ` Manikanta Pubbisetty
@ 2022-04-29 17:04 ` Manikanta Pubbisetty
-1 siblings, 0 replies; 36+ messages in thread
From: Manikanta Pubbisetty @ 2022-04-29 17:04 UTC (permalink / raw)
To: ath11k; +Cc: linux-wireless, devicetree, robh, mka, Manikanta Pubbisetty
Since WPPS Q6 does the PCIe enumeration of WCN6750, device
information like BAR and BAR size is not known to the APPS
processor (Application Processor SubSystem). In order to
fetch these details, a QMI message called device info request
will be sent to the target. Therefore, add logic to fetch
BAR details from the target.
Tested-on: WCN6750 hw1.0 AHB WLAN.MSL.1.0.1-00887-QCAMSLSWPLZ-1
Tested-on: WCN6855 hw2.0 PCI WLAN.HSP.1.1-01720.1-QCAHSPSWPL_V1_V2_SILICONZ_LITE-1
Tested-on: QCN9074 hw1.0 PCI WLAN.HK.2.5.0.1-01100-QCAHKSWPL_SILICONZ-1
Tested-on: IPQ8074 hw2.0 AHB WLAN.HK.2.4.0.1-00192-QCAHKSWPL_SILICONZ-1
Signed-off-by: Manikanta Pubbisetty <quic_mpubbise@quicinc.com>
---
drivers/net/wireless/ath/ath11k/qmi.c | 143 ++++++++++++++++++++++++++
drivers/net/wireless/ath/ath11k/qmi.h | 24 ++++-
2 files changed, 163 insertions(+), 4 deletions(-)
diff --git a/drivers/net/wireless/ath/ath11k/qmi.c b/drivers/net/wireless/ath/ath11k/qmi.c
index c89e76108237..71e25cb094f8 100644
--- a/drivers/net/wireless/ath/ath11k/qmi.c
+++ b/drivers/net/wireless/ath/ath11k/qmi.c
@@ -13,6 +13,8 @@
#include <linux/of_address.h>
#include <linux/ioport.h>
#include <linux/firmware.h>
+#include <linux/of_device.h>
+#include <linux/of_irq.h>
#define SLEEP_CLOCK_SELECT_INTERNAL_BIT 0x02
#define HOST_CSTATE_BIT 0x04
@@ -749,6 +751,68 @@ static struct qmi_elem_info qmi_wlanfw_cap_req_msg_v01_ei[] = {
},
};
+static struct qmi_elem_info qmi_wlanfw_device_info_req_msg_v01_ei[] = {
+ {
+ .data_type = QMI_EOTI,
+ .array_type = NO_ARRAY,
+ .tlv_type = QMI_COMMON_TLV_TYPE,
+ },
+};
+
+static struct qmi_elem_info qmi_wlfw_device_info_resp_msg_v01_ei[] = {
+ {
+ .data_type = QMI_STRUCT,
+ .elem_len = 1,
+ .elem_size = sizeof(struct qmi_response_type_v01),
+ .array_type = NO_ARRAY,
+ .tlv_type = 0x02,
+ .offset = offsetof(struct qmi_wlanfw_device_info_resp_msg_v01,
+ resp),
+ .ei_array = qmi_response_type_v01_ei,
+ },
+ {
+ .data_type = QMI_OPT_FLAG,
+ .elem_len = 1,
+ .elem_size = sizeof(u8),
+ .array_type = NO_ARRAY,
+ .tlv_type = 0x10,
+ .offset = offsetof(struct qmi_wlanfw_device_info_resp_msg_v01,
+ bar_addr_valid),
+ },
+ {
+ .data_type = QMI_UNSIGNED_8_BYTE,
+ .elem_len = 1,
+ .elem_size = sizeof(u64),
+ .array_type = NO_ARRAY,
+ .tlv_type = 0x10,
+ .offset = offsetof(struct qmi_wlanfw_device_info_resp_msg_v01,
+ bar_addr),
+ },
+ {
+ .data_type = QMI_OPT_FLAG,
+ .elem_len = 1,
+ .elem_size = sizeof(u8),
+ .array_type = NO_ARRAY,
+ .tlv_type = 0x11,
+ .offset = offsetof(struct qmi_wlanfw_device_info_resp_msg_v01,
+ bar_size_valid),
+ },
+ {
+ .data_type = QMI_UNSIGNED_4_BYTE,
+ .elem_len = 1,
+ .elem_size = sizeof(u32),
+ .array_type = NO_ARRAY,
+ .tlv_type = 0x11,
+ .offset = offsetof(struct qmi_wlanfw_device_info_resp_msg_v01,
+ bar_size),
+ },
+ {
+ .data_type = QMI_EOTI,
+ .array_type = NO_ARRAY,
+ .tlv_type = QMI_COMMON_TLV_TYPE,
+ },
+};
+
static struct qmi_elem_info qmi_wlanfw_rf_chip_info_s_v01_ei[] = {
{
.data_type = QMI_UNSIGNED_4_BYTE,
@@ -2008,6 +2072,79 @@ static int ath11k_qmi_assign_target_mem_chunk(struct ath11k_base *ab)
return 0;
}
+static int ath11k_qmi_request_device_info(struct ath11k_base *ab)
+{
+ struct qmi_wlanfw_device_info_req_msg_v01 req = {};
+ struct qmi_wlanfw_device_info_resp_msg_v01 resp = {};
+ struct qmi_txn txn;
+ void __iomem *bar_addr_va;
+ int ret;
+
+ /* device info message req is only sent for hybrid bus devices */
+ if (!ab->hw_params.hybrid_bus_type)
+ return 0;
+
+ ret = qmi_txn_init(&ab->qmi.handle, &txn,
+ qmi_wlfw_device_info_resp_msg_v01_ei, &resp);
+ if (ret < 0)
+ goto out;
+
+ ret = qmi_send_request(&ab->qmi.handle, NULL, &txn,
+ QMI_WLANFW_DEVICE_INFO_REQ_V01,
+ QMI_WLANFW_DEVICE_INFO_REQ_MSG_V01_MAX_LEN,
+ qmi_wlanfw_device_info_req_msg_v01_ei, &req);
+ if (ret < 0) {
+ qmi_txn_cancel(&txn);
+ ath11k_warn(ab, "qmi failed to send target device info request, err = %d\n",
+ ret);
+ goto out;
+ }
+
+ ret = qmi_txn_wait(&txn, msecs_to_jiffies(ATH11K_QMI_WLANFW_TIMEOUT_MS));
+ if (ret < 0) {
+ ath11k_warn(ab, "qmi failed target device info request %d\n", ret);
+ goto out;
+ }
+
+ if (resp.resp.result != QMI_RESULT_SUCCESS_V01) {
+ ath11k_warn(ab, "qmi device info req failed, result: %d, err: %d\n",
+ resp.resp.result, resp.resp.error);
+ ret = -EINVAL;
+ goto out;
+ }
+
+ if (!resp.bar_addr_valid || !resp.bar_size_valid) {
+ ath11k_warn(ab, "qmi device info response invalid, result: %d, err: %d\n",
+ resp.resp.result, resp.resp.error);
+ ret = -EINVAL;
+ goto out;
+ }
+
+ if (!resp.bar_addr ||
+ resp.bar_size != ATH11K_QMI_DEVICE_BAR_SIZE) {
+ ath11k_warn(ab, "qmi device info invalid addr and size, result: %d, err: %d\n",
+ resp.resp.result, resp.resp.error);
+ ret = -EINVAL;
+ goto out;
+ }
+
+ bar_addr_va = devm_ioremap(ab->dev, resp.bar_addr, resp.bar_size);
+
+ if (!bar_addr_va) {
+ ath11k_warn(ab, "qmi device info ioremap failed\n");
+ ab->mem_len = 0;
+ ret = -EIO;
+ goto out;
+ }
+
+ ab->mem = bar_addr_va;
+ ab->mem_len = resp.bar_size;
+
+ return 0;
+out:
+ return ret;
+}
+
static int ath11k_qmi_request_target_cap(struct ath11k_base *ab)
{
struct qmi_wlanfw_cap_req_msg_v01 req;
@@ -2749,6 +2886,12 @@ static int ath11k_qmi_event_load_bdf(struct ath11k_qmi *qmi)
return ret;
}
+ ret = ath11k_qmi_request_device_info(ab);
+ if (ret < 0) {
+ ath11k_warn(ab, "failed to request qmi device info %d\n", ret);
+ return ret;
+ }
+
if (ab->hw_params.supports_regdb)
ath11k_qmi_load_bdf_qmi(ab, true);
diff --git a/drivers/net/wireless/ath/ath11k/qmi.h b/drivers/net/wireless/ath/ath11k/qmi.h
index e0201e184733..c24e6995cca3 100644
--- a/drivers/net/wireless/ath/ath11k/qmi.h
+++ b/drivers/net/wireless/ath/ath11k/qmi.h
@@ -38,6 +38,8 @@
#define ATH11K_FIRMWARE_MODE_OFF 4
#define ATH11K_COLD_BOOT_FW_RESET_DELAY (40 * HZ)
+#define ATH11K_QMI_DEVICE_BAR_SIZE 0x200000
+
struct ath11k_base;
enum ath11k_qmi_file_type {
@@ -287,10 +289,12 @@ struct qmi_wlanfw_fw_cold_cal_done_ind_msg_v01 {
char placeholder;
};
-#define QMI_WLANFW_CAP_REQ_MSG_V01_MAX_LEN 0
-#define QMI_WLANFW_CAP_RESP_MSG_V01_MAX_LEN 235
-#define QMI_WLANFW_CAP_REQ_V01 0x0024
-#define QMI_WLANFW_CAP_RESP_V01 0x0024
+#define QMI_WLANFW_CAP_REQ_MSG_V01_MAX_LEN 0
+#define QMI_WLANFW_CAP_RESP_MSG_V01_MAX_LEN 235
+#define QMI_WLANFW_CAP_REQ_V01 0x0024
+#define QMI_WLANFW_CAP_RESP_V01 0x0024
+#define QMI_WLANFW_DEVICE_INFO_REQ_V01 0x004C
+#define QMI_WLANFW_DEVICE_INFO_REQ_MSG_V01_MAX_LEN 0
enum qmi_wlanfw_pipedir_enum_v01 {
QMI_WLFW_PIPEDIR_NONE_V01 = 0,
@@ -383,6 +387,18 @@ struct qmi_wlanfw_cap_req_msg_v01 {
char placeholder;
};
+struct qmi_wlanfw_device_info_req_msg_v01 {
+ char placeholder;
+};
+
+struct qmi_wlanfw_device_info_resp_msg_v01 {
+ struct qmi_response_type_v01 resp;
+ u64 bar_addr;
+ u32 bar_size;
+ u8 bar_addr_valid;
+ u8 bar_size_valid;
+};
+
#define QMI_WLANFW_BDF_DOWNLOAD_REQ_MSG_V01_MAX_LEN 6182
#define QMI_WLANFW_BDF_DOWNLOAD_RESP_MSG_V01_MAX_LEN 7
#define QMI_WLANFW_BDF_DOWNLOAD_RESP_V01 0x0025
--
2.35.1
^ permalink raw reply related [flat|nested] 36+ messages in thread* [PATCH v7 5/9] ath11k: Fetch device information via QMI for WCN6750
@ 2022-04-29 17:04 ` Manikanta Pubbisetty
0 siblings, 0 replies; 36+ messages in thread
From: Manikanta Pubbisetty @ 2022-04-29 17:04 UTC (permalink / raw)
To: ath11k; +Cc: linux-wireless, devicetree, robh, mka, Manikanta Pubbisetty
Since WPPS Q6 does the PCIe enumeration of WCN6750, device
information like BAR and BAR size is not known to the APPS
processor (Application Processor SubSystem). In order to
fetch these details, a QMI message called device info request
will be sent to the target. Therefore, add logic to fetch
BAR details from the target.
Tested-on: WCN6750 hw1.0 AHB WLAN.MSL.1.0.1-00887-QCAMSLSWPLZ-1
Tested-on: WCN6855 hw2.0 PCI WLAN.HSP.1.1-01720.1-QCAHSPSWPL_V1_V2_SILICONZ_LITE-1
Tested-on: QCN9074 hw1.0 PCI WLAN.HK.2.5.0.1-01100-QCAHKSWPL_SILICONZ-1
Tested-on: IPQ8074 hw2.0 AHB WLAN.HK.2.4.0.1-00192-QCAHKSWPL_SILICONZ-1
Signed-off-by: Manikanta Pubbisetty <quic_mpubbise@quicinc.com>
---
drivers/net/wireless/ath/ath11k/qmi.c | 143 ++++++++++++++++++++++++++
drivers/net/wireless/ath/ath11k/qmi.h | 24 ++++-
2 files changed, 163 insertions(+), 4 deletions(-)
diff --git a/drivers/net/wireless/ath/ath11k/qmi.c b/drivers/net/wireless/ath/ath11k/qmi.c
index c89e76108237..71e25cb094f8 100644
--- a/drivers/net/wireless/ath/ath11k/qmi.c
+++ b/drivers/net/wireless/ath/ath11k/qmi.c
@@ -13,6 +13,8 @@
#include <linux/of_address.h>
#include <linux/ioport.h>
#include <linux/firmware.h>
+#include <linux/of_device.h>
+#include <linux/of_irq.h>
#define SLEEP_CLOCK_SELECT_INTERNAL_BIT 0x02
#define HOST_CSTATE_BIT 0x04
@@ -749,6 +751,68 @@ static struct qmi_elem_info qmi_wlanfw_cap_req_msg_v01_ei[] = {
},
};
+static struct qmi_elem_info qmi_wlanfw_device_info_req_msg_v01_ei[] = {
+ {
+ .data_type = QMI_EOTI,
+ .array_type = NO_ARRAY,
+ .tlv_type = QMI_COMMON_TLV_TYPE,
+ },
+};
+
+static struct qmi_elem_info qmi_wlfw_device_info_resp_msg_v01_ei[] = {
+ {
+ .data_type = QMI_STRUCT,
+ .elem_len = 1,
+ .elem_size = sizeof(struct qmi_response_type_v01),
+ .array_type = NO_ARRAY,
+ .tlv_type = 0x02,
+ .offset = offsetof(struct qmi_wlanfw_device_info_resp_msg_v01,
+ resp),
+ .ei_array = qmi_response_type_v01_ei,
+ },
+ {
+ .data_type = QMI_OPT_FLAG,
+ .elem_len = 1,
+ .elem_size = sizeof(u8),
+ .array_type = NO_ARRAY,
+ .tlv_type = 0x10,
+ .offset = offsetof(struct qmi_wlanfw_device_info_resp_msg_v01,
+ bar_addr_valid),
+ },
+ {
+ .data_type = QMI_UNSIGNED_8_BYTE,
+ .elem_len = 1,
+ .elem_size = sizeof(u64),
+ .array_type = NO_ARRAY,
+ .tlv_type = 0x10,
+ .offset = offsetof(struct qmi_wlanfw_device_info_resp_msg_v01,
+ bar_addr),
+ },
+ {
+ .data_type = QMI_OPT_FLAG,
+ .elem_len = 1,
+ .elem_size = sizeof(u8),
+ .array_type = NO_ARRAY,
+ .tlv_type = 0x11,
+ .offset = offsetof(struct qmi_wlanfw_device_info_resp_msg_v01,
+ bar_size_valid),
+ },
+ {
+ .data_type = QMI_UNSIGNED_4_BYTE,
+ .elem_len = 1,
+ .elem_size = sizeof(u32),
+ .array_type = NO_ARRAY,
+ .tlv_type = 0x11,
+ .offset = offsetof(struct qmi_wlanfw_device_info_resp_msg_v01,
+ bar_size),
+ },
+ {
+ .data_type = QMI_EOTI,
+ .array_type = NO_ARRAY,
+ .tlv_type = QMI_COMMON_TLV_TYPE,
+ },
+};
+
static struct qmi_elem_info qmi_wlanfw_rf_chip_info_s_v01_ei[] = {
{
.data_type = QMI_UNSIGNED_4_BYTE,
@@ -2008,6 +2072,79 @@ static int ath11k_qmi_assign_target_mem_chunk(struct ath11k_base *ab)
return 0;
}
+static int ath11k_qmi_request_device_info(struct ath11k_base *ab)
+{
+ struct qmi_wlanfw_device_info_req_msg_v01 req = {};
+ struct qmi_wlanfw_device_info_resp_msg_v01 resp = {};
+ struct qmi_txn txn;
+ void __iomem *bar_addr_va;
+ int ret;
+
+ /* device info message req is only sent for hybrid bus devices */
+ if (!ab->hw_params.hybrid_bus_type)
+ return 0;
+
+ ret = qmi_txn_init(&ab->qmi.handle, &txn,
+ qmi_wlfw_device_info_resp_msg_v01_ei, &resp);
+ if (ret < 0)
+ goto out;
+
+ ret = qmi_send_request(&ab->qmi.handle, NULL, &txn,
+ QMI_WLANFW_DEVICE_INFO_REQ_V01,
+ QMI_WLANFW_DEVICE_INFO_REQ_MSG_V01_MAX_LEN,
+ qmi_wlanfw_device_info_req_msg_v01_ei, &req);
+ if (ret < 0) {
+ qmi_txn_cancel(&txn);
+ ath11k_warn(ab, "qmi failed to send target device info request, err = %d\n",
+ ret);
+ goto out;
+ }
+
+ ret = qmi_txn_wait(&txn, msecs_to_jiffies(ATH11K_QMI_WLANFW_TIMEOUT_MS));
+ if (ret < 0) {
+ ath11k_warn(ab, "qmi failed target device info request %d\n", ret);
+ goto out;
+ }
+
+ if (resp.resp.result != QMI_RESULT_SUCCESS_V01) {
+ ath11k_warn(ab, "qmi device info req failed, result: %d, err: %d\n",
+ resp.resp.result, resp.resp.error);
+ ret = -EINVAL;
+ goto out;
+ }
+
+ if (!resp.bar_addr_valid || !resp.bar_size_valid) {
+ ath11k_warn(ab, "qmi device info response invalid, result: %d, err: %d\n",
+ resp.resp.result, resp.resp.error);
+ ret = -EINVAL;
+ goto out;
+ }
+
+ if (!resp.bar_addr ||
+ resp.bar_size != ATH11K_QMI_DEVICE_BAR_SIZE) {
+ ath11k_warn(ab, "qmi device info invalid addr and size, result: %d, err: %d\n",
+ resp.resp.result, resp.resp.error);
+ ret = -EINVAL;
+ goto out;
+ }
+
+ bar_addr_va = devm_ioremap(ab->dev, resp.bar_addr, resp.bar_size);
+
+ if (!bar_addr_va) {
+ ath11k_warn(ab, "qmi device info ioremap failed\n");
+ ab->mem_len = 0;
+ ret = -EIO;
+ goto out;
+ }
+
+ ab->mem = bar_addr_va;
+ ab->mem_len = resp.bar_size;
+
+ return 0;
+out:
+ return ret;
+}
+
static int ath11k_qmi_request_target_cap(struct ath11k_base *ab)
{
struct qmi_wlanfw_cap_req_msg_v01 req;
@@ -2749,6 +2886,12 @@ static int ath11k_qmi_event_load_bdf(struct ath11k_qmi *qmi)
return ret;
}
+ ret = ath11k_qmi_request_device_info(ab);
+ if (ret < 0) {
+ ath11k_warn(ab, "failed to request qmi device info %d\n", ret);
+ return ret;
+ }
+
if (ab->hw_params.supports_regdb)
ath11k_qmi_load_bdf_qmi(ab, true);
diff --git a/drivers/net/wireless/ath/ath11k/qmi.h b/drivers/net/wireless/ath/ath11k/qmi.h
index e0201e184733..c24e6995cca3 100644
--- a/drivers/net/wireless/ath/ath11k/qmi.h
+++ b/drivers/net/wireless/ath/ath11k/qmi.h
@@ -38,6 +38,8 @@
#define ATH11K_FIRMWARE_MODE_OFF 4
#define ATH11K_COLD_BOOT_FW_RESET_DELAY (40 * HZ)
+#define ATH11K_QMI_DEVICE_BAR_SIZE 0x200000
+
struct ath11k_base;
enum ath11k_qmi_file_type {
@@ -287,10 +289,12 @@ struct qmi_wlanfw_fw_cold_cal_done_ind_msg_v01 {
char placeholder;
};
-#define QMI_WLANFW_CAP_REQ_MSG_V01_MAX_LEN 0
-#define QMI_WLANFW_CAP_RESP_MSG_V01_MAX_LEN 235
-#define QMI_WLANFW_CAP_REQ_V01 0x0024
-#define QMI_WLANFW_CAP_RESP_V01 0x0024
+#define QMI_WLANFW_CAP_REQ_MSG_V01_MAX_LEN 0
+#define QMI_WLANFW_CAP_RESP_MSG_V01_MAX_LEN 235
+#define QMI_WLANFW_CAP_REQ_V01 0x0024
+#define QMI_WLANFW_CAP_RESP_V01 0x0024
+#define QMI_WLANFW_DEVICE_INFO_REQ_V01 0x004C
+#define QMI_WLANFW_DEVICE_INFO_REQ_MSG_V01_MAX_LEN 0
enum qmi_wlanfw_pipedir_enum_v01 {
QMI_WLFW_PIPEDIR_NONE_V01 = 0,
@@ -383,6 +387,18 @@ struct qmi_wlanfw_cap_req_msg_v01 {
char placeholder;
};
+struct qmi_wlanfw_device_info_req_msg_v01 {
+ char placeholder;
+};
+
+struct qmi_wlanfw_device_info_resp_msg_v01 {
+ struct qmi_response_type_v01 resp;
+ u64 bar_addr;
+ u32 bar_size;
+ u8 bar_addr_valid;
+ u8 bar_size_valid;
+};
+
#define QMI_WLANFW_BDF_DOWNLOAD_REQ_MSG_V01_MAX_LEN 6182
#define QMI_WLANFW_BDF_DOWNLOAD_RESP_MSG_V01_MAX_LEN 7
#define QMI_WLANFW_BDF_DOWNLOAD_RESP_V01 0x0025
--
2.35.1
--
ath11k mailing list
ath11k@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/ath11k
^ permalink raw reply related [flat|nested] 36+ messages in thread* Re: [PATCH v7 5/9] ath11k: Fetch device information via QMI for WCN6750
2022-04-29 17:04 ` Manikanta Pubbisetty
@ 2022-05-02 9:29 ` Kalle Valo
-1 siblings, 0 replies; 36+ messages in thread
From: Kalle Valo @ 2022-05-02 9:29 UTC (permalink / raw)
To: Manikanta Pubbisetty; +Cc: ath11k, linux-wireless, devicetree, robh, mka
Manikanta Pubbisetty <quic_mpubbise@quicinc.com> writes:
> Since WPPS Q6 does the PCIe enumeration of WCN6750, device
> information like BAR and BAR size is not known to the APPS
> processor (Application Processor SubSystem). In order to
> fetch these details, a QMI message called device info request
> will be sent to the target. Therefore, add logic to fetch
> BAR details from the target.
>
> Tested-on: WCN6750 hw1.0 AHB WLAN.MSL.1.0.1-00887-QCAMSLSWPLZ-1
> Tested-on: WCN6855 hw2.0 PCI WLAN.HSP.1.1-01720.1-QCAHSPSWPL_V1_V2_SILICONZ_LITE-1
> Tested-on: QCN9074 hw1.0 PCI WLAN.HK.2.5.0.1-01100-QCAHKSWPL_SILICONZ-1
> Tested-on: IPQ8074 hw2.0 AHB WLAN.HK.2.4.0.1-00192-QCAHKSWPL_SILICONZ-1
>
> Signed-off-by: Manikanta Pubbisetty <quic_mpubbise@quicinc.com>
[...]
> +static int ath11k_qmi_request_device_info(struct ath11k_base *ab)
> +{
> + struct qmi_wlanfw_device_info_req_msg_v01 req = {};
> + struct qmi_wlanfw_device_info_resp_msg_v01 resp = {};
> + struct qmi_txn txn;
> + void __iomem *bar_addr_va;
> + int ret;
> +
> + /* device info message req is only sent for hybrid bus devices */
> + if (!ab->hw_params.hybrid_bus_type)
> + return 0;
> +
> + ret = qmi_txn_init(&ab->qmi.handle, &txn,
> + qmi_wlfw_device_info_resp_msg_v01_ei, &resp);
> + if (ret < 0)
> + goto out;
> +
> + ret = qmi_send_request(&ab->qmi.handle, NULL, &txn,
> + QMI_WLANFW_DEVICE_INFO_REQ_V01,
> + QMI_WLANFW_DEVICE_INFO_REQ_MSG_V01_MAX_LEN,
> + qmi_wlanfw_device_info_req_msg_v01_ei, &req);
> + if (ret < 0) {
> + qmi_txn_cancel(&txn);
> + ath11k_warn(ab, "qmi failed to send target device info request, err = %d\n",
> + ret);
> + goto out;
> + }
> +
> + ret = qmi_txn_wait(&txn, msecs_to_jiffies(ATH11K_QMI_WLANFW_TIMEOUT_MS));
> + if (ret < 0) {
> + ath11k_warn(ab, "qmi failed target device info request %d\n", ret);
> + goto out;
> + }
> +
> + if (resp.resp.result != QMI_RESULT_SUCCESS_V01) {
> + ath11k_warn(ab, "qmi device info req failed, result: %d, err: %d\n",
> + resp.resp.result, resp.resp.error);
> + ret = -EINVAL;
> + goto out;
> + }
> +
> + if (!resp.bar_addr_valid || !resp.bar_size_valid) {
> + ath11k_warn(ab, "qmi device info response invalid, result: %d, err: %d\n",
> + resp.resp.result, resp.resp.error);
> + ret = -EINVAL;
> + goto out;
> + }
> +
> + if (!resp.bar_addr ||
> + resp.bar_size != ATH11K_QMI_DEVICE_BAR_SIZE) {
> + ath11k_warn(ab, "qmi device info invalid addr and size, result: %d, err: %d\n",
> + resp.resp.result, resp.resp.error);
> + ret = -EINVAL;
> + goto out;
> + }
> +
> + bar_addr_va = devm_ioremap(ab->dev, resp.bar_addr, resp.bar_size);
> +
> + if (!bar_addr_va) {
> + ath11k_warn(ab, "qmi device info ioremap failed\n");
> + ab->mem_len = 0;
> + ret = -EIO;
> + goto out;
> + }
> +
> + ab->mem = bar_addr_va;
> + ab->mem_len = resp.bar_size;
> +
> + return 0;
> +out:
> + return ret;
> +}
In the pending branch I changed the warning messages to follow the style
used in ath11k.
> +
> static int ath11k_qmi_request_target_cap(struct ath11k_base *ab)
> {
> struct qmi_wlanfw_cap_req_msg_v01 req;
> @@ -2749,6 +2886,12 @@ static int ath11k_qmi_event_load_bdf(struct ath11k_qmi *qmi)
> return ret;
> }
>
> + ret = ath11k_qmi_request_device_info(ab);
> + if (ret < 0) {
> + ath11k_warn(ab, "failed to request qmi device info %d\n", ret);
> + return ret;
> + }
Here too.
--
https://patchwork.kernel.org/project/linux-wireless/list/
https://wireless.wiki.kernel.org/en/developers/documentation/submittingpatches
^ permalink raw reply [flat|nested] 36+ messages in thread* Re: [PATCH v7 5/9] ath11k: Fetch device information via QMI for WCN6750
@ 2022-05-02 9:29 ` Kalle Valo
0 siblings, 0 replies; 36+ messages in thread
From: Kalle Valo @ 2022-05-02 9:29 UTC (permalink / raw)
To: Manikanta Pubbisetty; +Cc: ath11k, linux-wireless, devicetree, robh, mka
Manikanta Pubbisetty <quic_mpubbise@quicinc.com> writes:
> Since WPPS Q6 does the PCIe enumeration of WCN6750, device
> information like BAR and BAR size is not known to the APPS
> processor (Application Processor SubSystem). In order to
> fetch these details, a QMI message called device info request
> will be sent to the target. Therefore, add logic to fetch
> BAR details from the target.
>
> Tested-on: WCN6750 hw1.0 AHB WLAN.MSL.1.0.1-00887-QCAMSLSWPLZ-1
> Tested-on: WCN6855 hw2.0 PCI WLAN.HSP.1.1-01720.1-QCAHSPSWPL_V1_V2_SILICONZ_LITE-1
> Tested-on: QCN9074 hw1.0 PCI WLAN.HK.2.5.0.1-01100-QCAHKSWPL_SILICONZ-1
> Tested-on: IPQ8074 hw2.0 AHB WLAN.HK.2.4.0.1-00192-QCAHKSWPL_SILICONZ-1
>
> Signed-off-by: Manikanta Pubbisetty <quic_mpubbise@quicinc.com>
[...]
> +static int ath11k_qmi_request_device_info(struct ath11k_base *ab)
> +{
> + struct qmi_wlanfw_device_info_req_msg_v01 req = {};
> + struct qmi_wlanfw_device_info_resp_msg_v01 resp = {};
> + struct qmi_txn txn;
> + void __iomem *bar_addr_va;
> + int ret;
> +
> + /* device info message req is only sent for hybrid bus devices */
> + if (!ab->hw_params.hybrid_bus_type)
> + return 0;
> +
> + ret = qmi_txn_init(&ab->qmi.handle, &txn,
> + qmi_wlfw_device_info_resp_msg_v01_ei, &resp);
> + if (ret < 0)
> + goto out;
> +
> + ret = qmi_send_request(&ab->qmi.handle, NULL, &txn,
> + QMI_WLANFW_DEVICE_INFO_REQ_V01,
> + QMI_WLANFW_DEVICE_INFO_REQ_MSG_V01_MAX_LEN,
> + qmi_wlanfw_device_info_req_msg_v01_ei, &req);
> + if (ret < 0) {
> + qmi_txn_cancel(&txn);
> + ath11k_warn(ab, "qmi failed to send target device info request, err = %d\n",
> + ret);
> + goto out;
> + }
> +
> + ret = qmi_txn_wait(&txn, msecs_to_jiffies(ATH11K_QMI_WLANFW_TIMEOUT_MS));
> + if (ret < 0) {
> + ath11k_warn(ab, "qmi failed target device info request %d\n", ret);
> + goto out;
> + }
> +
> + if (resp.resp.result != QMI_RESULT_SUCCESS_V01) {
> + ath11k_warn(ab, "qmi device info req failed, result: %d, err: %d\n",
> + resp.resp.result, resp.resp.error);
> + ret = -EINVAL;
> + goto out;
> + }
> +
> + if (!resp.bar_addr_valid || !resp.bar_size_valid) {
> + ath11k_warn(ab, "qmi device info response invalid, result: %d, err: %d\n",
> + resp.resp.result, resp.resp.error);
> + ret = -EINVAL;
> + goto out;
> + }
> +
> + if (!resp.bar_addr ||
> + resp.bar_size != ATH11K_QMI_DEVICE_BAR_SIZE) {
> + ath11k_warn(ab, "qmi device info invalid addr and size, result: %d, err: %d\n",
> + resp.resp.result, resp.resp.error);
> + ret = -EINVAL;
> + goto out;
> + }
> +
> + bar_addr_va = devm_ioremap(ab->dev, resp.bar_addr, resp.bar_size);
> +
> + if (!bar_addr_va) {
> + ath11k_warn(ab, "qmi device info ioremap failed\n");
> + ab->mem_len = 0;
> + ret = -EIO;
> + goto out;
> + }
> +
> + ab->mem = bar_addr_va;
> + ab->mem_len = resp.bar_size;
> +
> + return 0;
> +out:
> + return ret;
> +}
In the pending branch I changed the warning messages to follow the style
used in ath11k.
> +
> static int ath11k_qmi_request_target_cap(struct ath11k_base *ab)
> {
> struct qmi_wlanfw_cap_req_msg_v01 req;
> @@ -2749,6 +2886,12 @@ static int ath11k_qmi_event_load_bdf(struct ath11k_qmi *qmi)
> return ret;
> }
>
> + ret = ath11k_qmi_request_device_info(ab);
> + if (ret < 0) {
> + ath11k_warn(ab, "failed to request qmi device info %d\n", ret);
> + return ret;
> + }
Here too.
--
https://patchwork.kernel.org/project/linux-wireless/list/
https://wireless.wiki.kernel.org/en/developers/documentation/submittingpatches
--
ath11k mailing list
ath11k@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/ath11k
^ permalink raw reply [flat|nested] 36+ messages in thread
* [PATCH v7 6/9] ath11k: Add QMI changes for WCN6750
2022-04-29 17:04 ` Manikanta Pubbisetty
@ 2022-04-29 17:04 ` Manikanta Pubbisetty
-1 siblings, 0 replies; 36+ messages in thread
From: Manikanta Pubbisetty @ 2022-04-29 17:04 UTC (permalink / raw)
To: ath11k; +Cc: linux-wireless, devicetree, robh, mka, Manikanta Pubbisetty
In the case of WCN6750, FW doesn't request for DDR memory
via QMI, instead it uses a fixed 12MB reserved Memory region
in the DDR which is called as MSA region. As a result, QMI
message sequence is not same as other ath11k supported devices.
Also, M3 firmware will be bundled into the FW and will be
downloaded to the target as part of Q6 boot.
This is the QMI flow in the case of WCN6750,
1) QMI firmware indication REQ/RESP
2) QMI host capability REQ/RESP
3) QMI target capability REQ/RESP
4) QMI device info REQ/RESP
5) QMI BDF download
6) QMI FW ready
Tested-on: WCN6750 hw1.0 AHB WLAN.MSL.1.0.1-00887-QCAMSLSWPLZ-1
Tested-on: WCN6855 hw2.0 PCI WLAN.HSP.1.1-01720.1-QCAHSPSWPL_V1_V2_SILICONZ_LITE-1
Tested-on: QCN9074 hw1.0 PCI WLAN.HK.2.5.0.1-01100-QCAHKSWPL_SILICONZ-1
Tested-on: IPQ8074 hw2.0 AHB WLAN.HK.2.4.0.1-00192-QCAHKSWPL_SILICONZ-1
Signed-off-by: Manikanta Pubbisetty <quic_mpubbise@quicinc.com>
---
drivers/net/wireless/ath/ath11k/core.c | 7 +++
drivers/net/wireless/ath/ath11k/hw.h | 1 +
drivers/net/wireless/ath/ath11k/qmi.c | 76 ++++++++++++++++----------
3 files changed, 56 insertions(+), 28 deletions(-)
diff --git a/drivers/net/wireless/ath/ath11k/core.c b/drivers/net/wireless/ath/ath11k/core.c
index 3be4327b4d9c..64cf87fd6a7f 100644
--- a/drivers/net/wireless/ath/ath11k/core.c
+++ b/drivers/net/wireless/ath/ath11k/core.c
@@ -109,6 +109,7 @@ static const struct ath11k_hw_params ath11k_hw_params[] = {
.hybrid_bus_type = false,
.dp_window_idx = 0,
.ce_window_idx = 0,
+ .fixed_fw_mem = false,
},
{
.hw_rev = ATH11K_HW_IPQ6018_HW10,
@@ -183,6 +184,7 @@ static const struct ath11k_hw_params ath11k_hw_params[] = {
.hybrid_bus_type = false,
.dp_window_idx = 0,
.ce_window_idx = 0,
+ .fixed_fw_mem = false,
},
{
.name = "qca6390 hw2.0",
@@ -256,6 +258,7 @@ static const struct ath11k_hw_params ath11k_hw_params[] = {
.hybrid_bus_type = false,
.dp_window_idx = 0,
.ce_window_idx = 0,
+ .fixed_fw_mem = false,
},
{
.name = "qcn9074 hw1.0",
@@ -329,6 +332,7 @@ static const struct ath11k_hw_params ath11k_hw_params[] = {
.hybrid_bus_type = false,
.dp_window_idx = 3,
.ce_window_idx = 2,
+ .fixed_fw_mem = false,
},
{
.name = "wcn6855 hw2.0",
@@ -402,6 +406,7 @@ static const struct ath11k_hw_params ath11k_hw_params[] = {
.hybrid_bus_type = false,
.dp_window_idx = 0,
.ce_window_idx = 0,
+ .fixed_fw_mem = false,
},
{
.name = "wcn6855 hw2.1",
@@ -474,6 +479,7 @@ static const struct ath11k_hw_params ath11k_hw_params[] = {
.hybrid_bus_type = false,
.dp_window_idx = 0,
.ce_window_idx = 0,
+ .fixed_fw_mem = false,
},
{
.name = "wcn6750 hw1.0",
@@ -543,6 +549,7 @@ static const struct ath11k_hw_params ath11k_hw_params[] = {
.hybrid_bus_type = true,
.dp_window_idx = 1,
.ce_window_idx = 2,
+ .fixed_fw_mem = true,
},
};
diff --git a/drivers/net/wireless/ath/ath11k/hw.h b/drivers/net/wireless/ath/ath11k/hw.h
index b63538084215..b5a4758a6bc5 100644
--- a/drivers/net/wireless/ath/ath11k/hw.h
+++ b/drivers/net/wireless/ath/ath11k/hw.h
@@ -203,6 +203,7 @@ struct ath11k_hw_params {
bool hybrid_bus_type;
u8 dp_window_idx;
u8 ce_window_idx;
+ bool fixed_fw_mem;
};
struct ath11k_hw_ops {
diff --git a/drivers/net/wireless/ath/ath11k/qmi.c b/drivers/net/wireless/ath/ath11k/qmi.c
index 71e25cb094f8..3eef6a162cc2 100644
--- a/drivers/net/wireless/ath/ath11k/qmi.c
+++ b/drivers/net/wireless/ath/ath11k/qmi.c
@@ -1799,10 +1799,6 @@ static int ath11k_qmi_fw_ind_register_send(struct ath11k_base *ab)
req->client_id = QMI_WLANFW_CLIENT_ID;
req->fw_ready_enable_valid = 1;
req->fw_ready_enable = 1;
- req->request_mem_enable_valid = 1;
- req->request_mem_enable = 1;
- req->fw_mem_ready_enable_valid = 1;
- req->fw_mem_ready_enable = 1;
req->cal_done_enable_valid = 1;
req->cal_done_enable = 1;
req->fw_init_done_enable_valid = 1;
@@ -1811,6 +1807,17 @@ static int ath11k_qmi_fw_ind_register_send(struct ath11k_base *ab)
req->pin_connect_result_enable_valid = 0;
req->pin_connect_result_enable = 0;
+ /* WCN6750 doesn't request for DDR memory via QMI,
+ * instead it uses a fixed 12MB reserved memory
+ * region in DDR.
+ */
+ if (!ab->hw_params.fixed_fw_mem) {
+ req->request_mem_enable_valid = 1;
+ req->request_mem_enable = 1;
+ req->fw_mem_ready_enable_valid = 1;
+ req->fw_mem_ready_enable = 1;
+ }
+
ret = qmi_txn_init(handle, &txn,
qmi_wlanfw_ind_register_resp_msg_v01_ei, resp);
if (ret < 0)
@@ -2839,27 +2846,6 @@ ath11k_qmi_driver_event_post(struct ath11k_qmi *qmi,
return 0;
}
-static int ath11k_qmi_event_server_arrive(struct ath11k_qmi *qmi)
-{
- struct ath11k_base *ab = qmi->ab;
- int ret;
-
- ret = ath11k_qmi_fw_ind_register_send(ab);
- if (ret < 0) {
- ath11k_warn(ab, "failed to send qmi firmware indication: %d\n",
- ret);
- return ret;
- }
-
- ret = ath11k_qmi_host_cap_send(ab);
- if (ret < 0) {
- ath11k_warn(ab, "failed to send qmi host cap: %d\n", ret);
- return ret;
- }
-
- return ret;
-}
-
static int ath11k_qmi_event_mem_request(struct ath11k_qmi *qmi)
{
struct ath11k_base *ab = qmi->ab;
@@ -2901,9 +2887,33 @@ static int ath11k_qmi_event_load_bdf(struct ath11k_qmi *qmi)
return ret;
}
- ret = ath11k_qmi_wlanfw_m3_info_send(ab);
+ return 0;
+}
+
+static int ath11k_qmi_event_server_arrive(struct ath11k_qmi *qmi)
+{
+ struct ath11k_base *ab = qmi->ab;
+ int ret;
+
+ ret = ath11k_qmi_fw_ind_register_send(ab);
+ if (ret < 0) {
+ ath11k_warn(ab, "failed to send qmi firmware indication: %d\n",
+ ret);
+ return ret;
+ }
+
+ ret = ath11k_qmi_host_cap_send(ab);
if (ret < 0) {
- ath11k_warn(ab, "failed to send qmi m3 info req: %d\n", ret);
+ ath11k_warn(ab, "failed to send qmi host cap: %d\n", ret);
+ return ret;
+ }
+
+ if (!ab->hw_params.fixed_fw_mem)
+ return ret;
+
+ ret = ath11k_qmi_event_load_bdf(qmi);
+ if (ret < 0) {
+ ath11k_warn(ab, "qmi failed to download BDF:%d\n", ret);
return ret;
}
@@ -3103,8 +3113,18 @@ static void ath11k_qmi_driver_event_work(struct work_struct *work)
break;
case ATH11K_QMI_EVENT_FW_MEM_READY:
ret = ath11k_qmi_event_load_bdf(qmi);
- if (ret < 0)
+ if (ret < 0) {
set_bit(ATH11K_FLAG_QMI_FAIL, &ab->dev_flags);
+ break;
+ }
+
+ ret = ath11k_qmi_wlanfw_m3_info_send(ab);
+ if (ret < 0) {
+ ath11k_warn(ab,
+ "failed to send qmi m3 info req: %d\n", ret);
+ set_bit(ATH11K_FLAG_QMI_FAIL, &ab->dev_flags);
+ }
+
break;
case ATH11K_QMI_EVENT_FW_READY:
clear_bit(ATH11K_FLAG_QMI_FAIL, &ab->dev_flags);
--
2.35.1
^ permalink raw reply related [flat|nested] 36+ messages in thread* [PATCH v7 6/9] ath11k: Add QMI changes for WCN6750
@ 2022-04-29 17:04 ` Manikanta Pubbisetty
0 siblings, 0 replies; 36+ messages in thread
From: Manikanta Pubbisetty @ 2022-04-29 17:04 UTC (permalink / raw)
To: ath11k; +Cc: linux-wireless, devicetree, robh, mka, Manikanta Pubbisetty
In the case of WCN6750, FW doesn't request for DDR memory
via QMI, instead it uses a fixed 12MB reserved Memory region
in the DDR which is called as MSA region. As a result, QMI
message sequence is not same as other ath11k supported devices.
Also, M3 firmware will be bundled into the FW and will be
downloaded to the target as part of Q6 boot.
This is the QMI flow in the case of WCN6750,
1) QMI firmware indication REQ/RESP
2) QMI host capability REQ/RESP
3) QMI target capability REQ/RESP
4) QMI device info REQ/RESP
5) QMI BDF download
6) QMI FW ready
Tested-on: WCN6750 hw1.0 AHB WLAN.MSL.1.0.1-00887-QCAMSLSWPLZ-1
Tested-on: WCN6855 hw2.0 PCI WLAN.HSP.1.1-01720.1-QCAHSPSWPL_V1_V2_SILICONZ_LITE-1
Tested-on: QCN9074 hw1.0 PCI WLAN.HK.2.5.0.1-01100-QCAHKSWPL_SILICONZ-1
Tested-on: IPQ8074 hw2.0 AHB WLAN.HK.2.4.0.1-00192-QCAHKSWPL_SILICONZ-1
Signed-off-by: Manikanta Pubbisetty <quic_mpubbise@quicinc.com>
---
drivers/net/wireless/ath/ath11k/core.c | 7 +++
drivers/net/wireless/ath/ath11k/hw.h | 1 +
drivers/net/wireless/ath/ath11k/qmi.c | 76 ++++++++++++++++----------
3 files changed, 56 insertions(+), 28 deletions(-)
diff --git a/drivers/net/wireless/ath/ath11k/core.c b/drivers/net/wireless/ath/ath11k/core.c
index 3be4327b4d9c..64cf87fd6a7f 100644
--- a/drivers/net/wireless/ath/ath11k/core.c
+++ b/drivers/net/wireless/ath/ath11k/core.c
@@ -109,6 +109,7 @@ static const struct ath11k_hw_params ath11k_hw_params[] = {
.hybrid_bus_type = false,
.dp_window_idx = 0,
.ce_window_idx = 0,
+ .fixed_fw_mem = false,
},
{
.hw_rev = ATH11K_HW_IPQ6018_HW10,
@@ -183,6 +184,7 @@ static const struct ath11k_hw_params ath11k_hw_params[] = {
.hybrid_bus_type = false,
.dp_window_idx = 0,
.ce_window_idx = 0,
+ .fixed_fw_mem = false,
},
{
.name = "qca6390 hw2.0",
@@ -256,6 +258,7 @@ static const struct ath11k_hw_params ath11k_hw_params[] = {
.hybrid_bus_type = false,
.dp_window_idx = 0,
.ce_window_idx = 0,
+ .fixed_fw_mem = false,
},
{
.name = "qcn9074 hw1.0",
@@ -329,6 +332,7 @@ static const struct ath11k_hw_params ath11k_hw_params[] = {
.hybrid_bus_type = false,
.dp_window_idx = 3,
.ce_window_idx = 2,
+ .fixed_fw_mem = false,
},
{
.name = "wcn6855 hw2.0",
@@ -402,6 +406,7 @@ static const struct ath11k_hw_params ath11k_hw_params[] = {
.hybrid_bus_type = false,
.dp_window_idx = 0,
.ce_window_idx = 0,
+ .fixed_fw_mem = false,
},
{
.name = "wcn6855 hw2.1",
@@ -474,6 +479,7 @@ static const struct ath11k_hw_params ath11k_hw_params[] = {
.hybrid_bus_type = false,
.dp_window_idx = 0,
.ce_window_idx = 0,
+ .fixed_fw_mem = false,
},
{
.name = "wcn6750 hw1.0",
@@ -543,6 +549,7 @@ static const struct ath11k_hw_params ath11k_hw_params[] = {
.hybrid_bus_type = true,
.dp_window_idx = 1,
.ce_window_idx = 2,
+ .fixed_fw_mem = true,
},
};
diff --git a/drivers/net/wireless/ath/ath11k/hw.h b/drivers/net/wireless/ath/ath11k/hw.h
index b63538084215..b5a4758a6bc5 100644
--- a/drivers/net/wireless/ath/ath11k/hw.h
+++ b/drivers/net/wireless/ath/ath11k/hw.h
@@ -203,6 +203,7 @@ struct ath11k_hw_params {
bool hybrid_bus_type;
u8 dp_window_idx;
u8 ce_window_idx;
+ bool fixed_fw_mem;
};
struct ath11k_hw_ops {
diff --git a/drivers/net/wireless/ath/ath11k/qmi.c b/drivers/net/wireless/ath/ath11k/qmi.c
index 71e25cb094f8..3eef6a162cc2 100644
--- a/drivers/net/wireless/ath/ath11k/qmi.c
+++ b/drivers/net/wireless/ath/ath11k/qmi.c
@@ -1799,10 +1799,6 @@ static int ath11k_qmi_fw_ind_register_send(struct ath11k_base *ab)
req->client_id = QMI_WLANFW_CLIENT_ID;
req->fw_ready_enable_valid = 1;
req->fw_ready_enable = 1;
- req->request_mem_enable_valid = 1;
- req->request_mem_enable = 1;
- req->fw_mem_ready_enable_valid = 1;
- req->fw_mem_ready_enable = 1;
req->cal_done_enable_valid = 1;
req->cal_done_enable = 1;
req->fw_init_done_enable_valid = 1;
@@ -1811,6 +1807,17 @@ static int ath11k_qmi_fw_ind_register_send(struct ath11k_base *ab)
req->pin_connect_result_enable_valid = 0;
req->pin_connect_result_enable = 0;
+ /* WCN6750 doesn't request for DDR memory via QMI,
+ * instead it uses a fixed 12MB reserved memory
+ * region in DDR.
+ */
+ if (!ab->hw_params.fixed_fw_mem) {
+ req->request_mem_enable_valid = 1;
+ req->request_mem_enable = 1;
+ req->fw_mem_ready_enable_valid = 1;
+ req->fw_mem_ready_enable = 1;
+ }
+
ret = qmi_txn_init(handle, &txn,
qmi_wlanfw_ind_register_resp_msg_v01_ei, resp);
if (ret < 0)
@@ -2839,27 +2846,6 @@ ath11k_qmi_driver_event_post(struct ath11k_qmi *qmi,
return 0;
}
-static int ath11k_qmi_event_server_arrive(struct ath11k_qmi *qmi)
-{
- struct ath11k_base *ab = qmi->ab;
- int ret;
-
- ret = ath11k_qmi_fw_ind_register_send(ab);
- if (ret < 0) {
- ath11k_warn(ab, "failed to send qmi firmware indication: %d\n",
- ret);
- return ret;
- }
-
- ret = ath11k_qmi_host_cap_send(ab);
- if (ret < 0) {
- ath11k_warn(ab, "failed to send qmi host cap: %d\n", ret);
- return ret;
- }
-
- return ret;
-}
-
static int ath11k_qmi_event_mem_request(struct ath11k_qmi *qmi)
{
struct ath11k_base *ab = qmi->ab;
@@ -2901,9 +2887,33 @@ static int ath11k_qmi_event_load_bdf(struct ath11k_qmi *qmi)
return ret;
}
- ret = ath11k_qmi_wlanfw_m3_info_send(ab);
+ return 0;
+}
+
+static int ath11k_qmi_event_server_arrive(struct ath11k_qmi *qmi)
+{
+ struct ath11k_base *ab = qmi->ab;
+ int ret;
+
+ ret = ath11k_qmi_fw_ind_register_send(ab);
+ if (ret < 0) {
+ ath11k_warn(ab, "failed to send qmi firmware indication: %d\n",
+ ret);
+ return ret;
+ }
+
+ ret = ath11k_qmi_host_cap_send(ab);
if (ret < 0) {
- ath11k_warn(ab, "failed to send qmi m3 info req: %d\n", ret);
+ ath11k_warn(ab, "failed to send qmi host cap: %d\n", ret);
+ return ret;
+ }
+
+ if (!ab->hw_params.fixed_fw_mem)
+ return ret;
+
+ ret = ath11k_qmi_event_load_bdf(qmi);
+ if (ret < 0) {
+ ath11k_warn(ab, "qmi failed to download BDF:%d\n", ret);
return ret;
}
@@ -3103,8 +3113,18 @@ static void ath11k_qmi_driver_event_work(struct work_struct *work)
break;
case ATH11K_QMI_EVENT_FW_MEM_READY:
ret = ath11k_qmi_event_load_bdf(qmi);
- if (ret < 0)
+ if (ret < 0) {
set_bit(ATH11K_FLAG_QMI_FAIL, &ab->dev_flags);
+ break;
+ }
+
+ ret = ath11k_qmi_wlanfw_m3_info_send(ab);
+ if (ret < 0) {
+ ath11k_warn(ab,
+ "failed to send qmi m3 info req: %d\n", ret);
+ set_bit(ATH11K_FLAG_QMI_FAIL, &ab->dev_flags);
+ }
+
break;
case ATH11K_QMI_EVENT_FW_READY:
clear_bit(ATH11K_FLAG_QMI_FAIL, &ab->dev_flags);
--
2.35.1
--
ath11k mailing list
ath11k@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/ath11k
^ permalink raw reply related [flat|nested] 36+ messages in thread
* [PATCH v7 7/9] ath11k: HAL changes to support WCN6750
2022-04-29 17:04 ` Manikanta Pubbisetty
@ 2022-04-29 17:05 ` Manikanta Pubbisetty
-1 siblings, 0 replies; 36+ messages in thread
From: Manikanta Pubbisetty @ 2022-04-29 17:05 UTC (permalink / raw)
To: ath11k; +Cc: linux-wireless, devicetree, robh, mka, Manikanta Pubbisetty
Add HAL changes required to support WCN6750. Offsets of some registers
for WCN6750 are different from other supported devices; move such
register offsets to platform specific ath11k_hw_regs.
Tested-on: WCN6750 hw1.0 AHB WLAN.MSL.1.0.1-00887-QCAMSLSWPLZ-1
Tested-on: WCN6855 hw2.0 PCI WLAN.HSP.1.1-01720.1-QCAHSPSWPL_V1_V2_SILICONZ_LITE-1
Tested-on: QCN9074 hw1.0 PCI WLAN.HK.2.5.0.1-01100-QCAHKSWPL_SILICONZ-1
Tested-on: IPQ8074 hw2.0 AHB WLAN.HK.2.4.0.1-00192-QCAHKSWPL_SILICONZ-1
Signed-off-by: Manikanta Pubbisetty <quic_mpubbise@quicinc.com>
---
drivers/net/wireless/ath/ath11k/core.c | 2 +
drivers/net/wireless/ath/ath11k/hal.c | 15 +--
drivers/net/wireless/ath/ath11k/hal.h | 15 +--
drivers/net/wireless/ath/ath11k/hw.c | 134 +++++++++++++++++++++++++
drivers/net/wireless/ath/ath11k/hw.h | 10 ++
5 files changed, 163 insertions(+), 13 deletions(-)
diff --git a/drivers/net/wireless/ath/ath11k/core.c b/drivers/net/wireless/ath/ath11k/core.c
index 64cf87fd6a7f..7385e1c60ca1 100644
--- a/drivers/net/wireless/ath/ath11k/core.c
+++ b/drivers/net/wireless/ath/ath11k/core.c
@@ -491,8 +491,10 @@ static const struct ath11k_hw_params ath11k_hw_params[] = {
},
.max_radios = 1,
.bdf_addr = 0x4B0C0000,
+ .hw_ops = &wcn6750_ops,
.ring_mask = &ath11k_hw_ring_mask_qca6390,
.internal_sleep_clock = false,
+ .regs = &wcn6750_regs,
.qmi_service_ins_id = ATH11K_QMI_WLFW_SERVICE_INS_ID_V01_WCN6750,
.host_ce_config = ath11k_host_ce_config_qca6390,
.ce_count = 9,
diff --git a/drivers/net/wireless/ath/ath11k/hal.c b/drivers/net/wireless/ath/ath11k/hal.c
index 2ec09ae90080..1dba7b9e0bda 100644
--- a/drivers/net/wireless/ath/ath11k/hal.c
+++ b/drivers/net/wireless/ath/ath11k/hal.c
@@ -1,6 +1,7 @@
// SPDX-License-Identifier: BSD-3-Clause-Clear
/*
* Copyright (c) 2018-2019 The Linux Foundation. All rights reserved.
+ * Copyright (c) 2022, Qualcomm Innovation Center, Inc. All rights reserved.
*/
#include <linux/dma-mapping.h>
#include "hal_tx.h"
@@ -1082,10 +1083,10 @@ static void ath11k_hal_srng_update_hp_tp_addr(struct ath11k_base *ab,
srng = &hal->srng_list[ring_id];
if (srng_config->ring_dir == HAL_SRNG_DIR_DST)
- srng->u.dst_ring.tp_addr = (u32 *)(HAL_SHADOW_REG(shadow_cfg_idx) +
+ srng->u.dst_ring.tp_addr = (u32 *)(HAL_SHADOW_REG(ab, shadow_cfg_idx) +
(unsigned long)ab->mem);
else
- srng->u.src_ring.hp_addr = (u32 *)(HAL_SHADOW_REG(shadow_cfg_idx) +
+ srng->u.src_ring.hp_addr = (u32 *)(HAL_SHADOW_REG(ab, shadow_cfg_idx) +
(unsigned long)ab->mem);
}
@@ -1120,7 +1121,7 @@ int ath11k_hal_srng_update_shadow_config(struct ath11k_base *ab,
ath11k_dbg(ab, ATH11k_DBG_HAL,
"target_reg %x, shadow reg 0x%x shadow_idx 0x%x, ring_type %d, ring num %d",
target_reg,
- HAL_SHADOW_REG(shadow_cfg_idx),
+ HAL_SHADOW_REG(ab, shadow_cfg_idx),
shadow_cfg_idx,
ring_type, ring_num);
@@ -1193,12 +1194,12 @@ static int ath11k_hal_srng_create_config(struct ath11k_base *ab)
s->reg_start[1] = HAL_SEQ_WCSS_UMAC_REO_REG + HAL_REO_TCL_RING_HP(ab);
s = &hal->srng_config[HAL_REO_REINJECT];
- s->reg_start[0] = HAL_SEQ_WCSS_UMAC_REO_REG + HAL_SW2REO_RING_BASE_LSB;
- s->reg_start[1] = HAL_SEQ_WCSS_UMAC_REO_REG + HAL_SW2REO_RING_HP;
+ s->reg_start[0] = HAL_SEQ_WCSS_UMAC_REO_REG + HAL_SW2REO_RING_BASE_LSB(ab);
+ s->reg_start[1] = HAL_SEQ_WCSS_UMAC_REO_REG + HAL_SW2REO_RING_HP(ab);
s = &hal->srng_config[HAL_REO_CMD];
- s->reg_start[0] = HAL_SEQ_WCSS_UMAC_REO_REG + HAL_REO_CMD_RING_BASE_LSB;
- s->reg_start[1] = HAL_SEQ_WCSS_UMAC_REO_REG + HAL_REO_CMD_HP;
+ s->reg_start[0] = HAL_SEQ_WCSS_UMAC_REO_REG + HAL_REO_CMD_RING_BASE_LSB(ab);
+ s->reg_start[1] = HAL_SEQ_WCSS_UMAC_REO_REG + HAL_REO_CMD_HP(ab);
s = &hal->srng_config[HAL_REO_STATUS];
s->reg_start[0] = HAL_SEQ_WCSS_UMAC_REO_REG + HAL_REO_STATUS_RING_BASE_LSB(ab);
diff --git a/drivers/net/wireless/ath/ath11k/hal.h b/drivers/net/wireless/ath/ath11k/hal.h
index a7d9b4c551ad..1aadb1566df8 100644
--- a/drivers/net/wireless/ath/ath11k/hal.h
+++ b/drivers/net/wireless/ath/ath11k/hal.h
@@ -1,6 +1,7 @@
/* SPDX-License-Identifier: BSD-3-Clause-Clear */
/*
* Copyright (c) 2018-2019 The Linux Foundation. All rights reserved.
+ * Copyright (c) 2022, Qualcomm Innovation Center, Inc. All rights reserved.
*/
#ifndef ATH11K_HAL_H
@@ -31,12 +32,12 @@ struct ath11k_base;
#define HAL_DSCP_TID_TBL_SIZE 24
/* calculate the register address from bar0 of shadow register x */
-#define HAL_SHADOW_BASE_ADDR 0x000008fc
+#define HAL_SHADOW_BASE_ADDR(ab) ab->hw_params.regs->hal_shadow_base_addr
#define HAL_SHADOW_NUM_REGS 36
#define HAL_HP_OFFSET_IN_REG_START 1
#define HAL_OFFSET_FROM_HP_TO_TP 4
-#define HAL_SHADOW_REG(x) (HAL_SHADOW_BASE_ADDR + (4 * (x)))
+#define HAL_SHADOW_REG(ab, x) (HAL_SHADOW_BASE_ADDR(ab) + (4 * (x)))
/* WCSS Relative address */
#define HAL_SEQ_WCSS_UMAC_OFFSET 0x00a00000
@@ -180,16 +181,18 @@ struct ath11k_base;
#define HAL_REO_TCL_RING_HP(ab) ab->hw_params.regs->hal_reo_tcl_ring_hp
/* REO CMD R0 address */
-#define HAL_REO_CMD_RING_BASE_LSB 0x00000194
+#define HAL_REO_CMD_RING_BASE_LSB(ab) \
+ ab->hw_params.regs->hal_reo_cmd_ring_base_lsb
/* REO CMD R2 address */
-#define HAL_REO_CMD_HP 0x00003020
+#define HAL_REO_CMD_HP(ab) ab->hw_params.regs->hal_reo_cmd_ring_hp
/* SW2REO R0 address */
-#define HAL_SW2REO_RING_BASE_LSB 0x000001ec
+#define HAL_SW2REO_RING_BASE_LSB(ab) \
+ ab->hw_params.regs->hal_sw2reo_ring_base_lsb
/* SW2REO R2 address */
-#define HAL_SW2REO_RING_HP 0x00003028
+#define HAL_SW2REO_RING_HP(ab) ab->hw_params.regs->hal_sw2reo_ring_hp
/* CE ring R0 address */
#define HAL_CE_DST_RING_BASE_LSB 0x00000000
diff --git a/drivers/net/wireless/ath/ath11k/hw.c b/drivers/net/wireless/ath/ath11k/hw.c
index 46449a18b5cb..a9f5c4e63d62 100644
--- a/drivers/net/wireless/ath/ath11k/hw.c
+++ b/drivers/net/wireless/ath/ath11k/hw.c
@@ -1,6 +1,7 @@
// SPDX-License-Identifier: BSD-3-Clause-Clear
/*
* Copyright (c) 2018-2020 The Linux Foundation. All rights reserved.
+ * Copyright (c) 2022, Qualcomm Innovation Center, Inc. All rights reserved.
*/
#include <linux/types.h>
@@ -1014,6 +1015,13 @@ const struct ath11k_hw_ops wcn6855_ops = {
.rx_desc_mpdu_start_addr2 = ath11k_hw_wcn6855_rx_desc_mpdu_start_addr2,
};
+const struct ath11k_hw_ops wcn6750_ops = {
+ .get_hw_mac_from_pdev_id = ath11k_hw_ipq8074_mac_from_pdev_id,
+ .wmi_init_config = ath11k_init_wmi_config_qca6390,
+ .mac_id_to_pdev_id = ath11k_hw_mac_id_to_pdev_id_qca6390,
+ .mac_id_to_srng_id = ath11k_hw_mac_id_to_srng_id_qca6390,
+};
+
#define ATH11K_TX_RING_MASK_0 0x1
#define ATH11K_TX_RING_MASK_1 0x2
#define ATH11K_TX_RING_MASK_2 0x4
@@ -1908,10 +1916,18 @@ const struct ath11k_hw_regs ipq8074_regs = {
.hal_reo_tcl_ring_base_lsb = 0x000003fc,
.hal_reo_tcl_ring_hp = 0x00003058,
+ /* REO CMD ring address */
+ .hal_reo_cmd_ring_base_lsb = 0x00000194,
+ .hal_reo_cmd_ring_hp = 0x00003020,
+
/* REO status address */
.hal_reo_status_ring_base_lsb = 0x00000504,
.hal_reo_status_hp = 0x00003070,
+ /* SW2REO ring address */
+ .hal_sw2reo_ring_base_lsb = 0x000001ec,
+ .hal_sw2reo_ring_hp = 0x00003028,
+
/* WCSS relative address */
.hal_seq_wcss_umac_ce0_src_reg = 0x00a00000,
.hal_seq_wcss_umac_ce0_dst_reg = 0x00a01000,
@@ -1932,6 +1948,9 @@ const struct ath11k_hw_regs ipq8074_regs = {
/* PCIe base address */
.pcie_qserdes_sysclk_en_sel = 0x0,
.pcie_pcs_osc_dtct_config_base = 0x0,
+
+ /* Shadow register area */
+ .hal_shadow_base_addr = 0x0,
};
const struct ath11k_hw_regs qca6390_regs = {
@@ -1979,10 +1998,18 @@ const struct ath11k_hw_regs qca6390_regs = {
.hal_reo_tcl_ring_base_lsb = 0x000003a4,
.hal_reo_tcl_ring_hp = 0x00003050,
+ /* REO CMD ring address */
+ .hal_reo_cmd_ring_base_lsb = 0x00000194,
+ .hal_reo_cmd_ring_hp = 0x00003020,
+
/* REO status address */
.hal_reo_status_ring_base_lsb = 0x000004ac,
.hal_reo_status_hp = 0x00003068,
+ /* SW2REO ring address */
+ .hal_sw2reo_ring_base_lsb = 0x000001ec,
+ .hal_sw2reo_ring_hp = 0x00003028,
+
/* WCSS relative address */
.hal_seq_wcss_umac_ce0_src_reg = 0x00a00000,
.hal_seq_wcss_umac_ce0_dst_reg = 0x00a01000,
@@ -2003,6 +2030,9 @@ const struct ath11k_hw_regs qca6390_regs = {
/* PCIe base address */
.pcie_qserdes_sysclk_en_sel = 0x01e0c0ac,
.pcie_pcs_osc_dtct_config_base = 0x01e0c628,
+
+ /* Shadow register area */
+ .hal_shadow_base_addr = 0x000008fc,
};
const struct ath11k_hw_regs qcn9074_regs = {
@@ -2050,10 +2080,18 @@ const struct ath11k_hw_regs qcn9074_regs = {
.hal_reo_tcl_ring_base_lsb = 0x000003fc,
.hal_reo_tcl_ring_hp = 0x00003058,
+ /* REO CMD ring address */
+ .hal_reo_cmd_ring_base_lsb = 0x00000194,
+ .hal_reo_cmd_ring_hp = 0x00003020,
+
/* REO status address */
.hal_reo_status_ring_base_lsb = 0x00000504,
.hal_reo_status_hp = 0x00003070,
+ /* SW2REO ring address */
+ .hal_sw2reo_ring_base_lsb = 0x000001ec,
+ .hal_sw2reo_ring_hp = 0x00003028,
+
/* WCSS relative address */
.hal_seq_wcss_umac_ce0_src_reg = 0x01b80000,
.hal_seq_wcss_umac_ce0_dst_reg = 0x01b81000,
@@ -2074,6 +2112,9 @@ const struct ath11k_hw_regs qcn9074_regs = {
/* PCIe base address */
.pcie_qserdes_sysclk_en_sel = 0x01e0e0a8,
.pcie_pcs_osc_dtct_config_base = 0x01e0f45c,
+
+ /* Shadow register area */
+ .hal_shadow_base_addr = 0x0,
};
const struct ath11k_hw_regs wcn6855_regs = {
@@ -2121,10 +2162,18 @@ const struct ath11k_hw_regs wcn6855_regs = {
.hal_reo_tcl_ring_base_lsb = 0x00000454,
.hal_reo_tcl_ring_hp = 0x00003060,
+ /* REO CMD ring address */
+ .hal_reo_cmd_ring_base_lsb = 0x00000194,
+ .hal_reo_cmd_ring_hp = 0x00003020,
+
/* REO status address */
.hal_reo_status_ring_base_lsb = 0x0000055c,
.hal_reo_status_hp = 0x00003078,
+ /* SW2REO ring address */
+ .hal_sw2reo_ring_base_lsb = 0x000001ec,
+ .hal_sw2reo_ring_hp = 0x00003028,
+
/* WCSS relative address */
.hal_seq_wcss_umac_ce0_src_reg = 0x1b80000,
.hal_seq_wcss_umac_ce0_dst_reg = 0x1b81000,
@@ -2145,6 +2194,91 @@ const struct ath11k_hw_regs wcn6855_regs = {
/* PCIe base address */
.pcie_qserdes_sysclk_en_sel = 0x01e0c0ac,
.pcie_pcs_osc_dtct_config_base = 0x01e0c628,
+
+ /* Shadow register area */
+ .hal_shadow_base_addr = 0x000008fc,
+};
+
+const struct ath11k_hw_regs wcn6750_regs = {
+ /* SW2TCL(x) R0 ring configuration address */
+ .hal_tcl1_ring_base_lsb = 0x00000694,
+ .hal_tcl1_ring_base_msb = 0x00000698,
+ .hal_tcl1_ring_id = 0x0000069c,
+ .hal_tcl1_ring_misc = 0x000006a4,
+ .hal_tcl1_ring_tp_addr_lsb = 0x000006b0,
+ .hal_tcl1_ring_tp_addr_msb = 0x000006b4,
+ .hal_tcl1_ring_consumer_int_setup_ix0 = 0x000006c4,
+ .hal_tcl1_ring_consumer_int_setup_ix1 = 0x000006c8,
+ .hal_tcl1_ring_msi1_base_lsb = 0x000006dc,
+ .hal_tcl1_ring_msi1_base_msb = 0x000006e0,
+ .hal_tcl1_ring_msi1_data = 0x000006e4,
+ .hal_tcl2_ring_base_lsb = 0x000006ec,
+ .hal_tcl_ring_base_lsb = 0x0000079c,
+
+ /* TCL STATUS ring address */
+ .hal_tcl_status_ring_base_lsb = 0x000008a4,
+
+ /* REO2SW(x) R0 ring configuration address */
+ .hal_reo1_ring_base_lsb = 0x000001ec,
+ .hal_reo1_ring_base_msb = 0x000001f0,
+ .hal_reo1_ring_id = 0x000001f4,
+ .hal_reo1_ring_misc = 0x000001fc,
+ .hal_reo1_ring_hp_addr_lsb = 0x00000200,
+ .hal_reo1_ring_hp_addr_msb = 0x00000204,
+ .hal_reo1_ring_producer_int_setup = 0x00000210,
+ .hal_reo1_ring_msi1_base_lsb = 0x00000234,
+ .hal_reo1_ring_msi1_base_msb = 0x00000238,
+ .hal_reo1_ring_msi1_data = 0x0000023c,
+ .hal_reo2_ring_base_lsb = 0x00000244,
+ .hal_reo1_aging_thresh_ix_0 = 0x00000564,
+ .hal_reo1_aging_thresh_ix_1 = 0x00000568,
+ .hal_reo1_aging_thresh_ix_2 = 0x0000056c,
+ .hal_reo1_aging_thresh_ix_3 = 0x00000570,
+
+ /* REO2SW(x) R2 ring pointers (head/tail) address */
+ .hal_reo1_ring_hp = 0x00003028,
+ .hal_reo1_ring_tp = 0x0000302c,
+ .hal_reo2_ring_hp = 0x00003030,
+
+ /* REO2TCL R0 ring configuration address */
+ .hal_reo_tcl_ring_base_lsb = 0x000003fc,
+ .hal_reo_tcl_ring_hp = 0x00003058,
+
+ /* REO CMD ring address */
+ .hal_reo_cmd_ring_base_lsb = 0x000000e4,
+ .hal_reo_cmd_ring_hp = 0x00003010,
+
+ /* REO status address */
+ .hal_reo_status_ring_base_lsb = 0x00000504,
+ .hal_reo_status_hp = 0x00003070,
+
+ /* SW2REO ring address */
+ .hal_sw2reo_ring_base_lsb = 0x0000013c,
+ .hal_sw2reo_ring_hp = 0x00003018,
+
+ /* WCSS relative address */
+ .hal_seq_wcss_umac_ce0_src_reg = 0x01b80000,
+ .hal_seq_wcss_umac_ce0_dst_reg = 0x01b81000,
+ .hal_seq_wcss_umac_ce1_src_reg = 0x01b82000,
+ .hal_seq_wcss_umac_ce1_dst_reg = 0x01b83000,
+
+ /* WBM Idle address */
+ .hal_wbm_idle_link_ring_base_lsb = 0x00000874,
+ .hal_wbm_idle_link_ring_misc = 0x00000884,
+
+ /* SW2WBM release address */
+ .hal_wbm_release_ring_base_lsb = 0x000001ec,
+
+ /* WBM2SW release address */
+ .hal_wbm0_release_ring_base_lsb = 0x00000924,
+ .hal_wbm1_release_ring_base_lsb = 0x0000097c,
+
+ /* PCIe base address */
+ .pcie_qserdes_sysclk_en_sel = 0x0,
+ .pcie_pcs_osc_dtct_config_base = 0x0,
+
+ /* Shadow register area */
+ .hal_shadow_base_addr = 0x00000504,
};
const struct ath11k_hw_hal_params ath11k_hw_hal_params_ipq8074 = {
diff --git a/drivers/net/wireless/ath/ath11k/hw.h b/drivers/net/wireless/ath/ath11k/hw.h
index b5a4758a6bc5..6d588cd80093 100644
--- a/drivers/net/wireless/ath/ath11k/hw.h
+++ b/drivers/net/wireless/ath/ath11k/hw.h
@@ -253,6 +253,7 @@ extern const struct ath11k_hw_ops ipq6018_ops;
extern const struct ath11k_hw_ops qca6390_ops;
extern const struct ath11k_hw_ops qcn9074_ops;
extern const struct ath11k_hw_ops wcn6855_ops;
+extern const struct ath11k_hw_ops wcn6750_ops;
extern const struct ath11k_hw_ring_mask ath11k_hw_ring_mask_ipq8074;
extern const struct ath11k_hw_ring_mask ath11k_hw_ring_mask_qca6390;
@@ -355,6 +356,12 @@ struct ath11k_hw_regs {
u32 hal_reo_status_ring_base_lsb;
u32 hal_reo_status_hp;
+ u32 hal_reo_cmd_ring_base_lsb;
+ u32 hal_reo_cmd_ring_hp;
+
+ u32 hal_sw2reo_ring_base_lsb;
+ u32 hal_sw2reo_ring_hp;
+
u32 hal_seq_wcss_umac_ce0_src_reg;
u32 hal_seq_wcss_umac_ce0_dst_reg;
u32 hal_seq_wcss_umac_ce1_src_reg;
@@ -370,12 +377,15 @@ struct ath11k_hw_regs {
u32 pcie_qserdes_sysclk_en_sel;
u32 pcie_pcs_osc_dtct_config_base;
+
+ u32 hal_shadow_base_addr;
};
extern const struct ath11k_hw_regs ipq8074_regs;
extern const struct ath11k_hw_regs qca6390_regs;
extern const struct ath11k_hw_regs qcn9074_regs;
extern const struct ath11k_hw_regs wcn6855_regs;
+extern const struct ath11k_hw_regs wcn6750_regs;
static inline const char *ath11k_bd_ie_type_str(enum ath11k_bd_ie_type type)
{
--
2.35.1
^ permalink raw reply related [flat|nested] 36+ messages in thread* [PATCH v7 7/9] ath11k: HAL changes to support WCN6750
@ 2022-04-29 17:05 ` Manikanta Pubbisetty
0 siblings, 0 replies; 36+ messages in thread
From: Manikanta Pubbisetty @ 2022-04-29 17:05 UTC (permalink / raw)
To: ath11k; +Cc: linux-wireless, devicetree, robh, mka, Manikanta Pubbisetty
Add HAL changes required to support WCN6750. Offsets of some registers
for WCN6750 are different from other supported devices; move such
register offsets to platform specific ath11k_hw_regs.
Tested-on: WCN6750 hw1.0 AHB WLAN.MSL.1.0.1-00887-QCAMSLSWPLZ-1
Tested-on: WCN6855 hw2.0 PCI WLAN.HSP.1.1-01720.1-QCAHSPSWPL_V1_V2_SILICONZ_LITE-1
Tested-on: QCN9074 hw1.0 PCI WLAN.HK.2.5.0.1-01100-QCAHKSWPL_SILICONZ-1
Tested-on: IPQ8074 hw2.0 AHB WLAN.HK.2.4.0.1-00192-QCAHKSWPL_SILICONZ-1
Signed-off-by: Manikanta Pubbisetty <quic_mpubbise@quicinc.com>
---
drivers/net/wireless/ath/ath11k/core.c | 2 +
drivers/net/wireless/ath/ath11k/hal.c | 15 +--
drivers/net/wireless/ath/ath11k/hal.h | 15 +--
drivers/net/wireless/ath/ath11k/hw.c | 134 +++++++++++++++++++++++++
drivers/net/wireless/ath/ath11k/hw.h | 10 ++
5 files changed, 163 insertions(+), 13 deletions(-)
diff --git a/drivers/net/wireless/ath/ath11k/core.c b/drivers/net/wireless/ath/ath11k/core.c
index 64cf87fd6a7f..7385e1c60ca1 100644
--- a/drivers/net/wireless/ath/ath11k/core.c
+++ b/drivers/net/wireless/ath/ath11k/core.c
@@ -491,8 +491,10 @@ static const struct ath11k_hw_params ath11k_hw_params[] = {
},
.max_radios = 1,
.bdf_addr = 0x4B0C0000,
+ .hw_ops = &wcn6750_ops,
.ring_mask = &ath11k_hw_ring_mask_qca6390,
.internal_sleep_clock = false,
+ .regs = &wcn6750_regs,
.qmi_service_ins_id = ATH11K_QMI_WLFW_SERVICE_INS_ID_V01_WCN6750,
.host_ce_config = ath11k_host_ce_config_qca6390,
.ce_count = 9,
diff --git a/drivers/net/wireless/ath/ath11k/hal.c b/drivers/net/wireless/ath/ath11k/hal.c
index 2ec09ae90080..1dba7b9e0bda 100644
--- a/drivers/net/wireless/ath/ath11k/hal.c
+++ b/drivers/net/wireless/ath/ath11k/hal.c
@@ -1,6 +1,7 @@
// SPDX-License-Identifier: BSD-3-Clause-Clear
/*
* Copyright (c) 2018-2019 The Linux Foundation. All rights reserved.
+ * Copyright (c) 2022, Qualcomm Innovation Center, Inc. All rights reserved.
*/
#include <linux/dma-mapping.h>
#include "hal_tx.h"
@@ -1082,10 +1083,10 @@ static void ath11k_hal_srng_update_hp_tp_addr(struct ath11k_base *ab,
srng = &hal->srng_list[ring_id];
if (srng_config->ring_dir == HAL_SRNG_DIR_DST)
- srng->u.dst_ring.tp_addr = (u32 *)(HAL_SHADOW_REG(shadow_cfg_idx) +
+ srng->u.dst_ring.tp_addr = (u32 *)(HAL_SHADOW_REG(ab, shadow_cfg_idx) +
(unsigned long)ab->mem);
else
- srng->u.src_ring.hp_addr = (u32 *)(HAL_SHADOW_REG(shadow_cfg_idx) +
+ srng->u.src_ring.hp_addr = (u32 *)(HAL_SHADOW_REG(ab, shadow_cfg_idx) +
(unsigned long)ab->mem);
}
@@ -1120,7 +1121,7 @@ int ath11k_hal_srng_update_shadow_config(struct ath11k_base *ab,
ath11k_dbg(ab, ATH11k_DBG_HAL,
"target_reg %x, shadow reg 0x%x shadow_idx 0x%x, ring_type %d, ring num %d",
target_reg,
- HAL_SHADOW_REG(shadow_cfg_idx),
+ HAL_SHADOW_REG(ab, shadow_cfg_idx),
shadow_cfg_idx,
ring_type, ring_num);
@@ -1193,12 +1194,12 @@ static int ath11k_hal_srng_create_config(struct ath11k_base *ab)
s->reg_start[1] = HAL_SEQ_WCSS_UMAC_REO_REG + HAL_REO_TCL_RING_HP(ab);
s = &hal->srng_config[HAL_REO_REINJECT];
- s->reg_start[0] = HAL_SEQ_WCSS_UMAC_REO_REG + HAL_SW2REO_RING_BASE_LSB;
- s->reg_start[1] = HAL_SEQ_WCSS_UMAC_REO_REG + HAL_SW2REO_RING_HP;
+ s->reg_start[0] = HAL_SEQ_WCSS_UMAC_REO_REG + HAL_SW2REO_RING_BASE_LSB(ab);
+ s->reg_start[1] = HAL_SEQ_WCSS_UMAC_REO_REG + HAL_SW2REO_RING_HP(ab);
s = &hal->srng_config[HAL_REO_CMD];
- s->reg_start[0] = HAL_SEQ_WCSS_UMAC_REO_REG + HAL_REO_CMD_RING_BASE_LSB;
- s->reg_start[1] = HAL_SEQ_WCSS_UMAC_REO_REG + HAL_REO_CMD_HP;
+ s->reg_start[0] = HAL_SEQ_WCSS_UMAC_REO_REG + HAL_REO_CMD_RING_BASE_LSB(ab);
+ s->reg_start[1] = HAL_SEQ_WCSS_UMAC_REO_REG + HAL_REO_CMD_HP(ab);
s = &hal->srng_config[HAL_REO_STATUS];
s->reg_start[0] = HAL_SEQ_WCSS_UMAC_REO_REG + HAL_REO_STATUS_RING_BASE_LSB(ab);
diff --git a/drivers/net/wireless/ath/ath11k/hal.h b/drivers/net/wireless/ath/ath11k/hal.h
index a7d9b4c551ad..1aadb1566df8 100644
--- a/drivers/net/wireless/ath/ath11k/hal.h
+++ b/drivers/net/wireless/ath/ath11k/hal.h
@@ -1,6 +1,7 @@
/* SPDX-License-Identifier: BSD-3-Clause-Clear */
/*
* Copyright (c) 2018-2019 The Linux Foundation. All rights reserved.
+ * Copyright (c) 2022, Qualcomm Innovation Center, Inc. All rights reserved.
*/
#ifndef ATH11K_HAL_H
@@ -31,12 +32,12 @@ struct ath11k_base;
#define HAL_DSCP_TID_TBL_SIZE 24
/* calculate the register address from bar0 of shadow register x */
-#define HAL_SHADOW_BASE_ADDR 0x000008fc
+#define HAL_SHADOW_BASE_ADDR(ab) ab->hw_params.regs->hal_shadow_base_addr
#define HAL_SHADOW_NUM_REGS 36
#define HAL_HP_OFFSET_IN_REG_START 1
#define HAL_OFFSET_FROM_HP_TO_TP 4
-#define HAL_SHADOW_REG(x) (HAL_SHADOW_BASE_ADDR + (4 * (x)))
+#define HAL_SHADOW_REG(ab, x) (HAL_SHADOW_BASE_ADDR(ab) + (4 * (x)))
/* WCSS Relative address */
#define HAL_SEQ_WCSS_UMAC_OFFSET 0x00a00000
@@ -180,16 +181,18 @@ struct ath11k_base;
#define HAL_REO_TCL_RING_HP(ab) ab->hw_params.regs->hal_reo_tcl_ring_hp
/* REO CMD R0 address */
-#define HAL_REO_CMD_RING_BASE_LSB 0x00000194
+#define HAL_REO_CMD_RING_BASE_LSB(ab) \
+ ab->hw_params.regs->hal_reo_cmd_ring_base_lsb
/* REO CMD R2 address */
-#define HAL_REO_CMD_HP 0x00003020
+#define HAL_REO_CMD_HP(ab) ab->hw_params.regs->hal_reo_cmd_ring_hp
/* SW2REO R0 address */
-#define HAL_SW2REO_RING_BASE_LSB 0x000001ec
+#define HAL_SW2REO_RING_BASE_LSB(ab) \
+ ab->hw_params.regs->hal_sw2reo_ring_base_lsb
/* SW2REO R2 address */
-#define HAL_SW2REO_RING_HP 0x00003028
+#define HAL_SW2REO_RING_HP(ab) ab->hw_params.regs->hal_sw2reo_ring_hp
/* CE ring R0 address */
#define HAL_CE_DST_RING_BASE_LSB 0x00000000
diff --git a/drivers/net/wireless/ath/ath11k/hw.c b/drivers/net/wireless/ath/ath11k/hw.c
index 46449a18b5cb..a9f5c4e63d62 100644
--- a/drivers/net/wireless/ath/ath11k/hw.c
+++ b/drivers/net/wireless/ath/ath11k/hw.c
@@ -1,6 +1,7 @@
// SPDX-License-Identifier: BSD-3-Clause-Clear
/*
* Copyright (c) 2018-2020 The Linux Foundation. All rights reserved.
+ * Copyright (c) 2022, Qualcomm Innovation Center, Inc. All rights reserved.
*/
#include <linux/types.h>
@@ -1014,6 +1015,13 @@ const struct ath11k_hw_ops wcn6855_ops = {
.rx_desc_mpdu_start_addr2 = ath11k_hw_wcn6855_rx_desc_mpdu_start_addr2,
};
+const struct ath11k_hw_ops wcn6750_ops = {
+ .get_hw_mac_from_pdev_id = ath11k_hw_ipq8074_mac_from_pdev_id,
+ .wmi_init_config = ath11k_init_wmi_config_qca6390,
+ .mac_id_to_pdev_id = ath11k_hw_mac_id_to_pdev_id_qca6390,
+ .mac_id_to_srng_id = ath11k_hw_mac_id_to_srng_id_qca6390,
+};
+
#define ATH11K_TX_RING_MASK_0 0x1
#define ATH11K_TX_RING_MASK_1 0x2
#define ATH11K_TX_RING_MASK_2 0x4
@@ -1908,10 +1916,18 @@ const struct ath11k_hw_regs ipq8074_regs = {
.hal_reo_tcl_ring_base_lsb = 0x000003fc,
.hal_reo_tcl_ring_hp = 0x00003058,
+ /* REO CMD ring address */
+ .hal_reo_cmd_ring_base_lsb = 0x00000194,
+ .hal_reo_cmd_ring_hp = 0x00003020,
+
/* REO status address */
.hal_reo_status_ring_base_lsb = 0x00000504,
.hal_reo_status_hp = 0x00003070,
+ /* SW2REO ring address */
+ .hal_sw2reo_ring_base_lsb = 0x000001ec,
+ .hal_sw2reo_ring_hp = 0x00003028,
+
/* WCSS relative address */
.hal_seq_wcss_umac_ce0_src_reg = 0x00a00000,
.hal_seq_wcss_umac_ce0_dst_reg = 0x00a01000,
@@ -1932,6 +1948,9 @@ const struct ath11k_hw_regs ipq8074_regs = {
/* PCIe base address */
.pcie_qserdes_sysclk_en_sel = 0x0,
.pcie_pcs_osc_dtct_config_base = 0x0,
+
+ /* Shadow register area */
+ .hal_shadow_base_addr = 0x0,
};
const struct ath11k_hw_regs qca6390_regs = {
@@ -1979,10 +1998,18 @@ const struct ath11k_hw_regs qca6390_regs = {
.hal_reo_tcl_ring_base_lsb = 0x000003a4,
.hal_reo_tcl_ring_hp = 0x00003050,
+ /* REO CMD ring address */
+ .hal_reo_cmd_ring_base_lsb = 0x00000194,
+ .hal_reo_cmd_ring_hp = 0x00003020,
+
/* REO status address */
.hal_reo_status_ring_base_lsb = 0x000004ac,
.hal_reo_status_hp = 0x00003068,
+ /* SW2REO ring address */
+ .hal_sw2reo_ring_base_lsb = 0x000001ec,
+ .hal_sw2reo_ring_hp = 0x00003028,
+
/* WCSS relative address */
.hal_seq_wcss_umac_ce0_src_reg = 0x00a00000,
.hal_seq_wcss_umac_ce0_dst_reg = 0x00a01000,
@@ -2003,6 +2030,9 @@ const struct ath11k_hw_regs qca6390_regs = {
/* PCIe base address */
.pcie_qserdes_sysclk_en_sel = 0x01e0c0ac,
.pcie_pcs_osc_dtct_config_base = 0x01e0c628,
+
+ /* Shadow register area */
+ .hal_shadow_base_addr = 0x000008fc,
};
const struct ath11k_hw_regs qcn9074_regs = {
@@ -2050,10 +2080,18 @@ const struct ath11k_hw_regs qcn9074_regs = {
.hal_reo_tcl_ring_base_lsb = 0x000003fc,
.hal_reo_tcl_ring_hp = 0x00003058,
+ /* REO CMD ring address */
+ .hal_reo_cmd_ring_base_lsb = 0x00000194,
+ .hal_reo_cmd_ring_hp = 0x00003020,
+
/* REO status address */
.hal_reo_status_ring_base_lsb = 0x00000504,
.hal_reo_status_hp = 0x00003070,
+ /* SW2REO ring address */
+ .hal_sw2reo_ring_base_lsb = 0x000001ec,
+ .hal_sw2reo_ring_hp = 0x00003028,
+
/* WCSS relative address */
.hal_seq_wcss_umac_ce0_src_reg = 0x01b80000,
.hal_seq_wcss_umac_ce0_dst_reg = 0x01b81000,
@@ -2074,6 +2112,9 @@ const struct ath11k_hw_regs qcn9074_regs = {
/* PCIe base address */
.pcie_qserdes_sysclk_en_sel = 0x01e0e0a8,
.pcie_pcs_osc_dtct_config_base = 0x01e0f45c,
+
+ /* Shadow register area */
+ .hal_shadow_base_addr = 0x0,
};
const struct ath11k_hw_regs wcn6855_regs = {
@@ -2121,10 +2162,18 @@ const struct ath11k_hw_regs wcn6855_regs = {
.hal_reo_tcl_ring_base_lsb = 0x00000454,
.hal_reo_tcl_ring_hp = 0x00003060,
+ /* REO CMD ring address */
+ .hal_reo_cmd_ring_base_lsb = 0x00000194,
+ .hal_reo_cmd_ring_hp = 0x00003020,
+
/* REO status address */
.hal_reo_status_ring_base_lsb = 0x0000055c,
.hal_reo_status_hp = 0x00003078,
+ /* SW2REO ring address */
+ .hal_sw2reo_ring_base_lsb = 0x000001ec,
+ .hal_sw2reo_ring_hp = 0x00003028,
+
/* WCSS relative address */
.hal_seq_wcss_umac_ce0_src_reg = 0x1b80000,
.hal_seq_wcss_umac_ce0_dst_reg = 0x1b81000,
@@ -2145,6 +2194,91 @@ const struct ath11k_hw_regs wcn6855_regs = {
/* PCIe base address */
.pcie_qserdes_sysclk_en_sel = 0x01e0c0ac,
.pcie_pcs_osc_dtct_config_base = 0x01e0c628,
+
+ /* Shadow register area */
+ .hal_shadow_base_addr = 0x000008fc,
+};
+
+const struct ath11k_hw_regs wcn6750_regs = {
+ /* SW2TCL(x) R0 ring configuration address */
+ .hal_tcl1_ring_base_lsb = 0x00000694,
+ .hal_tcl1_ring_base_msb = 0x00000698,
+ .hal_tcl1_ring_id = 0x0000069c,
+ .hal_tcl1_ring_misc = 0x000006a4,
+ .hal_tcl1_ring_tp_addr_lsb = 0x000006b0,
+ .hal_tcl1_ring_tp_addr_msb = 0x000006b4,
+ .hal_tcl1_ring_consumer_int_setup_ix0 = 0x000006c4,
+ .hal_tcl1_ring_consumer_int_setup_ix1 = 0x000006c8,
+ .hal_tcl1_ring_msi1_base_lsb = 0x000006dc,
+ .hal_tcl1_ring_msi1_base_msb = 0x000006e0,
+ .hal_tcl1_ring_msi1_data = 0x000006e4,
+ .hal_tcl2_ring_base_lsb = 0x000006ec,
+ .hal_tcl_ring_base_lsb = 0x0000079c,
+
+ /* TCL STATUS ring address */
+ .hal_tcl_status_ring_base_lsb = 0x000008a4,
+
+ /* REO2SW(x) R0 ring configuration address */
+ .hal_reo1_ring_base_lsb = 0x000001ec,
+ .hal_reo1_ring_base_msb = 0x000001f0,
+ .hal_reo1_ring_id = 0x000001f4,
+ .hal_reo1_ring_misc = 0x000001fc,
+ .hal_reo1_ring_hp_addr_lsb = 0x00000200,
+ .hal_reo1_ring_hp_addr_msb = 0x00000204,
+ .hal_reo1_ring_producer_int_setup = 0x00000210,
+ .hal_reo1_ring_msi1_base_lsb = 0x00000234,
+ .hal_reo1_ring_msi1_base_msb = 0x00000238,
+ .hal_reo1_ring_msi1_data = 0x0000023c,
+ .hal_reo2_ring_base_lsb = 0x00000244,
+ .hal_reo1_aging_thresh_ix_0 = 0x00000564,
+ .hal_reo1_aging_thresh_ix_1 = 0x00000568,
+ .hal_reo1_aging_thresh_ix_2 = 0x0000056c,
+ .hal_reo1_aging_thresh_ix_3 = 0x00000570,
+
+ /* REO2SW(x) R2 ring pointers (head/tail) address */
+ .hal_reo1_ring_hp = 0x00003028,
+ .hal_reo1_ring_tp = 0x0000302c,
+ .hal_reo2_ring_hp = 0x00003030,
+
+ /* REO2TCL R0 ring configuration address */
+ .hal_reo_tcl_ring_base_lsb = 0x000003fc,
+ .hal_reo_tcl_ring_hp = 0x00003058,
+
+ /* REO CMD ring address */
+ .hal_reo_cmd_ring_base_lsb = 0x000000e4,
+ .hal_reo_cmd_ring_hp = 0x00003010,
+
+ /* REO status address */
+ .hal_reo_status_ring_base_lsb = 0x00000504,
+ .hal_reo_status_hp = 0x00003070,
+
+ /* SW2REO ring address */
+ .hal_sw2reo_ring_base_lsb = 0x0000013c,
+ .hal_sw2reo_ring_hp = 0x00003018,
+
+ /* WCSS relative address */
+ .hal_seq_wcss_umac_ce0_src_reg = 0x01b80000,
+ .hal_seq_wcss_umac_ce0_dst_reg = 0x01b81000,
+ .hal_seq_wcss_umac_ce1_src_reg = 0x01b82000,
+ .hal_seq_wcss_umac_ce1_dst_reg = 0x01b83000,
+
+ /* WBM Idle address */
+ .hal_wbm_idle_link_ring_base_lsb = 0x00000874,
+ .hal_wbm_idle_link_ring_misc = 0x00000884,
+
+ /* SW2WBM release address */
+ .hal_wbm_release_ring_base_lsb = 0x000001ec,
+
+ /* WBM2SW release address */
+ .hal_wbm0_release_ring_base_lsb = 0x00000924,
+ .hal_wbm1_release_ring_base_lsb = 0x0000097c,
+
+ /* PCIe base address */
+ .pcie_qserdes_sysclk_en_sel = 0x0,
+ .pcie_pcs_osc_dtct_config_base = 0x0,
+
+ /* Shadow register area */
+ .hal_shadow_base_addr = 0x00000504,
};
const struct ath11k_hw_hal_params ath11k_hw_hal_params_ipq8074 = {
diff --git a/drivers/net/wireless/ath/ath11k/hw.h b/drivers/net/wireless/ath/ath11k/hw.h
index b5a4758a6bc5..6d588cd80093 100644
--- a/drivers/net/wireless/ath/ath11k/hw.h
+++ b/drivers/net/wireless/ath/ath11k/hw.h
@@ -253,6 +253,7 @@ extern const struct ath11k_hw_ops ipq6018_ops;
extern const struct ath11k_hw_ops qca6390_ops;
extern const struct ath11k_hw_ops qcn9074_ops;
extern const struct ath11k_hw_ops wcn6855_ops;
+extern const struct ath11k_hw_ops wcn6750_ops;
extern const struct ath11k_hw_ring_mask ath11k_hw_ring_mask_ipq8074;
extern const struct ath11k_hw_ring_mask ath11k_hw_ring_mask_qca6390;
@@ -355,6 +356,12 @@ struct ath11k_hw_regs {
u32 hal_reo_status_ring_base_lsb;
u32 hal_reo_status_hp;
+ u32 hal_reo_cmd_ring_base_lsb;
+ u32 hal_reo_cmd_ring_hp;
+
+ u32 hal_sw2reo_ring_base_lsb;
+ u32 hal_sw2reo_ring_hp;
+
u32 hal_seq_wcss_umac_ce0_src_reg;
u32 hal_seq_wcss_umac_ce0_dst_reg;
u32 hal_seq_wcss_umac_ce1_src_reg;
@@ -370,12 +377,15 @@ struct ath11k_hw_regs {
u32 pcie_qserdes_sysclk_en_sel;
u32 pcie_pcs_osc_dtct_config_base;
+
+ u32 hal_shadow_base_addr;
};
extern const struct ath11k_hw_regs ipq8074_regs;
extern const struct ath11k_hw_regs qca6390_regs;
extern const struct ath11k_hw_regs qcn9074_regs;
extern const struct ath11k_hw_regs wcn6855_regs;
+extern const struct ath11k_hw_regs wcn6750_regs;
static inline const char *ath11k_bd_ie_type_str(enum ath11k_bd_ie_type type)
{
--
2.35.1
--
ath11k mailing list
ath11k@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/ath11k
^ permalink raw reply related [flat|nested] 36+ messages in thread
* [PATCH v7 8/9] ath11k: Datapath changes to support WCN6750
2022-04-29 17:04 ` Manikanta Pubbisetty
@ 2022-04-29 17:05 ` Manikanta Pubbisetty
-1 siblings, 0 replies; 36+ messages in thread
From: Manikanta Pubbisetty @ 2022-04-29 17:05 UTC (permalink / raw)
To: ath11k; +Cc: linux-wireless, devicetree, robh, mka, Manikanta Pubbisetty
HAL RX descriptor for WCN6750 is same as QCN9074, this
means that the size of the HAL RX decriptor and the DP
APIs that WCN6750 requires to enable datapath should be
initialized with that of QCN9074's RX descriptor size
and the DP APIs respectively. There is one change wrt to
REO configuration though, REO configuration for WCN6750
follows WCN6855, therefore use reo_setup() of WCN6855
for WCN6750.
Tested-on: WCN6750 hw1.0 AHB WLAN.MSL.1.0.1-00887-QCAMSLSWPLZ-1
Tested-on: WCN6855 hw2.0 PCI WLAN.HSP.1.1-01720.1-QCAHSPSWPL_V1_V2_SILICONZ_LITE-1
Tested-on: QCN9074 hw1.0 PCI WLAN.HK.2.5.0.1-01100-QCAHKSWPL_SILICONZ-1
Tested-on: IPQ8074 hw2.0 AHB WLAN.HK.2.4.0.1-00192-QCAHKSWPL_SILICONZ-1
Signed-off-by: Manikanta Pubbisetty <quic_mpubbise@quicinc.com>
---
drivers/net/wireless/ath/ath11k/core.c | 1 +
drivers/net/wireless/ath/ath11k/hw.c | 32 ++++++++++++++++++++++++++
2 files changed, 33 insertions(+)
diff --git a/drivers/net/wireless/ath/ath11k/core.c b/drivers/net/wireless/ath/ath11k/core.c
index 7385e1c60ca1..01e1d494b527 100644
--- a/drivers/net/wireless/ath/ath11k/core.c
+++ b/drivers/net/wireless/ath/ath11k/core.c
@@ -531,6 +531,7 @@ static const struct ath11k_hw_params ath11k_hw_params[] = {
.num_vdevs = 16 + 1,
.num_peers = 512,
.supports_suspend = false,
+ .hal_desc_sz = sizeof(struct hal_rx_desc_qcn9074),
.supports_regdb = true,
.fix_l1ss = false,
.credit_flow = true,
diff --git a/drivers/net/wireless/ath/ath11k/hw.c b/drivers/net/wireless/ath/ath11k/hw.c
index a9f5c4e63d62..09ce357f0f0d 100644
--- a/drivers/net/wireless/ath/ath11k/hw.c
+++ b/drivers/net/wireless/ath/ath11k/hw.c
@@ -1020,6 +1020,38 @@ const struct ath11k_hw_ops wcn6750_ops = {
.wmi_init_config = ath11k_init_wmi_config_qca6390,
.mac_id_to_pdev_id = ath11k_hw_mac_id_to_pdev_id_qca6390,
.mac_id_to_srng_id = ath11k_hw_mac_id_to_srng_id_qca6390,
+ .tx_mesh_enable = ath11k_hw_qcn9074_tx_mesh_enable,
+ .rx_desc_get_first_msdu = ath11k_hw_qcn9074_rx_desc_get_first_msdu,
+ .rx_desc_get_last_msdu = ath11k_hw_qcn9074_rx_desc_get_last_msdu,
+ .rx_desc_get_l3_pad_bytes = ath11k_hw_qcn9074_rx_desc_get_l3_pad_bytes,
+ .rx_desc_get_hdr_status = ath11k_hw_qcn9074_rx_desc_get_hdr_status,
+ .rx_desc_encrypt_valid = ath11k_hw_qcn9074_rx_desc_encrypt_valid,
+ .rx_desc_get_encrypt_type = ath11k_hw_qcn9074_rx_desc_get_encrypt_type,
+ .rx_desc_get_decap_type = ath11k_hw_qcn9074_rx_desc_get_decap_type,
+ .rx_desc_get_mesh_ctl = ath11k_hw_qcn9074_rx_desc_get_mesh_ctl,
+ .rx_desc_get_ldpc_support = ath11k_hw_qcn9074_rx_desc_get_ldpc_support,
+ .rx_desc_get_mpdu_seq_ctl_vld = ath11k_hw_qcn9074_rx_desc_get_mpdu_seq_ctl_vld,
+ .rx_desc_get_mpdu_fc_valid = ath11k_hw_qcn9074_rx_desc_get_mpdu_fc_valid,
+ .rx_desc_get_mpdu_start_seq_no = ath11k_hw_qcn9074_rx_desc_get_mpdu_start_seq_no,
+ .rx_desc_get_msdu_len = ath11k_hw_qcn9074_rx_desc_get_msdu_len,
+ .rx_desc_get_msdu_sgi = ath11k_hw_qcn9074_rx_desc_get_msdu_sgi,
+ .rx_desc_get_msdu_rate_mcs = ath11k_hw_qcn9074_rx_desc_get_msdu_rate_mcs,
+ .rx_desc_get_msdu_rx_bw = ath11k_hw_qcn9074_rx_desc_get_msdu_rx_bw,
+ .rx_desc_get_msdu_freq = ath11k_hw_qcn9074_rx_desc_get_msdu_freq,
+ .rx_desc_get_msdu_pkt_type = ath11k_hw_qcn9074_rx_desc_get_msdu_pkt_type,
+ .rx_desc_get_msdu_nss = ath11k_hw_qcn9074_rx_desc_get_msdu_nss,
+ .rx_desc_get_mpdu_tid = ath11k_hw_qcn9074_rx_desc_get_mpdu_tid,
+ .rx_desc_get_mpdu_peer_id = ath11k_hw_qcn9074_rx_desc_get_mpdu_peer_id,
+ .rx_desc_copy_attn_end_tlv = ath11k_hw_qcn9074_rx_desc_copy_attn_end,
+ .rx_desc_get_mpdu_start_tag = ath11k_hw_qcn9074_rx_desc_get_mpdu_start_tag,
+ .rx_desc_get_mpdu_ppdu_id = ath11k_hw_qcn9074_rx_desc_get_mpdu_ppdu_id,
+ .rx_desc_set_msdu_len = ath11k_hw_qcn9074_rx_desc_set_msdu_len,
+ .rx_desc_get_attention = ath11k_hw_qcn9074_rx_desc_get_attention,
+ .rx_desc_get_msdu_payload = ath11k_hw_qcn9074_rx_desc_get_msdu_payload,
+ .reo_setup = ath11k_hw_wcn6855_reo_setup,
+ .mpdu_info_get_peerid = ath11k_hw_ipq8074_mpdu_info_get_peerid,
+ .rx_desc_mac_addr2_valid = ath11k_hw_ipq9074_rx_desc_mac_addr2_valid,
+ .rx_desc_mpdu_start_addr2 = ath11k_hw_ipq9074_rx_desc_mpdu_start_addr2,
};
#define ATH11K_TX_RING_MASK_0 0x1
--
2.35.1
^ permalink raw reply related [flat|nested] 36+ messages in thread* [PATCH v7 8/9] ath11k: Datapath changes to support WCN6750
@ 2022-04-29 17:05 ` Manikanta Pubbisetty
0 siblings, 0 replies; 36+ messages in thread
From: Manikanta Pubbisetty @ 2022-04-29 17:05 UTC (permalink / raw)
To: ath11k; +Cc: linux-wireless, devicetree, robh, mka, Manikanta Pubbisetty
HAL RX descriptor for WCN6750 is same as QCN9074, this
means that the size of the HAL RX decriptor and the DP
APIs that WCN6750 requires to enable datapath should be
initialized with that of QCN9074's RX descriptor size
and the DP APIs respectively. There is one change wrt to
REO configuration though, REO configuration for WCN6750
follows WCN6855, therefore use reo_setup() of WCN6855
for WCN6750.
Tested-on: WCN6750 hw1.0 AHB WLAN.MSL.1.0.1-00887-QCAMSLSWPLZ-1
Tested-on: WCN6855 hw2.0 PCI WLAN.HSP.1.1-01720.1-QCAHSPSWPL_V1_V2_SILICONZ_LITE-1
Tested-on: QCN9074 hw1.0 PCI WLAN.HK.2.5.0.1-01100-QCAHKSWPL_SILICONZ-1
Tested-on: IPQ8074 hw2.0 AHB WLAN.HK.2.4.0.1-00192-QCAHKSWPL_SILICONZ-1
Signed-off-by: Manikanta Pubbisetty <quic_mpubbise@quicinc.com>
---
drivers/net/wireless/ath/ath11k/core.c | 1 +
drivers/net/wireless/ath/ath11k/hw.c | 32 ++++++++++++++++++++++++++
2 files changed, 33 insertions(+)
diff --git a/drivers/net/wireless/ath/ath11k/core.c b/drivers/net/wireless/ath/ath11k/core.c
index 7385e1c60ca1..01e1d494b527 100644
--- a/drivers/net/wireless/ath/ath11k/core.c
+++ b/drivers/net/wireless/ath/ath11k/core.c
@@ -531,6 +531,7 @@ static const struct ath11k_hw_params ath11k_hw_params[] = {
.num_vdevs = 16 + 1,
.num_peers = 512,
.supports_suspend = false,
+ .hal_desc_sz = sizeof(struct hal_rx_desc_qcn9074),
.supports_regdb = true,
.fix_l1ss = false,
.credit_flow = true,
diff --git a/drivers/net/wireless/ath/ath11k/hw.c b/drivers/net/wireless/ath/ath11k/hw.c
index a9f5c4e63d62..09ce357f0f0d 100644
--- a/drivers/net/wireless/ath/ath11k/hw.c
+++ b/drivers/net/wireless/ath/ath11k/hw.c
@@ -1020,6 +1020,38 @@ const struct ath11k_hw_ops wcn6750_ops = {
.wmi_init_config = ath11k_init_wmi_config_qca6390,
.mac_id_to_pdev_id = ath11k_hw_mac_id_to_pdev_id_qca6390,
.mac_id_to_srng_id = ath11k_hw_mac_id_to_srng_id_qca6390,
+ .tx_mesh_enable = ath11k_hw_qcn9074_tx_mesh_enable,
+ .rx_desc_get_first_msdu = ath11k_hw_qcn9074_rx_desc_get_first_msdu,
+ .rx_desc_get_last_msdu = ath11k_hw_qcn9074_rx_desc_get_last_msdu,
+ .rx_desc_get_l3_pad_bytes = ath11k_hw_qcn9074_rx_desc_get_l3_pad_bytes,
+ .rx_desc_get_hdr_status = ath11k_hw_qcn9074_rx_desc_get_hdr_status,
+ .rx_desc_encrypt_valid = ath11k_hw_qcn9074_rx_desc_encrypt_valid,
+ .rx_desc_get_encrypt_type = ath11k_hw_qcn9074_rx_desc_get_encrypt_type,
+ .rx_desc_get_decap_type = ath11k_hw_qcn9074_rx_desc_get_decap_type,
+ .rx_desc_get_mesh_ctl = ath11k_hw_qcn9074_rx_desc_get_mesh_ctl,
+ .rx_desc_get_ldpc_support = ath11k_hw_qcn9074_rx_desc_get_ldpc_support,
+ .rx_desc_get_mpdu_seq_ctl_vld = ath11k_hw_qcn9074_rx_desc_get_mpdu_seq_ctl_vld,
+ .rx_desc_get_mpdu_fc_valid = ath11k_hw_qcn9074_rx_desc_get_mpdu_fc_valid,
+ .rx_desc_get_mpdu_start_seq_no = ath11k_hw_qcn9074_rx_desc_get_mpdu_start_seq_no,
+ .rx_desc_get_msdu_len = ath11k_hw_qcn9074_rx_desc_get_msdu_len,
+ .rx_desc_get_msdu_sgi = ath11k_hw_qcn9074_rx_desc_get_msdu_sgi,
+ .rx_desc_get_msdu_rate_mcs = ath11k_hw_qcn9074_rx_desc_get_msdu_rate_mcs,
+ .rx_desc_get_msdu_rx_bw = ath11k_hw_qcn9074_rx_desc_get_msdu_rx_bw,
+ .rx_desc_get_msdu_freq = ath11k_hw_qcn9074_rx_desc_get_msdu_freq,
+ .rx_desc_get_msdu_pkt_type = ath11k_hw_qcn9074_rx_desc_get_msdu_pkt_type,
+ .rx_desc_get_msdu_nss = ath11k_hw_qcn9074_rx_desc_get_msdu_nss,
+ .rx_desc_get_mpdu_tid = ath11k_hw_qcn9074_rx_desc_get_mpdu_tid,
+ .rx_desc_get_mpdu_peer_id = ath11k_hw_qcn9074_rx_desc_get_mpdu_peer_id,
+ .rx_desc_copy_attn_end_tlv = ath11k_hw_qcn9074_rx_desc_copy_attn_end,
+ .rx_desc_get_mpdu_start_tag = ath11k_hw_qcn9074_rx_desc_get_mpdu_start_tag,
+ .rx_desc_get_mpdu_ppdu_id = ath11k_hw_qcn9074_rx_desc_get_mpdu_ppdu_id,
+ .rx_desc_set_msdu_len = ath11k_hw_qcn9074_rx_desc_set_msdu_len,
+ .rx_desc_get_attention = ath11k_hw_qcn9074_rx_desc_get_attention,
+ .rx_desc_get_msdu_payload = ath11k_hw_qcn9074_rx_desc_get_msdu_payload,
+ .reo_setup = ath11k_hw_wcn6855_reo_setup,
+ .mpdu_info_get_peerid = ath11k_hw_ipq8074_mpdu_info_get_peerid,
+ .rx_desc_mac_addr2_valid = ath11k_hw_ipq9074_rx_desc_mac_addr2_valid,
+ .rx_desc_mpdu_start_addr2 = ath11k_hw_ipq9074_rx_desc_mpdu_start_addr2,
};
#define ATH11K_TX_RING_MASK_0 0x1
--
2.35.1
--
ath11k mailing list
ath11k@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/ath11k
^ permalink raw reply related [flat|nested] 36+ messages in thread
* [PATCH v7 9/9] ath11k: Add support for WCN6750 device
2022-04-29 17:04 ` Manikanta Pubbisetty
@ 2022-04-29 17:05 ` Manikanta Pubbisetty
-1 siblings, 0 replies; 36+ messages in thread
From: Manikanta Pubbisetty @ 2022-04-29 17:05 UTC (permalink / raw)
To: ath11k; +Cc: linux-wireless, devicetree, robh, mka, Manikanta Pubbisetty
WCN6750 is non-DBS 2x2 11AX chipset. Unlike QCA6390 which is a
DBS (dual band simultaneous) solution (2 LMACs), WCN6750 has a
single LMAC supporting 2G, 5G and 6G bands but will operate only
on one band at any given point.
WCN6750 is a PCIe based solution, but it is attached to the WPSS
(Wireless Processor SubSystem) Q6 processor, hence it is enumerated
by the Q6 processor. It is registered to the APSS processor
(Application Processor SubSystem) as a platform device(AHB) and
remoteproc APIs are used to boot up or shutdown the device like
other AHB devices.
Also, Device information like BAR and it's size is not known to the
APSS processor as the chip is enumerated by WPSS Q6. These details
are fetched over QMI.
STA and AP modes are supported. Verified basic connectivity and ping
in both the modes.
An important point to note is that though WCN6750 is a PCIe device,
it cannot be attached to any other platform except on Qualcomm
Snapdragon SoCs due to the aforementioned reasons.
Tested-on: WCN6750 hw1.0 AHB WLAN.MSL.1.0.1-00887-QCAMSLSWPLZ-1
Tested-on: WCN6855 hw2.0 PCI WLAN.HSP.1.1-01720.1-QCAHSPSWPL_V1_V2_SILICONZ_LITE-1
Tested-on: QCN9074 hw1.0 PCI WLAN.HK.2.5.0.1-01100-QCAHKSWPL_SILICONZ-1
Tested-on: IPQ8074 hw2.0 AHB WLAN.HK.2.4.0.1-00192-QCAHKSWPL_SILICONZ-1
Signed-off-by: Manikanta Pubbisetty <quic_mpubbise@quicinc.com>
---
drivers/net/wireless/ath/ath11k/Makefile | 5 +-
drivers/net/wireless/ath/ath11k/ahb.c | 142 +++++++++++++++++++++--
drivers/net/wireless/ath/ath11k/core.h | 1 +
drivers/net/wireless/ath/ath11k/pcic.c | 23 ++++
4 files changed, 158 insertions(+), 13 deletions(-)
diff --git a/drivers/net/wireless/ath/ath11k/Makefile b/drivers/net/wireless/ath/ath11k/Makefile
index 0ebfe41d6143..cc47e0114595 100644
--- a/drivers/net/wireless/ath/ath11k/Makefile
+++ b/drivers/net/wireless/ath/ath11k/Makefile
@@ -16,7 +16,8 @@ ath11k-y += core.o \
ce.o \
peer.o \
dbring.o \
- hw.o
+ hw.o \
+ pcic.o
ath11k-$(CONFIG_ATH11K_DEBUGFS) += debugfs.o debugfs_htt_stats.o debugfs_sta.o
ath11k-$(CONFIG_NL80211_TESTMODE) += testmode.o
@@ -29,7 +30,7 @@ obj-$(CONFIG_ATH11K_AHB) += ath11k_ahb.o
ath11k_ahb-y += ahb.o
obj-$(CONFIG_ATH11K_PCI) += ath11k_pci.o
-ath11k_pci-y += mhi.o pci.o pcic.o
+ath11k_pci-y += mhi.o pci.o
# for tracing framework to find trace.h
CFLAGS_trace.o := -I$(src)
diff --git a/drivers/net/wireless/ath/ath11k/ahb.c b/drivers/net/wireless/ath/ath11k/ahb.c
index 49d79cfbf21c..050bda828966 100644
--- a/drivers/net/wireless/ath/ath11k/ahb.c
+++ b/drivers/net/wireless/ath/ath11k/ahb.c
@@ -13,6 +13,7 @@
#include "debug.h"
#include "hif.h"
#include <linux/remoteproc.h>
+#include "pcic.h"
static const struct of_device_id ath11k_ahb_of_match[] = {
/* TODO: Should we change the compatible string to something similar
@@ -24,6 +25,9 @@ static const struct of_device_id ath11k_ahb_of_match[] = {
{ .compatible = "qcom,ipq6018-wifi",
.data = (void *)ATH11K_HW_IPQ6018_HW10,
},
+ { .compatible = "qcom,wcn6750-wifi",
+ .data = (void *)ATH11K_HW_WCN6750_HW10,
+ },
{ }
};
@@ -128,6 +132,16 @@ enum ext_irq_num {
tcl2host_status_ring,
};
+static int
+ath11k_ahb_get_msi_irq_wcn6750(struct ath11k_base *ab, unsigned int vector)
+{
+ return ab->pci.msi.irqs[vector];
+}
+
+static const struct ath11k_pci_ops ath11k_ahb_pci_ops_wcn6750 = {
+ .get_msi_irq = ath11k_ahb_get_msi_irq_wcn6750,
+};
+
static inline u32 ath11k_ahb_read32(struct ath11k_base *ab, u32 offset)
{
return ioread32(ab->mem + offset);
@@ -395,6 +409,9 @@ static void ath11k_ahb_free_irq(struct ath11k_base *ab)
int irq_idx;
int i;
+ if (ab->hw_params.hybrid_bus_type)
+ return ath11k_pcic_free_irq(ab);
+
for (i = 0; i < ab->hw_params.ce_count; i++) {
if (ath11k_ce_get_attr_flags(ab, i) & CE_ATTR_DIS_INTR)
continue;
@@ -549,6 +566,9 @@ static int ath11k_ahb_config_irq(struct ath11k_base *ab)
int irq, irq_idx, i;
int ret;
+ if (ab->hw_params.hybrid_bus_type)
+ return ath11k_pcic_config_irq(ab);
+
/* Configure CE irqs */
for (i = 0; i < ab->hw_params.ce_count; i++) {
struct ath11k_ce_pipe *ce_pipe = &ab->ce.ce_pipe[i];
@@ -618,7 +638,7 @@ static int ath11k_ahb_map_service_to_pipe(struct ath11k_base *ab, u16 service_id
return 0;
}
-static const struct ath11k_hif_ops ath11k_ahb_hif_ops = {
+static const struct ath11k_hif_ops ath11k_ahb_hif_ops_ipq8074 = {
.start = ath11k_ahb_start,
.stop = ath11k_ahb_stop,
.read32 = ath11k_ahb_read32,
@@ -630,6 +650,20 @@ static const struct ath11k_hif_ops ath11k_ahb_hif_ops = {
.power_up = ath11k_ahb_power_up,
};
+static const struct ath11k_hif_ops ath11k_ahb_hif_ops_wcn6750 = {
+ .start = ath11k_pcic_start,
+ .stop = ath11k_pcic_stop,
+ .read32 = ath11k_pcic_read32,
+ .write32 = ath11k_pcic_write32,
+ .irq_enable = ath11k_pcic_ext_irq_enable,
+ .irq_disable = ath11k_pcic_ext_irq_disable,
+ .get_msi_address = ath11k_pcic_get_msi_address,
+ .get_user_msi_vector = ath11k_pcic_get_user_msi_assignment,
+ .map_service_to_pipe = ath11k_pcic_map_service_to_pipe,
+ .power_down = ath11k_ahb_power_down,
+ .power_up = ath11k_ahb_power_up,
+};
+
static int ath11k_core_get_rproc(struct ath11k_base *ab)
{
struct ath11k_ahb *ab_ahb = ath11k_ahb_priv(ab);
@@ -652,12 +686,84 @@ static int ath11k_core_get_rproc(struct ath11k_base *ab)
return 0;
}
+static int ath11k_ahb_setup_msi_resources(struct ath11k_base *ab)
+{
+ struct platform_device *pdev = ab->pdev;
+ phys_addr_t msi_addr_pa;
+ dma_addr_t msi_addr_iova;
+ struct resource *res;
+ int int_prop;
+ int ret;
+ int i;
+
+ ret = ath11k_pcic_init_msi_config(ab);
+ if (ret) {
+ ath11k_err(ab, "failed to init msi config: %d\n", ret);
+ return ret;
+ }
+
+ res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+ if (!res) {
+ ath11k_err(ab, "failed to fetch msi_addr\n");
+ return -ENOENT;
+ }
+
+ msi_addr_pa = res->start;
+ msi_addr_iova = dma_map_resource(ab->dev, msi_addr_pa, PAGE_SIZE,
+ DMA_FROM_DEVICE, 0);
+ if (dma_mapping_error(ab->dev, msi_addr_iova))
+ return -ENOMEM;
+
+ ab->pci.msi.addr_lo = lower_32_bits(msi_addr_iova);
+ ab->pci.msi.addr_hi = upper_32_bits(msi_addr_iova);
+
+ ret = of_property_read_u32_index(ab->dev->of_node, "interrupts", 1, &int_prop);
+ if (ret)
+ return ret;
+
+ ab->pci.msi.ep_base_data = int_prop + 32;
+
+ for (i = 0; i < ab->pci.msi.config->total_vectors; i++) {
+ res = platform_get_resource(pdev, IORESOURCE_IRQ, i);
+ if (!res)
+ return -ENODEV;
+
+ ab->pci.msi.irqs[i] = res->start;
+ }
+
+ set_bit(ATH11K_FLAG_MULTI_MSI_VECTORS, &ab->dev_flags);
+
+ return 0;
+}
+
+static int ath11k_ahb_setup_resources(struct ath11k_base *ab)
+{
+ struct platform_device *pdev = ab->pdev;
+ struct resource *mem_res;
+ void __iomem *mem;
+
+ if (ab->hw_params.hybrid_bus_type)
+ return ath11k_ahb_setup_msi_resources(ab);
+
+ mem = devm_platform_get_and_ioremap_resource(pdev, 0, &mem_res);
+ if (IS_ERR(mem)) {
+ dev_err(&pdev->dev, "ioremap error\n");
+ return PTR_ERR(mem);
+ }
+
+ ab->mem = mem;
+ ab->mem_len = resource_size(mem_res);
+
+ return 0;
+}
+
static int ath11k_ahb_probe(struct platform_device *pdev)
{
struct ath11k_base *ab;
const struct of_device_id *of_id;
- struct resource *mem_res;
- void __iomem *mem;
+ const struct ath11k_hif_ops *hif_ops;
+ const struct ath11k_pci_ops *pci_ops;
+ enum ath11k_hw_rev hw_rev;
int ret;
of_id = of_match_device(ath11k_ahb_of_match, &pdev->dev);
@@ -666,10 +772,21 @@ static int ath11k_ahb_probe(struct platform_device *pdev)
return -EINVAL;
}
- mem = devm_platform_get_and_ioremap_resource(pdev, 0, &mem_res);
- if (IS_ERR(mem)) {
- dev_err(&pdev->dev, "ioremap error\n");
- return PTR_ERR(mem);
+ hw_rev = (enum ath11k_hw_rev)of_id->data;
+
+ switch (hw_rev) {
+ case ATH11K_HW_IPQ8074:
+ case ATH11K_HW_IPQ6018_HW10:
+ hif_ops = &ath11k_ahb_hif_ops_ipq8074;
+ pci_ops = NULL;
+ break;
+ case ATH11K_HW_WCN6750_HW10:
+ hif_ops = &ath11k_ahb_hif_ops_wcn6750;
+ pci_ops = &ath11k_ahb_pci_ops_wcn6750;
+ break;
+ default:
+ dev_err(&pdev->dev, "unsupported device type %d\n", hw_rev);
+ return -EOPNOTSUPP;
}
ret = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
@@ -685,13 +802,16 @@ static int ath11k_ahb_probe(struct platform_device *pdev)
return -ENOMEM;
}
- ab->hif.ops = &ath11k_ahb_hif_ops;
+ ab->hif.ops = hif_ops;
+ ab->pci.ops = pci_ops;
ab->pdev = pdev;
- ab->hw_rev = (enum ath11k_hw_rev)of_id->data;
- ab->mem = mem;
- ab->mem_len = resource_size(mem_res);
+ ab->hw_rev = hw_rev;
platform_set_drvdata(pdev, ab);
+ ret = ath11k_ahb_setup_resources(ab);
+ if (ret)
+ goto err_core_free;
+
ret = ath11k_core_pre_init(ab);
if (ret)
goto err_core_free;
diff --git a/drivers/net/wireless/ath/ath11k/core.h b/drivers/net/wireless/ath/ath11k/core.h
index fdea44627125..95bca0b078b1 100644
--- a/drivers/net/wireless/ath/ath11k/core.h
+++ b/drivers/net/wireless/ath/ath11k/core.h
@@ -950,6 +950,7 @@ struct ath11k_base {
struct {
const struct ath11k_msi_config *config;
u32 ep_base_data;
+ u32 irqs[32];
u32 addr_lo;
u32 addr_hi;
} msi;
diff --git a/drivers/net/wireless/ath/ath11k/pcic.c b/drivers/net/wireless/ath/ath11k/pcic.c
index 46cf96d3e1d2..cf12b98c480d 100644
--- a/drivers/net/wireless/ath/ath11k/pcic.c
+++ b/drivers/net/wireless/ath/ath11k/pcic.c
@@ -106,6 +106,15 @@ static const struct ath11k_msi_config ath11k_msi_config[] = {
},
.hw_rev = ATH11K_HW_WCN6855_HW21,
},
+ {
+ .total_vectors = 28,
+ .total_users = 2,
+ .users = (struct ath11k_msi_user[]) {
+ { .name = "CE", .num_vectors = 10, .base_vector = 0 },
+ { .name = "DP", .num_vectors = 18, .base_vector = 10 },
+ },
+ .hw_rev = ATH11K_HW_WCN6750_HW10,
+ },
};
int ath11k_pcic_init_msi_config(struct ath11k_base *ab)
@@ -172,6 +181,7 @@ void ath11k_pcic_write32(struct ath11k_base *ab, u32 offset, u32 value)
!ret)
ab->pci.ops->release(ab);
}
+EXPORT_SYMBOL(ath11k_pcic_write32);
u32 ath11k_pcic_read32(struct ath11k_base *ab, u32 offset)
{
@@ -203,6 +213,7 @@ u32 ath11k_pcic_read32(struct ath11k_base *ab, u32 offset)
return val;
}
+EXPORT_SYMBOL(ath11k_pcic_read32);
void ath11k_pcic_get_msi_address(struct ath11k_base *ab, u32 *msi_addr_lo,
u32 *msi_addr_hi)
@@ -210,6 +221,7 @@ void ath11k_pcic_get_msi_address(struct ath11k_base *ab, u32 *msi_addr_lo,
*msi_addr_lo = ab->pci.msi.addr_lo;
*msi_addr_hi = ab->pci.msi.addr_hi;
}
+EXPORT_SYMBOL(ath11k_pcic_get_msi_address);
int ath11k_pcic_get_user_msi_assignment(struct ath11k_base *ab, char *user_name,
int *num_vectors, u32 *user_base_data,
@@ -237,6 +249,7 @@ int ath11k_pcic_get_user_msi_assignment(struct ath11k_base *ab, char *user_name,
return -EINVAL;
}
+EXPORT_SYMBOL(ath11k_pcic_get_user_msi_assignment);
void ath11k_pcic_get_ce_msi_idx(struct ath11k_base *ab, u32 ce_id, u32 *msi_idx)
{
@@ -253,6 +266,7 @@ void ath11k_pcic_get_ce_msi_idx(struct ath11k_base *ab, u32 ce_id, u32 *msi_idx)
}
*msi_idx = msi_data_idx;
}
+EXPORT_SYMBOL(ath11k_pcic_get_ce_msi_idx);
static void ath11k_pcic_free_ext_irq(struct ath11k_base *ab)
{
@@ -281,6 +295,7 @@ void ath11k_pcic_free_irq(struct ath11k_base *ab)
ath11k_pcic_free_ext_irq(ab);
}
+EXPORT_SYMBOL(ath11k_pcic_free_irq);
static void ath11k_pcic_ce_irq_enable(struct ath11k_base *ab, u16 ce_id)
{
@@ -431,6 +446,7 @@ void ath11k_pcic_ext_irq_enable(struct ath11k_base *ab)
ath11k_pcic_ext_grp_enable(irq_grp);
}
}
+EXPORT_SYMBOL(ath11k_pcic_ext_irq_enable);
static void ath11k_pcic_sync_ext_irqs(struct ath11k_base *ab)
{
@@ -451,6 +467,7 @@ void ath11k_pcic_ext_irq_disable(struct ath11k_base *ab)
__ath11k_pcic_ext_irq_disable(ab);
ath11k_pcic_sync_ext_irqs(ab);
}
+EXPORT_SYMBOL(ath11k_pcic_ext_irq_disable);
static int ath11k_pcic_ext_grp_napi_poll(struct napi_struct *napi, int budget)
{
@@ -630,6 +647,7 @@ int ath11k_pcic_config_irq(struct ath11k_base *ab)
return 0;
}
+EXPORT_SYMBOL(ath11k_pcic_config_irq);
void ath11k_pcic_ce_irqs_enable(struct ath11k_base *ab)
{
@@ -643,6 +661,7 @@ void ath11k_pcic_ce_irqs_enable(struct ath11k_base *ab)
ath11k_pcic_ce_irq_enable(ab, i);
}
}
+EXPORT_SYMBOL(ath11k_pcic_ce_irqs_enable);
static void ath11k_pcic_kill_tasklets(struct ath11k_base *ab)
{
@@ -664,12 +683,14 @@ void ath11k_pcic_ce_irq_disable_sync(struct ath11k_base *ab)
ath11k_pcic_sync_ce_irqs(ab);
ath11k_pcic_kill_tasklets(ab);
}
+EXPORT_SYMBOL(ath11k_pcic_ce_irq_disable_sync);
void ath11k_pcic_stop(struct ath11k_base *ab)
{
ath11k_pcic_ce_irq_disable_sync(ab);
ath11k_ce_cleanup_pipes(ab);
}
+EXPORT_SYMBOL(ath11k_pcic_stop);
int ath11k_pcic_start(struct ath11k_base *ab)
{
@@ -680,6 +701,7 @@ int ath11k_pcic_start(struct ath11k_base *ab)
return 0;
}
+EXPORT_SYMBOL(ath11k_pcic_start);
int ath11k_pcic_map_service_to_pipe(struct ath11k_base *ab, u16 service_id,
u8 *ul_pipe, u8 *dl_pipe)
@@ -723,3 +745,4 @@ int ath11k_pcic_map_service_to_pipe(struct ath11k_base *ab, u16 service_id,
return 0;
}
+EXPORT_SYMBOL(ath11k_pcic_map_service_to_pipe);
--
2.35.1
^ permalink raw reply related [flat|nested] 36+ messages in thread* [PATCH v7 9/9] ath11k: Add support for WCN6750 device
@ 2022-04-29 17:05 ` Manikanta Pubbisetty
0 siblings, 0 replies; 36+ messages in thread
From: Manikanta Pubbisetty @ 2022-04-29 17:05 UTC (permalink / raw)
To: ath11k; +Cc: linux-wireless, devicetree, robh, mka, Manikanta Pubbisetty
WCN6750 is non-DBS 2x2 11AX chipset. Unlike QCA6390 which is a
DBS (dual band simultaneous) solution (2 LMACs), WCN6750 has a
single LMAC supporting 2G, 5G and 6G bands but will operate only
on one band at any given point.
WCN6750 is a PCIe based solution, but it is attached to the WPSS
(Wireless Processor SubSystem) Q6 processor, hence it is enumerated
by the Q6 processor. It is registered to the APSS processor
(Application Processor SubSystem) as a platform device(AHB) and
remoteproc APIs are used to boot up or shutdown the device like
other AHB devices.
Also, Device information like BAR and it's size is not known to the
APSS processor as the chip is enumerated by WPSS Q6. These details
are fetched over QMI.
STA and AP modes are supported. Verified basic connectivity and ping
in both the modes.
An important point to note is that though WCN6750 is a PCIe device,
it cannot be attached to any other platform except on Qualcomm
Snapdragon SoCs due to the aforementioned reasons.
Tested-on: WCN6750 hw1.0 AHB WLAN.MSL.1.0.1-00887-QCAMSLSWPLZ-1
Tested-on: WCN6855 hw2.0 PCI WLAN.HSP.1.1-01720.1-QCAHSPSWPL_V1_V2_SILICONZ_LITE-1
Tested-on: QCN9074 hw1.0 PCI WLAN.HK.2.5.0.1-01100-QCAHKSWPL_SILICONZ-1
Tested-on: IPQ8074 hw2.0 AHB WLAN.HK.2.4.0.1-00192-QCAHKSWPL_SILICONZ-1
Signed-off-by: Manikanta Pubbisetty <quic_mpubbise@quicinc.com>
---
drivers/net/wireless/ath/ath11k/Makefile | 5 +-
drivers/net/wireless/ath/ath11k/ahb.c | 142 +++++++++++++++++++++--
drivers/net/wireless/ath/ath11k/core.h | 1 +
drivers/net/wireless/ath/ath11k/pcic.c | 23 ++++
4 files changed, 158 insertions(+), 13 deletions(-)
diff --git a/drivers/net/wireless/ath/ath11k/Makefile b/drivers/net/wireless/ath/ath11k/Makefile
index 0ebfe41d6143..cc47e0114595 100644
--- a/drivers/net/wireless/ath/ath11k/Makefile
+++ b/drivers/net/wireless/ath/ath11k/Makefile
@@ -16,7 +16,8 @@ ath11k-y += core.o \
ce.o \
peer.o \
dbring.o \
- hw.o
+ hw.o \
+ pcic.o
ath11k-$(CONFIG_ATH11K_DEBUGFS) += debugfs.o debugfs_htt_stats.o debugfs_sta.o
ath11k-$(CONFIG_NL80211_TESTMODE) += testmode.o
@@ -29,7 +30,7 @@ obj-$(CONFIG_ATH11K_AHB) += ath11k_ahb.o
ath11k_ahb-y += ahb.o
obj-$(CONFIG_ATH11K_PCI) += ath11k_pci.o
-ath11k_pci-y += mhi.o pci.o pcic.o
+ath11k_pci-y += mhi.o pci.o
# for tracing framework to find trace.h
CFLAGS_trace.o := -I$(src)
diff --git a/drivers/net/wireless/ath/ath11k/ahb.c b/drivers/net/wireless/ath/ath11k/ahb.c
index 49d79cfbf21c..050bda828966 100644
--- a/drivers/net/wireless/ath/ath11k/ahb.c
+++ b/drivers/net/wireless/ath/ath11k/ahb.c
@@ -13,6 +13,7 @@
#include "debug.h"
#include "hif.h"
#include <linux/remoteproc.h>
+#include "pcic.h"
static const struct of_device_id ath11k_ahb_of_match[] = {
/* TODO: Should we change the compatible string to something similar
@@ -24,6 +25,9 @@ static const struct of_device_id ath11k_ahb_of_match[] = {
{ .compatible = "qcom,ipq6018-wifi",
.data = (void *)ATH11K_HW_IPQ6018_HW10,
},
+ { .compatible = "qcom,wcn6750-wifi",
+ .data = (void *)ATH11K_HW_WCN6750_HW10,
+ },
{ }
};
@@ -128,6 +132,16 @@ enum ext_irq_num {
tcl2host_status_ring,
};
+static int
+ath11k_ahb_get_msi_irq_wcn6750(struct ath11k_base *ab, unsigned int vector)
+{
+ return ab->pci.msi.irqs[vector];
+}
+
+static const struct ath11k_pci_ops ath11k_ahb_pci_ops_wcn6750 = {
+ .get_msi_irq = ath11k_ahb_get_msi_irq_wcn6750,
+};
+
static inline u32 ath11k_ahb_read32(struct ath11k_base *ab, u32 offset)
{
return ioread32(ab->mem + offset);
@@ -395,6 +409,9 @@ static void ath11k_ahb_free_irq(struct ath11k_base *ab)
int irq_idx;
int i;
+ if (ab->hw_params.hybrid_bus_type)
+ return ath11k_pcic_free_irq(ab);
+
for (i = 0; i < ab->hw_params.ce_count; i++) {
if (ath11k_ce_get_attr_flags(ab, i) & CE_ATTR_DIS_INTR)
continue;
@@ -549,6 +566,9 @@ static int ath11k_ahb_config_irq(struct ath11k_base *ab)
int irq, irq_idx, i;
int ret;
+ if (ab->hw_params.hybrid_bus_type)
+ return ath11k_pcic_config_irq(ab);
+
/* Configure CE irqs */
for (i = 0; i < ab->hw_params.ce_count; i++) {
struct ath11k_ce_pipe *ce_pipe = &ab->ce.ce_pipe[i];
@@ -618,7 +638,7 @@ static int ath11k_ahb_map_service_to_pipe(struct ath11k_base *ab, u16 service_id
return 0;
}
-static const struct ath11k_hif_ops ath11k_ahb_hif_ops = {
+static const struct ath11k_hif_ops ath11k_ahb_hif_ops_ipq8074 = {
.start = ath11k_ahb_start,
.stop = ath11k_ahb_stop,
.read32 = ath11k_ahb_read32,
@@ -630,6 +650,20 @@ static const struct ath11k_hif_ops ath11k_ahb_hif_ops = {
.power_up = ath11k_ahb_power_up,
};
+static const struct ath11k_hif_ops ath11k_ahb_hif_ops_wcn6750 = {
+ .start = ath11k_pcic_start,
+ .stop = ath11k_pcic_stop,
+ .read32 = ath11k_pcic_read32,
+ .write32 = ath11k_pcic_write32,
+ .irq_enable = ath11k_pcic_ext_irq_enable,
+ .irq_disable = ath11k_pcic_ext_irq_disable,
+ .get_msi_address = ath11k_pcic_get_msi_address,
+ .get_user_msi_vector = ath11k_pcic_get_user_msi_assignment,
+ .map_service_to_pipe = ath11k_pcic_map_service_to_pipe,
+ .power_down = ath11k_ahb_power_down,
+ .power_up = ath11k_ahb_power_up,
+};
+
static int ath11k_core_get_rproc(struct ath11k_base *ab)
{
struct ath11k_ahb *ab_ahb = ath11k_ahb_priv(ab);
@@ -652,12 +686,84 @@ static int ath11k_core_get_rproc(struct ath11k_base *ab)
return 0;
}
+static int ath11k_ahb_setup_msi_resources(struct ath11k_base *ab)
+{
+ struct platform_device *pdev = ab->pdev;
+ phys_addr_t msi_addr_pa;
+ dma_addr_t msi_addr_iova;
+ struct resource *res;
+ int int_prop;
+ int ret;
+ int i;
+
+ ret = ath11k_pcic_init_msi_config(ab);
+ if (ret) {
+ ath11k_err(ab, "failed to init msi config: %d\n", ret);
+ return ret;
+ }
+
+ res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+ if (!res) {
+ ath11k_err(ab, "failed to fetch msi_addr\n");
+ return -ENOENT;
+ }
+
+ msi_addr_pa = res->start;
+ msi_addr_iova = dma_map_resource(ab->dev, msi_addr_pa, PAGE_SIZE,
+ DMA_FROM_DEVICE, 0);
+ if (dma_mapping_error(ab->dev, msi_addr_iova))
+ return -ENOMEM;
+
+ ab->pci.msi.addr_lo = lower_32_bits(msi_addr_iova);
+ ab->pci.msi.addr_hi = upper_32_bits(msi_addr_iova);
+
+ ret = of_property_read_u32_index(ab->dev->of_node, "interrupts", 1, &int_prop);
+ if (ret)
+ return ret;
+
+ ab->pci.msi.ep_base_data = int_prop + 32;
+
+ for (i = 0; i < ab->pci.msi.config->total_vectors; i++) {
+ res = platform_get_resource(pdev, IORESOURCE_IRQ, i);
+ if (!res)
+ return -ENODEV;
+
+ ab->pci.msi.irqs[i] = res->start;
+ }
+
+ set_bit(ATH11K_FLAG_MULTI_MSI_VECTORS, &ab->dev_flags);
+
+ return 0;
+}
+
+static int ath11k_ahb_setup_resources(struct ath11k_base *ab)
+{
+ struct platform_device *pdev = ab->pdev;
+ struct resource *mem_res;
+ void __iomem *mem;
+
+ if (ab->hw_params.hybrid_bus_type)
+ return ath11k_ahb_setup_msi_resources(ab);
+
+ mem = devm_platform_get_and_ioremap_resource(pdev, 0, &mem_res);
+ if (IS_ERR(mem)) {
+ dev_err(&pdev->dev, "ioremap error\n");
+ return PTR_ERR(mem);
+ }
+
+ ab->mem = mem;
+ ab->mem_len = resource_size(mem_res);
+
+ return 0;
+}
+
static int ath11k_ahb_probe(struct platform_device *pdev)
{
struct ath11k_base *ab;
const struct of_device_id *of_id;
- struct resource *mem_res;
- void __iomem *mem;
+ const struct ath11k_hif_ops *hif_ops;
+ const struct ath11k_pci_ops *pci_ops;
+ enum ath11k_hw_rev hw_rev;
int ret;
of_id = of_match_device(ath11k_ahb_of_match, &pdev->dev);
@@ -666,10 +772,21 @@ static int ath11k_ahb_probe(struct platform_device *pdev)
return -EINVAL;
}
- mem = devm_platform_get_and_ioremap_resource(pdev, 0, &mem_res);
- if (IS_ERR(mem)) {
- dev_err(&pdev->dev, "ioremap error\n");
- return PTR_ERR(mem);
+ hw_rev = (enum ath11k_hw_rev)of_id->data;
+
+ switch (hw_rev) {
+ case ATH11K_HW_IPQ8074:
+ case ATH11K_HW_IPQ6018_HW10:
+ hif_ops = &ath11k_ahb_hif_ops_ipq8074;
+ pci_ops = NULL;
+ break;
+ case ATH11K_HW_WCN6750_HW10:
+ hif_ops = &ath11k_ahb_hif_ops_wcn6750;
+ pci_ops = &ath11k_ahb_pci_ops_wcn6750;
+ break;
+ default:
+ dev_err(&pdev->dev, "unsupported device type %d\n", hw_rev);
+ return -EOPNOTSUPP;
}
ret = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
@@ -685,13 +802,16 @@ static int ath11k_ahb_probe(struct platform_device *pdev)
return -ENOMEM;
}
- ab->hif.ops = &ath11k_ahb_hif_ops;
+ ab->hif.ops = hif_ops;
+ ab->pci.ops = pci_ops;
ab->pdev = pdev;
- ab->hw_rev = (enum ath11k_hw_rev)of_id->data;
- ab->mem = mem;
- ab->mem_len = resource_size(mem_res);
+ ab->hw_rev = hw_rev;
platform_set_drvdata(pdev, ab);
+ ret = ath11k_ahb_setup_resources(ab);
+ if (ret)
+ goto err_core_free;
+
ret = ath11k_core_pre_init(ab);
if (ret)
goto err_core_free;
diff --git a/drivers/net/wireless/ath/ath11k/core.h b/drivers/net/wireless/ath/ath11k/core.h
index fdea44627125..95bca0b078b1 100644
--- a/drivers/net/wireless/ath/ath11k/core.h
+++ b/drivers/net/wireless/ath/ath11k/core.h
@@ -950,6 +950,7 @@ struct ath11k_base {
struct {
const struct ath11k_msi_config *config;
u32 ep_base_data;
+ u32 irqs[32];
u32 addr_lo;
u32 addr_hi;
} msi;
diff --git a/drivers/net/wireless/ath/ath11k/pcic.c b/drivers/net/wireless/ath/ath11k/pcic.c
index 46cf96d3e1d2..cf12b98c480d 100644
--- a/drivers/net/wireless/ath/ath11k/pcic.c
+++ b/drivers/net/wireless/ath/ath11k/pcic.c
@@ -106,6 +106,15 @@ static const struct ath11k_msi_config ath11k_msi_config[] = {
},
.hw_rev = ATH11K_HW_WCN6855_HW21,
},
+ {
+ .total_vectors = 28,
+ .total_users = 2,
+ .users = (struct ath11k_msi_user[]) {
+ { .name = "CE", .num_vectors = 10, .base_vector = 0 },
+ { .name = "DP", .num_vectors = 18, .base_vector = 10 },
+ },
+ .hw_rev = ATH11K_HW_WCN6750_HW10,
+ },
};
int ath11k_pcic_init_msi_config(struct ath11k_base *ab)
@@ -172,6 +181,7 @@ void ath11k_pcic_write32(struct ath11k_base *ab, u32 offset, u32 value)
!ret)
ab->pci.ops->release(ab);
}
+EXPORT_SYMBOL(ath11k_pcic_write32);
u32 ath11k_pcic_read32(struct ath11k_base *ab, u32 offset)
{
@@ -203,6 +213,7 @@ u32 ath11k_pcic_read32(struct ath11k_base *ab, u32 offset)
return val;
}
+EXPORT_SYMBOL(ath11k_pcic_read32);
void ath11k_pcic_get_msi_address(struct ath11k_base *ab, u32 *msi_addr_lo,
u32 *msi_addr_hi)
@@ -210,6 +221,7 @@ void ath11k_pcic_get_msi_address(struct ath11k_base *ab, u32 *msi_addr_lo,
*msi_addr_lo = ab->pci.msi.addr_lo;
*msi_addr_hi = ab->pci.msi.addr_hi;
}
+EXPORT_SYMBOL(ath11k_pcic_get_msi_address);
int ath11k_pcic_get_user_msi_assignment(struct ath11k_base *ab, char *user_name,
int *num_vectors, u32 *user_base_data,
@@ -237,6 +249,7 @@ int ath11k_pcic_get_user_msi_assignment(struct ath11k_base *ab, char *user_name,
return -EINVAL;
}
+EXPORT_SYMBOL(ath11k_pcic_get_user_msi_assignment);
void ath11k_pcic_get_ce_msi_idx(struct ath11k_base *ab, u32 ce_id, u32 *msi_idx)
{
@@ -253,6 +266,7 @@ void ath11k_pcic_get_ce_msi_idx(struct ath11k_base *ab, u32 ce_id, u32 *msi_idx)
}
*msi_idx = msi_data_idx;
}
+EXPORT_SYMBOL(ath11k_pcic_get_ce_msi_idx);
static void ath11k_pcic_free_ext_irq(struct ath11k_base *ab)
{
@@ -281,6 +295,7 @@ void ath11k_pcic_free_irq(struct ath11k_base *ab)
ath11k_pcic_free_ext_irq(ab);
}
+EXPORT_SYMBOL(ath11k_pcic_free_irq);
static void ath11k_pcic_ce_irq_enable(struct ath11k_base *ab, u16 ce_id)
{
@@ -431,6 +446,7 @@ void ath11k_pcic_ext_irq_enable(struct ath11k_base *ab)
ath11k_pcic_ext_grp_enable(irq_grp);
}
}
+EXPORT_SYMBOL(ath11k_pcic_ext_irq_enable);
static void ath11k_pcic_sync_ext_irqs(struct ath11k_base *ab)
{
@@ -451,6 +467,7 @@ void ath11k_pcic_ext_irq_disable(struct ath11k_base *ab)
__ath11k_pcic_ext_irq_disable(ab);
ath11k_pcic_sync_ext_irqs(ab);
}
+EXPORT_SYMBOL(ath11k_pcic_ext_irq_disable);
static int ath11k_pcic_ext_grp_napi_poll(struct napi_struct *napi, int budget)
{
@@ -630,6 +647,7 @@ int ath11k_pcic_config_irq(struct ath11k_base *ab)
return 0;
}
+EXPORT_SYMBOL(ath11k_pcic_config_irq);
void ath11k_pcic_ce_irqs_enable(struct ath11k_base *ab)
{
@@ -643,6 +661,7 @@ void ath11k_pcic_ce_irqs_enable(struct ath11k_base *ab)
ath11k_pcic_ce_irq_enable(ab, i);
}
}
+EXPORT_SYMBOL(ath11k_pcic_ce_irqs_enable);
static void ath11k_pcic_kill_tasklets(struct ath11k_base *ab)
{
@@ -664,12 +683,14 @@ void ath11k_pcic_ce_irq_disable_sync(struct ath11k_base *ab)
ath11k_pcic_sync_ce_irqs(ab);
ath11k_pcic_kill_tasklets(ab);
}
+EXPORT_SYMBOL(ath11k_pcic_ce_irq_disable_sync);
void ath11k_pcic_stop(struct ath11k_base *ab)
{
ath11k_pcic_ce_irq_disable_sync(ab);
ath11k_ce_cleanup_pipes(ab);
}
+EXPORT_SYMBOL(ath11k_pcic_stop);
int ath11k_pcic_start(struct ath11k_base *ab)
{
@@ -680,6 +701,7 @@ int ath11k_pcic_start(struct ath11k_base *ab)
return 0;
}
+EXPORT_SYMBOL(ath11k_pcic_start);
int ath11k_pcic_map_service_to_pipe(struct ath11k_base *ab, u16 service_id,
u8 *ul_pipe, u8 *dl_pipe)
@@ -723,3 +745,4 @@ int ath11k_pcic_map_service_to_pipe(struct ath11k_base *ab, u16 service_id,
return 0;
}
+EXPORT_SYMBOL(ath11k_pcic_map_service_to_pipe);
--
2.35.1
--
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