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From: Punit Agrawal <punitagrawal@gmail.com>
To: "Heiko Stübner" <heiko@sntech.de>
Cc: Rob Herring <robh+dt@kernel.org>,
	Bjorn Helgaas <helgaas@kernel.org>,
	"open list:ARM/Rockchip SoC..."
	<linux-rockchip@lists.infradead.org>,
	linux-arm-kernel <linux-arm-kernel@lists.infradead.org>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
	PCI <linux-pci@vger.kernel.org>,
	Alexandru Elisei <alexandru.elisei@arm.com>,
	wqu@suse.com, Robin Murphy <robin.murphy@arm.com>,
	Peter Geis <pgwipeout@gmail.com>,
	Ard Biesheuvel <ardb@kernel.org>,
	Brian Norris <briannorris@chromium.org>,
	Shawn Lin <shawn.lin@rock-chips.com>
Subject: Re: [PATCH v3 4/4] arm64: dts: rockchip: Update PCI host bridge window to 32-bit address memory
Date: Wed, 16 Jun 2021 22:00:21 +0900	[thread overview]
Message-ID: <871r92t15m.fsf@stealth> (raw)
In-Reply-To: <3238453.R1toDxpfAE@diego> ("Heiko =?utf-8?Q?St=C3=BCbner=22'?= =?utf-8?Q?s?= message of "Tue, 15 Jun 2021 23:49:07 +0200")

Heiko Stübner <heiko@sntech.de> writes:

> Am Dienstag, 15. Juni 2021, 23:29:12 CEST schrieb Rob Herring:
>> On Thu, Jun 10, 2021 at 3:50 PM Heiko Stübner <heiko@sntech.de> wrote:
>> >
>> > Hi,
>> >
>> > Am Montag, 7. Juni 2021, 13:28:56 CEST schrieb Punit Agrawal:
>> > > The PCIe host bridge on RK3399 advertises a single 64-bit memory
>> > > address range even though it lies entirely below 4GB.
>> > >
>> > > Previously the OF PCI range parser treated 64-bit ranges more
>> > > leniently (i.e., as 32-bit), but since commit 9d57e61bf723 ("of/pci:
>> > > Add IORESOURCE_MEM_64 to resource flags for 64-bit memory addresses")
>> > > the code takes a stricter view and treats the ranges as advertised in
>> > > the device tree (i.e, as 64-bit).
>> > >
>> > > The change in behaviour causes failure when allocating bus addresses
>> > > to devices connected behind a PCI-to-PCI bridge that require
>> > > non-prefetchable memory ranges. The allocation failure was observed
>> > > for certain Samsung NVMe drives connected to RockPro64 boards.
>> > >
>> > > Update the host bridge window attributes to treat it as 32-bit address
>> > > memory. This fixes the allocation failure observed since commit
>> > > 9d57e61bf723.
>> > >
>> > > Reported-by: Alexandru Elisei <alexandru.elisei@arm.com>
>> > > Link: https://lore.kernel.org/r/7a1e2ebc-f7d8-8431-d844-41a9c36a8911@arm.com
>> > > Suggested-by: Robin Murphy <robin.murphy@arm.com>
>> > > Signed-off-by: Punit Agrawal <punitagrawal@gmail.com>
>> > > Tested-by: Alexandru Elisei <alexandru.elisei@arm.com>
>> > > Cc: Heiko Stuebner <heiko@sntech.de>
>> > > Cc: Rob Herring <robh+dt@kernel.org>
>> >
>> > just for clarity, should I just pick this patch separately for 5.13-rc to
>> > make it easy for people using current kernel devicetrees, or should
>> > this wait for the update mentioned in the cover-letter response
>> > and should go all together through the PCI tree?
>> 
>> This was dropped from v4, but should still be applied IMO.
>
> It was probably dropped because I applied it ;-)
>
> It's part of armsoc already [0] and should make its way into
> 5.13 shortly.

Thanks for sending the patch along. I left a note to the effect in v4
but it's easy to miss.

Hopefully all sorted now.

[...]

WARNING: multiple messages have this Message-ID (diff)
From: Punit Agrawal <punitagrawal@gmail.com>
To: "Heiko Stübner" <heiko@sntech.de>
Cc: Rob Herring <robh+dt@kernel.org>,
	 Bjorn Helgaas <helgaas@kernel.org>,
	"open list:ARM/Rockchip SoC..."
	<linux-rockchip@lists.infradead.org>,
	linux-arm-kernel <linux-arm-kernel@lists.infradead.org>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
	 PCI <linux-pci@vger.kernel.org>,
	 Alexandru Elisei <alexandru.elisei@arm.com>,
	wqu@suse.com,  Robin Murphy <robin.murphy@arm.com>,
	 Peter Geis <pgwipeout@gmail.com>,
	 Ard Biesheuvel <ardb@kernel.org>,
	 Brian Norris <briannorris@chromium.org>,
	 Shawn Lin <shawn.lin@rock-chips.com>
Subject: Re: [PATCH v3 4/4] arm64: dts: rockchip: Update PCI host bridge window to 32-bit address memory
Date: Wed, 16 Jun 2021 22:00:21 +0900	[thread overview]
Message-ID: <871r92t15m.fsf@stealth> (raw)
In-Reply-To: <3238453.R1toDxpfAE@diego> ("Heiko =?utf-8?Q?St=C3=BCbner=22'?= =?utf-8?Q?s?= message of "Tue, 15 Jun 2021 23:49:07 +0200")

Heiko Stübner <heiko@sntech.de> writes:

> Am Dienstag, 15. Juni 2021, 23:29:12 CEST schrieb Rob Herring:
>> On Thu, Jun 10, 2021 at 3:50 PM Heiko Stübner <heiko@sntech.de> wrote:
>> >
>> > Hi,
>> >
>> > Am Montag, 7. Juni 2021, 13:28:56 CEST schrieb Punit Agrawal:
>> > > The PCIe host bridge on RK3399 advertises a single 64-bit memory
>> > > address range even though it lies entirely below 4GB.
>> > >
>> > > Previously the OF PCI range parser treated 64-bit ranges more
>> > > leniently (i.e., as 32-bit), but since commit 9d57e61bf723 ("of/pci:
>> > > Add IORESOURCE_MEM_64 to resource flags for 64-bit memory addresses")
>> > > the code takes a stricter view and treats the ranges as advertised in
>> > > the device tree (i.e, as 64-bit).
>> > >
>> > > The change in behaviour causes failure when allocating bus addresses
>> > > to devices connected behind a PCI-to-PCI bridge that require
>> > > non-prefetchable memory ranges. The allocation failure was observed
>> > > for certain Samsung NVMe drives connected to RockPro64 boards.
>> > >
>> > > Update the host bridge window attributes to treat it as 32-bit address
>> > > memory. This fixes the allocation failure observed since commit
>> > > 9d57e61bf723.
>> > >
>> > > Reported-by: Alexandru Elisei <alexandru.elisei@arm.com>
>> > > Link: https://lore.kernel.org/r/7a1e2ebc-f7d8-8431-d844-41a9c36a8911@arm.com
>> > > Suggested-by: Robin Murphy <robin.murphy@arm.com>
>> > > Signed-off-by: Punit Agrawal <punitagrawal@gmail.com>
>> > > Tested-by: Alexandru Elisei <alexandru.elisei@arm.com>
>> > > Cc: Heiko Stuebner <heiko@sntech.de>
>> > > Cc: Rob Herring <robh+dt@kernel.org>
>> >
>> > just for clarity, should I just pick this patch separately for 5.13-rc to
>> > make it easy for people using current kernel devicetrees, or should
>> > this wait for the update mentioned in the cover-letter response
>> > and should go all together through the PCI tree?
>> 
>> This was dropped from v4, but should still be applied IMO.
>
> It was probably dropped because I applied it ;-)
>
> It's part of armsoc already [0] and should make its way into
> 5.13 shortly.

Thanks for sending the patch along. I left a note to the effect in v4
but it's easy to miss.

Hopefully all sorted now.

[...]

_______________________________________________
Linux-rockchip mailing list
Linux-rockchip@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-rockchip

WARNING: multiple messages have this Message-ID (diff)
From: Punit Agrawal <punitagrawal@gmail.com>
To: "Heiko Stübner" <heiko@sntech.de>
Cc: Rob Herring <robh+dt@kernel.org>,
	 Bjorn Helgaas <helgaas@kernel.org>,
	"open list:ARM/Rockchip SoC..."
	<linux-rockchip@lists.infradead.org>,
	linux-arm-kernel <linux-arm-kernel@lists.infradead.org>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
	 PCI <linux-pci@vger.kernel.org>,
	 Alexandru Elisei <alexandru.elisei@arm.com>,
	wqu@suse.com,  Robin Murphy <robin.murphy@arm.com>,
	 Peter Geis <pgwipeout@gmail.com>,
	 Ard Biesheuvel <ardb@kernel.org>,
	 Brian Norris <briannorris@chromium.org>,
	 Shawn Lin <shawn.lin@rock-chips.com>
Subject: Re: [PATCH v3 4/4] arm64: dts: rockchip: Update PCI host bridge window to 32-bit address memory
Date: Wed, 16 Jun 2021 22:00:21 +0900	[thread overview]
Message-ID: <871r92t15m.fsf@stealth> (raw)
In-Reply-To: <3238453.R1toDxpfAE@diego> ("Heiko =?utf-8?Q?St=C3=BCbner=22'?= =?utf-8?Q?s?= message of "Tue, 15 Jun 2021 23:49:07 +0200")

Heiko Stübner <heiko@sntech.de> writes:

> Am Dienstag, 15. Juni 2021, 23:29:12 CEST schrieb Rob Herring:
>> On Thu, Jun 10, 2021 at 3:50 PM Heiko Stübner <heiko@sntech.de> wrote:
>> >
>> > Hi,
>> >
>> > Am Montag, 7. Juni 2021, 13:28:56 CEST schrieb Punit Agrawal:
>> > > The PCIe host bridge on RK3399 advertises a single 64-bit memory
>> > > address range even though it lies entirely below 4GB.
>> > >
>> > > Previously the OF PCI range parser treated 64-bit ranges more
>> > > leniently (i.e., as 32-bit), but since commit 9d57e61bf723 ("of/pci:
>> > > Add IORESOURCE_MEM_64 to resource flags for 64-bit memory addresses")
>> > > the code takes a stricter view and treats the ranges as advertised in
>> > > the device tree (i.e, as 64-bit).
>> > >
>> > > The change in behaviour causes failure when allocating bus addresses
>> > > to devices connected behind a PCI-to-PCI bridge that require
>> > > non-prefetchable memory ranges. The allocation failure was observed
>> > > for certain Samsung NVMe drives connected to RockPro64 boards.
>> > >
>> > > Update the host bridge window attributes to treat it as 32-bit address
>> > > memory. This fixes the allocation failure observed since commit
>> > > 9d57e61bf723.
>> > >
>> > > Reported-by: Alexandru Elisei <alexandru.elisei@arm.com>
>> > > Link: https://lore.kernel.org/r/7a1e2ebc-f7d8-8431-d844-41a9c36a8911@arm.com
>> > > Suggested-by: Robin Murphy <robin.murphy@arm.com>
>> > > Signed-off-by: Punit Agrawal <punitagrawal@gmail.com>
>> > > Tested-by: Alexandru Elisei <alexandru.elisei@arm.com>
>> > > Cc: Heiko Stuebner <heiko@sntech.de>
>> > > Cc: Rob Herring <robh+dt@kernel.org>
>> >
>> > just for clarity, should I just pick this patch separately for 5.13-rc to
>> > make it easy for people using current kernel devicetrees, or should
>> > this wait for the update mentioned in the cover-letter response
>> > and should go all together through the PCI tree?
>> 
>> This was dropped from v4, but should still be applied IMO.
>
> It was probably dropped because I applied it ;-)
>
> It's part of armsoc already [0] and should make its way into
> 5.13 shortly.

Thanks for sending the patch along. I left a note to the effect in v4
but it's easy to miss.

Hopefully all sorted now.

[...]

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

  reply	other threads:[~2021-06-16 13:00 UTC|newest]

Thread overview: 69+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-06-07 11:28 [PATCH v3 0/4] PCI: of: Improvements to handle 64-bit attribute for non-prefetchable ranges Punit Agrawal
2021-06-07 11:28 ` Punit Agrawal
2021-06-07 11:28 ` Punit Agrawal
2021-06-07 11:28 ` [PATCH v3 1/4] PCI: of: Clear 64-bit flag for non-prefetchable memory below 4GB Punit Agrawal
2021-06-07 11:28   ` Punit Agrawal
2021-06-07 11:28   ` Punit Agrawal
2021-06-10  0:22   ` Bjorn Helgaas
2021-06-10  0:22     ` Bjorn Helgaas
2021-06-10  0:22     ` Bjorn Helgaas
2021-06-10 13:34     ` Punit Agrawal
2021-06-10 13:34       ` Punit Agrawal
2021-06-10 13:34       ` Punit Agrawal
2021-06-10 18:28       ` Bjorn Helgaas
2021-06-10 18:28         ` Bjorn Helgaas
2021-06-10 18:28         ` Bjorn Helgaas
2021-06-07 11:28 ` [PATCH v3 2/4] PCI: of: Relax the condition for warning about non-prefetchable memory aperture size Punit Agrawal
2021-06-07 11:28   ` Punit Agrawal
2021-06-07 11:28   ` Punit Agrawal
2021-06-08 19:06   ` Vidya Sagar
2021-06-08 19:06     ` Vidya Sagar
2021-06-08 19:06     ` Vidya Sagar
2021-06-10  4:04     ` Bjorn Helgaas
2021-06-10  4:04       ` Bjorn Helgaas
2021-06-10  4:04       ` Bjorn Helgaas
2021-06-10 14:11       ` Punit Agrawal
2021-06-10 14:11         ` Punit Agrawal
2021-06-10 14:11         ` Punit Agrawal
2021-06-10 19:58         ` Bjorn Helgaas
2021-06-10 19:58           ` Bjorn Helgaas
2021-06-10 19:58           ` Bjorn Helgaas
2021-06-07 11:28 ` [PATCH v3 3/4] PCI: of: Refactor the check for non-prefetchable 32-bit window Punit Agrawal
2021-06-07 11:28   ` Punit Agrawal
2021-06-07 11:28   ` Punit Agrawal
2021-06-07 11:28 ` [PATCH v3 4/4] arm64: dts: rockchip: Update PCI host bridge window to 32-bit address memory Punit Agrawal
2021-06-07 11:28   ` Punit Agrawal
2021-06-07 11:28   ` Punit Agrawal
2021-06-10 21:50   ` Heiko Stübner
2021-06-10 21:50     ` Heiko Stübner
2021-06-10 21:50     ` Heiko Stübner
2021-06-11 14:38     ` Punit Agrawal
2021-06-11 14:38       ` Punit Agrawal
2021-06-11 14:38       ` Punit Agrawal
2021-06-15 21:29     ` Rob Herring
2021-06-15 21:29       ` Rob Herring
2021-06-15 21:29       ` Rob Herring
2021-06-15 21:49       ` Heiko Stübner
2021-06-15 21:49         ` Heiko Stübner
2021-06-15 21:49         ` Heiko Stübner
2021-06-16 13:00         ` Punit Agrawal [this message]
2021-06-16 13:00           ` Punit Agrawal
2021-06-16 13:00           ` Punit Agrawal
2021-06-09 16:08 ` [PATCH v3 0/4] PCI: of: Improvements to handle 64-bit attribute for non-prefetchable ranges Marc Zyngier
2021-06-09 16:08   ` Marc Zyngier
2021-06-09 16:08   ` Marc Zyngier
2021-06-10 14:17   ` Punit Agrawal
2021-06-10 14:17     ` Punit Agrawal
2021-06-10 14:17     ` Punit Agrawal
2021-06-10  9:05 ` Anand Moon
2021-06-10  9:05   ` Anand Moon
2021-06-10  9:05   ` Anand Moon
2021-06-10 14:25   ` Punit Agrawal
2021-06-10 14:25     ` Punit Agrawal
2021-06-10 14:25     ` Punit Agrawal
2021-06-10 18:36     ` Anand Moon
2021-06-10 18:36       ` Anand Moon
2021-06-10 18:36       ` Anand Moon
2021-06-11 22:15 ` (subset) " Heiko Stuebner
2021-06-11 22:15   ` Heiko Stuebner
2021-06-11 22:15   ` Heiko Stuebner

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