[Intel-gfx] [PATCH v3 1/3] drm/i915/selftests: Restore previous heartbeat interval

[Intel-gfx] [PATCH v3 1/3] drm/i915/selftests: Restore previous heartbeat interval

[Chris Wilson]

Use the defaults we store on the engine when resetting the heartbeat as
we may have had to adjust it from the config value during initialisation.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
---
 .../gpu/drm/i915/gt/selftest_engine_heartbeat.c    | 14 ++++++++++----
 1 file changed, 10 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/i915/gt/selftest_engine_heartbeat.c b/drivers/gpu/drm/i915/gt/selftest_engine_heartbeat.c
index b0bae6676140..b2c369317bf1 100644
--- a/drivers/gpu/drm/i915/gt/selftest_engine_heartbeat.c
+++ b/drivers/gpu/drm/i915/gt/selftest_engine_heartbeat.c
@@ -11,6 +11,12 @@
 #include "i915_selftest.h"
 #include "selftest_engine_heartbeat.h"
 
+static void reset_heartbeat(struct intel_engine_cs *engine)
+{
+	intel_engine_set_heartbeat(engine,
+				   engine->defaults.heartbeat_interval_ms);
+}
+
 static int timeline_sync(struct intel_timeline *tl)
 {
 	struct dma_fence *fence;
@@ -269,7 +275,7 @@ static int __live_heartbeat_fast(struct intel_engine_cs *engine)
 		err = -EINVAL;
 	}
 
-	intel_engine_set_heartbeat(engine, CONFIG_DRM_I915_HEARTBEAT_INTERVAL);
+	reset_heartbeat(engine);
 err_pm:
 	intel_engine_pm_put(engine);
 	intel_context_put(ce);
@@ -284,7 +290,7 @@ static int live_heartbeat_fast(void *arg)
 	int err = 0;
 
 	/* Check that the heartbeat ticks at the desired rate. */
-	if (!CONFIG_DRM_I915_HEARTBEAT_INTERVAL)
+	if (!IS_ACTIVE(CONFIG_DRM_I915_HEARTBEAT_INTERVAL))
 		return 0;
 
 	for_each_engine(engine, gt, id) {
@@ -332,7 +338,7 @@ static int __live_heartbeat_off(struct intel_engine_cs *engine)
 	}
 
 err_beat:
-	intel_engine_set_heartbeat(engine, CONFIG_DRM_I915_HEARTBEAT_INTERVAL);
+	reset_heartbeat(engine);
 err_pm:
 	intel_engine_pm_put(engine);
 	return err;
@@ -346,7 +352,7 @@ static int live_heartbeat_off(void *arg)
 	int err = 0;
 
 	/* Check that we can turn off heartbeat and not interrupt VIP */
-	if (!CONFIG_DRM_I915_HEARTBEAT_INTERVAL)
+	if (!IS_ACTIVE(CONFIG_DRM_I915_HEARTBEAT_INTERVAL))
 		return 0;
 
 	for_each_engine(engine, gt, id) {
-- 
2.20.1

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[Intel-gfx] [PATCH v3 2/3] drm/i915/gt: Double check heartbeat timeout before resetting

[Chris Wilson]

Check that we have actually passed the heartbeat interval since last
checking the request before resetting the device.

Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/2780
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
---
 drivers/gpu/drm/i915/gt/intel_engine_heartbeat.c | 11 ++++++++++-
 1 file changed, 10 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/gt/intel_engine_heartbeat.c b/drivers/gpu/drm/i915/gt/intel_engine_heartbeat.c
index 48a91c0dbad6..93741a65924a 100644
--- a/drivers/gpu/drm/i915/gt/intel_engine_heartbeat.c
+++ b/drivers/gpu/drm/i915/gt/intel_engine_heartbeat.c
@@ -31,7 +31,7 @@ static bool next_heartbeat(struct intel_engine_cs *engine)
 	delay = msecs_to_jiffies_timeout(delay);
 	if (delay >= HZ)
 		delay = round_jiffies_up_relative(delay);
-	mod_delayed_work(system_highpri_wq, &engine->heartbeat.work, delay);
+	mod_delayed_work(system_highpri_wq, &engine->heartbeat.work, delay + 1);
 
 	return true;
 }
@@ -103,6 +103,13 @@ static void heartbeat(struct work_struct *wrk)
 		goto out;
 
 	if (engine->heartbeat.systole) {
+		long delay = READ_ONCE(engine->props.heartbeat_interval_ms);
+
+		/* Safeguard against too-fast worker invocations */
+		if (!time_after(jiffies,
+				rq->emitted_jiffies + msecs_to_jiffies(delay)))
+			goto out;
+
 		if (!i915_sw_fence_signaled(&rq->submit)) {
 			/*
 			 * Not yet submitted, system is stalled.
@@ -139,6 +146,8 @@ static void heartbeat(struct work_struct *wrk)
 					      "stopped heartbeat on %s",
 					      engine->name);
 		}
+
+		rq->emitted_jiffies = jiffies;
 		goto out;
 	}
 
-- 
2.20.1

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[Intel-gfx] [PATCH v3 3/3] drm/i915/gt: Ratelimit heartbeat completion probing

[Chris Wilson]

The heartbeat runs through a few phases that we expect to complete
within a certain number of heartbeat intervals. First we must submit the
heartbeat to the queue, and if the queue is occupied it may take a
couple of intervals before the heartbeat preempts the workload and is
submitted to HW. Once running on HW, completion is not instantaneous as
it may have to first reset the current workload before it itself runs
through the empty request and signals completion. As such, we know that
the heartbeat must take at least the preempt reset timeout and before we
have had a chance to reset the engine, we do not want to issue a global
reset ourselves (simply so that we only try to do one reset at a time
and not confuse ourselves by resetting twice and hitting an innocent.)

So by taking into consideration that once running the request must take
a finite amount of time, we can delay the final completion check to
accommodate that and avoid checking too early (before we've had a chance
to handle any engine resets required).

v2: Attach a callback to flush the work immediately upon the heartbeat
completion and insert the delay before the next.

Suggested-by: CQ Tang <cq.tang@intel.com>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
---
 .../gpu/drm/i915/gt/intel_engine_heartbeat.c  | 85 +++++++++++++++++--
 drivers/gpu/drm/i915/gt/intel_engine_types.h  |  1 +
 .../drm/i915/gt/selftest_engine_heartbeat.c   | 20 +++--
 3 files changed, 90 insertions(+), 16 deletions(-)

diff --git a/drivers/gpu/drm/i915/gt/intel_engine_heartbeat.c b/drivers/gpu/drm/i915/gt/intel_engine_heartbeat.c
index 93741a65924a..3df10bfafb3b 100644
--- a/drivers/gpu/drm/i915/gt/intel_engine_heartbeat.c
+++ b/drivers/gpu/drm/i915/gt/intel_engine_heartbeat.c
@@ -20,6 +20,18 @@
  * issue a reset -- in the hope that restores progress.
  */
 
+#define HEARTBEAT_COMPLETION 50u /* milliseconds */
+
+static long completion_timeout(const struct intel_engine_cs *engine)
+{
+	long timeout = HEARTBEAT_COMPLETION;
+
+	if (intel_engine_has_preempt_reset(engine))
+		timeout += READ_ONCE(engine->props.preempt_timeout_ms);
+
+	return msecs_to_jiffies(timeout);
+}
+
 static bool next_heartbeat(struct intel_engine_cs *engine)
 {
 	long delay;
@@ -29,6 +41,28 @@ static bool next_heartbeat(struct intel_engine_cs *engine)
 		return false;
 
 	delay = msecs_to_jiffies_timeout(delay);
+
+	/*
+	 * Once we submit a heartbeat to the HW, we know that it will take
+	 * at least a certain amount of time to complete. On a hanging system
+	 * it will first have to wait for the preempt reset timeout, and
+	 * then it will take some time for the reset to resume with the
+	 * heartbeat and for it to complete. So once we have submitted the
+	 * heartbeat to HW, we can wait a while longer before declaring the
+	 * engine stuck and forcing a reset ourselves. If we do a reset
+	 * and the engine is also doing a reset, it is possible that we
+	 * reset the engine twice, harming an innocent.
+	 *
+	 * Before we have sumitted the heartbeat, we do not want to change
+	 * the interval as we to promote the heartbeat and trigger preemption
+	 * in a deterministic time frame.
+	 */
+	if (engine->heartbeat.systole) {
+		intel_engine_flush_submission(engine);
+		if (i915_request_is_active(engine->heartbeat.systole))
+			delay = max(delay, completion_timeout(engine));
+	}
+
 	if (delay >= HZ)
 		delay = round_jiffies_up_relative(delay);
 	mod_delayed_work(system_highpri_wq, &engine->heartbeat.work, delay + 1);
@@ -48,12 +82,44 @@ heartbeat_create(struct intel_context *ce, gfp_t gfp)
 	return rq;
 }
 
+static void defibrillator(struct dma_fence *f, struct dma_fence_cb *cb)
+{
+	struct intel_engine_cs *engine =
+		container_of(cb, typeof(*engine), heartbeat.cb);
+
+	if (READ_ONCE(engine->heartbeat.systole))
+		mod_delayed_work(system_highpri_wq, &engine->heartbeat.work, 0);
+}
+
+static void
+track_heartbeat(struct intel_engine_cs *engine, struct i915_request *rq)
+{
+	engine->heartbeat.systole = i915_request_get(rq);
+	if (dma_fence_add_callback(&rq->fence,
+				   &engine->heartbeat.cb,
+				   defibrillator))
+		mod_delayed_work(system_highpri_wq, &engine->heartbeat.work, 0);
+}
+
+static void
+untrack_heartbeat(struct intel_engine_cs *engine)
+{
+	struct i915_request *rq;
+
+	rq = fetch_and_zero(&engine->heartbeat.systole);
+	if (!rq)
+		return;
+
+	dma_fence_remove_callback(&rq->fence, &engine->heartbeat.cb);
+	i915_request_put(rq);
+}
+
 static void idle_pulse(struct intel_engine_cs *engine, struct i915_request *rq)
 {
 	engine->wakeref_serial = READ_ONCE(engine->serial) + 1;
 	i915_request_add_active_barriers(rq);
 	if (!engine->heartbeat.systole && intel_engine_has_heartbeat(engine))
-		engine->heartbeat.systole = i915_request_get(rq);
+		track_heartbeat(engine, rq);
 }
 
 static void heartbeat_commit(struct i915_request *rq,
@@ -91,10 +157,8 @@ static void heartbeat(struct work_struct *wrk)
 	intel_engine_flush_submission(engine);
 
 	rq = engine->heartbeat.systole;
-	if (rq && i915_request_completed(rq)) {
-		i915_request_put(rq);
-		engine->heartbeat.systole = NULL;
-	}
+	if (rq && i915_request_completed(rq))
+		untrack_heartbeat(engine);
 
 	if (!intel_engine_pm_get_if_awake(engine))
 		return;
@@ -151,6 +215,11 @@ static void heartbeat(struct work_struct *wrk)
 		goto out;
 	}
 
+	/* Just completed one heartbeat, wait a tick before the next */
+	if (rq)
+		goto out;
+
+	/* The engine is parking. We can rest until the next user */
 	serial = READ_ONCE(engine->serial);
 	if (engine->wakeref_serial == serial)
 		goto out;
@@ -175,7 +244,7 @@ static void heartbeat(struct work_struct *wrk)
 	mutex_unlock(&ce->timeline->mutex);
 out:
 	if (!engine->i915->params.enable_hangcheck || !next_heartbeat(engine))
-		i915_request_put(fetch_and_zero(&engine->heartbeat.systole));
+		untrack_heartbeat(engine);
 	intel_engine_pm_put(engine);
 }
 
@@ -189,8 +258,8 @@ void intel_engine_unpark_heartbeat(struct intel_engine_cs *engine)
 
 void intel_engine_park_heartbeat(struct intel_engine_cs *engine)
 {
-	if (cancel_delayed_work(&engine->heartbeat.work))
-		i915_request_put(fetch_and_zero(&engine->heartbeat.systole));
+	while (cancel_delayed_work(&engine->heartbeat.work))
+		untrack_heartbeat(engine); /* completion may rearm work */
 }
 
 void intel_engine_init_heartbeat(struct intel_engine_cs *engine)
diff --git a/drivers/gpu/drm/i915/gt/intel_engine_types.h b/drivers/gpu/drm/i915/gt/intel_engine_types.h
index 7159f9575e65..4956594c8b93 100644
--- a/drivers/gpu/drm/i915/gt/intel_engine_types.h
+++ b/drivers/gpu/drm/i915/gt/intel_engine_types.h
@@ -347,6 +347,7 @@ struct intel_engine_cs {
 	struct {
 		struct delayed_work work;
 		struct i915_request *systole;
+		struct dma_fence_cb cb;
 		unsigned long blocked;
 	} heartbeat;
 
diff --git a/drivers/gpu/drm/i915/gt/selftest_engine_heartbeat.c b/drivers/gpu/drm/i915/gt/selftest_engine_heartbeat.c
index b2c369317bf1..d690de522a11 100644
--- a/drivers/gpu/drm/i915/gt/selftest_engine_heartbeat.c
+++ b/drivers/gpu/drm/i915/gt/selftest_engine_heartbeat.c
@@ -202,7 +202,8 @@ static int cmp_u32(const void *_a, const void *_b)
 
 static int __live_heartbeat_fast(struct intel_engine_cs *engine)
 {
-	const unsigned int error_threshold = max(20000u, jiffies_to_usecs(6));
+	const unsigned int error_threshold =
+		max(3 * HEARTBEAT_COMPLETION * 1000, jiffies_to_usecs(6));
 	struct intel_context *ce;
 	struct i915_request *rq;
 	ktime_t t0, t1;
@@ -221,6 +222,9 @@ static int __live_heartbeat_fast(struct intel_engine_cs *engine)
 		goto err_pm;
 
 	for (i = 0; i < ARRAY_SIZE(times); i++) {
+		unsigned long timeout;
+
+		timeout = jiffies + 2;
 		do {
 			/* Manufacture a tick */
 			intel_engine_park_heartbeat(engine);
@@ -229,19 +233,19 @@ static int __live_heartbeat_fast(struct intel_engine_cs *engine)
 			intel_engine_unpark_heartbeat(engine);
 
 			flush_delayed_work(&engine->heartbeat.work);
-			if (!delayed_work_pending(&engine->heartbeat.work)) {
-				pr_err("%s: heartbeat %d did not start\n",
-				       engine->name, i);
-				err = -EINVAL;
-				goto err_pm;
-			}
 
 			rcu_read_lock();
 			rq = READ_ONCE(engine->heartbeat.systole);
 			if (rq)
 				rq = i915_request_get_rcu(rq);
 			rcu_read_unlock();
-		} while (!rq);
+		} while (!rq && !time_after(jiffies, timeout));
+		if (!rq) {
+			pr_err("%s: heartbeat %d did not start\n",
+			       engine->name, i);
+			err = -EINVAL;
+			goto err_pm;
+		}
 
 		t0 = ktime_get();
 		while (rq == READ_ONCE(engine->heartbeat.systole))
-- 
2.20.1

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Re: [Intel-gfx] [PATCH v3 1/3] drm/i915/selftests: Restore previous heartbeat interval

[Mika Kuoppala]

Chris Wilson <chris@chris-wilson.co.uk> writes:

> Use the defaults we store on the engine when resetting the heartbeat as
> we may have had to adjust it from the config value during initialisation.
>
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>

Reviewed-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>

> ---
>  .../gpu/drm/i915/gt/selftest_engine_heartbeat.c    | 14 ++++++++++----
>  1 file changed, 10 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/gt/selftest_engine_heartbeat.c b/drivers/gpu/drm/i915/gt/selftest_engine_heartbeat.c
> index b0bae6676140..b2c369317bf1 100644
> --- a/drivers/gpu/drm/i915/gt/selftest_engine_heartbeat.c
> +++ b/drivers/gpu/drm/i915/gt/selftest_engine_heartbeat.c
> @@ -11,6 +11,12 @@
>  #include "i915_selftest.h"
>  #include "selftest_engine_heartbeat.h"
>  
> +static void reset_heartbeat(struct intel_engine_cs *engine)
> +{
> +	intel_engine_set_heartbeat(engine,
> +				   engine->defaults.heartbeat_interval_ms);
> +}
> +
>  static int timeline_sync(struct intel_timeline *tl)
>  {
>  	struct dma_fence *fence;
> @@ -269,7 +275,7 @@ static int __live_heartbeat_fast(struct intel_engine_cs *engine)
>  		err = -EINVAL;
>  	}
>  
> -	intel_engine_set_heartbeat(engine, CONFIG_DRM_I915_HEARTBEAT_INTERVAL);
> +	reset_heartbeat(engine);
>  err_pm:
>  	intel_engine_pm_put(engine);
>  	intel_context_put(ce);
> @@ -284,7 +290,7 @@ static int live_heartbeat_fast(void *arg)
>  	int err = 0;
>  
>  	/* Check that the heartbeat ticks at the desired rate. */
> -	if (!CONFIG_DRM_I915_HEARTBEAT_INTERVAL)
> +	if (!IS_ACTIVE(CONFIG_DRM_I915_HEARTBEAT_INTERVAL))
>  		return 0;
>  
>  	for_each_engine(engine, gt, id) {
> @@ -332,7 +338,7 @@ static int __live_heartbeat_off(struct intel_engine_cs *engine)
>  	}
>  
>  err_beat:
> -	intel_engine_set_heartbeat(engine, CONFIG_DRM_I915_HEARTBEAT_INTERVAL);
> +	reset_heartbeat(engine);
>  err_pm:
>  	intel_engine_pm_put(engine);
>  	return err;
> @@ -346,7 +352,7 @@ static int live_heartbeat_off(void *arg)
>  	int err = 0;
>  
>  	/* Check that we can turn off heartbeat and not interrupt VIP */
> -	if (!CONFIG_DRM_I915_HEARTBEAT_INTERVAL)
> +	if (!IS_ACTIVE(CONFIG_DRM_I915_HEARTBEAT_INTERVAL))
>  		return 0;
>  
>  	for_each_engine(engine, gt, id) {
> -- 
> 2.20.1
>
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Re: [Intel-gfx] [PATCH v3 2/3] drm/i915/gt: Double check heartbeat timeout before resetting

[Mika Kuoppala]

Chris Wilson <chris@chris-wilson.co.uk> writes:

> Check that we have actually passed the heartbeat interval since last
> checking the request before resetting the device.
>
> Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/2780
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> ---
>  drivers/gpu/drm/i915/gt/intel_engine_heartbeat.c | 11 ++++++++++-
>  1 file changed, 10 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/gt/intel_engine_heartbeat.c b/drivers/gpu/drm/i915/gt/intel_engine_heartbeat.c
> index 48a91c0dbad6..93741a65924a 100644
> --- a/drivers/gpu/drm/i915/gt/intel_engine_heartbeat.c
> +++ b/drivers/gpu/drm/i915/gt/intel_engine_heartbeat.c
> @@ -31,7 +31,7 @@ static bool next_heartbeat(struct intel_engine_cs *engine)
>  	delay = msecs_to_jiffies_timeout(delay);
>  	if (delay >= HZ)
>  		delay = round_jiffies_up_relative(delay);
> -	mod_delayed_work(system_highpri_wq, &engine->heartbeat.work, delay);
> +	mod_delayed_work(system_highpri_wq, &engine->heartbeat.work, delay + 1);
>  
>  	return true;
>  }
> @@ -103,6 +103,13 @@ static void heartbeat(struct work_struct *wrk)
>  		goto out;
>  
>  	if (engine->heartbeat.systole) {
> +		long delay = READ_ONCE(engine->props.heartbeat_interval_ms);
> +
> +		/* Safeguard against too-fast worker invocations */
> +		if (!time_after(jiffies,
> +				rq->emitted_jiffies + msecs_to_jiffies(delay)))
> +			goto out;
> +
>  		if (!i915_sw_fence_signaled(&rq->submit)) {
>  			/*
>  			 * Not yet submitted, system is stalled.
> @@ -139,6 +146,8 @@ static void heartbeat(struct work_struct *wrk)
>  					      "stopped heartbeat on %s",
>  					      engine->name);
>  		}
> +
> +		rq->emitted_jiffies = jiffies;

Would possibly interfere with throttle. But who would get handle to
internal request.

Reviewed-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>

>  		goto out;
>  	}
>  
> -- 
> 2.20.1
>
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Re: [Intel-gfx] [PATCH v3 2/3] drm/i915/gt: Double check heartbeat timeout before resetting

[Chris Wilson]

Quoting Mika Kuoppala (2021-02-04 12:57:46)
> Chris Wilson <chris@chris-wilson.co.uk> writes:
> 
> > Check that we have actually passed the heartbeat interval since last
> > checking the request before resetting the device.
> >
> > Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/2780
> > Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> > ---
> >  drivers/gpu/drm/i915/gt/intel_engine_heartbeat.c | 11 ++++++++++-
> >  1 file changed, 10 insertions(+), 1 deletion(-)
> >
> > diff --git a/drivers/gpu/drm/i915/gt/intel_engine_heartbeat.c b/drivers/gpu/drm/i915/gt/intel_engine_heartbeat.c
> > index 48a91c0dbad6..93741a65924a 100644
> > --- a/drivers/gpu/drm/i915/gt/intel_engine_heartbeat.c
> > +++ b/drivers/gpu/drm/i915/gt/intel_engine_heartbeat.c
> > @@ -31,7 +31,7 @@ static bool next_heartbeat(struct intel_engine_cs *engine)
> >       delay = msecs_to_jiffies_timeout(delay);
> >       if (delay >= HZ)
> >               delay = round_jiffies_up_relative(delay);
> > -     mod_delayed_work(system_highpri_wq, &engine->heartbeat.work, delay);
> > +     mod_delayed_work(system_highpri_wq, &engine->heartbeat.work, delay + 1);
> >  
> >       return true;
> >  }
> > @@ -103,6 +103,13 @@ static void heartbeat(struct work_struct *wrk)
> >               goto out;
> >  
> >       if (engine->heartbeat.systole) {
> > +             long delay = READ_ONCE(engine->props.heartbeat_interval_ms);
> > +
> > +             /* Safeguard against too-fast worker invocations */
> > +             if (!time_after(jiffies,
> > +                             rq->emitted_jiffies + msecs_to_jiffies(delay)))
> > +                     goto out;
> > +
> >               if (!i915_sw_fence_signaled(&rq->submit)) {
> >                       /*
> >                        * Not yet submitted, system is stalled.
> > @@ -139,6 +146,8 @@ static void heartbeat(struct work_struct *wrk)
> >                                             "stopped heartbeat on %s",
> >                                             engine->name);
> >               }
> > +
> > +             rq->emitted_jiffies = jiffies;
> 
> Would possibly interfere with throttle. But who would get handle to
> internal request.

Indeed. And it changes the meaning of the pretty printing in the debug
message, but I can live with that.
-Chris
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[Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [v3,1/3] drm/i915/selftests: Restore previous heartbeat interval

[Patchwork]

[-- Attachment #1.1: Type: text/plain, Size: 16751 bytes --]

== Series Details ==

Series: series starting with [v3,1/3] drm/i915/selftests: Restore previous heartbeat interval
URL   : https://patchwork.freedesktop.org/series/86690/
State : failure

== Summary ==

CI Bug Log - changes from CI_DRM_9730 -> Patchwork_19586
====================================================

Summary
-------

  **FAILURE**

  Serious unknown changes coming with Patchwork_19586 absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_19586, please notify your bug team to allow them
  to document this new failure mode, which will reduce false positives in CI.

  External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19586/index.html

Possible new issues
-------------------

  Here are the unknown changes that may have been introduced in Patchwork_19586:

### IGT changes ###

#### Possible regressions ####

  * igt@i915_selftest@live@gt_heartbeat:
    - fi-pnv-d510:        [PASS][1] -> [DMESG-FAIL][2]
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9730/fi-pnv-d510/igt@i915_selftest@live@gt_heartbeat.html
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19586/fi-pnv-d510/igt@i915_selftest@live@gt_heartbeat.html
    - fi-elk-e7500:       [PASS][3] -> [DMESG-FAIL][4]
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9730/fi-elk-e7500/igt@i915_selftest@live@gt_heartbeat.html
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19586/fi-elk-e7500/igt@i915_selftest@live@gt_heartbeat.html

  
#### Suppressed ####

  The following results come from untrusted machines, tests, or statuses.
  They do not affect the overall result.

  * igt@i915_selftest@live@execlists:
    - {fi-rkl-11500t}:    [PASS][5] -> [INCOMPLETE][6]
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9730/fi-rkl-11500t/igt@i915_selftest@live@execlists.html
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19586/fi-rkl-11500t/igt@i915_selftest@live@execlists.html
    - {fi-ehl-1}:         [PASS][7] -> [INCOMPLETE][8]
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9730/fi-ehl-1/igt@i915_selftest@live@execlists.html
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19586/fi-ehl-1/igt@i915_selftest@live@execlists.html

  * igt@i915_selftest@live@gt_heartbeat:
    - {fi-ehl-1}:         [PASS][9] -> [DMESG-FAIL][10]
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9730/fi-ehl-1/igt@i915_selftest@live@gt_heartbeat.html
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19586/fi-ehl-1/igt@i915_selftest@live@gt_heartbeat.html

  
Known issues
------------

  Here are the changes found in Patchwork_19586 that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@amdgpu/amd_basic@userptr:
    - fi-byt-j1900:       NOTRUN -> [SKIP][11] ([fdo#109271]) +17 similar issues
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19586/fi-byt-j1900/igt@amdgpu/amd_basic@userptr.html

  * igt@i915_selftest@live@execlists:
    - fi-kbl-r:           [PASS][12] -> [INCOMPLETE][13] ([i915#1037] / [i915#794])
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9730/fi-kbl-r/igt@i915_selftest@live@execlists.html
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19586/fi-kbl-r/igt@i915_selftest@live@execlists.html
    - fi-cfl-8109u:       [PASS][14] -> [INCOMPLETE][15] ([i915#1037])
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9730/fi-cfl-8109u/igt@i915_selftest@live@execlists.html
   [15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19586/fi-cfl-8109u/igt@i915_selftest@live@execlists.html
    - fi-bsw-nick:        [PASS][16] -> [INCOMPLETE][17] ([i915#2940])
   [16]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9730/fi-bsw-nick/igt@i915_selftest@live@execlists.html
   [17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19586/fi-bsw-nick/igt@i915_selftest@live@execlists.html
    - fi-glk-dsi:         [PASS][18] -> [INCOMPLETE][19] ([i915#1037])
   [18]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9730/fi-glk-dsi/igt@i915_selftest@live@execlists.html
   [19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19586/fi-glk-dsi/igt@i915_selftest@live@execlists.html
    - fi-kbl-x1275:       [PASS][20] -> [INCOMPLETE][21] ([i915#1037] / [i915#794])
   [20]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9730/fi-kbl-x1275/igt@i915_selftest@live@execlists.html
   [21]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19586/fi-kbl-x1275/igt@i915_selftest@live@execlists.html
    - fi-icl-u2:          [PASS][22] -> [INCOMPLETE][23] ([i915#1037] / [i915#2276])
   [22]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9730/fi-icl-u2/igt@i915_selftest@live@execlists.html
   [23]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19586/fi-icl-u2/igt@i915_selftest@live@execlists.html
    - fi-skl-6600u:       [PASS][24] -> [INCOMPLETE][25] ([i915#1037])
   [24]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9730/fi-skl-6600u/igt@i915_selftest@live@execlists.html
   [25]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19586/fi-skl-6600u/igt@i915_selftest@live@execlists.html
    - fi-cfl-8700k:       [PASS][26] -> [INCOMPLETE][27] ([i915#1037])
   [26]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9730/fi-cfl-8700k/igt@i915_selftest@live@execlists.html
   [27]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19586/fi-cfl-8700k/igt@i915_selftest@live@execlists.html
    - fi-tgl-u2:          [PASS][28] -> [INCOMPLETE][29] ([i915#2268])
   [28]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9730/fi-tgl-u2/igt@i915_selftest@live@execlists.html
   [29]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19586/fi-tgl-u2/igt@i915_selftest@live@execlists.html
    - fi-cml-s:           [PASS][30] -> [INCOMPLETE][31] ([i915#1037])
   [30]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9730/fi-cml-s/igt@i915_selftest@live@execlists.html
   [31]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19586/fi-cml-s/igt@i915_selftest@live@execlists.html
    - fi-skl-guc:         [PASS][32] -> [INCOMPLETE][33] ([i915#1037])
   [32]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9730/fi-skl-guc/igt@i915_selftest@live@execlists.html
   [33]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19586/fi-skl-guc/igt@i915_selftest@live@execlists.html
    - fi-skl-6700k2:      [PASS][34] -> [INCOMPLETE][35] ([i915#1037])
   [34]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9730/fi-skl-6700k2/igt@i915_selftest@live@execlists.html
   [35]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19586/fi-skl-6700k2/igt@i915_selftest@live@execlists.html
    - fi-cfl-guc:         [PASS][36] -> [INCOMPLETE][37] ([i915#1037])
   [36]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9730/fi-cfl-guc/igt@i915_selftest@live@execlists.html
   [37]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19586/fi-cfl-guc/igt@i915_selftest@live@execlists.html
    - fi-icl-y:           [PASS][38] -> [INCOMPLETE][39] ([i915#1037] / [i915#2276])
   [38]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9730/fi-icl-y/igt@i915_selftest@live@execlists.html
   [39]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19586/fi-icl-y/igt@i915_selftest@live@execlists.html
    - fi-bxt-dsi:         [PASS][40] -> [INCOMPLETE][41] ([i915#1037])
   [40]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9730/fi-bxt-dsi/igt@i915_selftest@live@execlists.html
   [41]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19586/fi-bxt-dsi/igt@i915_selftest@live@execlists.html
    - fi-cml-u2:          [PASS][42] -> [INCOMPLETE][43] ([i915#1037])
   [42]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9730/fi-cml-u2/igt@i915_selftest@live@execlists.html
   [43]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19586/fi-cml-u2/igt@i915_selftest@live@execlists.html
    - fi-kbl-guc:         [PASS][44] -> [INCOMPLETE][45] ([i915#1037] / [i915#794])
   [44]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9730/fi-kbl-guc/igt@i915_selftest@live@execlists.html
   [45]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19586/fi-kbl-guc/igt@i915_selftest@live@execlists.html
    - fi-bdw-5557u:       [PASS][46] -> [INCOMPLETE][47] ([i915#2940])
   [46]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9730/fi-bdw-5557u/igt@i915_selftest@live@execlists.html
   [47]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19586/fi-bdw-5557u/igt@i915_selftest@live@execlists.html
    - fi-kbl-7500u:       [PASS][48] -> [INCOMPLETE][49] ([i915#1037] / [i915#794])
   [48]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9730/fi-kbl-7500u/igt@i915_selftest@live@execlists.html
   [49]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19586/fi-kbl-7500u/igt@i915_selftest@live@execlists.html

  * igt@i915_selftest@live@gt_heartbeat:
    - fi-skl-6600u:       [PASS][50] -> [DMESG-FAIL][51] ([i915#2291] / [i915#541])
   [50]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9730/fi-skl-6600u/igt@i915_selftest@live@gt_heartbeat.html
   [51]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19586/fi-skl-6600u/igt@i915_selftest@live@gt_heartbeat.html
    - fi-kbl-7500u:       [PASS][52] -> [DMESG-FAIL][53] ([i915#2291] / [i915#541])
   [52]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9730/fi-kbl-7500u/igt@i915_selftest@live@gt_heartbeat.html
   [53]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19586/fi-kbl-7500u/igt@i915_selftest@live@gt_heartbeat.html
    - fi-bsw-nick:        [PASS][54] -> [DMESG-FAIL][55] ([i915#2675] / [i915#541])
   [54]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9730/fi-bsw-nick/igt@i915_selftest@live@gt_heartbeat.html
   [55]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19586/fi-bsw-nick/igt@i915_selftest@live@gt_heartbeat.html
    - fi-cml-u2:          [PASS][56] -> [DMESG-FAIL][57] ([i915#2291])
   [56]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9730/fi-cml-u2/igt@i915_selftest@live@gt_heartbeat.html
   [57]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19586/fi-cml-u2/igt@i915_selftest@live@gt_heartbeat.html
    - fi-bsw-n3050:       [PASS][58] -> [DMESG-FAIL][59] ([i915#2675] / [i915#541])
   [58]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9730/fi-bsw-n3050/igt@i915_selftest@live@gt_heartbeat.html
   [59]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19586/fi-bsw-n3050/igt@i915_selftest@live@gt_heartbeat.html
    - fi-ilk-650:         [PASS][60] -> [DMESG-FAIL][61] ([i915#2291] / [i915#2675])
   [60]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9730/fi-ilk-650/igt@i915_selftest@live@gt_heartbeat.html
   [61]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19586/fi-ilk-650/igt@i915_selftest@live@gt_heartbeat.html

  * igt@runner@aborted:
    - fi-kbl-x1275:       NOTRUN -> [FAIL][62] ([i915#1436] / [i915#2295])
   [62]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19586/fi-kbl-x1275/igt@runner@aborted.html
    - fi-cfl-8109u:       NOTRUN -> [FAIL][63] ([i915#2295])
   [63]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19586/fi-cfl-8109u/igt@runner@aborted.html
    - fi-icl-u2:          NOTRUN -> [FAIL][64] ([i915#2295] / [i915#2724])
   [64]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19586/fi-icl-u2/igt@runner@aborted.html
    - fi-bsw-nick:        NOTRUN -> [FAIL][65] ([i915#1436])
   [65]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19586/fi-bsw-nick/igt@runner@aborted.html
    - fi-kbl-r:           NOTRUN -> [FAIL][66] ([i915#1436] / [i915#2295])
   [66]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19586/fi-kbl-r/igt@runner@aborted.html
    - fi-bdw-5557u:       NOTRUN -> [FAIL][67] ([i915#2369])
   [67]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19586/fi-bdw-5557u/igt@runner@aborted.html
    - fi-kbl-7500u:       NOTRUN -> [FAIL][68] ([i915#1436] / [i915#2295])
   [68]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19586/fi-kbl-7500u/igt@runner@aborted.html
    - fi-kbl-guc:         NOTRUN -> [FAIL][69] ([i915#1436] / [i915#2295])
   [69]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19586/fi-kbl-guc/igt@runner@aborted.html
    - fi-cml-u2:          NOTRUN -> [FAIL][70] ([i915#2295])
   [70]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19586/fi-cml-u2/igt@runner@aborted.html
    - fi-bxt-dsi:         NOTRUN -> [FAIL][71] ([i915#2295])
   [71]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19586/fi-bxt-dsi/igt@runner@aborted.html
    - fi-cml-s:           NOTRUN -> [FAIL][72] ([i915#2295])
   [72]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19586/fi-cml-s/igt@runner@aborted.html
    - fi-icl-y:           NOTRUN -> [FAIL][73] ([i915#2295] / [i915#2724])
   [73]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19586/fi-icl-y/igt@runner@aborted.html
    - fi-skl-guc:         NOTRUN -> [FAIL][74] ([i915#1436] / [i915#2295])
   [74]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19586/fi-skl-guc/igt@runner@aborted.html
    - fi-skl-6700k2:      NOTRUN -> [FAIL][75] ([i915#1436] / [i915#2295])
   [75]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19586/fi-skl-6700k2/igt@runner@aborted.html
    - fi-tgl-u2:          NOTRUN -> [FAIL][76] ([i915#2966])
   [76]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19586/fi-tgl-u2/igt@runner@aborted.html

  
#### Possible fixes ####

  * igt@i915_pm_rpm@module-reload:
    - fi-byt-j1900:       [INCOMPLETE][77] ([i915#142] / [i915#2405]) -> [PASS][78]
   [77]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9730/fi-byt-j1900/igt@i915_pm_rpm@module-reload.html
   [78]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19586/fi-byt-j1900/igt@i915_pm_rpm@module-reload.html

  * igt@i915_selftest@live@client:
    - fi-glk-dsi:         [DMESG-FAIL][79] -> [PASS][80]
   [79]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9730/fi-glk-dsi/igt@i915_selftest@live@client.html
   [80]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19586/fi-glk-dsi/igt@i915_selftest@live@client.html

  * igt@i915_selftest@live@sanitycheck:
    - fi-kbl-7500u:       [DMESG-WARN][81] ([i915#2605]) -> [PASS][82] +1 similar issue
   [81]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9730/fi-kbl-7500u/igt@i915_selftest@live@sanitycheck.html
   [82]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19586/fi-kbl-7500u/igt@i915_selftest@live@sanitycheck.html

  
  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).

  [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
  [i915#1037]: https://gitlab.freedesktop.org/drm/intel/issues/1037
  [i915#142]: https://gitlab.freedesktop.org/drm/intel/issues/142
  [i915#1436]: https://gitlab.freedesktop.org/drm/intel/issues/1436
  [i915#2089]: https://gitlab.freedesktop.org/drm/intel/issues/2089
  [i915#2268]: https://gitlab.freedesktop.org/drm/intel/issues/2268
  [i915#2276]: https://gitlab.freedesktop.org/drm/intel/issues/2276
  [i915#2291]: https://gitlab.freedesktop.org/drm/intel/issues/2291
  [i915#2295]: https://gitlab.freedesktop.org/drm/intel/issues/2295
  [i915#2369]: https://gitlab.freedesktop.org/drm/intel/issues/2369
  [i915#2405]: https://gitlab.freedesktop.org/drm/intel/issues/2405
  [i915#2505]: https://gitlab.freedesktop.org/drm/intel/issues/2505
  [i915#2605]: https://gitlab.freedesktop.org/drm/intel/issues/2605
  [i915#2675]: https://gitlab.freedesktop.org/drm/intel/issues/2675
  [i915#2722]: https://gitlab.freedesktop.org/drm/intel/issues/2722
  [i915#2724]: https://gitlab.freedesktop.org/drm/intel/issues/2724
  [i915#2940]: https://gitlab.freedesktop.org/drm/intel/issues/2940
  [i915#2966]: https://gitlab.freedesktop.org/drm/intel/issues/2966
  [i915#541]: https://gitlab.freedesktop.org/drm/intel/issues/541
  [i915#794]: https://gitlab.freedesktop.org/drm/intel/issues/794


Participating hosts (43 -> 36)
------------------------------

  Missing    (7): fi-kbl-soraka fi-jsl-1 fi-ilk-m540 fi-bsw-cyan fi-bsw-kefka fi-tgl-y fi-bdw-samus 


Build changes
-------------

  * Linux: CI_DRM_9730 -> Patchwork_19586

  CI-20190529: 20190529
  CI_DRM_9730: a70ac209cb308e06bc397cb3a6bf5764a4917333 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_5990: e796ca7ce6fe9c54ee7d939be4110582d555fbb6 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  Patchwork_19586: 081bcae1a2ca068dd68c462f399e81ca4daa4e0b @ git://anongit.freedesktop.org/gfx-ci/linux


== Linux commits ==

081bcae1a2ca drm/i915/gt: Ratelimit heartbeat completion probing
2b5f4ae220bf drm/i915/gt: Double check heartbeat timeout before resetting
cfc3c1c5fb54 drm/i915/selftests: Restore previous heartbeat interval

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19586/index.html

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