* [PATCH] drm/i915: Don't enable IPS when pixel rate exceeds 95% of cdclk
@ 2014-09-11 10:54 ville.syrjala
2014-09-11 11:03 ` Chris Wilson
0 siblings, 1 reply; 12+ messages in thread
From: ville.syrjala @ 2014-09-11 10:54 UTC (permalink / raw)
To: intel-gfx
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
Bspec says we shouldn't enable IPS on BDW when the pipe pixel rate
exceeds 95% of the core display clock. Apparently this can cause
underruns.
There's no similar restriction listed for HSW, so leave that one alone
for now.
Tested-by: Timo Aaltonen <tjaalton@ubuntu.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=83497
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/intel_display.c | 10 ++++++++--
drivers/gpu/drm/i915/intel_drv.h | 1 +
drivers/gpu/drm/i915/intel_pm.c | 16 +++++++---------
3 files changed, 16 insertions(+), 11 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 965eb3c..ca729e5 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -5244,9 +5244,15 @@ retry:
static void hsw_compute_ips_config(struct intel_crtc *crtc,
struct intel_crtc_config *pipe_config)
{
+ struct drm_device *dev = crtc->base.dev;
+ struct drm_i915_private *dev_priv = dev->dev_private;
+
pipe_config->ips_enabled = i915.enable_ips &&
- hsw_crtc_supports_ips(crtc) &&
- pipe_config->pipe_bpp <= 24;
+ hsw_crtc_supports_ips(crtc) &&
+ pipe_config->pipe_bpp <= 24 &&
+ (IS_HASWELL(dev) ||
+ ilk_pipe_pixel_rate(pipe_config) <=
+ 95 * intel_ddi_get_cdclk_freq(dev_priv) / 100);
}
static int intel_crtc_compute_config(struct intel_crtc *crtc,
diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
index a505bf3..a75c123 100644
--- a/drivers/gpu/drm/i915/intel_drv.h
+++ b/drivers/gpu/drm/i915/intel_drv.h
@@ -1093,6 +1093,7 @@ void intel_runtime_pm_put(struct drm_i915_private *dev_priv);
void intel_init_runtime_pm(struct drm_i915_private *dev_priv);
void intel_fini_runtime_pm(struct drm_i915_private *dev_priv);
void ilk_wm_get_hw_state(struct drm_device *dev);
+uint32_t ilk_pipe_pixel_rate(const struct intel_crtc_config *pipe_config);
/* intel_sdvo.c */
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index 45f71e6..b0cbfd2 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -1836,23 +1836,21 @@ static void i845_update_wm(struct drm_crtc *unused_crtc)
I915_WRITE(FW_BLC, fwater_lo);
}
-static uint32_t ilk_pipe_pixel_rate(struct drm_device *dev,
- struct drm_crtc *crtc)
+uint32_t ilk_pipe_pixel_rate(const struct intel_crtc_config *pipe_config)
{
- struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
uint32_t pixel_rate;
- pixel_rate = intel_crtc->config.adjusted_mode.crtc_clock;
+ pixel_rate = pipe_config->adjusted_mode.crtc_clock;
/* We only use IF-ID interlacing. If we ever use PF-ID we'll need to
* adjust the pixel_rate here. */
- if (intel_crtc->config.pch_pfit.enabled) {
+ if (pipe_config->pch_pfit.enabled) {
uint64_t pipe_w, pipe_h, pfit_w, pfit_h;
- uint32_t pfit_size = intel_crtc->config.pch_pfit.size;
+ uint32_t pfit_size = pipe_config->pch_pfit.size;
- pipe_w = intel_crtc->config.pipe_src_w;
- pipe_h = intel_crtc->config.pipe_src_h;
+ pipe_w = pipe_config->pipe_src_w;
+ pipe_h = pipe_config->pipe_src_h;
pfit_w = (pfit_size >> 16) & 0xFFFF;
pfit_h = pfit_size & 0xFFFF;
if (pipe_w < pfit_w)
@@ -2371,7 +2369,7 @@ static void ilk_compute_wm_parameters(struct drm_crtc *crtc,
p->active = true;
p->pipe_htotal = intel_crtc->config.adjusted_mode.crtc_htotal;
- p->pixel_rate = ilk_pipe_pixel_rate(dev, crtc);
+ p->pixel_rate = ilk_pipe_pixel_rate(&intel_crtc->config);
p->pri.bytes_per_pixel = crtc->primary->fb->bits_per_pixel / 8;
p->cur.bytes_per_pixel = 4;
p->pri.horiz_pixels = intel_crtc->config.pipe_src_w;
--
1.8.5.5
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 12+ messages in thread
* Re: [PATCH] drm/i915: Don't enable IPS when pixel rate exceeds 95% of cdclk
2014-09-11 10:54 [PATCH] drm/i915: Don't enable IPS when pixel rate exceeds 95% of cdclk ville.syrjala
@ 2014-09-11 11:03 ` Chris Wilson
2014-09-12 14:01 ` [PATCH v2] " ville.syrjala
0 siblings, 1 reply; 12+ messages in thread
From: Chris Wilson @ 2014-09-11 11:03 UTC (permalink / raw)
To: ville.syrjala; +Cc: intel-gfx
On Thu, Sep 11, 2014 at 01:54:44PM +0300, ville.syrjala@linux.intel.com wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> Bspec says we shouldn't enable IPS on BDW when the pipe pixel rate
> exceeds 95% of the core display clock. Apparently this can cause
> underruns.
>
> There's no similar restriction listed for HSW, so leave that one alone
> for now.
>
> Tested-by: Timo Aaltonen <tjaalton@ubuntu.com>
> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=83497
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
> drivers/gpu/drm/i915/intel_display.c | 10 ++++++++--
> drivers/gpu/drm/i915/intel_drv.h | 1 +
> drivers/gpu/drm/i915/intel_pm.c | 16 +++++++---------
> 3 files changed, 16 insertions(+), 11 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> index 965eb3c..ca729e5 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -5244,9 +5244,15 @@ retry:
> static void hsw_compute_ips_config(struct intel_crtc *crtc,
> struct intel_crtc_config *pipe_config)
> {
> + struct drm_device *dev = crtc->base.dev;
> + struct drm_i915_private *dev_priv = dev->dev_private;
> +
> pipe_config->ips_enabled = i915.enable_ips &&
> - hsw_crtc_supports_ips(crtc) &&
> - pipe_config->pipe_bpp <= 24;
> + hsw_crtc_supports_ips(crtc) &&
> + pipe_config->pipe_bpp <= 24 &&
> + (IS_HASWELL(dev) ||
> + ilk_pipe_pixel_rate(pipe_config) <=
> + 95 * intel_ddi_get_cdclk_freq(dev_priv) / 100);
Could you wrap this up neatly with
pipe_config_supports_ips(dev_priv, pipe_config) ?
-Chris
--
Chris Wilson, Intel Open Source Technology Centre
^ permalink raw reply [flat|nested] 12+ messages in thread
* [PATCH v2] drm/i915: Don't enable IPS when pixel rate exceeds 95% of cdclk
2014-09-11 11:03 ` Chris Wilson
@ 2014-09-12 14:01 ` ville.syrjala
2014-09-12 15:42 ` Chris Wilson
0 siblings, 1 reply; 12+ messages in thread
From: ville.syrjala @ 2014-09-12 14:01 UTC (permalink / raw)
To: intel-gfx
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
Bspec says we shouldn't enable IPS on BDW when the pipe pixel rate
exceeds 95% of the core display clock. Apparently this can cause
underruns.
There's no similar restriction listed for HSW, so leave that one alone
for now.
v2: Add pipe_config_supports_ips() (Chris)
Tested-by: Timo Aaltonen <tjaalton@ubuntu.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=83497
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/intel_display.c | 21 +++++++++++++++++++--
drivers/gpu/drm/i915/intel_drv.h | 1 +
drivers/gpu/drm/i915/intel_pm.c | 16 +++++++---------
3 files changed, 27 insertions(+), 11 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 965eb3c..7809177 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -5241,12 +5241,29 @@ retry:
return setup_ok ? 0 : -EINVAL;
}
+static bool pipe_config_supports_ips(struct drm_i915_private *dev_priv,
+ struct intel_crtc_config *pipe_config)
+{
+ if (pipe_config->pipe_bpp > 24)
+ return false;
+
+ /* HSW can handle pixel rate up to cdclk? */
+ if (IS_HASWELL(dev_priv->dev))
+ return true;
+
+ return ilk_pipe_pixel_rate(pipe_config) <=
+ intel_ddi_get_cdclk_freq(dev_priv) * 95 / 100;
+}
+
static void hsw_compute_ips_config(struct intel_crtc *crtc,
struct intel_crtc_config *pipe_config)
{
+ struct drm_device *dev = crtc->base.dev;
+ struct drm_i915_private *dev_priv = dev->dev_private;
+
pipe_config->ips_enabled = i915.enable_ips &&
- hsw_crtc_supports_ips(crtc) &&
- pipe_config->pipe_bpp <= 24;
+ hsw_crtc_supports_ips(crtc) &&
+ pipe_config_supports_ips(dev_priv, pipe_config);
}
static int intel_crtc_compute_config(struct intel_crtc *crtc,
diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
index a505bf3..a75c123 100644
--- a/drivers/gpu/drm/i915/intel_drv.h
+++ b/drivers/gpu/drm/i915/intel_drv.h
@@ -1093,6 +1093,7 @@ void intel_runtime_pm_put(struct drm_i915_private *dev_priv);
void intel_init_runtime_pm(struct drm_i915_private *dev_priv);
void intel_fini_runtime_pm(struct drm_i915_private *dev_priv);
void ilk_wm_get_hw_state(struct drm_device *dev);
+uint32_t ilk_pipe_pixel_rate(const struct intel_crtc_config *pipe_config);
/* intel_sdvo.c */
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index 45f71e6..b0cbfd2 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -1836,23 +1836,21 @@ static void i845_update_wm(struct drm_crtc *unused_crtc)
I915_WRITE(FW_BLC, fwater_lo);
}
-static uint32_t ilk_pipe_pixel_rate(struct drm_device *dev,
- struct drm_crtc *crtc)
+uint32_t ilk_pipe_pixel_rate(const struct intel_crtc_config *pipe_config)
{
- struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
uint32_t pixel_rate;
- pixel_rate = intel_crtc->config.adjusted_mode.crtc_clock;
+ pixel_rate = pipe_config->adjusted_mode.crtc_clock;
/* We only use IF-ID interlacing. If we ever use PF-ID we'll need to
* adjust the pixel_rate here. */
- if (intel_crtc->config.pch_pfit.enabled) {
+ if (pipe_config->pch_pfit.enabled) {
uint64_t pipe_w, pipe_h, pfit_w, pfit_h;
- uint32_t pfit_size = intel_crtc->config.pch_pfit.size;
+ uint32_t pfit_size = pipe_config->pch_pfit.size;
- pipe_w = intel_crtc->config.pipe_src_w;
- pipe_h = intel_crtc->config.pipe_src_h;
+ pipe_w = pipe_config->pipe_src_w;
+ pipe_h = pipe_config->pipe_src_h;
pfit_w = (pfit_size >> 16) & 0xFFFF;
pfit_h = pfit_size & 0xFFFF;
if (pipe_w < pfit_w)
@@ -2371,7 +2369,7 @@ static void ilk_compute_wm_parameters(struct drm_crtc *crtc,
p->active = true;
p->pipe_htotal = intel_crtc->config.adjusted_mode.crtc_htotal;
- p->pixel_rate = ilk_pipe_pixel_rate(dev, crtc);
+ p->pixel_rate = ilk_pipe_pixel_rate(&intel_crtc->config);
p->pri.bytes_per_pixel = crtc->primary->fb->bits_per_pixel / 8;
p->cur.bytes_per_pixel = 4;
p->pri.horiz_pixels = intel_crtc->config.pipe_src_w;
--
1.8.5.5
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 12+ messages in thread
* Re: [PATCH v2] drm/i915: Don't enable IPS when pixel rate exceeds 95% of cdclk
2014-09-12 14:01 ` [PATCH v2] " ville.syrjala
@ 2014-09-12 15:42 ` Chris Wilson
2014-09-12 15:49 ` Ville Syrjälä
0 siblings, 1 reply; 12+ messages in thread
From: Chris Wilson @ 2014-09-12 15:42 UTC (permalink / raw)
To: ville.syrjala; +Cc: intel-gfx
On Fri, Sep 12, 2014 at 05:01:57PM +0300, ville.syrjala@linux.intel.com wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> Bspec says we shouldn't enable IPS on BDW when the pipe pixel rate
> exceeds 95% of the core display clock. Apparently this can cause
> underruns.
>
> There's no similar restriction listed for HSW, so leave that one alone
> for now.
>
> v2: Add pipe_config_supports_ips() (Chris)
>
> Tested-by: Timo Aaltonen <tjaalton@ubuntu.com>
> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=83497
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
> drivers/gpu/drm/i915/intel_display.c | 21 +++++++++++++++++++--
> drivers/gpu/drm/i915/intel_drv.h | 1 +
> drivers/gpu/drm/i915/intel_pm.c | 16 +++++++---------
> 3 files changed, 27 insertions(+), 11 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> index 965eb3c..7809177 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -5241,12 +5241,29 @@ retry:
> return setup_ok ? 0 : -EINVAL;
> }
>
> +static bool pipe_config_supports_ips(struct drm_i915_private *dev_priv,
> + struct intel_crtc_config *pipe_config)
> +{
> + if (pipe_config->pipe_bpp > 24)
> + return false;
> +
> + /* HSW can handle pixel rate up to cdclk? */
> + if (IS_HASWELL(dev_priv->dev))
This only needs IS_HASWELL(dev_priv)
> + return true;
> +
> + return ilk_pipe_pixel_rate(pipe_config) <=
> + intel_ddi_get_cdclk_freq(dev_priv) * 95 / 100;
Otherwise
Acked-by: Chris Wilson <chris@chris-wilson.co.uk>
-Chris
--
Chris Wilson, Intel Open Source Technology Centre
^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH v2] drm/i915: Don't enable IPS when pixel rate exceeds 95% of cdclk
2014-09-12 15:42 ` Chris Wilson
@ 2014-09-12 15:49 ` Ville Syrjälä
2014-09-15 7:22 ` Jani Nikula
0 siblings, 1 reply; 12+ messages in thread
From: Ville Syrjälä @ 2014-09-12 15:49 UTC (permalink / raw)
To: Chris Wilson, intel-gfx
On Fri, Sep 12, 2014 at 04:42:33PM +0100, Chris Wilson wrote:
> On Fri, Sep 12, 2014 at 05:01:57PM +0300, ville.syrjala@linux.intel.com wrote:
> > From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> >
> > Bspec says we shouldn't enable IPS on BDW when the pipe pixel rate
> > exceeds 95% of the core display clock. Apparently this can cause
> > underruns.
> >
> > There's no similar restriction listed for HSW, so leave that one alone
> > for now.
> >
> > v2: Add pipe_config_supports_ips() (Chris)
> >
> > Tested-by: Timo Aaltonen <tjaalton@ubuntu.com>
> > Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=83497
> > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > ---
> > drivers/gpu/drm/i915/intel_display.c | 21 +++++++++++++++++++--
> > drivers/gpu/drm/i915/intel_drv.h | 1 +
> > drivers/gpu/drm/i915/intel_pm.c | 16 +++++++---------
> > 3 files changed, 27 insertions(+), 11 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> > index 965eb3c..7809177 100644
> > --- a/drivers/gpu/drm/i915/intel_display.c
> > +++ b/drivers/gpu/drm/i915/intel_display.c
> > @@ -5241,12 +5241,29 @@ retry:
> > return setup_ok ? 0 : -EINVAL;
> > }
> >
> > +static bool pipe_config_supports_ips(struct drm_i915_private *dev_priv,
> > + struct intel_crtc_config *pipe_config)
> > +{
> > + if (pipe_config->pipe_bpp > 24)
> > + return false;
> > +
> > + /* HSW can handle pixel rate up to cdclk? */
> > + if (IS_HASWELL(dev_priv->dev))
>
> This only needs IS_HASWELL(dev_priv)
old habits...
>
> > + return true;
> > +
> > + return ilk_pipe_pixel_rate(pipe_config) <=
> > + intel_ddi_get_cdclk_freq(dev_priv) * 95 / 100;
>
> Otherwise
> Acked-by: Chris Wilson <chris@chris-wilson.co.uk>
> -Chris
>
> --
> Chris Wilson, Intel Open Source Technology Centre
--
Ville Syrjälä
Intel OTC
^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH v2] drm/i915: Don't enable IPS when pixel rate exceeds 95% of cdclk
2014-09-12 15:49 ` Ville Syrjälä
@ 2014-09-15 7:22 ` Jani Nikula
2014-09-17 14:05 ` Paulo Zanoni
0 siblings, 1 reply; 12+ messages in thread
From: Jani Nikula @ 2014-09-15 7:22 UTC (permalink / raw)
To: Ville Syrjälä, Chris Wilson, intel-gfx
On Fri, 12 Sep 2014, Ville Syrjälä <ville.syrjala@linux.intel.com> wrote:
> On Fri, Sep 12, 2014 at 04:42:33PM +0100, Chris Wilson wrote:
>> On Fri, Sep 12, 2014 at 05:01:57PM +0300, ville.syrjala@linux.intel.com wrote:
>> > From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>> >
>> > Bspec says we shouldn't enable IPS on BDW when the pipe pixel rate
>> > exceeds 95% of the core display clock. Apparently this can cause
>> > underruns.
>> >
>> > There's no similar restriction listed for HSW, so leave that one alone
>> > for now.
>> >
>> > v2: Add pipe_config_supports_ips() (Chris)
>> >
>> > Tested-by: Timo Aaltonen <tjaalton@ubuntu.com>
>> > Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=83497
>> > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
>> > ---
>> > drivers/gpu/drm/i915/intel_display.c | 21 +++++++++++++++++++--
>> > drivers/gpu/drm/i915/intel_drv.h | 1 +
>> > drivers/gpu/drm/i915/intel_pm.c | 16 +++++++---------
>> > 3 files changed, 27 insertions(+), 11 deletions(-)
>> >
>> > diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
>> > index 965eb3c..7809177 100644
>> > --- a/drivers/gpu/drm/i915/intel_display.c
>> > +++ b/drivers/gpu/drm/i915/intel_display.c
>> > @@ -5241,12 +5241,29 @@ retry:
>> > return setup_ok ? 0 : -EINVAL;
>> > }
>> >
>> > +static bool pipe_config_supports_ips(struct drm_i915_private *dev_priv,
>> > + struct intel_crtc_config *pipe_config)
>> > +{
>> > + if (pipe_config->pipe_bpp > 24)
>> > + return false;
>> > +
>> > + /* HSW can handle pixel rate up to cdclk? */
>> > + if (IS_HASWELL(dev_priv->dev))
>>
>> This only needs IS_HASWELL(dev_priv)
>
> old habits...
Thanks to your old habits I didn't have to make any changes when pushing
this to drm-intel-fixes which is still old habit land. Thanks for the
patch and review.
BR,
Jani.
>
>>
>> > + return true;
>> > +
>> > + return ilk_pipe_pixel_rate(pipe_config) <=
>> > + intel_ddi_get_cdclk_freq(dev_priv) * 95 / 100;
>>
>> Otherwise
>> Acked-by: Chris Wilson <chris@chris-wilson.co.uk>
>> -Chris
>>
>> --
>> Chris Wilson, Intel Open Source Technology Centre
>
> --
> Ville Syrjälä
> Intel OTC
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx
--
Jani Nikula, Intel Open Source Technology Center
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH v2] drm/i915: Don't enable IPS when pixel rate exceeds 95% of cdclk
2014-09-15 7:22 ` Jani Nikula
@ 2014-09-17 14:05 ` Paulo Zanoni
2014-09-17 14:10 ` Paulo Zanoni
0 siblings, 1 reply; 12+ messages in thread
From: Paulo Zanoni @ 2014-09-17 14:05 UTC (permalink / raw)
To: Jani Nikula; +Cc: Intel Graphics Development
2014-09-15 4:22 GMT-03:00 Jani Nikula <jani.nikula@linux.intel.com>:
> On Fri, 12 Sep 2014, Ville Syrjälä <ville.syrjala@linux.intel.com> wrote:
>> On Fri, Sep 12, 2014 at 04:42:33PM +0100, Chris Wilson wrote:
>>> On Fri, Sep 12, 2014 at 05:01:57PM +0300, ville.syrjala@linux.intel.com wrote:
>>> > From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>>> >
>>> > Bspec says we shouldn't enable IPS on BDW when the pipe pixel rate
>>> > exceeds 95% of the core display clock. Apparently this can cause
>>> > underruns.
>>> >
>>> > There's no similar restriction listed for HSW, so leave that one alone
>>> > for now.
>>> >
>>> > v2: Add pipe_config_supports_ips() (Chris)
>>> >
>>> > Tested-by: Timo Aaltonen <tjaalton@ubuntu.com>
>>> > Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=83497
>>> > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
>>> > ---
>>> > drivers/gpu/drm/i915/intel_display.c | 21 +++++++++++++++++++--
>>> > drivers/gpu/drm/i915/intel_drv.h | 1 +
>>> > drivers/gpu/drm/i915/intel_pm.c | 16 +++++++---------
>>> > 3 files changed, 27 insertions(+), 11 deletions(-)
>>> >
>>> > diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
>>> > index 965eb3c..7809177 100644
>>> > --- a/drivers/gpu/drm/i915/intel_display.c
>>> > +++ b/drivers/gpu/drm/i915/intel_display.c
>>> > @@ -5241,12 +5241,29 @@ retry:
>>> > return setup_ok ? 0 : -EINVAL;
>>> > }
>>> >
>>> > +static bool pipe_config_supports_ips(struct drm_i915_private *dev_priv,
>>> > + struct intel_crtc_config *pipe_config)
>>> > +{
>>> > + if (pipe_config->pipe_bpp > 24)
>>> > + return false;
>>> > +
>>> > + /* HSW can handle pixel rate up to cdclk? */
>>> > + if (IS_HASWELL(dev_priv->dev))
>>>
>>> This only needs IS_HASWELL(dev_priv)
>>
>> old habits...
>
> Thanks to your old habits I didn't have to make any changes when pushing
> this to drm-intel-fixes which is still old habit land. Thanks for the
> patch and review.
This patches causes a regression on igt/pm_rpm/rte:
[ 44.871662] [drm:intel_dp_compute_config] DP link bw required
650358 available 1728000
[ 44.871666] ------------[ cut here ]------------
[ 44.871691] WARNING: CPU: 0 PID: 1745 at
drivers/gpu/drm/i915/intel_uncore.c:47
assert_device_not_suspended.isra.8+0x43/0x50 [i915]()
[ 44.871692] Device suspended
[ 44.871694] Modules linked in: hid_multitouch hid_sensor_hub
snd_hda_codec_hdmi intel_rapl x86_pkg_temp_thermal intel_powerclamp
efivars snd_hda_intel btusb snd_hda_controller snd_hda_codec snd_hwdep
iwlmvm snd_pcm_oss snd_mixer_oss iwlwifi mei_me mei snd_pcm snd_timer
int3403_thermal i2c_designware_platform i2c_designware_core acpi_pad
fuse nls_utf8 nls_cp437 vfat fat i915 sdhci_pci drm_kms_helper e1000e
drm sdhci_acpi sdhci
[ 44.871726] CPU: 0 PID: 1745 Comm: pm_rpm Not tainted
3.17.0-rc5.1409171019pz+ #1120
[ 44.871728] Hardware name: Intel Corporation Broadwell Client
platform/Wilson Beach SDS, BIOS BDW-E2R1.86C.0072.R03.1405072127
05/07/2014
[ 44.871730] 0000000000000009 ffff8800aa763a90 ffffffff816ec803
ffff8800aa763ad8
[ 44.871735] ffff8800aa763ac8 ffffffff8107a0c8 ffff88023ec20068
0000000000130040
[ 44.871739] ffff88023f12b3d8 0000000000130040 ffff88023ec20000
ffff8800aa763b28
[ 44.871743] Call Trace:
[ 44.871749] [<ffffffff816ec803>] dump_stack+0x4d/0x66
[ 44.871754] [<ffffffff8107a0c8>] warn_slowpath_common+0x78/0xa0
[ 44.871758] [<ffffffff8107a137>] warn_slowpath_fmt+0x47/0x50
[ 44.871783] [<ffffffffa015a1f4>] ?
intel_dp_compute_config+0x274/0x600 [i915]
[ 44.871803] [<ffffffffa0122cf3>]
assert_device_not_suspended.isra.8+0x43/0x50 [i915]
[ 44.871822] [<ffffffffa0125a20>] gen6_read32+0x30/0x150 [i915]
[ 44.871844] [<ffffffffa0154636>] intel_ddi_get_cdclk_freq+0xd6/0x140 [i915]
[ 44.871865] [<ffffffffa0139a92>] __intel_set_mode+0x1672/0x1750 [i915]
[ 44.871886] [<ffffffffa01418e1>] intel_set_mode+0x11/0x30 [i915]
[ 44.871906] [<ffffffffa01429ed>] intel_crtc_set_config+0xa9d/0xeb0 [i915]
[ 44.871923] [<ffffffffa0026283>]
drm_mode_set_config_internal+0x63/0x100 [drm]
[ 44.871938] [<ffffffffa002a7e3>] drm_mode_setcrtc+0x283/0x580 [drm]
[ 44.871948] [<ffffffffa001c81f>] drm_ioctl+0x1df/0x6a0 [drm]
[ 44.871954] [<ffffffff811e07b0>] do_vfs_ioctl+0x2e0/0x4e0
[ 44.871957] [<ffffffff816f6af7>] ? sysret_check+0x1b/0x56
[ 44.871962] [<ffffffff810bfb0d>] ? trace_hardirqs_on_caller+0x15d/0x200
[ 44.871966] [<ffffffff811e0a31>] SyS_ioctl+0x81/0xa0
[ 44.871969] [<ffffffff816f6ad2>] system_call_fastpath+0x16/0x1b
[ 44.871972] ---[ end trace 91bf8920a2c6b824 ]---
[ 44.871975] ------------[ cut here ]------------
[ 44.871994] WARNING: CPU: 0 PID: 1745 at
drivers/gpu/drm/i915/intel_uncore.c:528
hsw_unclaimed_reg_debug+0x6d/0x80 [i915]()
[ 44.871996] Unclaimed register detected before reading register 0x130040
[ 44.871997] Modules linked in: hid_multitouch hid_sensor_hub
snd_hda_codec_hdmi intel_rapl x86_pkg_temp_thermal intel_powerclamp
efivars snd_hda_intel btusb snd_hda_controller snd_hda_codec snd_hwdep
iwlmvm snd_pcm_oss snd_mixer_oss iwlwifi mei_me mei snd_pcm snd_timer
int3403_thermal i2c_designware_platform i2c_designware_core acpi_pad
fuse nls_utf8 nls_cp437 vfat fat i915 sdhci_pci drm_kms_helper e1000e
drm sdhci_acpi sdhci
[ 44.872025] CPU: 0 PID: 1745 Comm: pm_rpm Tainted: G W
3.17.0-rc5.1409171019pz+ #1120
[ 44.872026] Hardware name: Intel Corporation Broadwell Client
platform/Wilson Beach SDS, BIOS BDW-E2R1.86C.0072.R03.1405072127
05/07/2014
[ 44.872028] 0000000000000009 ffff8800aa763a88 ffffffff816ec803
ffff8800aa763ad0
[ 44.872032] ffff8800aa763ac0 ffffffff8107a0c8 ffff88023ec20000
0000000000130040
[ 44.872035] ffff88023f12b3d8 0000000000130040 ffff88023ec20000
ffff8800aa763b20
[ 44.872039] Call Trace:
[ 44.872042] [<ffffffff816ec803>] dump_stack+0x4d/0x66
[ 44.872046] [<ffffffff8107a0c8>] warn_slowpath_common+0x78/0xa0
[ 44.872049] [<ffffffff8107a137>] warn_slowpath_fmt+0x47/0x50
[ 44.872068] [<ffffffffa0122bbd>] hsw_unclaimed_reg_debug+0x6d/0x80 [i915]
[ 44.872087] [<ffffffffa0125a41>] gen6_read32+0x51/0x150 [i915]
[ 44.872109] [<ffffffffa0154636>] intel_ddi_get_cdclk_freq+0xd6/0x140 [i915]
[ 44.872129] [<ffffffffa0139a92>] __intel_set_mode+0x1672/0x1750 [i915]
[ 44.872149] [<ffffffffa01418e1>] intel_set_mode+0x11/0x30 [i915]
[ 44.872168] [<ffffffffa01429ed>] intel_crtc_set_config+0xa9d/0xeb0 [i915]
[ 44.872182] [<ffffffffa0026283>]
drm_mode_set_config_internal+0x63/0x100 [drm]
[ 44.872196] [<ffffffffa002a7e3>] drm_mode_setcrtc+0x283/0x580 [drm]
[ 44.872205] [<ffffffffa001c81f>] drm_ioctl+0x1df/0x6a0 [drm]
[ 44.872210] [<ffffffff811e07b0>] do_vfs_ioctl+0x2e0/0x4e0
[ 44.872213] [<ffffffff816f6af7>] ? sysret_check+0x1b/0x56
[ 44.872218] [<ffffffff810bfb0d>] ? trace_hardirqs_on_caller+0x15d/0x200
[ 44.872221] [<ffffffff811e0a31>] SyS_ioctl+0x81/0xa0
[ 44.872224] [<ffffffff816f6ad2>] system_call_fastpath+0x16/0x1b
[ 44.872226] ---[ end trace 91bf8920a2c6b825 ]---
[ 44.872228] ------------[ cut here ]------------
[ 44.872246] WARNING: CPU: 0 PID: 1745 at
drivers/gpu/drm/i915/intel_uncore.c:528
hsw_unclaimed_reg_debug+0x6d/0x80 [i915]()
[ 44.872248] Unclaimed register detected after reading register 0x130040
[ 44.872249] Modules linked in: hid_multitouch hid_sensor_hub
snd_hda_codec_hdmi intel_rapl x86_pkg_temp_thermal intel_powerclamp
efivars snd_hda_intel btusb snd_hda_controller snd_hda_codec snd_hwdep
iwlmvm snd_pcm_oss snd_mixer_oss iwlwifi mei_me mei snd_pcm snd_timer
int3403_thermal i2c_designware_platform i2c_designware_core acpi_pad
fuse nls_utf8 nls_cp437 vfat fat i915 sdhci_pci drm_kms_helper e1000e
drm sdhci_acpi sdhci
[ 44.872276] CPU: 0 PID: 1745 Comm: pm_rpm Tainted: G W
3.17.0-rc5.1409171019pz+ #1120
[ 44.872277] Hardware name: Intel Corporation Broadwell Client
platform/Wilson Beach SDS, BIOS BDW-E2R1.86C.0072.R03.1405072127
05/07/2014
[ 44.872279] 0000000000000009 ffff8800aa763a88 ffffffff816ec803
ffff8800aa763ad0
[ 44.872282] ffff8800aa763ac0 ffffffff8107a0c8 ffff88023ec20000
0000000000130040
[ 44.872286] 00000000ffffffff 0000000000130040 ffff88023ec20000
ffff8800aa763b20
[ 44.872289] Call Trace:
[ 44.872293] [<ffffffff816ec803>] dump_stack+0x4d/0x66
[ 44.872296] [<ffffffff8107a0c8>] warn_slowpath_common+0x78/0xa0
[ 44.872299] [<ffffffff8107a137>] warn_slowpath_fmt+0x47/0x50
[ 44.872318] [<ffffffffa0122bbd>] hsw_unclaimed_reg_debug+0x6d/0x80 [i915]
[ 44.872335] [<ffffffffa0125a7e>] gen6_read32+0x8e/0x150 [i915]
[ 44.872356] [<ffffffffa0154636>] intel_ddi_get_cdclk_freq+0xd6/0x140 [i915]
[ 44.872376] [<ffffffffa0139a92>] __intel_set_mode+0x1672/0x1750 [i915]
[ 44.872396] [<ffffffffa01418e1>] intel_set_mode+0x11/0x30 [i915]
[ 44.872416] [<ffffffffa01429ed>] intel_crtc_set_config+0xa9d/0xeb0 [i915]
[ 44.872429] [<ffffffffa0026283>]
drm_mode_set_config_internal+0x63/0x100 [drm]
[ 44.872443] [<ffffffffa002a7e3>] drm_mode_setcrtc+0x283/0x580 [drm]
[ 44.872453] [<ffffffffa001c81f>] drm_ioctl+0x1df/0x6a0 [drm]
[ 44.872458] [<ffffffff811e07b0>] do_vfs_ioctl+0x2e0/0x4e0
[ 44.872461] [<ffffffff816f6af7>] ? sysret_check+0x1b/0x56
[ 44.872465] [<ffffffff810bfb0d>] ? trace_hardirqs_on_caller+0x15d/0x200
[ 44.872468] [<ffffffff811e0a31>] SyS_ioctl+0x81/0xa0
[ 44.872471] [<ffffffff816f6ad2>] system_call_fastpath+0x16/0x1b
[ 44.872473] ---[ end trace 91bf8920a2c6b826 ]---
[ 44.872512] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe
bpp: 18, dithering: 1
>
> BR,
> Jani.
>
>
>>
>>>
>>> > + return true;
>>> > +
>>> > + return ilk_pipe_pixel_rate(pipe_config) <=
>>> > + intel_ddi_get_cdclk_freq(dev_priv) * 95 / 100;
>>>
>>> Otherwise
>>> Acked-by: Chris Wilson <chris@chris-wilson.co.uk>
>>> -Chris
>>>
>>> --
>>> Chris Wilson, Intel Open Source Technology Centre
>>
>> --
>> Ville Syrjälä
>> Intel OTC
>> _______________________________________________
>> Intel-gfx mailing list
>> Intel-gfx@lists.freedesktop.org
>> http://lists.freedesktop.org/mailman/listinfo/intel-gfx
>
> --
> Jani Nikula, Intel Open Source Technology Center
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx
--
Paulo Zanoni
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH v2] drm/i915: Don't enable IPS when pixel rate exceeds 95% of cdclk
2014-09-17 14:05 ` Paulo Zanoni
@ 2014-09-17 14:10 ` Paulo Zanoni
2014-09-17 14:43 ` Ville Syrjälä
0 siblings, 1 reply; 12+ messages in thread
From: Paulo Zanoni @ 2014-09-17 14:10 UTC (permalink / raw)
To: Jani Nikula; +Cc: Intel Graphics Development
2014-09-17 11:05 GMT-03:00 Paulo Zanoni <przanoni@gmail.com>:
> 2014-09-15 4:22 GMT-03:00 Jani Nikula <jani.nikula@linux.intel.com>:
>> On Fri, 12 Sep 2014, Ville Syrjälä <ville.syrjala@linux.intel.com> wrote:
>>> On Fri, Sep 12, 2014 at 04:42:33PM +0100, Chris Wilson wrote:
>>>> On Fri, Sep 12, 2014 at 05:01:57PM +0300, ville.syrjala@linux.intel.com wrote:
>>>> > From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>>>> >
>>>> > Bspec says we shouldn't enable IPS on BDW when the pipe pixel rate
>>>> > exceeds 95% of the core display clock. Apparently this can cause
>>>> > underruns.
>>>> >
>>>> > There's no similar restriction listed for HSW, so leave that one alone
>>>> > for now.
>>>> >
>>>> > v2: Add pipe_config_supports_ips() (Chris)
>>>> >
>>>> > Tested-by: Timo Aaltonen <tjaalton@ubuntu.com>
>>>> > Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=83497
>>>> > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
>>>> > ---
>>>> > drivers/gpu/drm/i915/intel_display.c | 21 +++++++++++++++++++--
>>>> > drivers/gpu/drm/i915/intel_drv.h | 1 +
>>>> > drivers/gpu/drm/i915/intel_pm.c | 16 +++++++---------
>>>> > 3 files changed, 27 insertions(+), 11 deletions(-)
>>>> >
>>>> > diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
>>>> > index 965eb3c..7809177 100644
>>>> > --- a/drivers/gpu/drm/i915/intel_display.c
>>>> > +++ b/drivers/gpu/drm/i915/intel_display.c
>>>> > @@ -5241,12 +5241,29 @@ retry:
>>>> > return setup_ok ? 0 : -EINVAL;
>>>> > }
>>>> >
>>>> > +static bool pipe_config_supports_ips(struct drm_i915_private *dev_priv,
>>>> > + struct intel_crtc_config *pipe_config)
>>>> > +{
>>>> > + if (pipe_config->pipe_bpp > 24)
>>>> > + return false;
>>>> > +
>>>> > + /* HSW can handle pixel rate up to cdclk? */
>>>> > + if (IS_HASWELL(dev_priv->dev))
>>>>
>>>> This only needs IS_HASWELL(dev_priv)
>>>
>>> old habits...
>>
>> Thanks to your old habits I didn't have to make any changes when pushing
>> this to drm-intel-fixes which is still old habit land. Thanks for the
>> patch and review.
And another detail: even if the register read worked, we'd have
printed a bad value since the cdclock is disabled at the moment we run
the function, so we'd return the FCLK frequency. So maybe we need to
cache the value of the "cdclk under normal display operation" and
reuse it here.
>
> This patches causes a regression on igt/pm_rpm/rte:
>
> [ 44.871662] [drm:intel_dp_compute_config] DP link bw required
> 650358 available 1728000
> [ 44.871666] ------------[ cut here ]------------
> [ 44.871691] WARNING: CPU: 0 PID: 1745 at
> drivers/gpu/drm/i915/intel_uncore.c:47
> assert_device_not_suspended.isra.8+0x43/0x50 [i915]()
> [ 44.871692] Device suspended
> [ 44.871694] Modules linked in: hid_multitouch hid_sensor_hub
> snd_hda_codec_hdmi intel_rapl x86_pkg_temp_thermal intel_powerclamp
> efivars snd_hda_intel btusb snd_hda_controller snd_hda_codec snd_hwdep
> iwlmvm snd_pcm_oss snd_mixer_oss iwlwifi mei_me mei snd_pcm snd_timer
> int3403_thermal i2c_designware_platform i2c_designware_core acpi_pad
> fuse nls_utf8 nls_cp437 vfat fat i915 sdhci_pci drm_kms_helper e1000e
> drm sdhci_acpi sdhci
> [ 44.871726] CPU: 0 PID: 1745 Comm: pm_rpm Not tainted
> 3.17.0-rc5.1409171019pz+ #1120
> [ 44.871728] Hardware name: Intel Corporation Broadwell Client
> platform/Wilson Beach SDS, BIOS BDW-E2R1.86C.0072.R03.1405072127
> 05/07/2014
> [ 44.871730] 0000000000000009 ffff8800aa763a90 ffffffff816ec803
> ffff8800aa763ad8
> [ 44.871735] ffff8800aa763ac8 ffffffff8107a0c8 ffff88023ec20068
> 0000000000130040
> [ 44.871739] ffff88023f12b3d8 0000000000130040 ffff88023ec20000
> ffff8800aa763b28
> [ 44.871743] Call Trace:
> [ 44.871749] [<ffffffff816ec803>] dump_stack+0x4d/0x66
> [ 44.871754] [<ffffffff8107a0c8>] warn_slowpath_common+0x78/0xa0
> [ 44.871758] [<ffffffff8107a137>] warn_slowpath_fmt+0x47/0x50
> [ 44.871783] [<ffffffffa015a1f4>] ?
> intel_dp_compute_config+0x274/0x600 [i915]
> [ 44.871803] [<ffffffffa0122cf3>]
> assert_device_not_suspended.isra.8+0x43/0x50 [i915]
> [ 44.871822] [<ffffffffa0125a20>] gen6_read32+0x30/0x150 [i915]
> [ 44.871844] [<ffffffffa0154636>] intel_ddi_get_cdclk_freq+0xd6/0x140 [i915]
> [ 44.871865] [<ffffffffa0139a92>] __intel_set_mode+0x1672/0x1750 [i915]
> [ 44.871886] [<ffffffffa01418e1>] intel_set_mode+0x11/0x30 [i915]
> [ 44.871906] [<ffffffffa01429ed>] intel_crtc_set_config+0xa9d/0xeb0 [i915]
> [ 44.871923] [<ffffffffa0026283>]
> drm_mode_set_config_internal+0x63/0x100 [drm]
> [ 44.871938] [<ffffffffa002a7e3>] drm_mode_setcrtc+0x283/0x580 [drm]
> [ 44.871948] [<ffffffffa001c81f>] drm_ioctl+0x1df/0x6a0 [drm]
> [ 44.871954] [<ffffffff811e07b0>] do_vfs_ioctl+0x2e0/0x4e0
> [ 44.871957] [<ffffffff816f6af7>] ? sysret_check+0x1b/0x56
> [ 44.871962] [<ffffffff810bfb0d>] ? trace_hardirqs_on_caller+0x15d/0x200
> [ 44.871966] [<ffffffff811e0a31>] SyS_ioctl+0x81/0xa0
> [ 44.871969] [<ffffffff816f6ad2>] system_call_fastpath+0x16/0x1b
> [ 44.871972] ---[ end trace 91bf8920a2c6b824 ]---
> [ 44.871975] ------------[ cut here ]------------
> [ 44.871994] WARNING: CPU: 0 PID: 1745 at
> drivers/gpu/drm/i915/intel_uncore.c:528
> hsw_unclaimed_reg_debug+0x6d/0x80 [i915]()
> [ 44.871996] Unclaimed register detected before reading register 0x130040
> [ 44.871997] Modules linked in: hid_multitouch hid_sensor_hub
> snd_hda_codec_hdmi intel_rapl x86_pkg_temp_thermal intel_powerclamp
> efivars snd_hda_intel btusb snd_hda_controller snd_hda_codec snd_hwdep
> iwlmvm snd_pcm_oss snd_mixer_oss iwlwifi mei_me mei snd_pcm snd_timer
> int3403_thermal i2c_designware_platform i2c_designware_core acpi_pad
> fuse nls_utf8 nls_cp437 vfat fat i915 sdhci_pci drm_kms_helper e1000e
> drm sdhci_acpi sdhci
> [ 44.872025] CPU: 0 PID: 1745 Comm: pm_rpm Tainted: G W
> 3.17.0-rc5.1409171019pz+ #1120
> [ 44.872026] Hardware name: Intel Corporation Broadwell Client
> platform/Wilson Beach SDS, BIOS BDW-E2R1.86C.0072.R03.1405072127
> 05/07/2014
> [ 44.872028] 0000000000000009 ffff8800aa763a88 ffffffff816ec803
> ffff8800aa763ad0
> [ 44.872032] ffff8800aa763ac0 ffffffff8107a0c8 ffff88023ec20000
> 0000000000130040
> [ 44.872035] ffff88023f12b3d8 0000000000130040 ffff88023ec20000
> ffff8800aa763b20
> [ 44.872039] Call Trace:
> [ 44.872042] [<ffffffff816ec803>] dump_stack+0x4d/0x66
> [ 44.872046] [<ffffffff8107a0c8>] warn_slowpath_common+0x78/0xa0
> [ 44.872049] [<ffffffff8107a137>] warn_slowpath_fmt+0x47/0x50
> [ 44.872068] [<ffffffffa0122bbd>] hsw_unclaimed_reg_debug+0x6d/0x80 [i915]
> [ 44.872087] [<ffffffffa0125a41>] gen6_read32+0x51/0x150 [i915]
> [ 44.872109] [<ffffffffa0154636>] intel_ddi_get_cdclk_freq+0xd6/0x140 [i915]
> [ 44.872129] [<ffffffffa0139a92>] __intel_set_mode+0x1672/0x1750 [i915]
> [ 44.872149] [<ffffffffa01418e1>] intel_set_mode+0x11/0x30 [i915]
> [ 44.872168] [<ffffffffa01429ed>] intel_crtc_set_config+0xa9d/0xeb0 [i915]
> [ 44.872182] [<ffffffffa0026283>]
> drm_mode_set_config_internal+0x63/0x100 [drm]
> [ 44.872196] [<ffffffffa002a7e3>] drm_mode_setcrtc+0x283/0x580 [drm]
> [ 44.872205] [<ffffffffa001c81f>] drm_ioctl+0x1df/0x6a0 [drm]
> [ 44.872210] [<ffffffff811e07b0>] do_vfs_ioctl+0x2e0/0x4e0
> [ 44.872213] [<ffffffff816f6af7>] ? sysret_check+0x1b/0x56
> [ 44.872218] [<ffffffff810bfb0d>] ? trace_hardirqs_on_caller+0x15d/0x200
> [ 44.872221] [<ffffffff811e0a31>] SyS_ioctl+0x81/0xa0
> [ 44.872224] [<ffffffff816f6ad2>] system_call_fastpath+0x16/0x1b
> [ 44.872226] ---[ end trace 91bf8920a2c6b825 ]---
> [ 44.872228] ------------[ cut here ]------------
> [ 44.872246] WARNING: CPU: 0 PID: 1745 at
> drivers/gpu/drm/i915/intel_uncore.c:528
> hsw_unclaimed_reg_debug+0x6d/0x80 [i915]()
> [ 44.872248] Unclaimed register detected after reading register 0x130040
> [ 44.872249] Modules linked in: hid_multitouch hid_sensor_hub
> snd_hda_codec_hdmi intel_rapl x86_pkg_temp_thermal intel_powerclamp
> efivars snd_hda_intel btusb snd_hda_controller snd_hda_codec snd_hwdep
> iwlmvm snd_pcm_oss snd_mixer_oss iwlwifi mei_me mei snd_pcm snd_timer
> int3403_thermal i2c_designware_platform i2c_designware_core acpi_pad
> fuse nls_utf8 nls_cp437 vfat fat i915 sdhci_pci drm_kms_helper e1000e
> drm sdhci_acpi sdhci
> [ 44.872276] CPU: 0 PID: 1745 Comm: pm_rpm Tainted: G W
> 3.17.0-rc5.1409171019pz+ #1120
> [ 44.872277] Hardware name: Intel Corporation Broadwell Client
> platform/Wilson Beach SDS, BIOS BDW-E2R1.86C.0072.R03.1405072127
> 05/07/2014
> [ 44.872279] 0000000000000009 ffff8800aa763a88 ffffffff816ec803
> ffff8800aa763ad0
> [ 44.872282] ffff8800aa763ac0 ffffffff8107a0c8 ffff88023ec20000
> 0000000000130040
> [ 44.872286] 00000000ffffffff 0000000000130040 ffff88023ec20000
> ffff8800aa763b20
> [ 44.872289] Call Trace:
> [ 44.872293] [<ffffffff816ec803>] dump_stack+0x4d/0x66
> [ 44.872296] [<ffffffff8107a0c8>] warn_slowpath_common+0x78/0xa0
> [ 44.872299] [<ffffffff8107a137>] warn_slowpath_fmt+0x47/0x50
> [ 44.872318] [<ffffffffa0122bbd>] hsw_unclaimed_reg_debug+0x6d/0x80 [i915]
> [ 44.872335] [<ffffffffa0125a7e>] gen6_read32+0x8e/0x150 [i915]
> [ 44.872356] [<ffffffffa0154636>] intel_ddi_get_cdclk_freq+0xd6/0x140 [i915]
> [ 44.872376] [<ffffffffa0139a92>] __intel_set_mode+0x1672/0x1750 [i915]
> [ 44.872396] [<ffffffffa01418e1>] intel_set_mode+0x11/0x30 [i915]
> [ 44.872416] [<ffffffffa01429ed>] intel_crtc_set_config+0xa9d/0xeb0 [i915]
> [ 44.872429] [<ffffffffa0026283>]
> drm_mode_set_config_internal+0x63/0x100 [drm]
> [ 44.872443] [<ffffffffa002a7e3>] drm_mode_setcrtc+0x283/0x580 [drm]
> [ 44.872453] [<ffffffffa001c81f>] drm_ioctl+0x1df/0x6a0 [drm]
> [ 44.872458] [<ffffffff811e07b0>] do_vfs_ioctl+0x2e0/0x4e0
> [ 44.872461] [<ffffffff816f6af7>] ? sysret_check+0x1b/0x56
> [ 44.872465] [<ffffffff810bfb0d>] ? trace_hardirqs_on_caller+0x15d/0x200
> [ 44.872468] [<ffffffff811e0a31>] SyS_ioctl+0x81/0xa0
> [ 44.872471] [<ffffffff816f6ad2>] system_call_fastpath+0x16/0x1b
> [ 44.872473] ---[ end trace 91bf8920a2c6b826 ]---
> [ 44.872512] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe
> bpp: 18, dithering: 1
>
>>
>> BR,
>> Jani.
>>
>>
>>>
>>>>
>>>> > + return true;
>>>> > +
>>>> > + return ilk_pipe_pixel_rate(pipe_config) <=
>>>> > + intel_ddi_get_cdclk_freq(dev_priv) * 95 / 100;
>>>>
>>>> Otherwise
>>>> Acked-by: Chris Wilson <chris@chris-wilson.co.uk>
>>>> -Chris
>>>>
>>>> --
>>>> Chris Wilson, Intel Open Source Technology Centre
>>>
>>> --
>>> Ville Syrjälä
>>> Intel OTC
>>> _______________________________________________
>>> Intel-gfx mailing list
>>> Intel-gfx@lists.freedesktop.org
>>> http://lists.freedesktop.org/mailman/listinfo/intel-gfx
>>
>> --
>> Jani Nikula, Intel Open Source Technology Center
>> _______________________________________________
>> Intel-gfx mailing list
>> Intel-gfx@lists.freedesktop.org
>> http://lists.freedesktop.org/mailman/listinfo/intel-gfx
>
>
>
> --
> Paulo Zanoni
--
Paulo Zanoni
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH v2] drm/i915: Don't enable IPS when pixel rate exceeds 95% of cdclk
2014-09-17 14:10 ` Paulo Zanoni
@ 2014-09-17 14:43 ` Ville Syrjälä
2014-09-18 11:56 ` Jani Nikula
0 siblings, 1 reply; 12+ messages in thread
From: Ville Syrjälä @ 2014-09-17 14:43 UTC (permalink / raw)
To: Paulo Zanoni; +Cc: Intel Graphics Development
On Wed, Sep 17, 2014 at 11:10:48AM -0300, Paulo Zanoni wrote:
> 2014-09-17 11:05 GMT-03:00 Paulo Zanoni <przanoni@gmail.com>:
> > 2014-09-15 4:22 GMT-03:00 Jani Nikula <jani.nikula@linux.intel.com>:
> >> On Fri, 12 Sep 2014, Ville Syrjälä <ville.syrjala@linux.intel.com> wrote:
> >>> On Fri, Sep 12, 2014 at 04:42:33PM +0100, Chris Wilson wrote:
> >>>> On Fri, Sep 12, 2014 at 05:01:57PM +0300, ville.syrjala@linux.intel.com wrote:
> >>>> > From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> >>>> >
> >>>> > Bspec says we shouldn't enable IPS on BDW when the pipe pixel rate
> >>>> > exceeds 95% of the core display clock. Apparently this can cause
> >>>> > underruns.
> >>>> >
> >>>> > There's no similar restriction listed for HSW, so leave that one alone
> >>>> > for now.
> >>>> >
> >>>> > v2: Add pipe_config_supports_ips() (Chris)
> >>>> >
> >>>> > Tested-by: Timo Aaltonen <tjaalton@ubuntu.com>
> >>>> > Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=83497
> >>>> > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> >>>> > ---
> >>>> > drivers/gpu/drm/i915/intel_display.c | 21 +++++++++++++++++++--
> >>>> > drivers/gpu/drm/i915/intel_drv.h | 1 +
> >>>> > drivers/gpu/drm/i915/intel_pm.c | 16 +++++++---------
> >>>> > 3 files changed, 27 insertions(+), 11 deletions(-)
> >>>> >
> >>>> > diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> >>>> > index 965eb3c..7809177 100644
> >>>> > --- a/drivers/gpu/drm/i915/intel_display.c
> >>>> > +++ b/drivers/gpu/drm/i915/intel_display.c
> >>>> > @@ -5241,12 +5241,29 @@ retry:
> >>>> > return setup_ok ? 0 : -EINVAL;
> >>>> > }
> >>>> >
> >>>> > +static bool pipe_config_supports_ips(struct drm_i915_private *dev_priv,
> >>>> > + struct intel_crtc_config *pipe_config)
> >>>> > +{
> >>>> > + if (pipe_config->pipe_bpp > 24)
> >>>> > + return false;
> >>>> > +
> >>>> > + /* HSW can handle pixel rate up to cdclk? */
> >>>> > + if (IS_HASWELL(dev_priv->dev))
> >>>>
> >>>> This only needs IS_HASWELL(dev_priv)
> >>>
> >>> old habits...
> >>
> >> Thanks to your old habits I didn't have to make any changes when pushing
> >> this to drm-intel-fixes which is still old habit land. Thanks for the
> >> patch and review.
>
> And another detail: even if the register read worked, we'd have
> printed a bad value since the cdclock is disabled at the moment we run
> the function, so we'd return the FCLK frequency. So maybe we need to
> cache the value of the "cdclk under normal display operation" and
> reuse it here.
Yeah. We already do that on VLV/CHV to some extent. We should just do
it for all platforms. Although for this case what we'd need to do is
precalculate the optimal cdclk during compute_config phase and use
that value for these checks, and then during global_resources we
actually change the cdclk to match the precomputed value.
Also if someone takes this on they could also unify the ddi cdclk
code to look more like the other platforms, and perhaps even implement
support for changing the cdclk frequency on HSW/BDW ;)
>
> >
> > This patches causes a regression on igt/pm_rpm/rte:
> >
> > [ 44.871662] [drm:intel_dp_compute_config] DP link bw required
> > 650358 available 1728000
> > [ 44.871666] ------------[ cut here ]------------
> > [ 44.871691] WARNING: CPU: 0 PID: 1745 at
> > drivers/gpu/drm/i915/intel_uncore.c:47
> > assert_device_not_suspended.isra.8+0x43/0x50 [i915]()
> > [ 44.871692] Device suspended
> > [ 44.871694] Modules linked in: hid_multitouch hid_sensor_hub
> > snd_hda_codec_hdmi intel_rapl x86_pkg_temp_thermal intel_powerclamp
> > efivars snd_hda_intel btusb snd_hda_controller snd_hda_codec snd_hwdep
> > iwlmvm snd_pcm_oss snd_mixer_oss iwlwifi mei_me mei snd_pcm snd_timer
> > int3403_thermal i2c_designware_platform i2c_designware_core acpi_pad
> > fuse nls_utf8 nls_cp437 vfat fat i915 sdhci_pci drm_kms_helper e1000e
> > drm sdhci_acpi sdhci
> > [ 44.871726] CPU: 0 PID: 1745 Comm: pm_rpm Not tainted
> > 3.17.0-rc5.1409171019pz+ #1120
> > [ 44.871728] Hardware name: Intel Corporation Broadwell Client
> > platform/Wilson Beach SDS, BIOS BDW-E2R1.86C.0072.R03.1405072127
> > 05/07/2014
> > [ 44.871730] 0000000000000009 ffff8800aa763a90 ffffffff816ec803
> > ffff8800aa763ad8
> > [ 44.871735] ffff8800aa763ac8 ffffffff8107a0c8 ffff88023ec20068
> > 0000000000130040
> > [ 44.871739] ffff88023f12b3d8 0000000000130040 ffff88023ec20000
> > ffff8800aa763b28
> > [ 44.871743] Call Trace:
> > [ 44.871749] [<ffffffff816ec803>] dump_stack+0x4d/0x66
> > [ 44.871754] [<ffffffff8107a0c8>] warn_slowpath_common+0x78/0xa0
> > [ 44.871758] [<ffffffff8107a137>] warn_slowpath_fmt+0x47/0x50
> > [ 44.871783] [<ffffffffa015a1f4>] ?
> > intel_dp_compute_config+0x274/0x600 [i915]
> > [ 44.871803] [<ffffffffa0122cf3>]
> > assert_device_not_suspended.isra.8+0x43/0x50 [i915]
> > [ 44.871822] [<ffffffffa0125a20>] gen6_read32+0x30/0x150 [i915]
> > [ 44.871844] [<ffffffffa0154636>] intel_ddi_get_cdclk_freq+0xd6/0x140 [i915]
> > [ 44.871865] [<ffffffffa0139a92>] __intel_set_mode+0x1672/0x1750 [i915]
> > [ 44.871886] [<ffffffffa01418e1>] intel_set_mode+0x11/0x30 [i915]
> > [ 44.871906] [<ffffffffa01429ed>] intel_crtc_set_config+0xa9d/0xeb0 [i915]
> > [ 44.871923] [<ffffffffa0026283>]
> > drm_mode_set_config_internal+0x63/0x100 [drm]
> > [ 44.871938] [<ffffffffa002a7e3>] drm_mode_setcrtc+0x283/0x580 [drm]
> > [ 44.871948] [<ffffffffa001c81f>] drm_ioctl+0x1df/0x6a0 [drm]
> > [ 44.871954] [<ffffffff811e07b0>] do_vfs_ioctl+0x2e0/0x4e0
> > [ 44.871957] [<ffffffff816f6af7>] ? sysret_check+0x1b/0x56
> > [ 44.871962] [<ffffffff810bfb0d>] ? trace_hardirqs_on_caller+0x15d/0x200
> > [ 44.871966] [<ffffffff811e0a31>] SyS_ioctl+0x81/0xa0
> > [ 44.871969] [<ffffffff816f6ad2>] system_call_fastpath+0x16/0x1b
> > [ 44.871972] ---[ end trace 91bf8920a2c6b824 ]---
> > [ 44.871975] ------------[ cut here ]------------
> > [ 44.871994] WARNING: CPU: 0 PID: 1745 at
> > drivers/gpu/drm/i915/intel_uncore.c:528
> > hsw_unclaimed_reg_debug+0x6d/0x80 [i915]()
> > [ 44.871996] Unclaimed register detected before reading register 0x130040
> > [ 44.871997] Modules linked in: hid_multitouch hid_sensor_hub
> > snd_hda_codec_hdmi intel_rapl x86_pkg_temp_thermal intel_powerclamp
> > efivars snd_hda_intel btusb snd_hda_controller snd_hda_codec snd_hwdep
> > iwlmvm snd_pcm_oss snd_mixer_oss iwlwifi mei_me mei snd_pcm snd_timer
> > int3403_thermal i2c_designware_platform i2c_designware_core acpi_pad
> > fuse nls_utf8 nls_cp437 vfat fat i915 sdhci_pci drm_kms_helper e1000e
> > drm sdhci_acpi sdhci
> > [ 44.872025] CPU: 0 PID: 1745 Comm: pm_rpm Tainted: G W
> > 3.17.0-rc5.1409171019pz+ #1120
> > [ 44.872026] Hardware name: Intel Corporation Broadwell Client
> > platform/Wilson Beach SDS, BIOS BDW-E2R1.86C.0072.R03.1405072127
> > 05/07/2014
> > [ 44.872028] 0000000000000009 ffff8800aa763a88 ffffffff816ec803
> > ffff8800aa763ad0
> > [ 44.872032] ffff8800aa763ac0 ffffffff8107a0c8 ffff88023ec20000
> > 0000000000130040
> > [ 44.872035] ffff88023f12b3d8 0000000000130040 ffff88023ec20000
> > ffff8800aa763b20
> > [ 44.872039] Call Trace:
> > [ 44.872042] [<ffffffff816ec803>] dump_stack+0x4d/0x66
> > [ 44.872046] [<ffffffff8107a0c8>] warn_slowpath_common+0x78/0xa0
> > [ 44.872049] [<ffffffff8107a137>] warn_slowpath_fmt+0x47/0x50
> > [ 44.872068] [<ffffffffa0122bbd>] hsw_unclaimed_reg_debug+0x6d/0x80 [i915]
> > [ 44.872087] [<ffffffffa0125a41>] gen6_read32+0x51/0x150 [i915]
> > [ 44.872109] [<ffffffffa0154636>] intel_ddi_get_cdclk_freq+0xd6/0x140 [i915]
> > [ 44.872129] [<ffffffffa0139a92>] __intel_set_mode+0x1672/0x1750 [i915]
> > [ 44.872149] [<ffffffffa01418e1>] intel_set_mode+0x11/0x30 [i915]
> > [ 44.872168] [<ffffffffa01429ed>] intel_crtc_set_config+0xa9d/0xeb0 [i915]
> > [ 44.872182] [<ffffffffa0026283>]
> > drm_mode_set_config_internal+0x63/0x100 [drm]
> > [ 44.872196] [<ffffffffa002a7e3>] drm_mode_setcrtc+0x283/0x580 [drm]
> > [ 44.872205] [<ffffffffa001c81f>] drm_ioctl+0x1df/0x6a0 [drm]
> > [ 44.872210] [<ffffffff811e07b0>] do_vfs_ioctl+0x2e0/0x4e0
> > [ 44.872213] [<ffffffff816f6af7>] ? sysret_check+0x1b/0x56
> > [ 44.872218] [<ffffffff810bfb0d>] ? trace_hardirqs_on_caller+0x15d/0x200
> > [ 44.872221] [<ffffffff811e0a31>] SyS_ioctl+0x81/0xa0
> > [ 44.872224] [<ffffffff816f6ad2>] system_call_fastpath+0x16/0x1b
> > [ 44.872226] ---[ end trace 91bf8920a2c6b825 ]---
> > [ 44.872228] ------------[ cut here ]------------
> > [ 44.872246] WARNING: CPU: 0 PID: 1745 at
> > drivers/gpu/drm/i915/intel_uncore.c:528
> > hsw_unclaimed_reg_debug+0x6d/0x80 [i915]()
> > [ 44.872248] Unclaimed register detected after reading register 0x130040
> > [ 44.872249] Modules linked in: hid_multitouch hid_sensor_hub
> > snd_hda_codec_hdmi intel_rapl x86_pkg_temp_thermal intel_powerclamp
> > efivars snd_hda_intel btusb snd_hda_controller snd_hda_codec snd_hwdep
> > iwlmvm snd_pcm_oss snd_mixer_oss iwlwifi mei_me mei snd_pcm snd_timer
> > int3403_thermal i2c_designware_platform i2c_designware_core acpi_pad
> > fuse nls_utf8 nls_cp437 vfat fat i915 sdhci_pci drm_kms_helper e1000e
> > drm sdhci_acpi sdhci
> > [ 44.872276] CPU: 0 PID: 1745 Comm: pm_rpm Tainted: G W
> > 3.17.0-rc5.1409171019pz+ #1120
> > [ 44.872277] Hardware name: Intel Corporation Broadwell Client
> > platform/Wilson Beach SDS, BIOS BDW-E2R1.86C.0072.R03.1405072127
> > 05/07/2014
> > [ 44.872279] 0000000000000009 ffff8800aa763a88 ffffffff816ec803
> > ffff8800aa763ad0
> > [ 44.872282] ffff8800aa763ac0 ffffffff8107a0c8 ffff88023ec20000
> > 0000000000130040
> > [ 44.872286] 00000000ffffffff 0000000000130040 ffff88023ec20000
> > ffff8800aa763b20
> > [ 44.872289] Call Trace:
> > [ 44.872293] [<ffffffff816ec803>] dump_stack+0x4d/0x66
> > [ 44.872296] [<ffffffff8107a0c8>] warn_slowpath_common+0x78/0xa0
> > [ 44.872299] [<ffffffff8107a137>] warn_slowpath_fmt+0x47/0x50
> > [ 44.872318] [<ffffffffa0122bbd>] hsw_unclaimed_reg_debug+0x6d/0x80 [i915]
> > [ 44.872335] [<ffffffffa0125a7e>] gen6_read32+0x8e/0x150 [i915]
> > [ 44.872356] [<ffffffffa0154636>] intel_ddi_get_cdclk_freq+0xd6/0x140 [i915]
> > [ 44.872376] [<ffffffffa0139a92>] __intel_set_mode+0x1672/0x1750 [i915]
> > [ 44.872396] [<ffffffffa01418e1>] intel_set_mode+0x11/0x30 [i915]
> > [ 44.872416] [<ffffffffa01429ed>] intel_crtc_set_config+0xa9d/0xeb0 [i915]
> > [ 44.872429] [<ffffffffa0026283>]
> > drm_mode_set_config_internal+0x63/0x100 [drm]
> > [ 44.872443] [<ffffffffa002a7e3>] drm_mode_setcrtc+0x283/0x580 [drm]
> > [ 44.872453] [<ffffffffa001c81f>] drm_ioctl+0x1df/0x6a0 [drm]
> > [ 44.872458] [<ffffffff811e07b0>] do_vfs_ioctl+0x2e0/0x4e0
> > [ 44.872461] [<ffffffff816f6af7>] ? sysret_check+0x1b/0x56
> > [ 44.872465] [<ffffffff810bfb0d>] ? trace_hardirqs_on_caller+0x15d/0x200
> > [ 44.872468] [<ffffffff811e0a31>] SyS_ioctl+0x81/0xa0
> > [ 44.872471] [<ffffffff816f6ad2>] system_call_fastpath+0x16/0x1b
> > [ 44.872473] ---[ end trace 91bf8920a2c6b826 ]---
> > [ 44.872512] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe
> > bpp: 18, dithering: 1
> >
> >>
> >> BR,
> >> Jani.
> >>
> >>
> >>>
> >>>>
> >>>> > + return true;
> >>>> > +
> >>>> > + return ilk_pipe_pixel_rate(pipe_config) <=
> >>>> > + intel_ddi_get_cdclk_freq(dev_priv) * 95 / 100;
> >>>>
> >>>> Otherwise
> >>>> Acked-by: Chris Wilson <chris@chris-wilson.co.uk>
> >>>> -Chris
> >>>>
> >>>> --
> >>>> Chris Wilson, Intel Open Source Technology Centre
> >>>
> >>> --
> >>> Ville Syrjälä
> >>> Intel OTC
> >>> _______________________________________________
> >>> Intel-gfx mailing list
> >>> Intel-gfx@lists.freedesktop.org
> >>> http://lists.freedesktop.org/mailman/listinfo/intel-gfx
> >>
> >> --
> >> Jani Nikula, Intel Open Source Technology Center
> >> _______________________________________________
> >> Intel-gfx mailing list
> >> Intel-gfx@lists.freedesktop.org
> >> http://lists.freedesktop.org/mailman/listinfo/intel-gfx
> >
> >
> >
> > --
> > Paulo Zanoni
>
>
>
> --
> Paulo Zanoni
--
Ville Syrjälä
Intel OTC
^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH v2] drm/i915: Don't enable IPS when pixel rate exceeds 95% of cdclk
2014-09-17 14:43 ` Ville Syrjälä
@ 2014-09-18 11:56 ` Jani Nikula
2015-05-20 20:40 ` Rodrigo Vivi
0 siblings, 1 reply; 12+ messages in thread
From: Jani Nikula @ 2014-09-18 11:56 UTC (permalink / raw)
To: Ville Syrjälä, Paulo Zanoni; +Cc: Intel Graphics Development
On Wed, 17 Sep 2014, Ville Syrjälä <ville.syrjala@linux.intel.com> wrote:
> On Wed, Sep 17, 2014 at 11:10:48AM -0300, Paulo Zanoni wrote:
>> 2014-09-17 11:05 GMT-03:00 Paulo Zanoni <przanoni@gmail.com>:
>> > 2014-09-15 4:22 GMT-03:00 Jani Nikula <jani.nikula@linux.intel.com>:
>> >> On Fri, 12 Sep 2014, Ville Syrjälä <ville.syrjala@linux.intel.com> wrote:
>> >>> On Fri, Sep 12, 2014 at 04:42:33PM +0100, Chris Wilson wrote:
>> >>>> On Fri, Sep 12, 2014 at 05:01:57PM +0300, ville.syrjala@linux.intel.com wrote:
>> >>>> > From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>> >>>> >
>> >>>> > Bspec says we shouldn't enable IPS on BDW when the pipe pixel rate
>> >>>> > exceeds 95% of the core display clock. Apparently this can cause
>> >>>> > underruns.
>> >>>> >
>> >>>> > There's no similar restriction listed for HSW, so leave that one alone
>> >>>> > for now.
>> >>>> >
>> >>>> > v2: Add pipe_config_supports_ips() (Chris)
>> >>>> >
>> >>>> > Tested-by: Timo Aaltonen <tjaalton@ubuntu.com>
>> >>>> > Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=83497
>> >>>> > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
>> >>>> > ---
>> >>>> > drivers/gpu/drm/i915/intel_display.c | 21 +++++++++++++++++++--
>> >>>> > drivers/gpu/drm/i915/intel_drv.h | 1 +
>> >>>> > drivers/gpu/drm/i915/intel_pm.c | 16 +++++++---------
>> >>>> > 3 files changed, 27 insertions(+), 11 deletions(-)
>> >>>> >
>> >>>> > diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
>> >>>> > index 965eb3c..7809177 100644
>> >>>> > --- a/drivers/gpu/drm/i915/intel_display.c
>> >>>> > +++ b/drivers/gpu/drm/i915/intel_display.c
>> >>>> > @@ -5241,12 +5241,29 @@ retry:
>> >>>> > return setup_ok ? 0 : -EINVAL;
>> >>>> > }
>> >>>> >
>> >>>> > +static bool pipe_config_supports_ips(struct drm_i915_private *dev_priv,
>> >>>> > + struct intel_crtc_config *pipe_config)
>> >>>> > +{
>> >>>> > + if (pipe_config->pipe_bpp > 24)
>> >>>> > + return false;
>> >>>> > +
>> >>>> > + /* HSW can handle pixel rate up to cdclk? */
>> >>>> > + if (IS_HASWELL(dev_priv->dev))
>> >>>>
>> >>>> This only needs IS_HASWELL(dev_priv)
>> >>>
>> >>> old habits...
>> >>
>> >> Thanks to your old habits I didn't have to make any changes when pushing
>> >> this to drm-intel-fixes which is still old habit land. Thanks for the
>> >> patch and review.
>>
>> And another detail: even if the register read worked, we'd have
>> printed a bad value since the cdclock is disabled at the moment we run
>> the function, so we'd return the FCLK frequency. So maybe we need to
>> cache the value of the "cdclk under normal display operation" and
>> reuse it here.
>
> Yeah. We already do that on VLV/CHV to some extent. We should just do
> it for all platforms. Although for this case what we'd need to do is
> precalculate the optimal cdclk during compute_config phase and use
> that value for these checks, and then during global_resources we
> actually change the cdclk to match the precomputed value.
>
> Also if someone takes this on they could also unify the ddi cdclk
> code to look more like the other platforms, and perhaps even implement
> support for changing the cdclk frequency on HSW/BDW ;)
I've dropped the commit from drm-intel-fixes and reopened the bug. We
need someone(tm) to look at this now.
BR,
Jani.
>
>>
>> >
>> > This patches causes a regression on igt/pm_rpm/rte:
>> >
>> > [ 44.871662] [drm:intel_dp_compute_config] DP link bw required
>> > 650358 available 1728000
>> > [ 44.871666] ------------[ cut here ]------------
>> > [ 44.871691] WARNING: CPU: 0 PID: 1745 at
>> > drivers/gpu/drm/i915/intel_uncore.c:47
>> > assert_device_not_suspended.isra.8+0x43/0x50 [i915]()
>> > [ 44.871692] Device suspended
>> > [ 44.871694] Modules linked in: hid_multitouch hid_sensor_hub
>> > snd_hda_codec_hdmi intel_rapl x86_pkg_temp_thermal intel_powerclamp
>> > efivars snd_hda_intel btusb snd_hda_controller snd_hda_codec snd_hwdep
>> > iwlmvm snd_pcm_oss snd_mixer_oss iwlwifi mei_me mei snd_pcm snd_timer
>> > int3403_thermal i2c_designware_platform i2c_designware_core acpi_pad
>> > fuse nls_utf8 nls_cp437 vfat fat i915 sdhci_pci drm_kms_helper e1000e
>> > drm sdhci_acpi sdhci
>> > [ 44.871726] CPU: 0 PID: 1745 Comm: pm_rpm Not tainted
>> > 3.17.0-rc5.1409171019pz+ #1120
>> > [ 44.871728] Hardware name: Intel Corporation Broadwell Client
>> > platform/Wilson Beach SDS, BIOS BDW-E2R1.86C.0072.R03.1405072127
>> > 05/07/2014
>> > [ 44.871730] 0000000000000009 ffff8800aa763a90 ffffffff816ec803
>> > ffff8800aa763ad8
>> > [ 44.871735] ffff8800aa763ac8 ffffffff8107a0c8 ffff88023ec20068
>> > 0000000000130040
>> > [ 44.871739] ffff88023f12b3d8 0000000000130040 ffff88023ec20000
>> > ffff8800aa763b28
>> > [ 44.871743] Call Trace:
>> > [ 44.871749] [<ffffffff816ec803>] dump_stack+0x4d/0x66
>> > [ 44.871754] [<ffffffff8107a0c8>] warn_slowpath_common+0x78/0xa0
>> > [ 44.871758] [<ffffffff8107a137>] warn_slowpath_fmt+0x47/0x50
>> > [ 44.871783] [<ffffffffa015a1f4>] ?
>> > intel_dp_compute_config+0x274/0x600 [i915]
>> > [ 44.871803] [<ffffffffa0122cf3>]
>> > assert_device_not_suspended.isra.8+0x43/0x50 [i915]
>> > [ 44.871822] [<ffffffffa0125a20>] gen6_read32+0x30/0x150 [i915]
>> > [ 44.871844] [<ffffffffa0154636>] intel_ddi_get_cdclk_freq+0xd6/0x140 [i915]
>> > [ 44.871865] [<ffffffffa0139a92>] __intel_set_mode+0x1672/0x1750 [i915]
>> > [ 44.871886] [<ffffffffa01418e1>] intel_set_mode+0x11/0x30 [i915]
>> > [ 44.871906] [<ffffffffa01429ed>] intel_crtc_set_config+0xa9d/0xeb0 [i915]
>> > [ 44.871923] [<ffffffffa0026283>]
>> > drm_mode_set_config_internal+0x63/0x100 [drm]
>> > [ 44.871938] [<ffffffffa002a7e3>] drm_mode_setcrtc+0x283/0x580 [drm]
>> > [ 44.871948] [<ffffffffa001c81f>] drm_ioctl+0x1df/0x6a0 [drm]
>> > [ 44.871954] [<ffffffff811e07b0>] do_vfs_ioctl+0x2e0/0x4e0
>> > [ 44.871957] [<ffffffff816f6af7>] ? sysret_check+0x1b/0x56
>> > [ 44.871962] [<ffffffff810bfb0d>] ? trace_hardirqs_on_caller+0x15d/0x200
>> > [ 44.871966] [<ffffffff811e0a31>] SyS_ioctl+0x81/0xa0
>> > [ 44.871969] [<ffffffff816f6ad2>] system_call_fastpath+0x16/0x1b
>> > [ 44.871972] ---[ end trace 91bf8920a2c6b824 ]---
>> > [ 44.871975] ------------[ cut here ]------------
>> > [ 44.871994] WARNING: CPU: 0 PID: 1745 at
>> > drivers/gpu/drm/i915/intel_uncore.c:528
>> > hsw_unclaimed_reg_debug+0x6d/0x80 [i915]()
>> > [ 44.871996] Unclaimed register detected before reading register 0x130040
>> > [ 44.871997] Modules linked in: hid_multitouch hid_sensor_hub
>> > snd_hda_codec_hdmi intel_rapl x86_pkg_temp_thermal intel_powerclamp
>> > efivars snd_hda_intel btusb snd_hda_controller snd_hda_codec snd_hwdep
>> > iwlmvm snd_pcm_oss snd_mixer_oss iwlwifi mei_me mei snd_pcm snd_timer
>> > int3403_thermal i2c_designware_platform i2c_designware_core acpi_pad
>> > fuse nls_utf8 nls_cp437 vfat fat i915 sdhci_pci drm_kms_helper e1000e
>> > drm sdhci_acpi sdhci
>> > [ 44.872025] CPU: 0 PID: 1745 Comm: pm_rpm Tainted: G W
>> > 3.17.0-rc5.1409171019pz+ #1120
>> > [ 44.872026] Hardware name: Intel Corporation Broadwell Client
>> > platform/Wilson Beach SDS, BIOS BDW-E2R1.86C.0072.R03.1405072127
>> > 05/07/2014
>> > [ 44.872028] 0000000000000009 ffff8800aa763a88 ffffffff816ec803
>> > ffff8800aa763ad0
>> > [ 44.872032] ffff8800aa763ac0 ffffffff8107a0c8 ffff88023ec20000
>> > 0000000000130040
>> > [ 44.872035] ffff88023f12b3d8 0000000000130040 ffff88023ec20000
>> > ffff8800aa763b20
>> > [ 44.872039] Call Trace:
>> > [ 44.872042] [<ffffffff816ec803>] dump_stack+0x4d/0x66
>> > [ 44.872046] [<ffffffff8107a0c8>] warn_slowpath_common+0x78/0xa0
>> > [ 44.872049] [<ffffffff8107a137>] warn_slowpath_fmt+0x47/0x50
>> > [ 44.872068] [<ffffffffa0122bbd>] hsw_unclaimed_reg_debug+0x6d/0x80 [i915]
>> > [ 44.872087] [<ffffffffa0125a41>] gen6_read32+0x51/0x150 [i915]
>> > [ 44.872109] [<ffffffffa0154636>] intel_ddi_get_cdclk_freq+0xd6/0x140 [i915]
>> > [ 44.872129] [<ffffffffa0139a92>] __intel_set_mode+0x1672/0x1750 [i915]
>> > [ 44.872149] [<ffffffffa01418e1>] intel_set_mode+0x11/0x30 [i915]
>> > [ 44.872168] [<ffffffffa01429ed>] intel_crtc_set_config+0xa9d/0xeb0 [i915]
>> > [ 44.872182] [<ffffffffa0026283>]
>> > drm_mode_set_config_internal+0x63/0x100 [drm]
>> > [ 44.872196] [<ffffffffa002a7e3>] drm_mode_setcrtc+0x283/0x580 [drm]
>> > [ 44.872205] [<ffffffffa001c81f>] drm_ioctl+0x1df/0x6a0 [drm]
>> > [ 44.872210] [<ffffffff811e07b0>] do_vfs_ioctl+0x2e0/0x4e0
>> > [ 44.872213] [<ffffffff816f6af7>] ? sysret_check+0x1b/0x56
>> > [ 44.872218] [<ffffffff810bfb0d>] ? trace_hardirqs_on_caller+0x15d/0x200
>> > [ 44.872221] [<ffffffff811e0a31>] SyS_ioctl+0x81/0xa0
>> > [ 44.872224] [<ffffffff816f6ad2>] system_call_fastpath+0x16/0x1b
>> > [ 44.872226] ---[ end trace 91bf8920a2c6b825 ]---
>> > [ 44.872228] ------------[ cut here ]------------
>> > [ 44.872246] WARNING: CPU: 0 PID: 1745 at
>> > drivers/gpu/drm/i915/intel_uncore.c:528
>> > hsw_unclaimed_reg_debug+0x6d/0x80 [i915]()
>> > [ 44.872248] Unclaimed register detected after reading register 0x130040
>> > [ 44.872249] Modules linked in: hid_multitouch hid_sensor_hub
>> > snd_hda_codec_hdmi intel_rapl x86_pkg_temp_thermal intel_powerclamp
>> > efivars snd_hda_intel btusb snd_hda_controller snd_hda_codec snd_hwdep
>> > iwlmvm snd_pcm_oss snd_mixer_oss iwlwifi mei_me mei snd_pcm snd_timer
>> > int3403_thermal i2c_designware_platform i2c_designware_core acpi_pad
>> > fuse nls_utf8 nls_cp437 vfat fat i915 sdhci_pci drm_kms_helper e1000e
>> > drm sdhci_acpi sdhci
>> > [ 44.872276] CPU: 0 PID: 1745 Comm: pm_rpm Tainted: G W
>> > 3.17.0-rc5.1409171019pz+ #1120
>> > [ 44.872277] Hardware name: Intel Corporation Broadwell Client
>> > platform/Wilson Beach SDS, BIOS BDW-E2R1.86C.0072.R03.1405072127
>> > 05/07/2014
>> > [ 44.872279] 0000000000000009 ffff8800aa763a88 ffffffff816ec803
>> > ffff8800aa763ad0
>> > [ 44.872282] ffff8800aa763ac0 ffffffff8107a0c8 ffff88023ec20000
>> > 0000000000130040
>> > [ 44.872286] 00000000ffffffff 0000000000130040 ffff88023ec20000
>> > ffff8800aa763b20
>> > [ 44.872289] Call Trace:
>> > [ 44.872293] [<ffffffff816ec803>] dump_stack+0x4d/0x66
>> > [ 44.872296] [<ffffffff8107a0c8>] warn_slowpath_common+0x78/0xa0
>> > [ 44.872299] [<ffffffff8107a137>] warn_slowpath_fmt+0x47/0x50
>> > [ 44.872318] [<ffffffffa0122bbd>] hsw_unclaimed_reg_debug+0x6d/0x80 [i915]
>> > [ 44.872335] [<ffffffffa0125a7e>] gen6_read32+0x8e/0x150 [i915]
>> > [ 44.872356] [<ffffffffa0154636>] intel_ddi_get_cdclk_freq+0xd6/0x140 [i915]
>> > [ 44.872376] [<ffffffffa0139a92>] __intel_set_mode+0x1672/0x1750 [i915]
>> > [ 44.872396] [<ffffffffa01418e1>] intel_set_mode+0x11/0x30 [i915]
>> > [ 44.872416] [<ffffffffa01429ed>] intel_crtc_set_config+0xa9d/0xeb0 [i915]
>> > [ 44.872429] [<ffffffffa0026283>]
>> > drm_mode_set_config_internal+0x63/0x100 [drm]
>> > [ 44.872443] [<ffffffffa002a7e3>] drm_mode_setcrtc+0x283/0x580 [drm]
>> > [ 44.872453] [<ffffffffa001c81f>] drm_ioctl+0x1df/0x6a0 [drm]
>> > [ 44.872458] [<ffffffff811e07b0>] do_vfs_ioctl+0x2e0/0x4e0
>> > [ 44.872461] [<ffffffff816f6af7>] ? sysret_check+0x1b/0x56
>> > [ 44.872465] [<ffffffff810bfb0d>] ? trace_hardirqs_on_caller+0x15d/0x200
>> > [ 44.872468] [<ffffffff811e0a31>] SyS_ioctl+0x81/0xa0
>> > [ 44.872471] [<ffffffff816f6ad2>] system_call_fastpath+0x16/0x1b
>> > [ 44.872473] ---[ end trace 91bf8920a2c6b826 ]---
>> > [ 44.872512] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe
>> > bpp: 18, dithering: 1
>> >
>> >>
>> >> BR,
>> >> Jani.
>> >>
>> >>
>> >>>
>> >>>>
>> >>>> > + return true;
>> >>>> > +
>> >>>> > + return ilk_pipe_pixel_rate(pipe_config) <=
>> >>>> > + intel_ddi_get_cdclk_freq(dev_priv) * 95 / 100;
>> >>>>
>> >>>> Otherwise
>> >>>> Acked-by: Chris Wilson <chris@chris-wilson.co.uk>
>> >>>> -Chris
>> >>>>
>> >>>> --
>> >>>> Chris Wilson, Intel Open Source Technology Centre
>> >>>
>> >>> --
>> >>> Ville Syrjälä
>> >>> Intel OTC
>> >>> _______________________________________________
>> >>> Intel-gfx mailing list
>> >>> Intel-gfx@lists.freedesktop.org
>> >>> http://lists.freedesktop.org/mailman/listinfo/intel-gfx
>> >>
>> >> --
>> >> Jani Nikula, Intel Open Source Technology Center
>> >> _______________________________________________
>> >> Intel-gfx mailing list
>> >> Intel-gfx@lists.freedesktop.org
>> >> http://lists.freedesktop.org/mailman/listinfo/intel-gfx
>> >
>> >
>> >
>> > --
>> > Paulo Zanoni
>>
>>
>>
>> --
>> Paulo Zanoni
>
> --
> Ville Syrjälä
> Intel OTC
--
Jani Nikula, Intel Open Source Technology Center
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH v2] drm/i915: Don't enable IPS when pixel rate exceeds 95% of cdclk
2014-09-18 11:56 ` Jani Nikula
@ 2015-05-20 20:40 ` Rodrigo Vivi
2015-05-20 20:45 ` Paulo Zanoni
0 siblings, 1 reply; 12+ messages in thread
From: Rodrigo Vivi @ 2015-05-20 20:40 UTC (permalink / raw)
To: Jani Nikula; +Cc: Intel Graphics Development
I'm convinced Unclaimed regs Paulo saw came from somewhere else since
I just got it with pm_rpm rte with no patch applied....
So I'd suggest to merge this patch... Although it also doesn't fix the
flicker I see here so the bug would still be open...
Anyway,
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
On Thu, Sep 18, 2014 at 4:56 AM, Jani Nikula
<jani.nikula@linux.intel.com> wrote:
> On Wed, 17 Sep 2014, Ville Syrjälä <ville.syrjala@linux.intel.com> wrote:
>> On Wed, Sep 17, 2014 at 11:10:48AM -0300, Paulo Zanoni wrote:
>>> 2014-09-17 11:05 GMT-03:00 Paulo Zanoni <przanoni@gmail.com>:
>>> > 2014-09-15 4:22 GMT-03:00 Jani Nikula <jani.nikula@linux.intel.com>:
>>> >> On Fri, 12 Sep 2014, Ville Syrjälä <ville.syrjala@linux.intel.com> wrote:
>>> >>> On Fri, Sep 12, 2014 at 04:42:33PM +0100, Chris Wilson wrote:
>>> >>>> On Fri, Sep 12, 2014 at 05:01:57PM +0300, ville.syrjala@linux.intel.com wrote:
>>> >>>> > From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>>> >>>> >
>>> >>>> > Bspec says we shouldn't enable IPS on BDW when the pipe pixel rate
>>> >>>> > exceeds 95% of the core display clock. Apparently this can cause
>>> >>>> > underruns.
>>> >>>> >
>>> >>>> > There's no similar restriction listed for HSW, so leave that one alone
>>> >>>> > for now.
>>> >>>> >
>>> >>>> > v2: Add pipe_config_supports_ips() (Chris)
>>> >>>> >
>>> >>>> > Tested-by: Timo Aaltonen <tjaalton@ubuntu.com>
>>> >>>> > Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=83497
>>> >>>> > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
>>> >>>> > ---
>>> >>>> > drivers/gpu/drm/i915/intel_display.c | 21 +++++++++++++++++++--
>>> >>>> > drivers/gpu/drm/i915/intel_drv.h | 1 +
>>> >>>> > drivers/gpu/drm/i915/intel_pm.c | 16 +++++++---------
>>> >>>> > 3 files changed, 27 insertions(+), 11 deletions(-)
>>> >>>> >
>>> >>>> > diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
>>> >>>> > index 965eb3c..7809177 100644
>>> >>>> > --- a/drivers/gpu/drm/i915/intel_display.c
>>> >>>> > +++ b/drivers/gpu/drm/i915/intel_display.c
>>> >>>> > @@ -5241,12 +5241,29 @@ retry:
>>> >>>> > return setup_ok ? 0 : -EINVAL;
>>> >>>> > }
>>> >>>> >
>>> >>>> > +static bool pipe_config_supports_ips(struct drm_i915_private *dev_priv,
>>> >>>> > + struct intel_crtc_config *pipe_config)
>>> >>>> > +{
>>> >>>> > + if (pipe_config->pipe_bpp > 24)
>>> >>>> > + return false;
>>> >>>> > +
>>> >>>> > + /* HSW can handle pixel rate up to cdclk? */
>>> >>>> > + if (IS_HASWELL(dev_priv->dev))
>>> >>>>
>>> >>>> This only needs IS_HASWELL(dev_priv)
>>> >>>
>>> >>> old habits...
>>> >>
>>> >> Thanks to your old habits I didn't have to make any changes when pushing
>>> >> this to drm-intel-fixes which is still old habit land. Thanks for the
>>> >> patch and review.
>>>
>>> And another detail: even if the register read worked, we'd have
>>> printed a bad value since the cdclock is disabled at the moment we run
>>> the function, so we'd return the FCLK frequency. So maybe we need to
>>> cache the value of the "cdclk under normal display operation" and
>>> reuse it here.
>>
>> Yeah. We already do that on VLV/CHV to some extent. We should just do
>> it for all platforms. Although for this case what we'd need to do is
>> precalculate the optimal cdclk during compute_config phase and use
>> that value for these checks, and then during global_resources we
>> actually change the cdclk to match the precomputed value.
>>
>> Also if someone takes this on they could also unify the ddi cdclk
>> code to look more like the other platforms, and perhaps even implement
>> support for changing the cdclk frequency on HSW/BDW ;)
>
> I've dropped the commit from drm-intel-fixes and reopened the bug. We
> need someone(tm) to look at this now.
>
> BR,
> Jani.
>
>
>
>>
>>>
>>> >
>>> > This patches causes a regression on igt/pm_rpm/rte:
>>> >
>>> > [ 44.871662] [drm:intel_dp_compute_config] DP link bw required
>>> > 650358 available 1728000
>>> > [ 44.871666] ------------[ cut here ]------------
>>> > [ 44.871691] WARNING: CPU: 0 PID: 1745 at
>>> > drivers/gpu/drm/i915/intel_uncore.c:47
>>> > assert_device_not_suspended.isra.8+0x43/0x50 [i915]()
>>> > [ 44.871692] Device suspended
>>> > [ 44.871694] Modules linked in: hid_multitouch hid_sensor_hub
>>> > snd_hda_codec_hdmi intel_rapl x86_pkg_temp_thermal intel_powerclamp
>>> > efivars snd_hda_intel btusb snd_hda_controller snd_hda_codec snd_hwdep
>>> > iwlmvm snd_pcm_oss snd_mixer_oss iwlwifi mei_me mei snd_pcm snd_timer
>>> > int3403_thermal i2c_designware_platform i2c_designware_core acpi_pad
>>> > fuse nls_utf8 nls_cp437 vfat fat i915 sdhci_pci drm_kms_helper e1000e
>>> > drm sdhci_acpi sdhci
>>> > [ 44.871726] CPU: 0 PID: 1745 Comm: pm_rpm Not tainted
>>> > 3.17.0-rc5.1409171019pz+ #1120
>>> > [ 44.871728] Hardware name: Intel Corporation Broadwell Client
>>> > platform/Wilson Beach SDS, BIOS BDW-E2R1.86C.0072.R03.1405072127
>>> > 05/07/2014
>>> > [ 44.871730] 0000000000000009 ffff8800aa763a90 ffffffff816ec803
>>> > ffff8800aa763ad8
>>> > [ 44.871735] ffff8800aa763ac8 ffffffff8107a0c8 ffff88023ec20068
>>> > 0000000000130040
>>> > [ 44.871739] ffff88023f12b3d8 0000000000130040 ffff88023ec20000
>>> > ffff8800aa763b28
>>> > [ 44.871743] Call Trace:
>>> > [ 44.871749] [<ffffffff816ec803>] dump_stack+0x4d/0x66
>>> > [ 44.871754] [<ffffffff8107a0c8>] warn_slowpath_common+0x78/0xa0
>>> > [ 44.871758] [<ffffffff8107a137>] warn_slowpath_fmt+0x47/0x50
>>> > [ 44.871783] [<ffffffffa015a1f4>] ?
>>> > intel_dp_compute_config+0x274/0x600 [i915]
>>> > [ 44.871803] [<ffffffffa0122cf3>]
>>> > assert_device_not_suspended.isra.8+0x43/0x50 [i915]
>>> > [ 44.871822] [<ffffffffa0125a20>] gen6_read32+0x30/0x150 [i915]
>>> > [ 44.871844] [<ffffffffa0154636>] intel_ddi_get_cdclk_freq+0xd6/0x140 [i915]
>>> > [ 44.871865] [<ffffffffa0139a92>] __intel_set_mode+0x1672/0x1750 [i915]
>>> > [ 44.871886] [<ffffffffa01418e1>] intel_set_mode+0x11/0x30 [i915]
>>> > [ 44.871906] [<ffffffffa01429ed>] intel_crtc_set_config+0xa9d/0xeb0 [i915]
>>> > [ 44.871923] [<ffffffffa0026283>]
>>> > drm_mode_set_config_internal+0x63/0x100 [drm]
>>> > [ 44.871938] [<ffffffffa002a7e3>] drm_mode_setcrtc+0x283/0x580 [drm]
>>> > [ 44.871948] [<ffffffffa001c81f>] drm_ioctl+0x1df/0x6a0 [drm]
>>> > [ 44.871954] [<ffffffff811e07b0>] do_vfs_ioctl+0x2e0/0x4e0
>>> > [ 44.871957] [<ffffffff816f6af7>] ? sysret_check+0x1b/0x56
>>> > [ 44.871962] [<ffffffff810bfb0d>] ? trace_hardirqs_on_caller+0x15d/0x200
>>> > [ 44.871966] [<ffffffff811e0a31>] SyS_ioctl+0x81/0xa0
>>> > [ 44.871969] [<ffffffff816f6ad2>] system_call_fastpath+0x16/0x1b
>>> > [ 44.871972] ---[ end trace 91bf8920a2c6b824 ]---
>>> > [ 44.871975] ------------[ cut here ]------------
>>> > [ 44.871994] WARNING: CPU: 0 PID: 1745 at
>>> > drivers/gpu/drm/i915/intel_uncore.c:528
>>> > hsw_unclaimed_reg_debug+0x6d/0x80 [i915]()
>>> > [ 44.871996] Unclaimed register detected before reading register 0x130040
>>> > [ 44.871997] Modules linked in: hid_multitouch hid_sensor_hub
>>> > snd_hda_codec_hdmi intel_rapl x86_pkg_temp_thermal intel_powerclamp
>>> > efivars snd_hda_intel btusb snd_hda_controller snd_hda_codec snd_hwdep
>>> > iwlmvm snd_pcm_oss snd_mixer_oss iwlwifi mei_me mei snd_pcm snd_timer
>>> > int3403_thermal i2c_designware_platform i2c_designware_core acpi_pad
>>> > fuse nls_utf8 nls_cp437 vfat fat i915 sdhci_pci drm_kms_helper e1000e
>>> > drm sdhci_acpi sdhci
>>> > [ 44.872025] CPU: 0 PID: 1745 Comm: pm_rpm Tainted: G W
>>> > 3.17.0-rc5.1409171019pz+ #1120
>>> > [ 44.872026] Hardware name: Intel Corporation Broadwell Client
>>> > platform/Wilson Beach SDS, BIOS BDW-E2R1.86C.0072.R03.1405072127
>>> > 05/07/2014
>>> > [ 44.872028] 0000000000000009 ffff8800aa763a88 ffffffff816ec803
>>> > ffff8800aa763ad0
>>> > [ 44.872032] ffff8800aa763ac0 ffffffff8107a0c8 ffff88023ec20000
>>> > 0000000000130040
>>> > [ 44.872035] ffff88023f12b3d8 0000000000130040 ffff88023ec20000
>>> > ffff8800aa763b20
>>> > [ 44.872039] Call Trace:
>>> > [ 44.872042] [<ffffffff816ec803>] dump_stack+0x4d/0x66
>>> > [ 44.872046] [<ffffffff8107a0c8>] warn_slowpath_common+0x78/0xa0
>>> > [ 44.872049] [<ffffffff8107a137>] warn_slowpath_fmt+0x47/0x50
>>> > [ 44.872068] [<ffffffffa0122bbd>] hsw_unclaimed_reg_debug+0x6d/0x80 [i915]
>>> > [ 44.872087] [<ffffffffa0125a41>] gen6_read32+0x51/0x150 [i915]
>>> > [ 44.872109] [<ffffffffa0154636>] intel_ddi_get_cdclk_freq+0xd6/0x140 [i915]
>>> > [ 44.872129] [<ffffffffa0139a92>] __intel_set_mode+0x1672/0x1750 [i915]
>>> > [ 44.872149] [<ffffffffa01418e1>] intel_set_mode+0x11/0x30 [i915]
>>> > [ 44.872168] [<ffffffffa01429ed>] intel_crtc_set_config+0xa9d/0xeb0 [i915]
>>> > [ 44.872182] [<ffffffffa0026283>]
>>> > drm_mode_set_config_internal+0x63/0x100 [drm]
>>> > [ 44.872196] [<ffffffffa002a7e3>] drm_mode_setcrtc+0x283/0x580 [drm]
>>> > [ 44.872205] [<ffffffffa001c81f>] drm_ioctl+0x1df/0x6a0 [drm]
>>> > [ 44.872210] [<ffffffff811e07b0>] do_vfs_ioctl+0x2e0/0x4e0
>>> > [ 44.872213] [<ffffffff816f6af7>] ? sysret_check+0x1b/0x56
>>> > [ 44.872218] [<ffffffff810bfb0d>] ? trace_hardirqs_on_caller+0x15d/0x200
>>> > [ 44.872221] [<ffffffff811e0a31>] SyS_ioctl+0x81/0xa0
>>> > [ 44.872224] [<ffffffff816f6ad2>] system_call_fastpath+0x16/0x1b
>>> > [ 44.872226] ---[ end trace 91bf8920a2c6b825 ]---
>>> > [ 44.872228] ------------[ cut here ]------------
>>> > [ 44.872246] WARNING: CPU: 0 PID: 1745 at
>>> > drivers/gpu/drm/i915/intel_uncore.c:528
>>> > hsw_unclaimed_reg_debug+0x6d/0x80 [i915]()
>>> > [ 44.872248] Unclaimed register detected after reading register 0x130040
>>> > [ 44.872249] Modules linked in: hid_multitouch hid_sensor_hub
>>> > snd_hda_codec_hdmi intel_rapl x86_pkg_temp_thermal intel_powerclamp
>>> > efivars snd_hda_intel btusb snd_hda_controller snd_hda_codec snd_hwdep
>>> > iwlmvm snd_pcm_oss snd_mixer_oss iwlwifi mei_me mei snd_pcm snd_timer
>>> > int3403_thermal i2c_designware_platform i2c_designware_core acpi_pad
>>> > fuse nls_utf8 nls_cp437 vfat fat i915 sdhci_pci drm_kms_helper e1000e
>>> > drm sdhci_acpi sdhci
>>> > [ 44.872276] CPU: 0 PID: 1745 Comm: pm_rpm Tainted: G W
>>> > 3.17.0-rc5.1409171019pz+ #1120
>>> > [ 44.872277] Hardware name: Intel Corporation Broadwell Client
>>> > platform/Wilson Beach SDS, BIOS BDW-E2R1.86C.0072.R03.1405072127
>>> > 05/07/2014
>>> > [ 44.872279] 0000000000000009 ffff8800aa763a88 ffffffff816ec803
>>> > ffff8800aa763ad0
>>> > [ 44.872282] ffff8800aa763ac0 ffffffff8107a0c8 ffff88023ec20000
>>> > 0000000000130040
>>> > [ 44.872286] 00000000ffffffff 0000000000130040 ffff88023ec20000
>>> > ffff8800aa763b20
>>> > [ 44.872289] Call Trace:
>>> > [ 44.872293] [<ffffffff816ec803>] dump_stack+0x4d/0x66
>>> > [ 44.872296] [<ffffffff8107a0c8>] warn_slowpath_common+0x78/0xa0
>>> > [ 44.872299] [<ffffffff8107a137>] warn_slowpath_fmt+0x47/0x50
>>> > [ 44.872318] [<ffffffffa0122bbd>] hsw_unclaimed_reg_debug+0x6d/0x80 [i915]
>>> > [ 44.872335] [<ffffffffa0125a7e>] gen6_read32+0x8e/0x150 [i915]
>>> > [ 44.872356] [<ffffffffa0154636>] intel_ddi_get_cdclk_freq+0xd6/0x140 [i915]
>>> > [ 44.872376] [<ffffffffa0139a92>] __intel_set_mode+0x1672/0x1750 [i915]
>>> > [ 44.872396] [<ffffffffa01418e1>] intel_set_mode+0x11/0x30 [i915]
>>> > [ 44.872416] [<ffffffffa01429ed>] intel_crtc_set_config+0xa9d/0xeb0 [i915]
>>> > [ 44.872429] [<ffffffffa0026283>]
>>> > drm_mode_set_config_internal+0x63/0x100 [drm]
>>> > [ 44.872443] [<ffffffffa002a7e3>] drm_mode_setcrtc+0x283/0x580 [drm]
>>> > [ 44.872453] [<ffffffffa001c81f>] drm_ioctl+0x1df/0x6a0 [drm]
>>> > [ 44.872458] [<ffffffff811e07b0>] do_vfs_ioctl+0x2e0/0x4e0
>>> > [ 44.872461] [<ffffffff816f6af7>] ? sysret_check+0x1b/0x56
>>> > [ 44.872465] [<ffffffff810bfb0d>] ? trace_hardirqs_on_caller+0x15d/0x200
>>> > [ 44.872468] [<ffffffff811e0a31>] SyS_ioctl+0x81/0xa0
>>> > [ 44.872471] [<ffffffff816f6ad2>] system_call_fastpath+0x16/0x1b
>>> > [ 44.872473] ---[ end trace 91bf8920a2c6b826 ]---
>>> > [ 44.872512] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe
>>> > bpp: 18, dithering: 1
>>> >
>>> >>
>>> >> BR,
>>> >> Jani.
>>> >>
>>> >>
>>> >>>
>>> >>>>
>>> >>>> > + return true;
>>> >>>> > +
>>> >>>> > + return ilk_pipe_pixel_rate(pipe_config) <=
>>> >>>> > + intel_ddi_get_cdclk_freq(dev_priv) * 95 / 100;
>>> >>>>
>>> >>>> Otherwise
>>> >>>> Acked-by: Chris Wilson <chris@chris-wilson.co.uk>
>>> >>>> -Chris
>>> >>>>
>>> >>>> --
>>> >>>> Chris Wilson, Intel Open Source Technology Centre
>>> >>>
>>> >>> --
>>> >>> Ville Syrjälä
>>> >>> Intel OTC
>>> >>> _______________________________________________
>>> >>> Intel-gfx mailing list
>>> >>> Intel-gfx@lists.freedesktop.org
>>> >>> http://lists.freedesktop.org/mailman/listinfo/intel-gfx
>>> >>
>>> >> --
>>> >> Jani Nikula, Intel Open Source Technology Center
>>> >> _______________________________________________
>>> >> Intel-gfx mailing list
>>> >> Intel-gfx@lists.freedesktop.org
>>> >> http://lists.freedesktop.org/mailman/listinfo/intel-gfx
>>> >
>>> >
>>> >
>>> > --
>>> > Paulo Zanoni
>>>
>>>
>>>
>>> --
>>> Paulo Zanoni
>>
>> --
>> Ville Syrjälä
>> Intel OTC
>
> --
> Jani Nikula, Intel Open Source Technology Center
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx
--
Rodrigo Vivi
Blog: http://blog.vivi.eng.br
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH v2] drm/i915: Don't enable IPS when pixel rate exceeds 95% of cdclk
2015-05-20 20:40 ` Rodrigo Vivi
@ 2015-05-20 20:45 ` Paulo Zanoni
0 siblings, 0 replies; 12+ messages in thread
From: Paulo Zanoni @ 2015-05-20 20:45 UTC (permalink / raw)
To: Rodrigo Vivi; +Cc: Intel Graphics Development
2015-05-20 17:40 GMT-03:00 Rodrigo Vivi <rodrigo.vivi@gmail.com>:
> I'm convinced Unclaimed regs Paulo saw came from somewhere else since
> I just got it with pm_rpm rte with no patch applied....
>
> So I'd suggest to merge this patch... Although it also doesn't fix the
> flicker I see here so the bug would still be open...
>
> Anyway,
> Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Nope. The unclaimed register error you see is a recent regression. It
didn't happen back in 2014 when I tested the IPS patch. When I report
regressions like this to the mailing list I always test the revert, so
at that time, with that state on drm-intel-nightly, that patch was
certainly introducing the regression. Maybe something changed now? Did
you retest?
Also, which frequency value are you currently reading? The FCLK one?
If it's the FCLK frequency, it's not really what you want.
>
> On Thu, Sep 18, 2014 at 4:56 AM, Jani Nikula
> <jani.nikula@linux.intel.com> wrote:
>> On Wed, 17 Sep 2014, Ville Syrjälä <ville.syrjala@linux.intel.com> wrote:
>>> On Wed, Sep 17, 2014 at 11:10:48AM -0300, Paulo Zanoni wrote:
>>>> 2014-09-17 11:05 GMT-03:00 Paulo Zanoni <przanoni@gmail.com>:
>>>> > 2014-09-15 4:22 GMT-03:00 Jani Nikula <jani.nikula@linux.intel.com>:
>>>> >> On Fri, 12 Sep 2014, Ville Syrjälä <ville.syrjala@linux.intel.com> wrote:
>>>> >>> On Fri, Sep 12, 2014 at 04:42:33PM +0100, Chris Wilson wrote:
>>>> >>>> On Fri, Sep 12, 2014 at 05:01:57PM +0300, ville.syrjala@linux.intel.com wrote:
>>>> >>>> > From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>>>> >>>> >
>>>> >>>> > Bspec says we shouldn't enable IPS on BDW when the pipe pixel rate
>>>> >>>> > exceeds 95% of the core display clock. Apparently this can cause
>>>> >>>> > underruns.
>>>> >>>> >
>>>> >>>> > There's no similar restriction listed for HSW, so leave that one alone
>>>> >>>> > for now.
>>>> >>>> >
>>>> >>>> > v2: Add pipe_config_supports_ips() (Chris)
>>>> >>>> >
>>>> >>>> > Tested-by: Timo Aaltonen <tjaalton@ubuntu.com>
>>>> >>>> > Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=83497
>>>> >>>> > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
>>>> >>>> > ---
>>>> >>>> > drivers/gpu/drm/i915/intel_display.c | 21 +++++++++++++++++++--
>>>> >>>> > drivers/gpu/drm/i915/intel_drv.h | 1 +
>>>> >>>> > drivers/gpu/drm/i915/intel_pm.c | 16 +++++++---------
>>>> >>>> > 3 files changed, 27 insertions(+), 11 deletions(-)
>>>> >>>> >
>>>> >>>> > diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
>>>> >>>> > index 965eb3c..7809177 100644
>>>> >>>> > --- a/drivers/gpu/drm/i915/intel_display.c
>>>> >>>> > +++ b/drivers/gpu/drm/i915/intel_display.c
>>>> >>>> > @@ -5241,12 +5241,29 @@ retry:
>>>> >>>> > return setup_ok ? 0 : -EINVAL;
>>>> >>>> > }
>>>> >>>> >
>>>> >>>> > +static bool pipe_config_supports_ips(struct drm_i915_private *dev_priv,
>>>> >>>> > + struct intel_crtc_config *pipe_config)
>>>> >>>> > +{
>>>> >>>> > + if (pipe_config->pipe_bpp > 24)
>>>> >>>> > + return false;
>>>> >>>> > +
>>>> >>>> > + /* HSW can handle pixel rate up to cdclk? */
>>>> >>>> > + if (IS_HASWELL(dev_priv->dev))
>>>> >>>>
>>>> >>>> This only needs IS_HASWELL(dev_priv)
>>>> >>>
>>>> >>> old habits...
>>>> >>
>>>> >> Thanks to your old habits I didn't have to make any changes when pushing
>>>> >> this to drm-intel-fixes which is still old habit land. Thanks for the
>>>> >> patch and review.
>>>>
>>>> And another detail: even if the register read worked, we'd have
>>>> printed a bad value since the cdclock is disabled at the moment we run
>>>> the function, so we'd return the FCLK frequency. So maybe we need to
>>>> cache the value of the "cdclk under normal display operation" and
>>>> reuse it here.
>>>
>>> Yeah. We already do that on VLV/CHV to some extent. We should just do
>>> it for all platforms. Although for this case what we'd need to do is
>>> precalculate the optimal cdclk during compute_config phase and use
>>> that value for these checks, and then during global_resources we
>>> actually change the cdclk to match the precomputed value.
>>>
>>> Also if someone takes this on they could also unify the ddi cdclk
>>> code to look more like the other platforms, and perhaps even implement
>>> support for changing the cdclk frequency on HSW/BDW ;)
>>
>> I've dropped the commit from drm-intel-fixes and reopened the bug. We
>> need someone(tm) to look at this now.
>>
>> BR,
>> Jani.
>>
>>
>>
>>>
>>>>
>>>> >
>>>> > This patches causes a regression on igt/pm_rpm/rte:
>>>> >
>>>> > [ 44.871662] [drm:intel_dp_compute_config] DP link bw required
>>>> > 650358 available 1728000
>>>> > [ 44.871666] ------------[ cut here ]------------
>>>> > [ 44.871691] WARNING: CPU: 0 PID: 1745 at
>>>> > drivers/gpu/drm/i915/intel_uncore.c:47
>>>> > assert_device_not_suspended.isra.8+0x43/0x50 [i915]()
>>>> > [ 44.871692] Device suspended
>>>> > [ 44.871694] Modules linked in: hid_multitouch hid_sensor_hub
>>>> > snd_hda_codec_hdmi intel_rapl x86_pkg_temp_thermal intel_powerclamp
>>>> > efivars snd_hda_intel btusb snd_hda_controller snd_hda_codec snd_hwdep
>>>> > iwlmvm snd_pcm_oss snd_mixer_oss iwlwifi mei_me mei snd_pcm snd_timer
>>>> > int3403_thermal i2c_designware_platform i2c_designware_core acpi_pad
>>>> > fuse nls_utf8 nls_cp437 vfat fat i915 sdhci_pci drm_kms_helper e1000e
>>>> > drm sdhci_acpi sdhci
>>>> > [ 44.871726] CPU: 0 PID: 1745 Comm: pm_rpm Not tainted
>>>> > 3.17.0-rc5.1409171019pz+ #1120
>>>> > [ 44.871728] Hardware name: Intel Corporation Broadwell Client
>>>> > platform/Wilson Beach SDS, BIOS BDW-E2R1.86C.0072.R03.1405072127
>>>> > 05/07/2014
>>>> > [ 44.871730] 0000000000000009 ffff8800aa763a90 ffffffff816ec803
>>>> > ffff8800aa763ad8
>>>> > [ 44.871735] ffff8800aa763ac8 ffffffff8107a0c8 ffff88023ec20068
>>>> > 0000000000130040
>>>> > [ 44.871739] ffff88023f12b3d8 0000000000130040 ffff88023ec20000
>>>> > ffff8800aa763b28
>>>> > [ 44.871743] Call Trace:
>>>> > [ 44.871749] [<ffffffff816ec803>] dump_stack+0x4d/0x66
>>>> > [ 44.871754] [<ffffffff8107a0c8>] warn_slowpath_common+0x78/0xa0
>>>> > [ 44.871758] [<ffffffff8107a137>] warn_slowpath_fmt+0x47/0x50
>>>> > [ 44.871783] [<ffffffffa015a1f4>] ?
>>>> > intel_dp_compute_config+0x274/0x600 [i915]
>>>> > [ 44.871803] [<ffffffffa0122cf3>]
>>>> > assert_device_not_suspended.isra.8+0x43/0x50 [i915]
>>>> > [ 44.871822] [<ffffffffa0125a20>] gen6_read32+0x30/0x150 [i915]
>>>> > [ 44.871844] [<ffffffffa0154636>] intel_ddi_get_cdclk_freq+0xd6/0x140 [i915]
>>>> > [ 44.871865] [<ffffffffa0139a92>] __intel_set_mode+0x1672/0x1750 [i915]
>>>> > [ 44.871886] [<ffffffffa01418e1>] intel_set_mode+0x11/0x30 [i915]
>>>> > [ 44.871906] [<ffffffffa01429ed>] intel_crtc_set_config+0xa9d/0xeb0 [i915]
>>>> > [ 44.871923] [<ffffffffa0026283>]
>>>> > drm_mode_set_config_internal+0x63/0x100 [drm]
>>>> > [ 44.871938] [<ffffffffa002a7e3>] drm_mode_setcrtc+0x283/0x580 [drm]
>>>> > [ 44.871948] [<ffffffffa001c81f>] drm_ioctl+0x1df/0x6a0 [drm]
>>>> > [ 44.871954] [<ffffffff811e07b0>] do_vfs_ioctl+0x2e0/0x4e0
>>>> > [ 44.871957] [<ffffffff816f6af7>] ? sysret_check+0x1b/0x56
>>>> > [ 44.871962] [<ffffffff810bfb0d>] ? trace_hardirqs_on_caller+0x15d/0x200
>>>> > [ 44.871966] [<ffffffff811e0a31>] SyS_ioctl+0x81/0xa0
>>>> > [ 44.871969] [<ffffffff816f6ad2>] system_call_fastpath+0x16/0x1b
>>>> > [ 44.871972] ---[ end trace 91bf8920a2c6b824 ]---
>>>> > [ 44.871975] ------------[ cut here ]------------
>>>> > [ 44.871994] WARNING: CPU: 0 PID: 1745 at
>>>> > drivers/gpu/drm/i915/intel_uncore.c:528
>>>> > hsw_unclaimed_reg_debug+0x6d/0x80 [i915]()
>>>> > [ 44.871996] Unclaimed register detected before reading register 0x130040
>>>> > [ 44.871997] Modules linked in: hid_multitouch hid_sensor_hub
>>>> > snd_hda_codec_hdmi intel_rapl x86_pkg_temp_thermal intel_powerclamp
>>>> > efivars snd_hda_intel btusb snd_hda_controller snd_hda_codec snd_hwdep
>>>> > iwlmvm snd_pcm_oss snd_mixer_oss iwlwifi mei_me mei snd_pcm snd_timer
>>>> > int3403_thermal i2c_designware_platform i2c_designware_core acpi_pad
>>>> > fuse nls_utf8 nls_cp437 vfat fat i915 sdhci_pci drm_kms_helper e1000e
>>>> > drm sdhci_acpi sdhci
>>>> > [ 44.872025] CPU: 0 PID: 1745 Comm: pm_rpm Tainted: G W
>>>> > 3.17.0-rc5.1409171019pz+ #1120
>>>> > [ 44.872026] Hardware name: Intel Corporation Broadwell Client
>>>> > platform/Wilson Beach SDS, BIOS BDW-E2R1.86C.0072.R03.1405072127
>>>> > 05/07/2014
>>>> > [ 44.872028] 0000000000000009 ffff8800aa763a88 ffffffff816ec803
>>>> > ffff8800aa763ad0
>>>> > [ 44.872032] ffff8800aa763ac0 ffffffff8107a0c8 ffff88023ec20000
>>>> > 0000000000130040
>>>> > [ 44.872035] ffff88023f12b3d8 0000000000130040 ffff88023ec20000
>>>> > ffff8800aa763b20
>>>> > [ 44.872039] Call Trace:
>>>> > [ 44.872042] [<ffffffff816ec803>] dump_stack+0x4d/0x66
>>>> > [ 44.872046] [<ffffffff8107a0c8>] warn_slowpath_common+0x78/0xa0
>>>> > [ 44.872049] [<ffffffff8107a137>] warn_slowpath_fmt+0x47/0x50
>>>> > [ 44.872068] [<ffffffffa0122bbd>] hsw_unclaimed_reg_debug+0x6d/0x80 [i915]
>>>> > [ 44.872087] [<ffffffffa0125a41>] gen6_read32+0x51/0x150 [i915]
>>>> > [ 44.872109] [<ffffffffa0154636>] intel_ddi_get_cdclk_freq+0xd6/0x140 [i915]
>>>> > [ 44.872129] [<ffffffffa0139a92>] __intel_set_mode+0x1672/0x1750 [i915]
>>>> > [ 44.872149] [<ffffffffa01418e1>] intel_set_mode+0x11/0x30 [i915]
>>>> > [ 44.872168] [<ffffffffa01429ed>] intel_crtc_set_config+0xa9d/0xeb0 [i915]
>>>> > [ 44.872182] [<ffffffffa0026283>]
>>>> > drm_mode_set_config_internal+0x63/0x100 [drm]
>>>> > [ 44.872196] [<ffffffffa002a7e3>] drm_mode_setcrtc+0x283/0x580 [drm]
>>>> > [ 44.872205] [<ffffffffa001c81f>] drm_ioctl+0x1df/0x6a0 [drm]
>>>> > [ 44.872210] [<ffffffff811e07b0>] do_vfs_ioctl+0x2e0/0x4e0
>>>> > [ 44.872213] [<ffffffff816f6af7>] ? sysret_check+0x1b/0x56
>>>> > [ 44.872218] [<ffffffff810bfb0d>] ? trace_hardirqs_on_caller+0x15d/0x200
>>>> > [ 44.872221] [<ffffffff811e0a31>] SyS_ioctl+0x81/0xa0
>>>> > [ 44.872224] [<ffffffff816f6ad2>] system_call_fastpath+0x16/0x1b
>>>> > [ 44.872226] ---[ end trace 91bf8920a2c6b825 ]---
>>>> > [ 44.872228] ------------[ cut here ]------------
>>>> > [ 44.872246] WARNING: CPU: 0 PID: 1745 at
>>>> > drivers/gpu/drm/i915/intel_uncore.c:528
>>>> > hsw_unclaimed_reg_debug+0x6d/0x80 [i915]()
>>>> > [ 44.872248] Unclaimed register detected after reading register 0x130040
>>>> > [ 44.872249] Modules linked in: hid_multitouch hid_sensor_hub
>>>> > snd_hda_codec_hdmi intel_rapl x86_pkg_temp_thermal intel_powerclamp
>>>> > efivars snd_hda_intel btusb snd_hda_controller snd_hda_codec snd_hwdep
>>>> > iwlmvm snd_pcm_oss snd_mixer_oss iwlwifi mei_me mei snd_pcm snd_timer
>>>> > int3403_thermal i2c_designware_platform i2c_designware_core acpi_pad
>>>> > fuse nls_utf8 nls_cp437 vfat fat i915 sdhci_pci drm_kms_helper e1000e
>>>> > drm sdhci_acpi sdhci
>>>> > [ 44.872276] CPU: 0 PID: 1745 Comm: pm_rpm Tainted: G W
>>>> > 3.17.0-rc5.1409171019pz+ #1120
>>>> > [ 44.872277] Hardware name: Intel Corporation Broadwell Client
>>>> > platform/Wilson Beach SDS, BIOS BDW-E2R1.86C.0072.R03.1405072127
>>>> > 05/07/2014
>>>> > [ 44.872279] 0000000000000009 ffff8800aa763a88 ffffffff816ec803
>>>> > ffff8800aa763ad0
>>>> > [ 44.872282] ffff8800aa763ac0 ffffffff8107a0c8 ffff88023ec20000
>>>> > 0000000000130040
>>>> > [ 44.872286] 00000000ffffffff 0000000000130040 ffff88023ec20000
>>>> > ffff8800aa763b20
>>>> > [ 44.872289] Call Trace:
>>>> > [ 44.872293] [<ffffffff816ec803>] dump_stack+0x4d/0x66
>>>> > [ 44.872296] [<ffffffff8107a0c8>] warn_slowpath_common+0x78/0xa0
>>>> > [ 44.872299] [<ffffffff8107a137>] warn_slowpath_fmt+0x47/0x50
>>>> > [ 44.872318] [<ffffffffa0122bbd>] hsw_unclaimed_reg_debug+0x6d/0x80 [i915]
>>>> > [ 44.872335] [<ffffffffa0125a7e>] gen6_read32+0x8e/0x150 [i915]
>>>> > [ 44.872356] [<ffffffffa0154636>] intel_ddi_get_cdclk_freq+0xd6/0x140 [i915]
>>>> > [ 44.872376] [<ffffffffa0139a92>] __intel_set_mode+0x1672/0x1750 [i915]
>>>> > [ 44.872396] [<ffffffffa01418e1>] intel_set_mode+0x11/0x30 [i915]
>>>> > [ 44.872416] [<ffffffffa01429ed>] intel_crtc_set_config+0xa9d/0xeb0 [i915]
>>>> > [ 44.872429] [<ffffffffa0026283>]
>>>> > drm_mode_set_config_internal+0x63/0x100 [drm]
>>>> > [ 44.872443] [<ffffffffa002a7e3>] drm_mode_setcrtc+0x283/0x580 [drm]
>>>> > [ 44.872453] [<ffffffffa001c81f>] drm_ioctl+0x1df/0x6a0 [drm]
>>>> > [ 44.872458] [<ffffffff811e07b0>] do_vfs_ioctl+0x2e0/0x4e0
>>>> > [ 44.872461] [<ffffffff816f6af7>] ? sysret_check+0x1b/0x56
>>>> > [ 44.872465] [<ffffffff810bfb0d>] ? trace_hardirqs_on_caller+0x15d/0x200
>>>> > [ 44.872468] [<ffffffff811e0a31>] SyS_ioctl+0x81/0xa0
>>>> > [ 44.872471] [<ffffffff816f6ad2>] system_call_fastpath+0x16/0x1b
>>>> > [ 44.872473] ---[ end trace 91bf8920a2c6b826 ]---
>>>> > [ 44.872512] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe
>>>> > bpp: 18, dithering: 1
>>>> >
>>>> >>
>>>> >> BR,
>>>> >> Jani.
>>>> >>
>>>> >>
>>>> >>>
>>>> >>>>
>>>> >>>> > + return true;
>>>> >>>> > +
>>>> >>>> > + return ilk_pipe_pixel_rate(pipe_config) <=
>>>> >>>> > + intel_ddi_get_cdclk_freq(dev_priv) * 95 / 100;
>>>> >>>>
>>>> >>>> Otherwise
>>>> >>>> Acked-by: Chris Wilson <chris@chris-wilson.co.uk>
>>>> >>>> -Chris
>>>> >>>>
>>>> >>>> --
>>>> >>>> Chris Wilson, Intel Open Source Technology Centre
>>>> >>>
>>>> >>> --
>>>> >>> Ville Syrjälä
>>>> >>> Intel OTC
>>>> >>> _______________________________________________
>>>> >>> Intel-gfx mailing list
>>>> >>> Intel-gfx@lists.freedesktop.org
>>>> >>> http://lists.freedesktop.org/mailman/listinfo/intel-gfx
>>>> >>
>>>> >> --
>>>> >> Jani Nikula, Intel Open Source Technology Center
>>>> >> _______________________________________________
>>>> >> Intel-gfx mailing list
>>>> >> Intel-gfx@lists.freedesktop.org
>>>> >> http://lists.freedesktop.org/mailman/listinfo/intel-gfx
>>>> >
>>>> >
>>>> >
>>>> > --
>>>> > Paulo Zanoni
>>>>
>>>>
>>>>
>>>> --
>>>> Paulo Zanoni
>>>
>>> --
>>> Ville Syrjälä
>>> Intel OTC
>>
>> --
>> Jani Nikula, Intel Open Source Technology Center
>> _______________________________________________
>> Intel-gfx mailing list
>> Intel-gfx@lists.freedesktop.org
>> http://lists.freedesktop.org/mailman/listinfo/intel-gfx
>
>
>
> --
> Rodrigo Vivi
> Blog: http://blog.vivi.eng.br
--
Paulo Zanoni
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 12+ messages in thread
end of thread, other threads:[~2015-05-20 20:45 UTC | newest]
Thread overview: 12+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2014-09-11 10:54 [PATCH] drm/i915: Don't enable IPS when pixel rate exceeds 95% of cdclk ville.syrjala
2014-09-11 11:03 ` Chris Wilson
2014-09-12 14:01 ` [PATCH v2] " ville.syrjala
2014-09-12 15:42 ` Chris Wilson
2014-09-12 15:49 ` Ville Syrjälä
2014-09-15 7:22 ` Jani Nikula
2014-09-17 14:05 ` Paulo Zanoni
2014-09-17 14:10 ` Paulo Zanoni
2014-09-17 14:43 ` Ville Syrjälä
2014-09-18 11:56 ` Jani Nikula
2015-05-20 20:40 ` Rodrigo Vivi
2015-05-20 20:45 ` Paulo Zanoni
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