* [PATCH 0/4] MIPS: Netlogic: XLR/XLS updates
@ 2011-08-23 8:04 Jayachandran C
2011-08-23 8:05 ` [PATCH 1/4] MIPS: Netlogic: Change load address Jayachandran C
` (3 more replies)
0 siblings, 4 replies; 9+ messages in thread
From: Jayachandran C @ 2011-08-23 8:04 UTC (permalink / raw)
To: linux-mips, ralf
I had posted 3 of these changes as a single patch earlier, but here I have
split them up to different patches.
There is also a new patch to add very basic PCI MSI support on XLR and XLS.
Ganesan Ramalingam (1):
MIPS: Netlogic: Add basic MSI support for XLR/XLS
Jayachandran C (3):
MIPS: Netlogic: Change load address
MIPS: Netlogic: add r4k_wait as the cpu_wait
MIPS: Netlogic: Avoid unnecessary cache flushes
arch/mips/Kconfig | 1 +
.../asm/mach-netlogic/cpu-feature-overrides.h | 5 +-
arch/mips/include/asm/netlogic/xlr/msidef.h | 84 ++++++++++++++++++++
arch/mips/kernel/cpu-probe.c | 1 +
arch/mips/netlogic/Platform | 2 +-
arch/mips/netlogic/xlr/irq.c | 5 +
arch/mips/pci/pci-xlr.c | 51 ++++++++++++-
7 files changed, 144 insertions(+), 5 deletions(-)
create mode 100644 arch/mips/include/asm/netlogic/xlr/msidef.h
--
1.7.4.1
^ permalink raw reply [flat|nested] 9+ messages in thread
* [PATCH 1/4] MIPS: Netlogic: Change load address
2011-08-23 8:04 [PATCH 0/4] MIPS: Netlogic: XLR/XLS updates Jayachandran C
@ 2011-08-23 8:05 ` Jayachandran C
2011-08-23 12:01 ` Ralf Baechle
2011-08-23 8:05 ` [PATCH 2/4] MIPS: Netlogic: add r4k_wait as the cpu_wait Jayachandran C
` (2 subsequent siblings)
3 siblings, 1 reply; 9+ messages in thread
From: Jayachandran C @ 2011-08-23 8:05 UTC (permalink / raw)
To: linux-mips, ralf
Move load address from 0x84000000 to 0x80100000 to avoid wasting
memory.
Signed-off-by: Jayachandran C <jayachandranc@netlogicmicro.com>
---
arch/mips/netlogic/Platform | 2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/arch/mips/netlogic/Platform b/arch/mips/netlogic/Platform
index b648b48..502d912 100644
--- a/arch/mips/netlogic/Platform
+++ b/arch/mips/netlogic/Platform
@@ -13,4 +13,4 @@ cflags-$(CONFIG_NLM_XLR) += $(call cc-option,-march=xlr,-march=mips64)
# NETLOGIC XLR/XLS SoC, Simulator and boards
#
core-$(CONFIG_NLM_XLR) += arch/mips/netlogic/xlr/
-load-$(CONFIG_NLM_XLR_BOARD) += 0xffffffff84000000
+load-$(CONFIG_NLM_XLR_BOARD) += 0xffffffff80100000
--
1.7.4.1
^ permalink raw reply related [flat|nested] 9+ messages in thread
* [PATCH 2/4] MIPS: Netlogic: add r4k_wait as the cpu_wait
2011-08-23 8:04 [PATCH 0/4] MIPS: Netlogic: XLR/XLS updates Jayachandran C
2011-08-23 8:05 ` [PATCH 1/4] MIPS: Netlogic: Change load address Jayachandran C
@ 2011-08-23 8:05 ` Jayachandran C
2011-08-23 12:01 ` Ralf Baechle
2011-08-23 8:05 ` [PATCH 3/4] MIPS: Netlogic: Avoid unnecessary cache flushes Jayachandran C
2011-08-23 8:06 ` [PATCH 4/4] MIPS: Netlogic: Add basic MSI support for XLR/XLS Ganesan Ramalingam
3 siblings, 1 reply; 9+ messages in thread
From: Jayachandran C @ 2011-08-23 8:05 UTC (permalink / raw)
To: linux-mips, ralf
Use r4k_wait as the CPU wait function for XLR/XLS processors.
Signed-off-by: Jayachandran C <jayachandranc@netlogicmicro.com>
---
arch/mips/kernel/cpu-probe.c | 1 +
1 files changed, 1 insertions(+), 0 deletions(-)
diff --git a/arch/mips/kernel/cpu-probe.c b/arch/mips/kernel/cpu-probe.c
index ebc0cd2..664bc13 100644
--- a/arch/mips/kernel/cpu-probe.c
+++ b/arch/mips/kernel/cpu-probe.c
@@ -190,6 +190,7 @@ void __init check_wait(void)
case CPU_CAVIUM_OCTEON_PLUS:
case CPU_CAVIUM_OCTEON2:
case CPU_JZRISC:
+ case CPU_XLR:
cpu_wait = r4k_wait;
break;
--
1.7.4.1
^ permalink raw reply related [flat|nested] 9+ messages in thread
* [PATCH 3/4] MIPS: Netlogic: Avoid unnecessary cache flushes
2011-08-23 8:04 [PATCH 0/4] MIPS: Netlogic: XLR/XLS updates Jayachandran C
2011-08-23 8:05 ` [PATCH 1/4] MIPS: Netlogic: Change load address Jayachandran C
2011-08-23 8:05 ` [PATCH 2/4] MIPS: Netlogic: add r4k_wait as the cpu_wait Jayachandran C
@ 2011-08-23 8:05 ` Jayachandran C
2011-08-23 12:01 ` Ralf Baechle
2011-08-23 8:06 ` [PATCH 4/4] MIPS: Netlogic: Add basic MSI support for XLR/XLS Ganesan Ramalingam
3 siblings, 1 reply; 9+ messages in thread
From: Jayachandran C @ 2011-08-23 8:05 UTC (permalink / raw)
To: linux-mips, ralf
XLR dcache is fully coherent across CPUs, so avoid unnecessary
dcache flushes.
Signed-off-by: Jayachandran C <jayachandranc@netlogicmicro.com>
---
.../asm/mach-netlogic/cpu-feature-overrides.h | 5 ++---
1 files changed, 2 insertions(+), 3 deletions(-)
diff --git a/arch/mips/include/asm/mach-netlogic/cpu-feature-overrides.h b/arch/mips/include/asm/mach-netlogic/cpu-feature-overrides.h
index 3b72827..3780743 100644
--- a/arch/mips/include/asm/mach-netlogic/cpu-feature-overrides.h
+++ b/arch/mips/include/asm/mach-netlogic/cpu-feature-overrides.h
@@ -25,13 +25,12 @@
#define cpu_has_llsc 1
#define cpu_has_vtag_icache 0
#define cpu_has_dc_aliases 0
-#define cpu_has_ic_fills_f_dc 0
+#define cpu_has_ic_fills_f_dc 1
#define cpu_has_dsp 0
#define cpu_has_mipsmt 0
#define cpu_has_userlocal 0
-#define cpu_icache_snoops_remote_store 0
+#define cpu_icache_snoops_remote_store 1
-#define cpu_has_nofpuex 0
#define cpu_has_64bits 1
#define cpu_has_mips32r1 1
--
1.7.4.1
^ permalink raw reply related [flat|nested] 9+ messages in thread
* [PATCH 4/4] MIPS: Netlogic: Add basic MSI support for XLR/XLS
2011-08-23 8:04 [PATCH 0/4] MIPS: Netlogic: XLR/XLS updates Jayachandran C
` (2 preceding siblings ...)
2011-08-23 8:05 ` [PATCH 3/4] MIPS: Netlogic: Avoid unnecessary cache flushes Jayachandran C
@ 2011-08-23 8:06 ` Ganesan Ramalingam
2011-08-23 12:01 ` Ralf Baechle
3 siblings, 1 reply; 9+ messages in thread
From: Ganesan Ramalingam @ 2011-08-23 8:06 UTC (permalink / raw)
To: linux-mips, ralf
Add basic support for MSI.
Signed-off-by: Ganesan Ramalingam <ganesanr@netlogicmicro.com>
Signed-off-by: Jayachandran C <jayachandranc@netlogicmicro.com>
---
arch/mips/Kconfig | 1 +
arch/mips/include/asm/netlogic/xlr/msidef.h | 84 +++++++++++++++++++++++++++
arch/mips/netlogic/xlr/irq.c | 5 ++
arch/mips/pci/pci-xlr.c | 51 ++++++++++++++++-
4 files changed, 140 insertions(+), 1 deletions(-)
create mode 100644 arch/mips/include/asm/netlogic/xlr/msidef.h
diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
index b122adc..2bb1c85 100644
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -780,6 +780,7 @@ config NLM_XLR_BOARD
select CEVT_R4K
select CSRC_R4K
select IRQ_CPU
+ select ARCH_SUPPORTS_MSI
select ZONE_DMA if 64BIT
select SYNC_R4K
select SYS_HAS_EARLY_PRINTK
diff --git a/arch/mips/include/asm/netlogic/xlr/msidef.h b/arch/mips/include/asm/netlogic/xlr/msidef.h
new file mode 100644
index 0000000..7e39d40
--- /dev/null
+++ b/arch/mips/include/asm/netlogic/xlr/msidef.h
@@ -0,0 +1,84 @@
+/*
+ * Copyright 2003-2011 NetLogic Microsystems, Inc. (NetLogic). All rights
+ * reserved.
+ *
+ * This software is available to you under a choice of one of two
+ * licenses. You may choose to be licensed under the terms of the GNU
+ * General Public License (GPL) Version 2, available from the file
+ * COPYING in the main directory of this source tree, or the NetLogic
+ * license below:
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in
+ * the documentation and/or other materials provided with the
+ * distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY NETLOGIC ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL NETLOGIC OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
+ * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
+ * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
+ * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef ASM_RMI_MSIDEF_H
+#define ASM_RMI_MSIDEF_H
+
+/*
+ * Constants for Intel APIC based MSI messages.
+ * Adapted for the RMI XLR using identical defines
+ */
+
+/*
+ * Shifts for MSI data
+ */
+
+#define MSI_DATA_VECTOR_SHIFT 0
+#define MSI_DATA_VECTOR_MASK 0x000000ff
+#define MSI_DATA_VECTOR(v) (((v) << MSI_DATA_VECTOR_SHIFT) & \
+ MSI_DATA_VECTOR_MASK)
+
+#define MSI_DATA_DELIVERY_MODE_SHIFT 8
+#define MSI_DATA_DELIVERY_FIXED (0 << MSI_DATA_DELIVERY_MODE_SHIFT)
+#define MSI_DATA_DELIVERY_LOWPRI (1 << MSI_DATA_DELIVERY_MODE_SHIFT)
+
+#define MSI_DATA_LEVEL_SHIFT 14
+#define MSI_DATA_LEVEL_DEASSERT (0 << MSI_DATA_LEVEL_SHIFT)
+#define MSI_DATA_LEVEL_ASSERT (1 << MSI_DATA_LEVEL_SHIFT)
+
+#define MSI_DATA_TRIGGER_SHIFT 15
+#define MSI_DATA_TRIGGER_EDGE (0 << MSI_DATA_TRIGGER_SHIFT)
+#define MSI_DATA_TRIGGER_LEVEL (1 << MSI_DATA_TRIGGER_SHIFT)
+
+/*
+ * Shift/mask fields for msi address
+ */
+
+#define MSI_ADDR_BASE_HI 0
+#define MSI_ADDR_BASE_LO 0xfee00000
+
+#define MSI_ADDR_DEST_MODE_SHIFT 2
+#define MSI_ADDR_DEST_MODE_PHYSICAL (0 << MSI_ADDR_DEST_MODE_SHIFT)
+#define MSI_ADDR_DEST_MODE_LOGICAL (1 << MSI_ADDR_DEST_MODE_SHIFT)
+
+#define MSI_ADDR_REDIRECTION_SHIFT 3
+#define MSI_ADDR_REDIRECTION_CPU (0 << MSI_ADDR_REDIRECTION_SHIFT)
+#define MSI_ADDR_REDIRECTION_LOWPRI (1 << MSI_ADDR_REDIRECTION_SHIFT)
+
+#define MSI_ADDR_DEST_ID_SHIFT 12
+#define MSI_ADDR_DEST_ID_MASK 0x00ffff0
+#define MSI_ADDR_DEST_ID(dest) (((dest) << MSI_ADDR_DEST_ID_SHIFT) & \
+ MSI_ADDR_DEST_ID_MASK)
+
+#endif /* ASM_RMI_MSIDEF_H */
diff --git a/arch/mips/netlogic/xlr/irq.c b/arch/mips/netlogic/xlr/irq.c
index 521bb73..fc822c8 100644
--- a/arch/mips/netlogic/xlr/irq.c
+++ b/arch/mips/netlogic/xlr/irq.c
@@ -38,9 +38,14 @@
#include <linux/interrupt.h>
#include <linux/spinlock.h>
#include <linux/mm.h>
+#include <linux/msi.h>
+#include <linux/irq.h>
+#include <linux/irqdesc.h>
+#include <linux/pci.h>
#include <asm/mipsregs.h>
+#include <asm/netlogic/xlr/msidef.h>
#include <asm/netlogic/xlr/iomap.h>
#include <asm/netlogic/xlr/pic.h>
#include <asm/netlogic/xlr/xlr.h>
diff --git a/arch/mips/pci/pci-xlr.c b/arch/mips/pci/pci-xlr.c
index 38fece16..87404d0 100644
--- a/arch/mips/pci/pci-xlr.c
+++ b/arch/mips/pci/pci-xlr.c
@@ -36,12 +36,16 @@
#include <linux/pci.h>
#include <linux/kernel.h>
#include <linux/init.h>
+#include <linux/msi.h>
#include <linux/mm.h>
+#include <linux/irq.h>
+#include <linux/irqdesc.h>
#include <linux/console.h>
#include <asm/io.h>
#include <asm/netlogic/interrupt.h>
+#include <asm/netlogic/xlr/msidef.h>
#include <asm/netlogic/xlr/iomap.h>
#include <asm/netlogic/xlr/pic.h>
#include <asm/netlogic/xlr/xlr.h>
@@ -150,7 +154,7 @@ struct pci_controller nlm_pci_controller = {
.io_offset = 0x00000000UL,
};
-int __init pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
+static int get_irq_vector(const struct pci_dev *dev)
{
if (!nlm_chip_is_xls())
return PIC_PCIX_IRQ; /* for XLR just one IRQ*/
@@ -182,6 +186,51 @@ int __init pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
return 0;
}
+#ifdef CONFIG_PCI_MSI
+void destroy_irq(unsigned int irq)
+{
+ /* nothing to do yet */
+}
+
+void arch_teardown_msi_irq(unsigned int irq)
+{
+ destroy_irq(irq);
+}
+
+int arch_setup_msi_irq(struct pci_dev *dev, struct msi_desc *desc)
+{
+ struct msi_msg msg;
+ int irq, ret;
+
+ irq = get_irq_vector(dev);
+ if (irq <= 0)
+ return 1;
+
+ msg.address_hi = MSI_ADDR_BASE_HI;
+ msg.address_lo = MSI_ADDR_BASE_LO |
+ MSI_ADDR_DEST_MODE_PHYSICAL |
+ MSI_ADDR_REDIRECTION_CPU;
+
+ msg.data = MSI_DATA_TRIGGER_EDGE |
+ MSI_DATA_LEVEL_ASSERT |
+ MSI_DATA_DELIVERY_FIXED;
+
+ ret = irq_set_msi_desc(irq, desc);
+ if (ret < 0) {
+ destroy_irq(irq);
+ return ret;
+ }
+
+ write_msi_msg(irq, &msg);
+ return 0;
+}
+#endif
+
+int __init pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
+{
+ return get_irq_vector(dev);
+}
+
/* Do platform specific device initialization at pci_enable_device() time */
int pcibios_plat_dev_init(struct pci_dev *dev)
{
--
1.7.4.1
--
Jayachandran C.
jayachandranc@netlogicmicro.com (Netlogic Microsystems)
jchandra@freebsd.org (The FreeBSD Project)
^ permalink raw reply related [flat|nested] 9+ messages in thread
* Re: [PATCH 1/4] MIPS: Netlogic: Change load address
2011-08-23 8:05 ` [PATCH 1/4] MIPS: Netlogic: Change load address Jayachandran C
@ 2011-08-23 12:01 ` Ralf Baechle
0 siblings, 0 replies; 9+ messages in thread
From: Ralf Baechle @ 2011-08-23 12:01 UTC (permalink / raw)
To: Jayachandran C; +Cc: linux-mips
Queued for 3.2. Thanks,
Ralf
^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [PATCH 2/4] MIPS: Netlogic: add r4k_wait as the cpu_wait
2011-08-23 8:05 ` [PATCH 2/4] MIPS: Netlogic: add r4k_wait as the cpu_wait Jayachandran C
@ 2011-08-23 12:01 ` Ralf Baechle
0 siblings, 0 replies; 9+ messages in thread
From: Ralf Baechle @ 2011-08-23 12:01 UTC (permalink / raw)
To: Jayachandran C; +Cc: linux-mips
Queued for 3.2. Thanks,
Ralf
^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [PATCH 3/4] MIPS: Netlogic: Avoid unnecessary cache flushes
2011-08-23 8:05 ` [PATCH 3/4] MIPS: Netlogic: Avoid unnecessary cache flushes Jayachandran C
@ 2011-08-23 12:01 ` Ralf Baechle
0 siblings, 0 replies; 9+ messages in thread
From: Ralf Baechle @ 2011-08-23 12:01 UTC (permalink / raw)
To: Jayachandran C; +Cc: linux-mips
Queued for 3.2. Thanks,
Ralf
^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [PATCH 4/4] MIPS: Netlogic: Add basic MSI support for XLR/XLS
2011-08-23 8:06 ` [PATCH 4/4] MIPS: Netlogic: Add basic MSI support for XLR/XLS Ganesan Ramalingam
@ 2011-08-23 12:01 ` Ralf Baechle
0 siblings, 0 replies; 9+ messages in thread
From: Ralf Baechle @ 2011-08-23 12:01 UTC (permalink / raw)
To: Ganesan Ramalingam; +Cc: linux-mips
Queued for 3.2. Thanks,
Ralf
^ permalink raw reply [flat|nested] 9+ messages in thread
end of thread, other threads:[~2011-08-23 12:02 UTC | newest]
Thread overview: 9+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2011-08-23 8:04 [PATCH 0/4] MIPS: Netlogic: XLR/XLS updates Jayachandran C
2011-08-23 8:05 ` [PATCH 1/4] MIPS: Netlogic: Change load address Jayachandran C
2011-08-23 12:01 ` Ralf Baechle
2011-08-23 8:05 ` [PATCH 2/4] MIPS: Netlogic: add r4k_wait as the cpu_wait Jayachandran C
2011-08-23 12:01 ` Ralf Baechle
2011-08-23 8:05 ` [PATCH 3/4] MIPS: Netlogic: Avoid unnecessary cache flushes Jayachandran C
2011-08-23 12:01 ` Ralf Baechle
2011-08-23 8:06 ` [PATCH 4/4] MIPS: Netlogic: Add basic MSI support for XLR/XLS Ganesan Ramalingam
2011-08-23 12:01 ` Ralf Baechle
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