[PATCH 00/10] OMAP4: Smartreflex and Voltage layer support

[PATCH 00/10] OMAP4: Smartreflex and Voltage layer support

[Thara Gopinath]

From: thara gopinath <thara@ti.com>

This patch series adds support for OMAP4 support in the
smartreflex and voltage layer. The series involves extensions
to voltage layer and smartreflex layer for supporting OMAP4.
In addition it involves changes to pm debugfs layer to support
OMAP4 so that smartreflex and voltage debug entries can be
viewed, changes in opp layer so that opp layer gets enabled
for OMAP4, some changes in OMAP4 clock database and finally
addition of OMAP4 opp tables.
All these patches might not be dependent on voltage and
smartreflex layer but is required for the correct
functionality of these layers for OMAP4.

This series in based off origin/pm-opp branch off
Kevin Hilman's PM tree which is effectively 2.6.35 with
basic opp support added. But for this series to compile
and work properly one will have to apply the following
additional patches in the below mentioned order before
applying this series.
	https://patchwork.kernel.org/patch/119544/
	https://patchwork.kernel.org/patch/117347/
	https://patchwork.kernel.org/patch/117348/
	https://patchwork.kernel.org/patch/117349/
	http://marc.info/?l=linux-omap&m=128162263809748&w=2
	https://patchwork.kernel.org/patch/119854/
	all 5 patches from origin/pm-cpufreq branch off Kevin's pm tree
	http://marc.info/?l=linux-omap&m=128170725127719&w=2
				- all eight patches in this series

This patch series has been tested on OMAP4430 SDP with omap3_defconfig
with the following menuconfig options enabled
	System type -> TI OMAP Implementations -> Smartreflex Support
	System type -> TI OMAP Implementations ->
                Class 3 mode of Smartreflex Implementation

Benoit Cousson (1):
  OMAP4: hwmod: Add inital data for smartreflex modules.

Thara Gopinath (9):
  OMAP4: PM debugfs support
  OMAP4: OPP framework support
  OMAP4: Add the new voltage to vsel calculation formula
  OMAP4: Extend clock data.
  OMAP4: Adding voltage driver support
  OMAP4: Adding dev atrributes to OMAP4 smartreflex hwmod data
  OMAP4: Smartreflex framework extensions
  OMAP4: Enabling smartrefles class 3 driver.
  OMAP4: Add opp tables.

 arch/arm/mach-omap2/Makefile               |    2 +-
 arch/arm/mach-omap2/board-4430sdp.c        |    2 +
 arch/arm/mach-omap2/clock44xx_data.c       |   40 ++++-
 arch/arm/mach-omap2/omap_hwmod_44xx_data.c |  220 +++++++++++++++++++++++++
 arch/arm/mach-omap2/opp44xx.h              |   26 +++
 arch/arm/mach-omap2/opp44xx_data.c         |   80 +++++++++
 arch/arm/mach-omap2/pm-debug.c             |   53 +++++-
 arch/arm/mach-omap2/pm.c                   |    6 +-
 arch/arm/mach-omap2/smartreflex.c          |    7 +-
 arch/arm/mach-omap2/sr_device.c            |   21 ++-
 arch/arm/mach-omap2/voltage.c              |  246 +++++++++++++++++++++++++++-
 arch/arm/plat-omap/Kconfig                 |    2 +-
 arch/arm/plat-omap/Makefile                |    1 +
 arch/arm/plat-omap/include/plat/control.h  |   12 ++
 arch/arm/plat-omap/include/plat/voltage.h  |   20 ++-
 arch/arm/plat-omap/opp_twl_tps.c           |    8 +
 16 files changed, 721 insertions(+), 25 deletions(-)
 create mode 100644 arch/arm/mach-omap2/opp44xx.h
 create mode 100644 arch/arm/mach-omap2/opp44xx_data.c

-- 
1.7.1.GIT

[PATCH 01/10] OMAP4: PM debugfs support

[Thara Gopinath]

This patch extends pm debugfs to support OMAP4 debug entries
also. Currently for register dumps only CM1 and PRM modules
are added. CM2 is not added as the clockdomain read write
APIs assume CM1 base. Once this is fixed CM2 can also be
added in the OMAP4 register module table.

Signed-off-by: Thara Gopinath <thara@ti.com>
---
 arch/arm/mach-omap2/pm-debug.c |   53 ++++++++++++++++++++++++++++++++++-----
 1 files changed, 46 insertions(+), 7 deletions(-)

diff --git a/arch/arm/mach-omap2/pm-debug.c b/arch/arm/mach-omap2/pm-debug.c
index 05fe48b..0b2eaa6 100644
--- a/arch/arm/mach-omap2/pm-debug.c
+++ b/arch/arm/mach-omap2/pm-debug.c
@@ -221,7 +221,34 @@ static const struct pm_module_def omap3_pm_reg_modules[] = {
 	{ "USB", MOD_PRM, OMAP3430ES2_USBHOST_MOD, 0x58, 0xe8 },
 	{ "", 0, 0, 0, 0 },
 };
-
+static const struct pm_module_def omap4_pm_reg_modules[] = {
+	{ "CM1_OCP", MOD_CM, OMAP4430_CM1_OCP_SOCKET_MOD, 0, 0x40 },
+	{ "CKGEN", MOD_CM, OMAP4430_CM1_CKGEN_MOD, 0, 0x180 },
+	{ "MPU", MOD_CM, OMAP4430_CM1_MPU_MOD, 0, 0x20 },
+	{ "TESLA", MOD_CM, OMAP4430_CM1_TESLA_MOD, 0, 0x20 },
+	{ "ABE", MOD_CM, OMAP4430_CM1_ABE_MOD, 0, 0x88 },
+	{ "RESTORE", MOD_CM, OMAP4430_CM1_RESTORE_MOD, 0, 0x34 },
+	{ "INSTR", MOD_CM, OMAP4430_CM1_INSTR_MOD, 0, 0x30 },
+	{ "OCP", MOD_PRM, OMAP4430_PRM_OCP_SOCKET_MOD, 0, 0x40 },
+	{ "CLKGEN", MOD_PRM, OMAP4430_PRM_CKGEN_MOD, 0, 0x10 },
+	{ "MPU", MOD_PRM, OMAP4430_PRM_MPU_MOD, 0, 0x24 },
+	{ "TESLA", MOD_PRM, OMAP4430_PRM_TESLA_MOD, 0, 0x24 },
+	{ "ABE", MOD_PRM, OMAP4430_PRM_ABE_MOD, 0, 0x8C },
+	{ "AWYS_ON", MOD_PRM, OMAP4430_PRM_ALWAYS_ON_MOD, 0x24, 0x3C },
+	{ "CORE", MOD_PRM, OMAP4430_PRM_CORE_MOD, 0, 0x744 },
+	{ "IVAHD", MOD_PRM, OMAP4430_PRM_IVAHD_MOD, 0, 0x2C },
+	{ "CAM", MOD_PRM, OMAP4430_PRM_CAM_MOD, 0, 0x2C },
+	{ "DSS", MOD_PRM, OMAP4430_PRM_DSS_MOD, 0, 0x24 },
+	{ "GFX", MOD_PRM, OMAP4430_PRM_GFX_MOD, 0, 0x24 },
+	{ "L3INIT", MOD_PRM, OMAP4430_PRM_L3INIT_MOD, 0, 0xe4 },
+	{ "L4PER", MOD_PRM, OMAP4430_PRM_L4PER_MOD, 0, 0x168 },
+	{ "WKUP", MOD_PRM, OMAP4430_PRM_WKUP_MOD, 0x24, 0x84 },
+	{ "WKUP_CM", MOD_PRM, OMAP4430_PRM_WKUP_CM_MOD, 0, 0x88 },
+	{ "EMU", MOD_PRM, OMAP4430_PRM_EMU_MOD, 0, 0x24 },
+	{ "EMU_CM", MOD_PRM, OMAP4430_PRM_EMU_CM_MOD, 0, 0x20 },
+	{ "DEVICE", MOD_PRM, OMAP4430_PRM_DEVICE_MOD, 0, 0xf0 },
+	{ "", 0, 0, 0, 0 },
+};
 #define PM_DBG_MAX_REG_SETS 4
 
 static void *pm_dbg_reg_set[PM_DBG_MAX_REG_SETS];
@@ -247,11 +274,21 @@ static int pm_dbg_show_regs(struct seq_file *s, void *unused)
 	int i, j;
 	unsigned long val;
 	int reg_set = (int)s->private;
-	u32 *ptr;
+	u32 *ptr, cm_base, prm_base;
 	void *store = NULL;
 	int regs;
 	int linefeed;
 
+	if (cpu_is_omap34xx()) {
+		cm_base = OMAP3430_CM_BASE;
+		prm_base = OMAP3430_PRM_BASE;
+	} else if (cpu_is_omap44xx()) {
+		cm_base = OMAP4430_CM_BASE;
+		prm_base = OMAP4430_PRM_BASE;
+	} else {
+		return -EINVAL;
+	}
+
 	if (reg_set == 0) {
 		store = kmalloc(pm_dbg_get_regset_size(), GFP_KERNEL);
 		ptr = store;
@@ -268,12 +305,12 @@ static int pm_dbg_show_regs(struct seq_file *s, void *unused)
 		if (pm_dbg_reg_modules[i].type == MOD_CM)
 			seq_printf(s, "MOD: CM_%s (%08x)\n",
 				pm_dbg_reg_modules[i].name,
-				(u32)(OMAP3430_CM_BASE +
+				(u32)(cm_base +
 				pm_dbg_reg_modules[i].offset));
 		else
 			seq_printf(s, "MOD: PRM_%s (%08x)\n",
 				pm_dbg_reg_modules[i].name,
-				(u32)(OMAP3430_PRM_BASE +
+				(u32)(prm_base +
 				pm_dbg_reg_modules[i].offset));
 
 		for (j = pm_dbg_reg_modules[i].low;
@@ -592,10 +629,12 @@ static int __init pm_dbg_init(void)
 	if (pm_dbg_init_done)
 		return 0;
 
-	if (cpu_is_omap34xx())
+	if (cpu_is_omap34xx()) {
 		pm_dbg_reg_modules = omap3_pm_reg_modules;
-	else {
-		printk(KERN_ERR "%s: only OMAP3 supported\n", __func__);
+	} else if (cpu_is_omap44xx()) {
+		pm_dbg_reg_modules = omap4_pm_reg_modules;
+	} else {
+		printk(KERN_ERR "%s: only OMAP3/4 supported\n", __func__);
 		return -ENODEV;
 	}
 
-- 
1.7.1.GIT

[PATCH 02/10] OMAP4: OPP framework support

[Thara Gopinath]

This patch allows the compilation of the generic
opp layer for OMAP4 also.

Signed-off-by: Thara Gopinath <thara@ti.com>
---
 arch/arm/plat-omap/Makefile |    1 +
 1 files changed, 1 insertions(+), 0 deletions(-)

diff --git a/arch/arm/plat-omap/Makefile b/arch/arm/plat-omap/Makefile
index 852fa33..cbf8f2e 100644
--- a/arch/arm/plat-omap/Makefile
+++ b/arch/arm/plat-omap/Makefile
@@ -15,6 +15,7 @@ obj-$(CONFIG_ARCH_OMAP16XX) += ocpi.o
 # OPP support in (OMAP3+ only at the moment)
 ifdef CONFIG_PM
 obj-$(CONFIG_ARCH_OMAP3) += opp.o
+obj-$(CONFIG_ARCH_OMAP4) += opp.o
 obj-$(CONFIG_TWL4030_CORE) += opp_twl_tps.o
 endif
 
-- 
1.7.1.GIT

[PATCH 03/10] OMAP4: Add the new voltage to vsel calculation formula

[Thara Gopinath]

TWL6030 the power IC used along with OMAP4 in OMAP4 SDPs,
blaze boards and panda boards has a different formula
from that of TWL4030 for voltage to vsel and
vsel to voltage calculation. This patch implements the new
formula depending on the PMIC type.

Signed-off-by: Thara Gopinath <thara@ti.com>
---
 arch/arm/plat-omap/opp_twl_tps.c |    8 ++++++++
 1 files changed, 8 insertions(+), 0 deletions(-)

diff --git a/arch/arm/plat-omap/opp_twl_tps.c b/arch/arm/plat-omap/opp_twl_tps.c
index 112f106..9445733 100644
--- a/arch/arm/plat-omap/opp_twl_tps.c
+++ b/arch/arm/plat-omap/opp_twl_tps.c
@@ -13,6 +13,8 @@
  * XXX This code should be part of some other TWL/TPS code.
  */
 
+#include <linux/i2c/twl.h>
+
 #include <plat/opp_twl_tps.h>
 
 /**
@@ -24,6 +26,9 @@
  */
 unsigned long omap_twl_vsel_to_uv(const u8 vsel)
 {
+	if (twl_class_is_6030())
+		return ((((vsel - 1) * 125) + 7000)) * 100;
+
 	return (((vsel * 125) + 6000)) * 100;
 }
 
@@ -37,5 +42,8 @@ unsigned long omap_twl_vsel_to_uv(const u8 vsel)
 u8 omap_twl_uv_to_vsel(unsigned long uv)
 {
 	/* Round up to higher voltage */
+	if (twl_class_is_6030())
+		return DIV_ROUND_UP(uv - 700000, 12500) + 1;
+
 	return DIV_ROUND_UP(uv - 600000, 12500);
 }
-- 
1.7.1.GIT

[PATCH 04/10] OMAP4: Extend clock data.

[Thara Gopinath]

This patch extends the OMAP4 clock data to include
various x2 clockc nodes as the clock framework
skips a *2 whie calculating the dpll locked frequency.

Signed-off-by: Thara Gopinath <thara@ti.com>
---
This patch has a checkpatch.pl warning due to the clock
data base omap44xx_clks having all the entries
exceeding 80 chars. Since this data base is auto-generated
to maintain consistency the new entries added also exceed
80 chars.

 arch/arm/mach-omap2/clock44xx_data.c |   40 +++++++++++++++++++++++++++------
 1 files changed, 32 insertions(+), 8 deletions(-)

diff --git a/arch/arm/mach-omap2/clock44xx_data.c b/arch/arm/mach-omap2/clock44xx_data.c
index a0e369e..2c42d79 100644
--- a/arch/arm/mach-omap2/clock44xx_data.c
+++ b/arch/arm/mach-omap2/clock44xx_data.c
@@ -485,14 +485,21 @@ static struct clk dpll_core_m5_ck = {
 	.set_rate	= &omap2_clksel_set_rate,
 };
 
+static struct clk dpll_core_m5x2_ck = {
+	.name		= "dpll_core_m5x2_ck",
+	.parent		= &dpll_core_m5_ck,
+	.ops		= &clkops_null,
+	.recalc		= &omap3_clkoutx2_recalc,
+};
+
 static const struct clksel div_core_div[] = {
-	{ .parent = &dpll_core_m5_ck, .rates = div2_1to2_rates },
+	{ .parent = &dpll_core_m5x2_ck, .rates = div2_1to2_rates },
 	{ .parent = NULL },
 };
 
 static struct clk div_core_ck = {
 	.name		= "div_core_ck",
-	.parent		= &dpll_core_m5_ck,
+	.parent		= &dpll_core_m5x2_ck,
 	.clksel		= div_core_div,
 	.clksel_reg	= OMAP4430_CM_CLKSEL_CORE,
 	.clksel_mask	= OMAP4430_CLKSEL_CORE_MASK,
@@ -511,13 +518,13 @@ static const struct clksel_rate div4_1to8_rates[] = {
 };
 
 static const struct clksel div_iva_hs_clk_div[] = {
-	{ .parent = &dpll_core_m5_ck, .rates = div4_1to8_rates },
+	{ .parent = &dpll_core_m5x2_ck, .rates = div4_1to8_rates },
 	{ .parent = NULL },
 };
 
 static struct clk div_iva_hs_clk = {
 	.name		= "div_iva_hs_clk",
-	.parent		= &dpll_core_m5_ck,
+	.parent		= &dpll_core_m5x2_ck,
 	.clksel		= div_iva_hs_clk_div,
 	.clksel_reg	= OMAP4430_CM_BYPCLK_DPLL_IVA,
 	.clksel_mask	= OMAP4430_CLKSEL_0_1_MASK,
@@ -529,7 +536,7 @@ static struct clk div_iva_hs_clk = {
 
 static struct clk div_mpu_hs_clk = {
 	.name		= "div_mpu_hs_clk",
-	.parent		= &dpll_core_m5_ck,
+	.parent		= &dpll_core_m5x2_ck,
 	.clksel		= div_iva_hs_clk_div,
 	.clksel_reg	= OMAP4430_CM_BYPCLK_DPLL_MPU,
 	.clksel_mask	= OMAP4430_CLKSEL_0_1_MASK,
@@ -655,6 +662,13 @@ static struct clk dpll_iva_m4_ck = {
 	.set_rate	= &omap2_clksel_set_rate,
 };
 
+static struct clk dpll_iva_m4x2_ck = {
+	.name		= "dpll_iva_m4x2_ck",
+	.parent		= &dpll_iva_m4_ck,
+	.ops		= &clkops_null,
+	.recalc		= &omap3_clkoutx2_recalc,
+};
+
 static struct clk dpll_iva_m5_ck = {
 	.name		= "dpll_iva_m5_ck",
 	.parent		= &dpll_iva_ck,
@@ -667,6 +681,13 @@ static struct clk dpll_iva_m5_ck = {
 	.set_rate	= &omap2_clksel_set_rate,
 };
 
+static struct clk dpll_iva_m5x2_ck = {
+	.name		= "dpll_iva_m5x2_ck",
+	.parent		= &dpll_iva_m5_ck,
+	.ops		= &clkops_null,
+	.recalc		= &omap3_clkoutx2_recalc,
+};
+
 /* DPLL_MPU */
 static struct dpll_data dpll_mpu_dd = {
 	.mult_div1_reg	= OMAP4430_CM_CLKSEL_DPLL_MPU,
@@ -1339,7 +1360,7 @@ static struct clk dsp_fck = {
 	.enable_reg	= OMAP4430_CM_TESLA_TESLA_CLKCTRL,
 	.enable_bit	= OMAP4430_MODULEMODE_HWCTRL,
 	.clkdm_name	= "tesla_clkdm",
-	.parent		= &dpll_iva_m4_ck,
+	.parent		= &dpll_iva_m4x2_ck,
 	.recalc		= &followparent_recalc,
 };
 
@@ -1616,7 +1637,7 @@ static struct clk iva_fck = {
 	.enable_reg	= OMAP4430_CM_IVAHD_IVAHD_CLKCTRL,
 	.enable_bit	= OMAP4430_MODULEMODE_HWCTRL,
 	.clkdm_name	= "ivahd_clkdm",
-	.parent		= &dpll_iva_m5_ck,
+	.parent		= &dpll_iva_m5x2_ck,
 	.recalc		= &followparent_recalc,
 };
 
@@ -1970,7 +1991,7 @@ static struct clk sl2if_ick = {
 	.enable_reg	= OMAP4430_CM_IVAHD_SL2_CLKCTRL,
 	.enable_bit	= OMAP4430_MODULEMODE_HWCTRL,
 	.clkdm_name	= "ivahd_clkdm",
-	.parent		= &dpll_iva_m5_ck,
+	.parent		= &dpll_iva_m5x2_ck,
 	.recalc		= &followparent_recalc,
 };
 
@@ -2458,6 +2479,7 @@ static struct omap_clk omap44xx_clks[] = {
 	CLK(NULL,	"dpll_core_m2_ck",		&dpll_core_m2_ck,	CK_443X),
 	CLK(NULL,	"ddrphy_ck",			&ddrphy_ck,	CK_443X),
 	CLK(NULL,	"dpll_core_m5_ck",		&dpll_core_m5_ck,	CK_443X),
+	CLK(NULL,	"dpll_core_m5x2_ck",		&dpll_core_m5x2_ck,	CK_443X),
 	CLK(NULL,	"div_core_ck",			&div_core_ck,	CK_443X),
 	CLK(NULL,	"div_iva_hs_clk",		&div_iva_hs_clk,	CK_443X),
 	CLK(NULL,	"div_mpu_hs_clk",		&div_mpu_hs_clk,	CK_443X),
@@ -2469,7 +2491,9 @@ static struct omap_clk omap44xx_clks[] = {
 	CLK(NULL,	"iva_hsd_byp_clk_mux_ck",	&iva_hsd_byp_clk_mux_ck,	CK_443X),
 	CLK(NULL,	"dpll_iva_ck",			&dpll_iva_ck,	CK_443X),
 	CLK(NULL,	"dpll_iva_m4_ck",		&dpll_iva_m4_ck,	CK_443X),
+	CLK(NULL,	"dpll_iva_m4x2_ck",		&dpll_iva_m4x2_ck,	CK_443X),
 	CLK(NULL,	"dpll_iva_m5_ck",		&dpll_iva_m5_ck,	CK_443X),
+	CLK(NULL,	"dpll_iva_m5x2_ck",		&dpll_iva_m5x2_ck,	CK_443X),
 	CLK(NULL,	"dpll_mpu_ck",			&dpll_mpu_ck,	CK_443X),
 	CLK(NULL,	"dpll_mpu_m2_ck",		&dpll_mpu_m2_ck,	CK_443X),
 	CLK(NULL,	"per_hs_clk_div_ck",		&per_hs_clk_div_ck,	CK_443X),
-- 
1.7.1.GIT

[PATCH 05/10] OMAP4: Adding voltage driver support

[Thara Gopinath]

This patch adds voltage driver support for OMAP4.

Signed-off-by: Thara Gopinath <thara@ti.com>
---
 arch/arm/mach-omap2/Makefile              |    2 +-
 arch/arm/mach-omap2/voltage.c             |  246 ++++++++++++++++++++++++++++-
 arch/arm/plat-omap/include/plat/voltage.h |   20 +++-
 3 files changed, 264 insertions(+), 4 deletions(-)

diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile
index 03e494e..d46fbec 100644
--- a/arch/arm/mach-omap2/Makefile
+++ b/arch/arm/mach-omap2/Makefile
@@ -51,7 +51,7 @@ obj-$(CONFIG_ARCH_OMAP2)		+= pm24xx.o
 obj-$(CONFIG_ARCH_OMAP2)		+= sleep24xx.o
 obj-$(CONFIG_ARCH_OMAP3)		+= pm34xx.o sleep34xx.o voltage.o \
 					   cpuidle34xx.o
-obj-$(CONFIG_ARCH_OMAP4)		+= pm44xx.o
+obj-$(CONFIG_ARCH_OMAP4)		+= pm44xx.o voltage.o
 obj-$(CONFIG_PM_DEBUG)			+= pm-debug.o
 obj-$(CONFIG_OMAP_SMARTREFLEX)          += sr_device.o smartreflex.o
 obj-$(CONFIG_OMAP_SMARTREFLEX_CLASS3)	+= smartreflex-class3.o
diff --git a/arch/arm/mach-omap2/voltage.c b/arch/arm/mach-omap2/voltage.c
index d15c5cb..6a07fe9 100644
--- a/arch/arm/mach-omap2/voltage.c
+++ b/arch/arm/mach-omap2/voltage.c
@@ -34,6 +34,8 @@
 #include <plat/voltage.h>
 
 #include "prm-regbits-34xx.h"
+#include "prm44xx.h"
+#include "prm-regbits-44xx.h"
 
 #define VP_IDLE_TIMEOUT		200
 #define VP_TRANXDONE_TIMEOUT	300
@@ -158,7 +160,49 @@ static struct omap_vdd_info omap3_vdd_info[] = {
 
 #define OMAP3_NO_SCALABLE_VDD ARRAY_SIZE(omap3_vdd_info)
 
-/* TODO: OMAP4 register offsets */
+/* OMAP4 VDD sturctures */
+static struct omap_vdd_info omap4_vdd_info[] = {
+	{
+		.vp_offs = {
+			.vpconfig = OMAP4_PRM_VP_MPU_CONFIG_OFFSET,
+			.vstepmin = OMAP4_PRM_VP_MPU_VSTEPMIN_OFFSET,
+			.vstepmax = OMAP4_PRM_VP_MPU_VSTEPMAX_OFFSET,
+			.vlimitto = OMAP4_PRM_VP_MPU_VLIMITTO_OFFSET,
+			.vstatus = OMAP4_PRM_VP_MPU_STATUS_OFFSET,
+			.voltage = OMAP4_PRM_VP_MPU_VOLTAGE_OFFSET,
+		},
+		.voltdm = {
+			.name = "mpu",
+		},
+	},
+	{
+		.vp_offs = {
+			.vpconfig = OMAP4_PRM_VP_IVA_CONFIG_OFFSET,
+			.vstepmin = OMAP4_PRM_VP_IVA_VSTEPMIN_OFFSET,
+			.vstepmax = OMAP4_PRM_VP_IVA_VSTEPMAX_OFFSET,
+			.vlimitto = OMAP4_PRM_VP_IVA_VLIMITTO_OFFSET,
+			.vstatus = OMAP4_PRM_VP_IVA_STATUS_OFFSET,
+			.voltage = OMAP4_PRM_VP_IVA_VOLTAGE_OFFSET,
+		},
+		.voltdm = {
+			.name = "iva",
+		},
+	},
+	{
+		.vp_offs = {
+			.vpconfig = OMAP4_PRM_VP_CORE_CONFIG_OFFSET,
+			.vstepmin = OMAP4_PRM_VP_CORE_VSTEPMIN_OFFSET,
+			.vstepmax = OMAP4_PRM_VP_CORE_VSTEPMAX_OFFSET,
+			.vlimitto = OMAP4_PRM_VP_CORE_VLIMITTO_OFFSET,
+			.vstatus = OMAP4_PRM_VP_CORE_STATUS_OFFSET,
+			.voltage = OMAP4_PRM_VP_CORE_VOLTAGE_OFFSET,
+		},
+		.voltdm = {
+			.name = "core",
+		},
+	},
+};
+#define OMAP4_NO_SCALABLE_VDD ARRAY_SIZE(omap4_vdd_info)
 
 /*
  * Default voltage controller settings.
@@ -222,6 +266,29 @@ static struct omap_volt_data omap36xx_vdd2_volt_data[] = {
 	{.volt_nominal = 1137500, .sr_errminlimit = 0xF9, .vp_errgain = 0x16},
 };
 
+/*
+ * Structures containing OMAP4430 voltage supported and various
+ * data associated with it per voltage domain basis. Smartreflex Ntarget
+ * values are left as 0 as they have to be populated by smartreflex
+ * driver after reading the efuse.
+ */
+static struct omap_volt_data omap44xx_vdd_mpu_volt_data[] = {
+	{.volt_nominal = 930000, .sr_errminlimit = 0xF4, .vp_errgain = 0x0C},
+	{.volt_nominal = 1100000, .sr_errminlimit = 0xF9, .vp_errgain = 0x16},
+	{.volt_nominal = 1260000, .sr_errminlimit = 0xFA, .vp_errgain = 0x23},
+	{.volt_nominal = 1350000, .sr_errminlimit = 0xFA, .vp_errgain = 0x27},
+};
+
+static struct omap_volt_data omap44xx_vdd_iva_volt_data[] = {
+	{.volt_nominal = 930000, .sr_errminlimit = 0xF4, .vp_errgain = 0x0C},
+	{.volt_nominal = 1100000, .sr_errminlimit = 0xF9, .vp_errgain = 0x16},
+	{.volt_nominal = 1260000, .sr_errminlimit = 0xFA, .vp_errgain = 0x23},
+};
+
+static struct omap_volt_data omap44xx_vdd_core_volt_data[] = {
+	{.volt_nominal = 930000, .sr_errminlimit = 0xF4, .vp_errgain = 0x0C},
+	{.volt_nominal = 1100000, .sr_errminlimit = 0xF9, .vp_errgain = 0x16},
+};
 
 /* By default VPFORCEUPDATE is the chosen method of voltage scaling */
 static bool voltscale_vpforceupdate = true;
@@ -510,6 +577,165 @@ static void __init omap3_vdd_data_configure(struct omap_vdd_info *vdd)
 	vdd->vp_reg.vlimitto_timeout_shift = OMAP3430_TIMEOUT_SHIFT;
 }
 
+/* OMAP4 specific voltage init functions */
+static void __init omap4_init_voltagecontroller(void)
+{
+	voltage_write_reg(OMAP4_PRM_VC_SMPS_SA_OFFSET,
+			(OMAP4_SRI2C_SLAVE_ADDR <<
+			 OMAP4430_SA_VDD_CORE_L_0_6_SHIFT) |
+			(OMAP4_SRI2C_SLAVE_ADDR <<
+			 OMAP4430_SA_VDD_IVA_L_PRM_VC_SMPS_SA_SHIFT) |
+			(OMAP4_SRI2C_SLAVE_ADDR <<
+			 OMAP4430_SA_VDD_MPU_L_PRM_VC_SMPS_SA_SHIFT));
+	voltage_write_reg(OMAP4_PRM_VC_VAL_SMPS_RA_VOL_OFFSET,
+			(OMAP4_VDD_MPU_SR_VOLT_REG <<
+			 OMAP4430_VOLRA_VDD_MPU_L_SHIFT) |
+			(OMAP4_VDD_IVA_SR_VOLT_REG <<
+			 OMAP4430_VOLRA_VDD_IVA_L_SHIFT) |
+			(OMAP4_VDD_CORE_SR_VOLT_REG <<
+			 OMAP4430_VOLRA_VDD_CORE_L_SHIFT));
+	voltage_write_reg(OMAP4_PRM_VC_CFG_CHANNEL_OFFSET,
+			OMAP4430_RAV_VDD_MPU_L_MASK |
+			OMAP4430_CMD_VDD_MPU_L_MASK |
+			OMAP4430_RAV_VDD_IVA_L_MASK |
+			OMAP4430_CMD_VDD_IVA_L_MASK |
+			OMAP4430_RAV_VDD_CORE_L_MASK |
+			OMAP4430_CMD_VDD_CORE_L_MASK);
+	/*
+	 * Configure SR I2C in HS Mode. Is there really a need to configure
+	 * i2c in the normal mode??
+	 */
+/*	voltage_write_reg(OMAP4_PRM_VC_CFG_I2C_MODE_OFFSET,
+			0x0 << OMAP4430_HSMCODE_SHIFT);
+	voltage_write_reg(OMAP4_PRM_VC_CFG_I2C_CLK_OFFSET,
+			(0x0A << OMAP4430_HSSCLL_SHIFT |
+			0x05 << OMAP4430_HSSCLH_SHIFT));*/
+	voltage_write_reg(OMAP4_PRM_VC_CFG_I2C_CLK_OFFSET,
+			(0x60 << OMAP4430_SCLL_SHIFT |
+			0x26 << OMAP4430_SCLH_SHIFT));
+	/* TODO: Configure setup times and CMD_VAL values*/
+}
+
+/* Sets up all the VDD related info for OMAP4 */
+static void __init omap4_vdd_data_configure(struct omap_vdd_info *vdd)
+{
+	unsigned long curr_volt;
+	struct omap_volt_data *volt_data;
+	struct clk *sys_ck;
+	u32 sys_clk_speed, timeout_val, waittime;
+
+	if (!strcmp(vdd->voltdm.name, "mpu")) {
+		vdd->vp_reg.vlimitto_vddmin = OMAP4_VP_MPU_VLIMITTO_VDDMIN;
+		vdd->vp_reg.vlimitto_vddmax = OMAP4_VP_MPU_VLIMITTO_VDDMAX;
+		vdd->volt_data = omap44xx_vdd_mpu_volt_data;
+		vdd->volt_data_count = ARRAY_SIZE(omap44xx_vdd_mpu_volt_data);
+		vdd->volt_clk = clk_get(NULL, "dpll_mpu_ck");
+		WARN(IS_ERR(vdd->volt_clk), "unable to get clock for vdd_%s\n",
+				vdd->voltdm.name);
+		vdd->opp_dev = omap2_get_mpuss_device();
+		vdd->vp_reg.tranxdone_status =
+				OMAP4430_VP_MPU_TRANXDONE_ST_MASK;
+		vdd->cmdval_reg = OMAP4_PRM_VC_VAL_CMD_VDD_MPU_L_OFFSET;
+		vdd->vdd_sr_reg = OMAP4_VDD_MPU_SR_VOLT_REG;
+	} else if (!strcmp(vdd->voltdm.name, "core")) {
+		vdd->vp_reg.vlimitto_vddmin = OMAP4_VP_CORE_VLIMITTO_VDDMIN;
+		vdd->vp_reg.vlimitto_vddmax = OMAP4_VP_CORE_VLIMITTO_VDDMAX;
+		vdd->volt_data = omap44xx_vdd_core_volt_data;
+		vdd->volt_data_count = ARRAY_SIZE(omap44xx_vdd_core_volt_data);
+		vdd->volt_clk = clk_get(NULL, "l3_div_ck");
+		WARN(IS_ERR(vdd->volt_clk), "unable to get clock for vdd_%s\n",
+				vdd->voltdm.name);
+		vdd->opp_dev = omap2_get_l3_device();
+		vdd->vp_reg.tranxdone_status =
+				OMAP4430_VP_CORE_TRANXDONE_ST_MASK;
+		vdd->cmdval_reg = OMAP4_PRM_VC_VAL_CMD_VDD_CORE_L_OFFSET;
+		vdd->vdd_sr_reg = OMAP4_VDD_CORE_SR_VOLT_REG;
+	} else if (!strcmp(vdd->voltdm.name, "iva")) {
+		vdd->vp_reg.vlimitto_vddmin = OMAP4_VP_IVA_VLIMITTO_VDDMIN;
+		vdd->vp_reg.vlimitto_vddmax = OMAP4_VP_IVA_VLIMITTO_VDDMAX;
+		vdd->volt_data = omap44xx_vdd_iva_volt_data;
+		vdd->volt_data_count = ARRAY_SIZE(omap44xx_vdd_iva_volt_data);
+		vdd->volt_clk = clk_get(NULL, "dpll_iva_m5x2_ck");
+		WARN(IS_ERR(vdd->volt_clk), "unable to get clock for vdd_%s\n",
+				vdd->voltdm.name);
+		vdd->opp_dev = omap2_get_iva_device();
+		vdd->vp_reg.tranxdone_status =
+			OMAP4430_VP_IVA_TRANXDONE_ST_MASK;
+		vdd->cmdval_reg = OMAP4_PRM_VC_VAL_CMD_VDD_IVA_L_OFFSET;
+		vdd->vdd_sr_reg = OMAP4_VDD_IVA_SR_VOLT_REG;
+	} else {
+		pr_warning("%s: vdd_%s does not exisit in OMAP4\n",
+			__func__, vdd->voltdm.name);
+		return;
+	}
+
+	curr_volt = omap_voltage_get_nom_volt(&vdd->voltdm);
+	if (!curr_volt) {
+		pr_warning("%s: unable to find current voltage for vdd_%s\n",
+			__func__, vdd->voltdm.name);
+		return;
+	}
+
+	volt_data = omap_voltage_get_voltdata(&vdd->voltdm, curr_volt);
+	if (IS_ERR(volt_data)) {
+		pr_warning("%s: Unable to get volt table for vdd_%s at init",
+			__func__, vdd->voltdm.name);
+		return;
+	}
+	/*
+	 * Sys clk rate is require to calculate vp timeout value and
+	 * smpswaittimemin and smpswaittimemax.
+	 */
+	sys_ck = clk_get(NULL, "sys_clkin_ck");
+	if (IS_ERR(sys_ck)) {
+		pr_warning("%s: Could not get the sys clk to calculate"
+			"various vdd_%s params\n", __func__, vdd->voltdm.name);
+		return;
+	}
+	sys_clk_speed = clk_get_rate(sys_ck);
+	clk_put(sys_ck);
+	/* Divide to avoid overflow */
+	sys_clk_speed /= 1000;
+
+	/* Nominal/Reset voltage of the VDD */
+	vdd->nominal_volt = 1200000;
+
+	/* VPCONFIG bit fields */
+	vdd->vp_reg.vpconfig_erroroffset =
+				(OMAP4_VP_CONFIG_ERROROFFSET <<
+				 OMAP4430_ERROROFFSET_SHIFT);
+	vdd->vp_reg.vpconfig_errorgain = volt_data->vp_errgain;
+	vdd->vp_reg.vpconfig_errorgain_mask = OMAP4430_ERRORGAIN_MASK;
+	vdd->vp_reg.vpconfig_errorgain_shift = OMAP4430_ERRORGAIN_SHIFT;
+	vdd->vp_reg.vpconfig_initvoltage_shift = OMAP4430_INITVOLTAGE_SHIFT;
+	vdd->vp_reg.vpconfig_initvoltage_mask = OMAP4430_INITVOLTAGE_MASK;
+	vdd->vp_reg.vpconfig_timeouten = OMAP4430_TIMEOUTEN_MASK;
+	vdd->vp_reg.vpconfig_initvdd = OMAP4430_INITVDD_MASK;
+	vdd->vp_reg.vpconfig_forceupdate = OMAP4430_FORCEUPDATE_MASK;
+	vdd->vp_reg.vpconfig_vpenable = OMAP4430_VPENABLE_MASK;
+
+	/* VSTEPMIN VSTEPMAX bit fields */
+	waittime = ((volt_pmic_info.step_size / volt_pmic_info.slew_rate) *
+				sys_clk_speed) / 1000;
+	vdd->vp_reg.vstepmin_smpswaittimemin = waittime;
+	vdd->vp_reg.vstepmax_smpswaittimemax = waittime;
+	vdd->vp_reg.vstepmin_stepmin = OMAP4_VP_VSTEPMIN_VSTEPMIN;
+	vdd->vp_reg.vstepmax_stepmax = OMAP4_VP_VSTEPMAX_VSTEPMAX;
+	vdd->vp_reg.vstepmin_smpswaittimemin_shift =
+		OMAP4430_SMPSWAITTIMEMIN_SHIFT;
+	vdd->vp_reg.vstepmax_smpswaittimemax_shift =
+		OMAP4430_SMPSWAITTIMEMAX_SHIFT;
+	vdd->vp_reg.vstepmin_stepmin_shift = OMAP4430_VSTEPMIN_SHIFT;
+	vdd->vp_reg.vstepmax_stepmax_shift = OMAP4430_VSTEPMAX_SHIFT;
+
+	/* VLIMITTO bit fields */
+	timeout_val = (sys_clk_speed * OMAP4_VP_VLIMITTO_TIMEOUT_US) / 1000;
+	vdd->vp_reg.vlimitto_timeout = timeout_val;
+	vdd->vp_reg.vlimitto_vddmin_shift = OMAP4430_VDDMIN_SHIFT;
+	vdd->vp_reg.vlimitto_vddmax_shift = OMAP4430_VDDMAX_SHIFT;
+	vdd->vp_reg.vlimitto_timeout_shift = OMAP4430_TIMEOUT_SHIFT;
+}
+
 /* Generic voltage init functions */
 static void __init init_voltageprocessor(struct omap_vdd_info *vdd)
 {
@@ -561,6 +787,8 @@ static void __init vdd_data_configure(struct omap_vdd_info *vdd)
 #endif
 	if (cpu_is_omap34xx())
 		omap3_vdd_data_configure(vdd);
+	else if (cpu_is_omap44xx())
+		omap4_vdd_data_configure(vdd);
 
 #ifdef CONFIG_PM_DEBUG
 	strcpy(name, "vdd_");
@@ -603,6 +831,8 @@ static void __init init_voltagecontroller(void)
 {
 	if (cpu_is_omap34xx())
 		omap3_init_voltagecontroller();
+	else if (cpu_is_omap44xx())
+		omap4_init_voltagecontroller();
 }
 
 /*
@@ -718,6 +948,14 @@ static int vp_forceupdate_scale_voltage(struct omap_vdd_info *vdd,
 		vc_cmd_on_mask = OMAP3430_VC_CMD_ON_MASK;
 		prm_irqst_reg_offs = OMAP3_PRM_IRQSTATUS_MPU_OFFSET;
 		ocp_mod = OCP_MOD;
+	} else if (cpu_is_omap44xx()) {
+		vc_cmd_on_shift = OMAP4430_ON_SHIFT;
+		vc_cmd_on_mask = OMAP4430_ON_MASK;
+		if (!strcmp(vdd->voltdm.name, "mpu"))
+			prm_irqst_reg_offs = OMAP4_PRM_IRQSTATUS_MPU_2_OFFSET;
+		else
+			prm_irqst_reg_offs = OMAP4_PRM_IRQSTATUS_MPU_OFFSET;
+		ocp_mod = OMAP4430_PRM_OCP_SOCKET_MOD;
 	}
 
 	/* Get volt_data corresponding to the target_volt */
@@ -1252,7 +1490,7 @@ static int __init omap_voltage_init(void)
 {
 	int i;
 
-	if (!cpu_is_omap34xx()) {
+	if (!(cpu_is_omap34xx() || cpu_is_omap44xx())) {
 		pr_warning("%s: voltage driver support not added\n", __func__);
 		return 0;
 	}
@@ -1264,6 +1502,10 @@ static int __init omap_voltage_init(void)
 		volt_mod = OMAP3430_GR_MOD;
 		vdd_info = omap3_vdd_info;
 		no_scalable_vdd = OMAP3_NO_SCALABLE_VDD;
+	} else if (cpu_is_omap44xx()) {
+		volt_mod = OMAP4430_PRM_DEVICE_MOD;
+		vdd_info = omap4_vdd_info;
+		no_scalable_vdd = OMAP4_NO_SCALABLE_VDD;
 	}
 	init_voltagecontroller();
 	for (i = 0; i < no_scalable_vdd; i++) {
diff --git a/arch/arm/plat-omap/include/plat/voltage.h b/arch/arm/plat-omap/include/plat/voltage.h
index c6fe2d6..3e8cf03 100644
--- a/arch/arm/plat-omap/include/plat/voltage.h
+++ b/arch/arm/plat-omap/include/plat/voltage.h
@@ -27,6 +27,12 @@ extern struct dentry *pm_dbg_main_dir;
 #define OMAP3_VDD1_SR_CONTROL_REG		0x00
 #define OMAP3_VDD2_SR_CONTROL_REG		0x01
 
+/* Voltage SR parameters for OMAP4 */
+#define OMAP4_SRI2C_SLAVE_ADDR			0x12
+#define OMAP4_VDD_MPU_SR_VOLT_REG		0x55
+#define OMAP4_VDD_IVA_SR_VOLT_REG		0x5B
+#define OMAP4_VDD_CORE_SR_VOLT_REG		0x61
+
 /*
  * Omap3 VP register specific values. Maybe these need to come from
  * board file or PMIC data structure
@@ -56,7 +62,19 @@ extern struct dentry *pm_dbg_main_dir;
 #define OMAP3630_VP2_VLIMITTO_VDDMIN		0x18
 #define OMAP3630_VP2_VLIMITTO_VDDMAX		0x30
 
-/* TODO OMAP4 VP register values if the same file is used for OMAP4*/
+/* OMAP4 VP register values */
+#define OMAP4_VP_CONFIG_ERROROFFSET		0x00
+#define	OMAP4_VP_VSTEPMIN_SMPSWAITTIMEMIN	0x3C
+#define OMAP4_VP_VSTEPMIN_VSTEPMIN		0x1
+#define OMAP4_VP_VSTEPMAX_SMPSWAITTIMEMAX	0x3C
+#define OMAP4_VP_VSTEPMAX_VSTEPMAX		0x04
+#define OMAP4_VP_VLIMITTO_TIMEOUT_US		0x200
+#define OMAP4_VP_MPU_VLIMITTO_VDDMIN		0x18
+#define OMAP4_VP_MPU_VLIMITTO_VDDMAX		0x3C
+#define OMAP4_VP_IVA_VLIMITTO_VDDMIN		0x18
+#define OMAP4_VP_IVA_VLIMITTO_VDDMAX		0x3C
+#define OMAP4_VP_CORE_VLIMITTO_VDDMIN		0x18
+#define OMAP4_VP_CORE_VLIMITTO_VDDMAX		0x30
 
 /**
  * voltagedomain - omap voltage domain global structure
-- 
1.7.1.GIT

[PATCH 06/10] OMAP4: hwmod: Add inital data for smartreflex modules.

[Thara Gopinath]

From: Benoit Cousson <b-cousson@ti.com>

This patch adds the hwmod details to OMAP4 smartreflex modules.

Signed-off-by: Benoit Cousson <b-cousson@ti.com>
---
 arch/arm/mach-omap2/omap_hwmod_44xx_data.c |  164 ++++++++++++++++++++++++++++
 1 files changed, 164 insertions(+), 0 deletions(-)

diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
index e20b0ee..4984976 100644
--- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
@@ -452,6 +452,166 @@ static struct omap_hwmod omap44xx_mpu_hwmod = {
 	.omap_chip	= OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
 };
 
+/*
+ * 'smartreflex' class
+ * smartreflex module (monitor silicon performance and outputs a measure of
+ * performance error)
+ */
+
+/* The IP is not compliant to type1 / type2 scheme */
+static struct omap_hwmod_sysc_fields omap_hwmod_sysc_type_smartreflex = {
+	.sidle_shift	= 24,
+	.enwkup_shift	= 26,
+};
+
+static struct omap_hwmod_class_sysconfig omap44xx_smartreflex_sysc = {
+	.sysc_offs	= 0x0038,
+	.sysc_flags	= (SYSC_HAS_ENAWAKEUP | SYSC_HAS_SIDLEMODE |
+			   SYSS_MISSING),
+	.idlemodes	= (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART),
+	.sysc_fields	= &omap_hwmod_sysc_type_smartreflex,
+};
+
+static struct omap_hwmod_class omap44xx_smartreflex_hwmod_class = {
+	.name = "smartreflex",
+	.sysc = &omap44xx_smartreflex_sysc,
+};
+
+/* smartreflex_core */
+static struct omap_hwmod omap44xx_smartreflex_core_hwmod;
+static struct omap_hwmod_irq_info omap44xx_smartreflex_core_irqs[] = {
+	{ .irq = 19 + OMAP44XX_IRQ_GIC_START },
+};
+
+static struct omap_hwmod_addr_space omap44xx_smartreflex_core_addrs[] = {
+	{
+		.pa_start	= 0x4a0dd000,
+		.pa_end		= 0x4a0dd03f,
+		.flags		= ADDR_TYPE_RT
+	},
+};
+
+/* l4_cfg -> smartreflex_core */
+static struct omap_hwmod_ocp_if omap44xx_l4_cfg__smartreflex_core = {
+	.master		= &omap44xx_l4_cfg_hwmod,
+	.slave		= &omap44xx_smartreflex_core_hwmod,
+	.clk		= "l4_div_ck",
+	.addr		= omap44xx_smartreflex_core_addrs,
+	.addr_cnt	= ARRAY_SIZE(omap44xx_smartreflex_core_addrs),
+	.user		= OCP_USER_MPU | OCP_USER_SDMA,
+};
+
+/* smartreflex_core slave ports */
+static struct omap_hwmod_ocp_if *omap44xx_smartreflex_core_slaves[] = {
+	&omap44xx_l4_cfg__smartreflex_core,
+};
+
+static struct omap_hwmod omap44xx_smartreflex_core_hwmod = {
+	.name		= "smartreflex_core",
+	.class		= &omap44xx_smartreflex_hwmod_class,
+	.mpu_irqs	= omap44xx_smartreflex_core_irqs,
+	.mpu_irqs_cnt	= ARRAY_SIZE(omap44xx_smartreflex_core_irqs),
+	.main_clk	= "smartreflex_core_fck",
+	.prcm = {
+		.omap4 = {
+			.clkctrl_reg = OMAP4430_CM_ALWON_SR_CORE_CLKCTRL,
+		},
+	},
+	.slaves		= omap44xx_smartreflex_core_slaves,
+	.slaves_cnt	= ARRAY_SIZE(omap44xx_smartreflex_core_slaves),
+	.omap_chip	= OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
+};
+
+/* smartreflex_iva */
+static struct omap_hwmod omap44xx_smartreflex_iva_hwmod;
+static struct omap_hwmod_irq_info omap44xx_smartreflex_iva_irqs[] = {
+	{ .irq = 102 + OMAP44XX_IRQ_GIC_START },
+};
+
+static struct omap_hwmod_addr_space omap44xx_smartreflex_iva_addrs[] = {
+	{
+		.pa_start	= 0x4a0db000,
+		.pa_end		= 0x4a0db03f,
+		.flags		= ADDR_TYPE_RT
+	},
+};
+
+/* l4_cfg -> smartreflex_iva */
+static struct omap_hwmod_ocp_if omap44xx_l4_cfg__smartreflex_iva = {
+	.master		= &omap44xx_l4_cfg_hwmod,
+	.slave		= &omap44xx_smartreflex_iva_hwmod,
+	.clk		= "l4_div_ck",
+	.addr		= omap44xx_smartreflex_iva_addrs,
+	.addr_cnt	= ARRAY_SIZE(omap44xx_smartreflex_iva_addrs),
+	.user		= OCP_USER_MPU | OCP_USER_SDMA,
+};
+
+/* smartreflex_iva slave ports */
+static struct omap_hwmod_ocp_if *omap44xx_smartreflex_iva_slaves[] = {
+	&omap44xx_l4_cfg__smartreflex_iva,
+};
+
+static struct omap_hwmod omap44xx_smartreflex_iva_hwmod = {
+	.name		= "smartreflex_iva",
+	.class		= &omap44xx_smartreflex_hwmod_class,
+	.mpu_irqs	= omap44xx_smartreflex_iva_irqs,
+	.mpu_irqs_cnt	= ARRAY_SIZE(omap44xx_smartreflex_iva_irqs),
+	.main_clk	= "smartreflex_iva_fck",
+	.prcm = {
+		.omap4 = {
+			.clkctrl_reg = OMAP4430_CM_ALWON_SR_IVA_CLKCTRL,
+		},
+	},
+	.slaves		= omap44xx_smartreflex_iva_slaves,
+	.slaves_cnt	= ARRAY_SIZE(omap44xx_smartreflex_iva_slaves),
+	.omap_chip	= OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
+};
+
+/* smartreflex_mpu */
+static struct omap_hwmod omap44xx_smartreflex_mpu_hwmod;
+static struct omap_hwmod_irq_info omap44xx_smartreflex_mpu_irqs[] = {
+	{ .irq = 18 + OMAP44XX_IRQ_GIC_START },
+};
+
+static struct omap_hwmod_addr_space omap44xx_smartreflex_mpu_addrs[] = {
+	{
+		.pa_start	= 0x4a0d9000,
+		.pa_end		= 0x4a0d903f,
+		.flags		= ADDR_TYPE_RT
+	},
+};
+
+/* l4_cfg -> smartreflex_mpu */
+static struct omap_hwmod_ocp_if omap44xx_l4_cfg__smartreflex_mpu = {
+	.master		= &omap44xx_l4_cfg_hwmod,
+	.slave		= &omap44xx_smartreflex_mpu_hwmod,
+	.clk		= "l4_div_ck",
+	.addr		= omap44xx_smartreflex_mpu_addrs,
+	.addr_cnt	= ARRAY_SIZE(omap44xx_smartreflex_mpu_addrs),
+	.user		= OCP_USER_MPU | OCP_USER_SDMA,
+};
+
+/* smartreflex_mpu slave ports */
+static struct omap_hwmod_ocp_if *omap44xx_smartreflex_mpu_slaves[] = {
+	&omap44xx_l4_cfg__smartreflex_mpu,
+};
+
+static struct omap_hwmod omap44xx_smartreflex_mpu_hwmod = {
+	.name		= "smartreflex_mpu",
+	.class		= &omap44xx_smartreflex_hwmod_class,
+	.mpu_irqs	= omap44xx_smartreflex_mpu_irqs,
+	.mpu_irqs_cnt	= ARRAY_SIZE(omap44xx_smartreflex_mpu_irqs),
+	.main_clk	= "smartreflex_mpu_fck",
+	.prcm = {
+		.omap4 = {
+			.clkctrl_reg = OMAP4430_CM_ALWON_SR_MPU_CLKCTRL,
+		},
+	},
+	.slaves		= omap44xx_smartreflex_mpu_slaves,
+	.slaves_cnt	= ARRAY_SIZE(omap44xx_smartreflex_mpu_slaves),
+	.omap_chip	= OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
+};
+
 static __initdata struct omap_hwmod *omap44xx_hwmods[] = {
 	/* dmm class */
 	&omap44xx_dmm_hwmod,
@@ -472,6 +632,10 @@ static __initdata struct omap_hwmod *omap44xx_hwmods[] = {
 
 	/* mpu class */
 	&omap44xx_mpu_hwmod,
+
+	&omap44xx_smartreflex_core_hwmod,
+	&omap44xx_smartreflex_iva_hwmod,
+	&omap44xx_smartreflex_mpu_hwmod,
 	NULL,
 };
 
-- 
1.7.1.GIT

[PATCH 07/10] OMAP4: Adding dev atrributes to OMAP4 smartreflex hwmod data

[Thara Gopinath]

This patch adds dev attributes for smartreflex modules
in the OMAP4 hwmod database. This patch also updates the
smartreflex rev in the smartreflex class data structure
in the OMAP4 hwmod database.

Signed-off-by: Thara Gopinath <thara@ti.com>
---
 arch/arm/mach-omap2/omap_hwmod_44xx_data.c |   56 ++++++++++++++++++++++++++++
 arch/arm/plat-omap/include/plat/control.h  |   12 ++++++
 2 files changed, 68 insertions(+), 0 deletions(-)

diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
index 4984976..b249e87 100644
--- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
@@ -22,6 +22,8 @@
 
 #include <plat/omap_hwmod.h>
 #include <plat/cpu.h>
+#include <plat/smartreflex.h>
+#include <plat/control.h>
 
 #include "omap_hwmod_common_data.h"
 
@@ -475,6 +477,7 @@ static struct omap_hwmod_class_sysconfig omap44xx_smartreflex_sysc = {
 static struct omap_hwmod_class omap44xx_smartreflex_hwmod_class = {
 	.name = "smartreflex",
 	.sysc = &omap44xx_smartreflex_sysc,
+	.rev  = 2,
 };
 
 /* smartreflex_core */
@@ -506,6 +509,22 @@ static struct omap_hwmod_ocp_if *omap44xx_smartreflex_core_slaves[] = {
 	&omap44xx_l4_cfg__smartreflex_core,
 };
 
+static u32 omap44xx_sr_core_efuse_offs[] = {
+	OMAP44XX_CONTROL_FUSE_CORE_OPP50, OMAP44XX_CONTROL_FUSE_CORE_OPP100,
+};
+
+static u32 omap44xx_sr_core_test_nvalues[] = {
+	0x0, 0x0
+};
+
+static struct omap_sr_dev_data omap44xx_sr_core_dev_attr = {
+	.efuse_nvalues_offs	= omap44xx_sr_core_efuse_offs,
+	.test_sennenable	= 0x1,
+	.test_senpenable	= 0x1,
+	.test_nvalues		= omap44xx_sr_core_test_nvalues,
+	.vdd_name		= "core"
+};
+
 static struct omap_hwmod omap44xx_smartreflex_core_hwmod = {
 	.name		= "smartreflex_core",
 	.class		= &omap44xx_smartreflex_hwmod_class,
@@ -519,6 +538,7 @@ static struct omap_hwmod omap44xx_smartreflex_core_hwmod = {
 	},
 	.slaves		= omap44xx_smartreflex_core_slaves,
 	.slaves_cnt	= ARRAY_SIZE(omap44xx_smartreflex_core_slaves),
+	.dev_attr	= &omap44xx_sr_core_dev_attr,
 	.omap_chip	= OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
 };
 
@@ -551,6 +571,23 @@ static struct omap_hwmod_ocp_if *omap44xx_smartreflex_iva_slaves[] = {
 	&omap44xx_l4_cfg__smartreflex_iva,
 };
 
+static u32 omap44xx_sr_iva_efuse_offs[] = {
+	OMAP44XX_CONTROL_FUSE_IVA_OPP50, OMAP44XX_CONTROL_FUSE_IVA_OPP100,
+	OMAP44XX_CONTROL_FUSE_IVA_OPPTURBO,
+};
+
+static u32 omap44xx_sr_iva_test_nvalues[] = {
+	0x0, 0x0, 0x0, 0x0
+};
+
+static struct omap_sr_dev_data omap44xx_sr_iva_dev_attr = {
+	.efuse_nvalues_offs	= omap44xx_sr_iva_efuse_offs,
+	.test_sennenable	= 0x1,
+	.test_senpenable	= 0x1,
+	.test_nvalues		= omap44xx_sr_iva_test_nvalues,
+	.vdd_name		= "iva"
+};
+
 static struct omap_hwmod omap44xx_smartreflex_iva_hwmod = {
 	.name		= "smartreflex_iva",
 	.class		= &omap44xx_smartreflex_hwmod_class,
@@ -564,6 +601,7 @@ static struct omap_hwmod omap44xx_smartreflex_iva_hwmod = {
 	},
 	.slaves		= omap44xx_smartreflex_iva_slaves,
 	.slaves_cnt	= ARRAY_SIZE(omap44xx_smartreflex_iva_slaves),
+	.dev_attr	= &omap44xx_sr_iva_dev_attr,
 	.omap_chip	= OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
 };
 
@@ -596,6 +634,23 @@ static struct omap_hwmod_ocp_if *omap44xx_smartreflex_mpu_slaves[] = {
 	&omap44xx_l4_cfg__smartreflex_mpu,
 };
 
+static u32 omap44xx_sr_mpu_efuse_offs[] = {
+	OMAP44XX_CONTROL_FUSE_MPU_OPP50, OMAP44XX_CONTROL_FUSE_MPU_OPP100,
+	OMAP44XX_CONTROL_FUSE_MPU_OPPTURBO, OMAP44XX_CONTROL_FUSE_MPU_OPPNITRO,
+};
+
+static u32 omap44xx_sr_mpu_test_nvalues[] = {
+	0x0, 0x0, 0x0, 0x0
+};
+
+static struct omap_sr_dev_data omap44xx_sr_mpu_dev_attr = {
+	.efuse_nvalues_offs	= omap44xx_sr_mpu_efuse_offs,
+	.test_sennenable	= 0x1,
+	.test_senpenable	= 0x1,
+	.test_nvalues		= omap44xx_sr_mpu_test_nvalues,
+	.vdd_name		= "mpu"
+};
+
 static struct omap_hwmod omap44xx_smartreflex_mpu_hwmod = {
 	.name		= "smartreflex_mpu",
 	.class		= &omap44xx_smartreflex_hwmod_class,
@@ -609,6 +664,7 @@ static struct omap_hwmod omap44xx_smartreflex_mpu_hwmod = {
 	},
 	.slaves		= omap44xx_smartreflex_mpu_slaves,
 	.slaves_cnt	= ARRAY_SIZE(omap44xx_smartreflex_mpu_slaves),
+	.dev_attr	= &omap44xx_sr_mpu_dev_attr,
 	.omap_chip	= OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
 };
 
diff --git a/arch/arm/plat-omap/include/plat/control.h b/arch/arm/plat-omap/include/plat/control.h
index 46e166d..6bf050f 100644
--- a/arch/arm/plat-omap/include/plat/control.h
+++ b/arch/arm/plat-omap/include/plat/control.h
@@ -224,6 +224,18 @@
 /* 44xx control status register offset */
 #define OMAP44XX_CONTROL_STATUS		0x2c4
 
+/* 44xx control efuse offsets */
+#define OMAP44XX_CONTROL_FUSE_IVA_OPP50		0x22C
+#define OMAP44XX_CONTROL_FUSE_IVA_OPP100	0x22F
+#define OMAP44XX_CONTROL_FUSE_IVA_OPPTURBO	0x232
+#define OMAP44XX_CONTROL_FUSE_IVA_OPPNITRO	0x235
+#define OMAP44XX_CONTROL_FUSE_MPU_OPP50		0x240
+#define OMAP44XX_CONTROL_FUSE_MPU_OPP100	0x243
+#define OMAP44XX_CONTROL_FUSE_MPU_OPPTURBO	0x246
+#define OMAP44XX_CONTROL_FUSE_MPU_OPPNITRO	0x249
+#define OMAP44XX_CONTROL_FUSE_CORE_OPP50	0x254
+#define OMAP44XX_CONTROL_FUSE_CORE_OPP100	0x257
+
 /* 44xx-only CONTROL_GENERAL register offsets */
 #define OMAP44XX_CONTROL_MMC1			0x628
 #define OMAP44XX_CONTROL_PBIAS_LITE		0x600
-- 
1.7.1.GIT

[PATCH 08/10] OMAP4: Smartreflex framework extensions

[Thara Gopinath]

This patch extends the smartreflex framework to support
OMAP4. The changes are minor like compiling smartreflex Kconfig
option for OMAP4 also, and a couple of OMAP4 checks in
the smartreflex framework.

The change in sr_device.c where new logic has to be introduced
for reading the efuse registers are due to two reasons.
	a. Currently in mainline OMAP4 control base offset is actually
	from the mux/padconf module start. Hence a omap_ctrl_read will
	not read from the correct offset for the efuse registers.
	This is currently being fixed through modfications in the
	control layer but till that is finalised, we will have to do
	a ioremap of the general control module  base and do a
	__raw_read to retrieve the efuse values.

	b. In OMAP4 the efuse registers are 24 bit aligned. Hence
	   a __raw_readl will fail for non-32 bit aligned address.
	   Hence the 8-bit read and shift.

Signed-off-by: Thara Gopinath <thara@ti.com>
---

This patch has a checkpatch warning which has been already
acknowledged as a false positive by the checkpatch.pl
maintainer Andy Whitcroft
	http://lkml.org/lkml/2010/8/18/123	

 arch/arm/mach-omap2/smartreflex.c |    7 +++++--
 arch/arm/mach-omap2/sr_device.c   |   21 +++++++++++++++++++--
 arch/arm/plat-omap/Kconfig        |    2 +-
 3 files changed, 25 insertions(+), 5 deletions(-)

diff --git a/arch/arm/mach-omap2/smartreflex.c b/arch/arm/mach-omap2/smartreflex.c
index bc611d1..2e13c96 100644
--- a/arch/arm/mach-omap2/smartreflex.c
+++ b/arch/arm/mach-omap2/smartreflex.c
@@ -154,7 +154,10 @@ static void sr_set_clk_length(struct omap_sr *sr)
 	struct clk *sys_ck;
 	u32 sys_clk_speed;
 
-	sys_ck = clk_get(NULL, "sys_ck");
+	if (cpu_is_omap34xx())
+		sys_ck = clk_get(NULL, "sys_ck");
+	else
+		sys_ck = clk_get(NULL, "sys_clkin_ck");
 	sys_clk_speed = clk_get_rate(sys_ck);
 	clk_put(sys_ck);
 
@@ -189,7 +192,7 @@ static void sr_set_regfields(struct omap_sr *sr)
 	 * file or pmic specific data structure. In that case these structure
 	 * fields will have to be populated using the pdata or pmic structure.
 	 */
-	if (cpu_is_omap34xx()) {
+	if (cpu_is_omap34xx() || cpu_is_omap44xx()) {
 		sr->err_weight = OMAP3430_SR_ERRWEIGHT;
 		sr->err_maxlimit = OMAP3430_SR_ERRMAXLIMIT;
 		sr->accum_data = OMAP3430_SR_ACCUMDATA;
diff --git a/arch/arm/mach-omap2/sr_device.c b/arch/arm/mach-omap2/sr_device.c
index 3bd0170..f0181d1 100644
--- a/arch/arm/mach-omap2/sr_device.c
+++ b/arch/arm/mach-omap2/sr_device.c
@@ -20,6 +20,7 @@
 
 #include <linux/err.h>
 #include <linux/slab.h>
+#include <linux/io.h>
 
 #include <plat/control.h>
 #include <plat/omap_hwmod.h>
@@ -41,6 +42,7 @@ static void __init sr_read_efuse(struct omap_sr_dev_data *dev_data,
 				struct omap_sr_data *sr_data)
 {
 	int i;
+	void __iomem *ctrl_base;
 
 	if (!dev_data || !dev_data->volts_supported || !dev_data->volt_data ||
 			!dev_data->efuse_nvalues_offs) {
@@ -72,9 +74,24 @@ static void __init sr_read_efuse(struct omap_sr_dev_data *dev_data,
 				dev_data->senpenable_shift);
 	}
 
-	for (i = 0; i < dev_data->volts_supported; i++)
-		dev_data->volt_data[i].sr_nvalue = omap_ctrl_readl(
+	if (cpu_is_omap44xx())
+		ctrl_base =  ioremap(0x4A002000, SZ_1K);
+
+	for (i = 0; i < dev_data->volts_supported; i++) {
+		if (cpu_is_omap44xx()) {
+			u16 offset = dev_data->efuse_nvalues_offs[i];
+
+			dev_data->volt_data[i].sr_nvalue =
+				__raw_readb(ctrl_base + offset) |
+				__raw_readb(ctrl_base + offset + 1) << 8 |
+				__raw_readb(ctrl_base + offset + 2) << 16;
+		} else {
+			dev_data->volt_data[i].sr_nvalue = omap_ctrl_readl(
 				dev_data->efuse_nvalues_offs[i]);
+		}
+	}
+	if (cpu_is_omap44xx())
+		iounmap(ctrl_base);
 }
 
 /*
diff --git a/arch/arm/plat-omap/Kconfig b/arch/arm/plat-omap/Kconfig
index af7acc9..b4e9ac2 100644
--- a/arch/arm/plat-omap/Kconfig
+++ b/arch/arm/plat-omap/Kconfig
@@ -37,7 +37,7 @@ config OMAP_DEBUG_LEDS
 
 config OMAP_SMARTREFLEX
 	bool "SmartReflex support"
-	depends on ARCH_OMAP3 && PM
+	depends on (ARCH_OMAP3 || ARCH_OMAP4) && PM
 	help
 	  Say Y if you want to enable SmartReflex.
 
-- 
1.7.1.GIT

[PATCH 09/10] OMAP4: Enabling smartrefles class 3 driver.

[Thara Gopinath]

This patch enables smartreflex class3 mode of operation for OMAP4430 SDP board.

Signed-off-by: Thara Gopinath <thara@ti.com>
---
 arch/arm/mach-omap2/board-4430sdp.c |    2 ++
 1 files changed, 2 insertions(+), 0 deletions(-)

diff --git a/arch/arm/mach-omap2/board-4430sdp.c b/arch/arm/mach-omap2/board-4430sdp.c
index 9447644..3395e61 100644
--- a/arch/arm/mach-omap2/board-4430sdp.c
+++ b/arch/arm/mach-omap2/board-4430sdp.c
@@ -36,6 +36,7 @@
 #include <plat/usb.h>
 #include <plat/mmc.h>
 #include "hsmmc.h"
+#include "smartreflex-class3.h"
 
 #define ETH_KS8851_IRQ			34
 #define ETH_KS8851_POWER_ON		48
@@ -182,6 +183,7 @@ static void __init omap_4430sdp_init_irq(void)
 #endif
 	gic_init_irq();
 	omap_gpio_init();
+	sr_class3_init();
 }
 
 static struct omap_musb_board_data musb_board_data = {
-- 
1.7.1.GIT

[PATCH 10/10] OMAP4: Add opp tables.

[Thara Gopinath]

This patch adds OPP tables for OMAP4. A new file
opp44xx.c has been added to keep the OMAP4 opp tables
and the registeration of these tables with the generic
opp framework.

Signed-off-by: Thara Gopinath <thara@ti.com>
---
 arch/arm/mach-omap2/Makefile       |    2 +-
 arch/arm/mach-omap2/opp44xx.h      |   26 ++++++++++++
 arch/arm/mach-omap2/opp44xx_data.c |   80 ++++++++++++++++++++++++++++++++++++
 arch/arm/mach-omap2/pm.c           |    6 ++-
 4 files changed, 112 insertions(+), 2 deletions(-)
 create mode 100644 arch/arm/mach-omap2/opp44xx.h
 create mode 100644 arch/arm/mach-omap2/opp44xx_data.c

diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile
index d46fbec..ebe3f36 100644
--- a/arch/arm/mach-omap2/Makefile
+++ b/arch/arm/mach-omap2/Makefile
@@ -51,7 +51,7 @@ obj-$(CONFIG_ARCH_OMAP2)		+= pm24xx.o
 obj-$(CONFIG_ARCH_OMAP2)		+= sleep24xx.o
 obj-$(CONFIG_ARCH_OMAP3)		+= pm34xx.o sleep34xx.o voltage.o \
 					   cpuidle34xx.o
-obj-$(CONFIG_ARCH_OMAP4)		+= pm44xx.o voltage.o
+obj-$(CONFIG_ARCH_OMAP4)		+= pm44xx.o voltage.o opp44xx_data.o
 obj-$(CONFIG_PM_DEBUG)			+= pm-debug.o
 obj-$(CONFIG_OMAP_SMARTREFLEX)          += sr_device.o smartreflex.o
 obj-$(CONFIG_OMAP_SMARTREFLEX_CLASS3)	+= smartreflex-class3.o
diff --git a/arch/arm/mach-omap2/opp44xx.h b/arch/arm/mach-omap2/opp44xx.h
new file mode 100644
index 0000000..2cae9f3
--- /dev/null
+++ b/arch/arm/mach-omap2/opp44xx.h
@@ -0,0 +1,26 @@
+/*
+ * OMAP4 OPP API's.
+ *
+ * Copyright (C) 2010 Texas Instruments Incorporated.
+ *	Thara Gopinath
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * THIS PACKAGE IS PROVIDED ``AS IS'' AND WITHOUT ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED
+ * WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR A PARTICULAR PURPOSE.
+ * History:
+ */
+
+#ifndef __ARCH_ARM_MACH_OMAP2_OPP44XX_H
+#define __ARCH_ARM_MACH_OMAP2_OPP44XX_H
+
+#ifdef CONFIG_PM
+extern int omap4_pm_init_opp_table(void);
+#else
+static inline int omap4_pm_init_opp_table(void) { return -EINVAL; }
+#endif
+
+#endif
diff --git a/arch/arm/mach-omap2/opp44xx_data.c b/arch/arm/mach-omap2/opp44xx_data.c
new file mode 100644
index 0000000..b5c9680
--- /dev/null
+++ b/arch/arm/mach-omap2/opp44xx_data.c
@@ -0,0 +1,80 @@
+/*
+ * OMAP4 OPP table definitions.
+ *
+ * Copyright (C) 2009 - 2010 Texas Instruments Incorporated.
+ *	Nishanth Menon
+ * Copyright (C) 2009 - 2010 Deep Root Systems, LLC.
+ *	Kevin Hilman
+ * Copyright (C) 2010 Nokia Corporation.
+ *      Eduardo Valentin
+ * Copyright (C) 2010 Texas Instruments Incorporated.
+ *	Thara Gopinath
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * THIS PACKAGE IS PROVIDED ``AS IS'' AND WITHOUT ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED
+ * WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR A PARTICULAR PURPOSE.
+ * History:
+ */
+
+#include <linux/module.h>
+#include <linux/err.h>
+
+#include <plat/opp.h>
+#include <plat/cpu.h>
+
+#include "opp44xx.h"
+
+static struct omap_opp_def __initdata omap44xx_opp_def_list[] = {
+	/* MPU OPP1 - OPP50 */
+	OMAP_OPP_DEF("mpu", true, 300000000, 930000),
+	/* MPU OPP2 - OPP100 */
+	OMAP_OPP_DEF("mpu", true, 600000000, 1100000),
+	/* MPU OPP3 - OPP-Turbo */
+	OMAP_OPP_DEF("mpu", true, 800000000, 1260000),
+	/* MPU OPP4 - OPP-SB */
+	OMAP_OPP_DEF("mpu", true, 1008000000, 1350000),
+	/* IVA OPP1 - OPP50 */
+	OMAP_OPP_DEF("iva", true,  133000000, 930000),
+	/* IVA OPP2 - OPP100 */
+	OMAP_OPP_DEF("iva", true,  266000000, 1100000),
+	/* IVA OPP3 - OPP-Turbo */
+	OMAP_OPP_DEF("iva", false, 332000000, 1260000),
+	/* L3 OPP1 - OPP50 */
+	OMAP_OPP_DEF("l3_main_1", true, 100000000, 930000),
+	/* L3 OPP2 - OPP100, OPP-Turbo, OPP-SB */
+	OMAP_OPP_DEF("l3_main_1", true, 200000000, 1100000),
+};
+
+static u32 omap44xx_opp_def_size = ARRAY_SIZE(omap44xx_opp_def_list);
+
+/* Temp variable to allow multiple calls */
+static u8 __initdata omap4_table_init;
+
+
+int __init omap4_pm_init_opp_table(void)
+{
+	struct omap_opp_def *opp_def;
+	int i, r;
+
+	/*
+	 * Allow multiple calls, but initialize only if not already initalized
+	 * even if the previous call failed, coz, no reason we'd succeed again
+	 */
+	if (omap4_table_init)
+		return 0;
+	omap4_table_init = 1;
+
+	opp_def = omap44xx_opp_def_list;
+
+	for (i = 0; i < omap44xx_opp_def_size; i++) {
+		r = opp_add(opp_def++);
+		if (r)
+			pr_err("unable to add OPP %ld Hz for %s\n",
+				opp_def->freq, opp_def->hwmod_name);
+	}
+	return 0;
+}
diff --git a/arch/arm/mach-omap2/pm.c b/arch/arm/mach-omap2/pm.c
index 740e506..6707a2e 100644
--- a/arch/arm/mach-omap2/pm.c
+++ b/arch/arm/mach-omap2/pm.c
@@ -19,6 +19,7 @@
 #include <plat/common.h>
 
 #include "omap3-opp.h"
+#include "opp44xx.h"
 
 static struct omap_device_pm_latency *pm_lats;
 
@@ -90,7 +91,10 @@ static void omap2_init_processor_devices(void)
 static int __init omap2_common_pm_init(void)
 {
 	omap2_init_processor_devices();
-	omap3_pm_init_opp_table();
+	if (cpu_is_omap34xx())
+		omap3_pm_init_opp_table();
+	else if (cpu_is_omap44xx())
+		omap4_pm_init_opp_table();
 
 	omap_pm_if_init();
 
-- 
1.7.1.GIT

Re: [PATCH 00/10] OMAP4: Smartreflex and Voltage layer support

[Kevin Hilman]

Thara Gopinath <thara@ti.com> writes:

> From: thara gopinath <thara@ti.com>
>
> This patch series adds support for OMAP4 support in the
> smartreflex and voltage layer. The series involves extensions
> to voltage layer and smartreflex layer for supporting OMAP4.
> In addition it involves changes to pm debugfs layer to support
> OMAP4 so that smartreflex and voltage debug entries can be
> viewed, changes in opp layer so that opp layer gets enabled
> for OMAP4, some changes in OMAP4 clock database and finally
> addition of OMAP4 opp tables.
> All these patches might not be dependent on voltage and
> smartreflex layer but is required for the correct
> functionality of these layers for OMAP4.
>
> This series in based off origin/pm-opp branch off
> Kevin Hilman's PM tree which is effectively 2.6.35 with
> basic opp support added. But for this series to compile
> and work properly one will have to apply the following
> additional patches in the below mentioned order before
> applying this series.
> 	https://patchwork.kernel.org/patch/119544/

this one under discussion

> 	https://patchwork.kernel.org/patch/117347/
> 	https://patchwork.kernel.org/patch/117348/
> 	https://patchwork.kernel.org/patch/117349/

these 3 are in Benoit's pm-wip/hwmods-omap4 branch

> 	http://marc.info/?l=linux-omap&m=128162263809748&w=2

this is in pm-fixes

> 	https://patchwork.kernel.org/patch/119854/

ok, but needs respin

> 	all 5 patches from origin/pm-cpufreq branch off Kevin's pm tree
> 	http://marc.info/?l=linux-omap&m=128170725127719&w=2
> 				- all eight patches in this series

This is a mess to track manually,  It *really* would be nice if you could
share this on a git tree, or demonstrate how to reproduce this using
public git trees.

For example, I created a working baseline to apply this using

git checkout -b tmp/sr-v2 pm-opp
git merge pm-cpufreq
git merge pm-fixes
git merge benoit/pm-wip/hwmods-omap4 (minor conflict to resolve)

Kevin

> This patch series has been tested on OMAP4430 SDP with omap3_defconfig
> with the following menuconfig options enabled
> 	System type -> TI OMAP Implementations -> Smartreflex Support
> 	System type -> TI OMAP Implementations ->
>                 Class 3 mode of Smartreflex Implementation
>
> Benoit Cousson (1):
>   OMAP4: hwmod: Add inital data for smartreflex modules.
>
> Thara Gopinath (9):
>   OMAP4: PM debugfs support
>   OMAP4: OPP framework support
>   OMAP4: Add the new voltage to vsel calculation formula
>   OMAP4: Extend clock data.
>   OMAP4: Adding voltage driver support
>   OMAP4: Adding dev atrributes to OMAP4 smartreflex hwmod data
>   OMAP4: Smartreflex framework extensions
>   OMAP4: Enabling smartrefles class 3 driver.
>   OMAP4: Add opp tables.
>
>  arch/arm/mach-omap2/Makefile               |    2 +-
>  arch/arm/mach-omap2/board-4430sdp.c        |    2 +
>  arch/arm/mach-omap2/clock44xx_data.c       |   40 ++++-
>  arch/arm/mach-omap2/omap_hwmod_44xx_data.c |  220 +++++++++++++++++++++++++
>  arch/arm/mach-omap2/opp44xx.h              |   26 +++
>  arch/arm/mach-omap2/opp44xx_data.c         |   80 +++++++++
>  arch/arm/mach-omap2/pm-debug.c             |   53 +++++-
>  arch/arm/mach-omap2/pm.c                   |    6 +-
>  arch/arm/mach-omap2/smartreflex.c          |    7 +-
>  arch/arm/mach-omap2/sr_device.c            |   21 ++-
>  arch/arm/mach-omap2/voltage.c              |  246 +++++++++++++++++++++++++++-
>  arch/arm/plat-omap/Kconfig                 |    2 +-
>  arch/arm/plat-omap/Makefile                |    1 +
>  arch/arm/plat-omap/include/plat/control.h  |   12 ++
>  arch/arm/plat-omap/include/plat/voltage.h  |   20 ++-
>  arch/arm/plat-omap/opp_twl_tps.c           |    8 +
>  16 files changed, 721 insertions(+), 25 deletions(-)
>  create mode 100644 arch/arm/mach-omap2/opp44xx.h
>  create mode 100644 arch/arm/mach-omap2/opp44xx_data.c

Re: [PATCH 05/10] OMAP4: Adding voltage driver support

[Kevin Hilman]

Thara Gopinath <thara@ti.com> writes:

> This patch adds voltage driver support for OMAP4.

Need a better changelog here... different registers definitions, more
VDDs, etc. etc.

> Signed-off-by: Thara Gopinath <thara@ti.com>
> ---
>  arch/arm/mach-omap2/Makefile              |    2 +-
>  arch/arm/mach-omap2/voltage.c             |  246 ++++++++++++++++++++++++++++-
>  arch/arm/plat-omap/include/plat/voltage.h |   20 +++-
>  3 files changed, 264 insertions(+), 4 deletions(-)
>
> diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile
> index 03e494e..d46fbec 100644
> --- a/arch/arm/mach-omap2/Makefile
> +++ b/arch/arm/mach-omap2/Makefile
> @@ -51,7 +51,7 @@ obj-$(CONFIG_ARCH_OMAP2)		+= pm24xx.o
>  obj-$(CONFIG_ARCH_OMAP2)		+= sleep24xx.o
>  obj-$(CONFIG_ARCH_OMAP3)		+= pm34xx.o sleep34xx.o voltage.o \
>  					   cpuidle34xx.o
> -obj-$(CONFIG_ARCH_OMAP4)		+= pm44xx.o
> +obj-$(CONFIG_ARCH_OMAP4)		+= pm44xx.o voltage.o
>  obj-$(CONFIG_PM_DEBUG)			+= pm-debug.o
>  obj-$(CONFIG_OMAP_SMARTREFLEX)          += sr_device.o smartreflex.o
>  obj-$(CONFIG_OMAP_SMARTREFLEX_CLASS3)	+= smartreflex-class3.o
> diff --git a/arch/arm/mach-omap2/voltage.c b/arch/arm/mach-omap2/voltage.c
> index d15c5cb..6a07fe9 100644
> --- a/arch/arm/mach-omap2/voltage.c
> +++ b/arch/arm/mach-omap2/voltage.c
> @@ -34,6 +34,8 @@
>  #include <plat/voltage.h>
>  
>  #include "prm-regbits-34xx.h"
> +#include "prm44xx.h"
> +#include "prm-regbits-44xx.h"
>  
>  #define VP_IDLE_TIMEOUT		200
>  #define VP_TRANXDONE_TIMEOUT	300
> @@ -158,7 +160,49 @@ static struct omap_vdd_info omap3_vdd_info[] = {
>  
>  #define OMAP3_NO_SCALABLE_VDD ARRAY_SIZE(omap3_vdd_info)
>  
> -/* TODO: OMAP4 register offsets */
> +/* OMAP4 VDD sturctures */
> +static struct omap_vdd_info omap4_vdd_info[] = {
> +	{
> +		.vp_offs = {
> +			.vpconfig = OMAP4_PRM_VP_MPU_CONFIG_OFFSET,
> +			.vstepmin = OMAP4_PRM_VP_MPU_VSTEPMIN_OFFSET,
> +			.vstepmax = OMAP4_PRM_VP_MPU_VSTEPMAX_OFFSET,
> +			.vlimitto = OMAP4_PRM_VP_MPU_VLIMITTO_OFFSET,
> +			.vstatus = OMAP4_PRM_VP_MPU_STATUS_OFFSET,
> +			.voltage = OMAP4_PRM_VP_MPU_VOLTAGE_OFFSET,
> +		},
> +		.voltdm = {
> +			.name = "mpu",
> +		},
> +	},
> +	{
> +		.vp_offs = {
> +			.vpconfig = OMAP4_PRM_VP_IVA_CONFIG_OFFSET,
> +			.vstepmin = OMAP4_PRM_VP_IVA_VSTEPMIN_OFFSET,
> +			.vstepmax = OMAP4_PRM_VP_IVA_VSTEPMAX_OFFSET,
> +			.vlimitto = OMAP4_PRM_VP_IVA_VLIMITTO_OFFSET,
> +			.vstatus = OMAP4_PRM_VP_IVA_STATUS_OFFSET,
> +			.voltage = OMAP4_PRM_VP_IVA_VOLTAGE_OFFSET,
> +		},
> +		.voltdm = {
> +			.name = "iva",
> +		},
> +	},
> +	{
> +		.vp_offs = {
> +			.vpconfig = OMAP4_PRM_VP_CORE_CONFIG_OFFSET,
> +			.vstepmin = OMAP4_PRM_VP_CORE_VSTEPMIN_OFFSET,
> +			.vstepmax = OMAP4_PRM_VP_CORE_VSTEPMAX_OFFSET,
> +			.vlimitto = OMAP4_PRM_VP_CORE_VLIMITTO_OFFSET,
> +			.vstatus = OMAP4_PRM_VP_CORE_STATUS_OFFSET,
> +			.voltage = OMAP4_PRM_VP_CORE_VOLTAGE_OFFSET,
> +		},
> +		.voltdm = {
> +			.name = "core",
> +		},
> +	},
> +};
> +#define OMAP4_NO_SCALABLE_VDD ARRAY_SIZE(omap4_vdd_info)

same comment as with OMAP3 version: drop the 'NO' part in favor of _NUM,
or _NR.

>  /*
>   * Default voltage controller settings.
> @@ -222,6 +266,29 @@ static struct omap_volt_data omap36xx_vdd2_volt_data[] = {
>  	{.volt_nominal = 1137500, .sr_errminlimit = 0xF9, .vp_errgain = 0x16},
>  };
>  
> +/*
> + * Structures containing OMAP4430 voltage supported and various
> + * data associated with it per voltage domain basis. Smartreflex Ntarget
> + * values are left as 0 as they have to be populated by smartreflex
> + * driver after reading the efuse.
> + */
> +static struct omap_volt_data omap44xx_vdd_mpu_volt_data[] = {
> +	{.volt_nominal = 930000, .sr_errminlimit = 0xF4, .vp_errgain = 0x0C},
> +	{.volt_nominal = 1100000, .sr_errminlimit = 0xF9, .vp_errgain = 0x16},
> +	{.volt_nominal = 1260000, .sr_errminlimit = 0xFA, .vp_errgain = 0x23},
> +	{.volt_nominal = 1350000, .sr_errminlimit = 0xFA, .vp_errgain = 0x27},
> +};
> +
> +static struct omap_volt_data omap44xx_vdd_iva_volt_data[] = {
> +	{.volt_nominal = 930000, .sr_errminlimit = 0xF4, .vp_errgain = 0x0C},
> +	{.volt_nominal = 1100000, .sr_errminlimit = 0xF9, .vp_errgain = 0x16},
> +	{.volt_nominal = 1260000, .sr_errminlimit = 0xFA, .vp_errgain = 0x23},
> +};
> +
> +static struct omap_volt_data omap44xx_vdd_core_volt_data[] = {
> +	{.volt_nominal = 930000, .sr_errminlimit = 0xF4, .vp_errgain = 0x0C},
> +	{.volt_nominal = 1100000, .sr_errminlimit = 0xF9, .vp_errgain = 0x16},
> +};
>  
>  /* By default VPFORCEUPDATE is the chosen method of voltage scaling */
>  static bool voltscale_vpforceupdate = true;
> @@ -510,6 +577,165 @@ static void __init omap3_vdd_data_configure(struct omap_vdd_info *vdd)
>  	vdd->vp_reg.vlimitto_timeout_shift = OMAP3430_TIMEOUT_SHIFT;
>  }
>  
> +/* OMAP4 specific voltage init functions */
> +static void __init omap4_init_voltagecontroller(void)
> +{
> +	voltage_write_reg(OMAP4_PRM_VC_SMPS_SA_OFFSET,
> +			(OMAP4_SRI2C_SLAVE_ADDR <<
> +			 OMAP4430_SA_VDD_CORE_L_0_6_SHIFT) |
> +			(OMAP4_SRI2C_SLAVE_ADDR <<
> +			 OMAP4430_SA_VDD_IVA_L_PRM_VC_SMPS_SA_SHIFT) |
> +			(OMAP4_SRI2C_SLAVE_ADDR <<
> +			 OMAP4430_SA_VDD_MPU_L_PRM_VC_SMPS_SA_SHIFT));
> +	voltage_write_reg(OMAP4_PRM_VC_VAL_SMPS_RA_VOL_OFFSET,
> +			(OMAP4_VDD_MPU_SR_VOLT_REG <<
> +			 OMAP4430_VOLRA_VDD_MPU_L_SHIFT) |
> +			(OMAP4_VDD_IVA_SR_VOLT_REG <<
> +			 OMAP4430_VOLRA_VDD_IVA_L_SHIFT) |
> +			(OMAP4_VDD_CORE_SR_VOLT_REG <<
> +			 OMAP4430_VOLRA_VDD_CORE_L_SHIFT));
> +	voltage_write_reg(OMAP4_PRM_VC_CFG_CHANNEL_OFFSET,
> +			OMAP4430_RAV_VDD_MPU_L_MASK |
> +			OMAP4430_CMD_VDD_MPU_L_MASK |
> +			OMAP4430_RAV_VDD_IVA_L_MASK |
> +			OMAP4430_CMD_VDD_IVA_L_MASK |
> +			OMAP4430_RAV_VDD_CORE_L_MASK |
> +			OMAP4430_CMD_VDD_CORE_L_MASK);

insert blank line 

> +	/*
> +	 * Configure SR I2C in HS Mode. Is there really a need to configure
> +	 * i2c in the normal mode??
> +	 */
> +/*	voltage_write_reg(OMAP4_PRM_VC_CFG_I2C_MODE_OFFSET,
> +			0x0 << OMAP4430_HSMCODE_SHIFT);
> +	voltage_write_reg(OMAP4_PRM_VC_CFG_I2C_CLK_OFFSET,
> +			(0x0A << OMAP4430_HSSCLL_SHIFT |
> +			0x05 << OMAP4430_HSSCLH_SHIFT));*/

this is commented out.  Either remove it, or make it conditional on
something meaningful.

> +	voltage_write_reg(OMAP4_PRM_VC_CFG_I2C_CLK_OFFSET,
> +			(0x60 << OMAP4430_SCLL_SHIFT |
> +			0x26 << OMAP4430_SCLH_SHIFT));
> +	/* TODO: Configure setup times and CMD_VAL values*/
> +}
> +
> +/* Sets up all the VDD related info for OMAP4 */
> +static void __init omap4_vdd_data_configure(struct omap_vdd_info *vdd)
> +{
> +	unsigned long curr_volt;
> +	struct omap_volt_data *volt_data;
> +	struct clk *sys_ck;
> +	u32 sys_clk_speed, timeout_val, waittime;
> +
> +	if (!strcmp(vdd->voltdm.name, "mpu")) {
> +		vdd->vp_reg.vlimitto_vddmin = OMAP4_VP_MPU_VLIMITTO_VDDMIN;
> +		vdd->vp_reg.vlimitto_vddmax = OMAP4_VP_MPU_VLIMITTO_VDDMAX;
> +		vdd->volt_data = omap44xx_vdd_mpu_volt_data;
> +		vdd->volt_data_count = ARRAY_SIZE(omap44xx_vdd_mpu_volt_data);
> +		vdd->volt_clk = clk_get(NULL, "dpll_mpu_ck");
> +		WARN(IS_ERR(vdd->volt_clk), "unable to get clock for vdd_%s\n",
> +				vdd->voltdm.name);
> +		vdd->opp_dev = omap2_get_mpuss_device();
> +		vdd->vp_reg.tranxdone_status =
> +				OMAP4430_VP_MPU_TRANXDONE_ST_MASK;
> +		vdd->cmdval_reg = OMAP4_PRM_VC_VAL_CMD_VDD_MPU_L_OFFSET;
> +		vdd->vdd_sr_reg = OMAP4_VDD_MPU_SR_VOLT_REG;
> +	} else if (!strcmp(vdd->voltdm.name, "core")) {
> +		vdd->vp_reg.vlimitto_vddmin = OMAP4_VP_CORE_VLIMITTO_VDDMIN;
> +		vdd->vp_reg.vlimitto_vddmax = OMAP4_VP_CORE_VLIMITTO_VDDMAX;
> +		vdd->volt_data = omap44xx_vdd_core_volt_data;
> +		vdd->volt_data_count = ARRAY_SIZE(omap44xx_vdd_core_volt_data);
> +		vdd->volt_clk = clk_get(NULL, "l3_div_ck");
> +		WARN(IS_ERR(vdd->volt_clk), "unable to get clock for vdd_%s\n",
> +				vdd->voltdm.name);
> +		vdd->opp_dev = omap2_get_l3_device();
> +		vdd->vp_reg.tranxdone_status =
> +				OMAP4430_VP_CORE_TRANXDONE_ST_MASK;
> +		vdd->cmdval_reg = OMAP4_PRM_VC_VAL_CMD_VDD_CORE_L_OFFSET;
> +		vdd->vdd_sr_reg = OMAP4_VDD_CORE_SR_VOLT_REG;
> +	} else if (!strcmp(vdd->voltdm.name, "iva")) {
> +		vdd->vp_reg.vlimitto_vddmin = OMAP4_VP_IVA_VLIMITTO_VDDMIN;
> +		vdd->vp_reg.vlimitto_vddmax = OMAP4_VP_IVA_VLIMITTO_VDDMAX;
> +		vdd->volt_data = omap44xx_vdd_iva_volt_data;
> +		vdd->volt_data_count = ARRAY_SIZE(omap44xx_vdd_iva_volt_data);
> +		vdd->volt_clk = clk_get(NULL, "dpll_iva_m5x2_ck");
> +		WARN(IS_ERR(vdd->volt_clk), "unable to get clock for vdd_%s\n",
> +				vdd->voltdm.name);
> +		vdd->opp_dev = omap2_get_iva_device();
> +		vdd->vp_reg.tranxdone_status =
> +			OMAP4430_VP_IVA_TRANXDONE_ST_MASK;
> +		vdd->cmdval_reg = OMAP4_PRM_VC_VAL_CMD_VDD_IVA_L_OFFSET;
> +		vdd->vdd_sr_reg = OMAP4_VDD_IVA_SR_VOLT_REG;
> +	} else {
> +		pr_warning("%s: vdd_%s does not exisit in OMAP4\n",
> +			__func__, vdd->voltdm.name);
> +		return;
> +	}
> +
> +	curr_volt = omap_voltage_get_nom_volt(&vdd->voltdm);
> +	if (!curr_volt) {
> +		pr_warning("%s: unable to find current voltage for vdd_%s\n",
> +			__func__, vdd->voltdm.name);
> +		return;
> +	}
> +
> +	volt_data = omap_voltage_get_voltdata(&vdd->voltdm, curr_volt);
> +	if (IS_ERR(volt_data)) {
> +		pr_warning("%s: Unable to get volt table for vdd_%s at init",
> +			__func__, vdd->voltdm.name);
> +		return;
> +	}
> +	/*
> +	 * Sys clk rate is require to calculate vp timeout value and
> +	 * smpswaittimemin and smpswaittimemax.
> +	 */
> +	sys_ck = clk_get(NULL, "sys_clkin_ck");
> +	if (IS_ERR(sys_ck)) {
> +		pr_warning("%s: Could not get the sys clk to calculate"
> +			"various vdd_%s params\n", __func__, vdd->voltdm.name);
> +		return;
> +	}
> +	sys_clk_speed = clk_get_rate(sys_ck);
> +	clk_put(sys_ck);

insert blank line

[...]

Kevin

Re: [PATCH 08/10] OMAP4: Smartreflex framework extensions

[Kevin Hilman]

Thara Gopinath <thara@ti.com> writes:

> This patch extends the smartreflex framework to support
> OMAP4. The changes are minor like compiling smartreflex Kconfig
> option for OMAP4 also, and a couple of OMAP4 checks in
> the smartreflex framework.
>
> The change in sr_device.c where new logic has to be introduced
> for reading the efuse registers are due to two reasons.
> 	a. Currently in mainline OMAP4 control base offset is actually
> 	from the mux/padconf module start. Hence a omap_ctrl_read will
> 	not read from the correct offset for the efuse registers.
> 	This is currently being fixed through modfications in the
> 	control layer but till that is finalised, we will have to do
> 	a ioremap of the general control module  base and do a
> 	__raw_read to retrieve the efuse values.

Is this the series posted by Santosh?

   [PATCH 0/4] omap4: Control module series

> 	b. In OMAP4 the efuse registers are 24 bit aligned. Hence
> 	   a __raw_readl will fail for non-32 bit aligned address.
> 	   Hence the 8-bit read and shift.

This should be commented in the code as well.

> Signed-off-by: Thara Gopinath <thara@ti.com>
> ---
>
> This patch has a checkpatch warning which has been already
> acknowledged as a false positive by the checkpatch.pl
> maintainer Andy Whitcroft
> 	http://lkml.org/lkml/2010/8/18/123	
>
>  arch/arm/mach-omap2/smartreflex.c |    7 +++++--
>  arch/arm/mach-omap2/sr_device.c   |   21 +++++++++++++++++++--
>  arch/arm/plat-omap/Kconfig        |    2 +-
>  3 files changed, 25 insertions(+), 5 deletions(-)
>
> diff --git a/arch/arm/mach-omap2/smartreflex.c b/arch/arm/mach-omap2/smartreflex.c
> index bc611d1..2e13c96 100644
> --- a/arch/arm/mach-omap2/smartreflex.c
> +++ b/arch/arm/mach-omap2/smartreflex.c
> @@ -154,7 +154,10 @@ static void sr_set_clk_length(struct omap_sr *sr)
>  	struct clk *sys_ck;
>  	u32 sys_clk_speed;
>  
> -	sys_ck = clk_get(NULL, "sys_ck");
> +	if (cpu_is_omap34xx())
> +		sys_ck = clk_get(NULL, "sys_ck");
> +	else
> +		sys_ck = clk_get(NULL, "sys_clkin_ck");
>  	sys_clk_speed = clk_get_rate(sys_ck);
>  	clk_put(sys_ck);
>  
> @@ -189,7 +192,7 @@ static void sr_set_regfields(struct omap_sr *sr)
>  	 * file or pmic specific data structure. In that case these structure
>  	 * fields will have to be populated using the pdata or pmic structure.
>  	 */
> -	if (cpu_is_omap34xx()) {
> +	if (cpu_is_omap34xx() || cpu_is_omap44xx()) {
>  		sr->err_weight = OMAP3430_SR_ERRWEIGHT;
>  		sr->err_maxlimit = OMAP3430_SR_ERRMAXLIMIT;
>  		sr->accum_data = OMAP3430_SR_ACCUMDATA;
> diff --git a/arch/arm/mach-omap2/sr_device.c b/arch/arm/mach-omap2/sr_device.c
> index 3bd0170..f0181d1 100644
> --- a/arch/arm/mach-omap2/sr_device.c
> +++ b/arch/arm/mach-omap2/sr_device.c
> @@ -20,6 +20,7 @@
>  
>  #include <linux/err.h>
>  #include <linux/slab.h>
> +#include <linux/io.h>
>  
>  #include <plat/control.h>
>  #include <plat/omap_hwmod.h>
> @@ -41,6 +42,7 @@ static void __init sr_read_efuse(struct omap_sr_dev_data *dev_data,
>  				struct omap_sr_data *sr_data)
>  {
>  	int i;
> +	void __iomem *ctrl_base;
>  
>  	if (!dev_data || !dev_data->volts_supported || !dev_data->volt_data ||
>  			!dev_data->efuse_nvalues_offs) {
> @@ -72,9 +74,24 @@ static void __init sr_read_efuse(struct omap_sr_dev_data *dev_data,
>  				dev_data->senpenable_shift);
>  	}
>  
> -	for (i = 0; i < dev_data->volts_supported; i++)
> -		dev_data->volt_data[i].sr_nvalue = omap_ctrl_readl(
> +	if (cpu_is_omap44xx())
> +		ctrl_base =  ioremap(0x4A002000, SZ_1K);
> +
> +	for (i = 0; i < dev_data->volts_supported; i++) {
> +		if (cpu_is_omap44xx()) {
> +			u16 offset = dev_data->efuse_nvalues_offs[i];
> +

The comment about 24-bit aligned addresses from the changelog should go
here too.

> +			dev_data->volt_data[i].sr_nvalue =
> +				__raw_readb(ctrl_base + offset) |
> +				__raw_readb(ctrl_base + offset + 1) << 8 |
> +				__raw_readb(ctrl_base + offset + 2) << 16;
> +		} else {
> +			dev_data->volt_data[i].sr_nvalue = omap_ctrl_readl(
>  				dev_data->efuse_nvalues_offs[i]);
> +		}
> +	}
> +	if (cpu_is_omap44xx())
> +		iounmap(ctrl_base);
>  }
>  
>  /*
> diff --git a/arch/arm/plat-omap/Kconfig b/arch/arm/plat-omap/Kconfig
> index af7acc9..b4e9ac2 100644
> --- a/arch/arm/plat-omap/Kconfig
> +++ b/arch/arm/plat-omap/Kconfig
> @@ -37,7 +37,7 @@ config OMAP_DEBUG_LEDS
>  
>  config OMAP_SMARTREFLEX
>  	bool "SmartReflex support"
> -	depends on ARCH_OMAP3 && PM
> +	depends on (ARCH_OMAP3 || ARCH_OMAP4) && PM
>  	help
>  	  Say Y if you want to enable SmartReflex.

Kevin

Re: [PATCH 10/10] OMAP4: Add opp tables.

[Kevin Hilman]

Thara Gopinath <thara@ti.com> writes:

> This patch adds OPP tables for OMAP4. A new file
> opp44xx.c has been added to keep the OMAP4 opp tables
> and the registeration of these tables with the generic
> opp framework.
>
> Signed-off-by: Thara Gopinath <thara@ti.com>
> ---
>  arch/arm/mach-omap2/Makefile       |    2 +-
>  arch/arm/mach-omap2/opp44xx.h      |   26 ++++++++++++
>  arch/arm/mach-omap2/opp44xx_data.c |   80 ++++++++++++++++++++++++++++++++++++
>  arch/arm/mach-omap2/pm.c           |    6 ++-
>  4 files changed, 112 insertions(+), 2 deletions(-)
>  create mode 100644 arch/arm/mach-omap2/opp44xx.h
>  create mode 100644 arch/arm/mach-omap2/opp44xx_data.c
>
> diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile
> index d46fbec..ebe3f36 100644
> --- a/arch/arm/mach-omap2/Makefile
> +++ b/arch/arm/mach-omap2/Makefile
> @@ -51,7 +51,7 @@ obj-$(CONFIG_ARCH_OMAP2)		+= pm24xx.o
>  obj-$(CONFIG_ARCH_OMAP2)		+= sleep24xx.o
>  obj-$(CONFIG_ARCH_OMAP3)		+= pm34xx.o sleep34xx.o voltage.o \
>  					   cpuidle34xx.o
> -obj-$(CONFIG_ARCH_OMAP4)		+= pm44xx.o voltage.o
> +obj-$(CONFIG_ARCH_OMAP4)		+= pm44xx.o voltage.o opp44xx_data.o
>  obj-$(CONFIG_PM_DEBUG)			+= pm-debug.o
>  obj-$(CONFIG_OMAP_SMARTREFLEX)          += sr_device.o smartreflex.o
>  obj-$(CONFIG_OMAP_SMARTREFLEX_CLASS3)	+= smartreflex-class3.o
> diff --git a/arch/arm/mach-omap2/opp44xx.h b/arch/arm/mach-omap2/opp44xx.h
> new file mode 100644
> index 0000000..2cae9f3
> --- /dev/null
> +++ b/arch/arm/mach-omap2/opp44xx.h

We don't really a new OMAP4-specific header for this.  Let's just rename
omap3-opp.h to omap-opp.h and put both init functions there.

I'll update the pm-opp branch accordingly.

Kevin

> @@ -0,0 +1,26 @@
> +/*
> + * OMAP4 OPP API's.
> + *
> + * Copyright (C) 2010 Texas Instruments Incorporated.
> + *	Thara Gopinath
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2 as
> + * published by the Free Software Foundation.
> + *
> + * THIS PACKAGE IS PROVIDED ``AS IS'' AND WITHOUT ANY EXPRESS OR
> + * IMPLIED WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED
> + * WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR A PARTICULAR PURPOSE.
> + * History:
> + */
> +
> +#ifndef __ARCH_ARM_MACH_OMAP2_OPP44XX_H
> +#define __ARCH_ARM_MACH_OMAP2_OPP44XX_H
> +
> +#ifdef CONFIG_PM
> +extern int omap4_pm_init_opp_table(void);
> +#else
> +static inline int omap4_pm_init_opp_table(void) { return -EINVAL; }
> +#endif
> +
> +#endif
> diff --git a/arch/arm/mach-omap2/opp44xx_data.c b/arch/arm/mach-omap2/opp44xx_data.c
> new file mode 100644
> index 0000000..b5c9680
> --- /dev/null
> +++ b/arch/arm/mach-omap2/opp44xx_data.c
> @@ -0,0 +1,80 @@
> +/*
> + * OMAP4 OPP table definitions.
> + *
> + * Copyright (C) 2009 - 2010 Texas Instruments Incorporated.
> + *	Nishanth Menon
> + * Copyright (C) 2009 - 2010 Deep Root Systems, LLC.
> + *	Kevin Hilman
> + * Copyright (C) 2010 Nokia Corporation.
> + *      Eduardo Valentin
> + * Copyright (C) 2010 Texas Instruments Incorporated.
> + *	Thara Gopinath
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2 as
> + * published by the Free Software Foundation.
> + *
> + * THIS PACKAGE IS PROVIDED ``AS IS'' AND WITHOUT ANY EXPRESS OR
> + * IMPLIED WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED
> + * WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR A PARTICULAR PURPOSE.
> + * History:
> + */
> +
> +#include <linux/module.h>
> +#include <linux/err.h>
> +
> +#include <plat/opp.h>
> +#include <plat/cpu.h>
> +
> +#include "opp44xx.h"
> +
> +static struct omap_opp_def __initdata omap44xx_opp_def_list[] = {
> +	/* MPU OPP1 - OPP50 */
> +	OMAP_OPP_DEF("mpu", true, 300000000, 930000),
> +	/* MPU OPP2 - OPP100 */
> +	OMAP_OPP_DEF("mpu", true, 600000000, 1100000),
> +	/* MPU OPP3 - OPP-Turbo */
> +	OMAP_OPP_DEF("mpu", true, 800000000, 1260000),
> +	/* MPU OPP4 - OPP-SB */
> +	OMAP_OPP_DEF("mpu", true, 1008000000, 1350000),
> +	/* IVA OPP1 - OPP50 */
> +	OMAP_OPP_DEF("iva", true,  133000000, 930000),
> +	/* IVA OPP2 - OPP100 */
> +	OMAP_OPP_DEF("iva", true,  266000000, 1100000),
> +	/* IVA OPP3 - OPP-Turbo */
> +	OMAP_OPP_DEF("iva", false, 332000000, 1260000),
> +	/* L3 OPP1 - OPP50 */
> +	OMAP_OPP_DEF("l3_main_1", true, 100000000, 930000),
> +	/* L3 OPP2 - OPP100, OPP-Turbo, OPP-SB */
> +	OMAP_OPP_DEF("l3_main_1", true, 200000000, 1100000),
> +};
> +
> +static u32 omap44xx_opp_def_size = ARRAY_SIZE(omap44xx_opp_def_list);
> +
> +/* Temp variable to allow multiple calls */
> +static u8 __initdata omap4_table_init;
> +
> +
> +int __init omap4_pm_init_opp_table(void)
> +{
> +	struct omap_opp_def *opp_def;
> +	int i, r;
> +
> +	/*
> +	 * Allow multiple calls, but initialize only if not already initalized
> +	 * even if the previous call failed, coz, no reason we'd succeed again
> +	 */
> +	if (omap4_table_init)
> +		return 0;
> +	omap4_table_init = 1;
> +
> +	opp_def = omap44xx_opp_def_list;
> +
> +	for (i = 0; i < omap44xx_opp_def_size; i++) {
> +		r = opp_add(opp_def++);
> +		if (r)
> +			pr_err("unable to add OPP %ld Hz for %s\n",
> +				opp_def->freq, opp_def->hwmod_name);
> +	}
> +	return 0;
> +}
> diff --git a/arch/arm/mach-omap2/pm.c b/arch/arm/mach-omap2/pm.c
> index 740e506..6707a2e 100644
> --- a/arch/arm/mach-omap2/pm.c
> +++ b/arch/arm/mach-omap2/pm.c
> @@ -19,6 +19,7 @@
>  #include <plat/common.h>
>  
>  #include "omap3-opp.h"
> +#include "opp44xx.h"
>  
>  static struct omap_device_pm_latency *pm_lats;
>  
> @@ -90,7 +91,10 @@ static void omap2_init_processor_devices(void)
>  static int __init omap2_common_pm_init(void)
>  {
>  	omap2_init_processor_devices();
> -	omap3_pm_init_opp_table();
> +	if (cpu_is_omap34xx())
> +		omap3_pm_init_opp_table();
> +	else if (cpu_is_omap44xx())
> +		omap4_pm_init_opp_table();
>  
>  	omap_pm_if_init();

Re: [PATCH 10/10] OMAP4: Add opp tables.

[Kevin Hilman]

On Wed, 2010-08-25 at 16:15 -0700, Kevin Hilman wrote:
> Thara Gopinath <thara@ti.com> writes:
> 
> > This patch adds OPP tables for OMAP4. A new file
> > opp44xx.c has been added to keep the OMAP4 opp tables
> > and the registeration of these tables with the generic
> > opp framework.
> >
> > Signed-off-by: Thara Gopinath <thara@ti.com>
> > ---
> >  arch/arm/mach-omap2/Makefile       |    2 +-
> >  arch/arm/mach-omap2/opp44xx.h      |   26 ++++++++++++
> >  arch/arm/mach-omap2/opp44xx_data.c |   80 ++++++++++++++++++++++++++++++++++++
> >  arch/arm/mach-omap2/pm.c           |    6 ++-
> >  4 files changed, 112 insertions(+), 2 deletions(-)
> >  create mode 100644 arch/arm/mach-omap2/opp44xx.h
> >  create mode 100644 arch/arm/mach-omap2/opp44xx_data.c
> >
> > diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile
> > index d46fbec..ebe3f36 100644
> > --- a/arch/arm/mach-omap2/Makefile
> > +++ b/arch/arm/mach-omap2/Makefile
> > @@ -51,7 +51,7 @@ obj-$(CONFIG_ARCH_OMAP2)		+= pm24xx.o
> >  obj-$(CONFIG_ARCH_OMAP2)		+= sleep24xx.o
> >  obj-$(CONFIG_ARCH_OMAP3)		+= pm34xx.o sleep34xx.o voltage.o \
> >  					   cpuidle34xx.o
> > -obj-$(CONFIG_ARCH_OMAP4)		+= pm44xx.o voltage.o
> > +obj-$(CONFIG_ARCH_OMAP4)		+= pm44xx.o voltage.o opp44xx_data.o
> >  obj-$(CONFIG_PM_DEBUG)			+= pm-debug.o
> >  obj-$(CONFIG_OMAP_SMARTREFLEX)          += sr_device.o smartreflex.o
> >  obj-$(CONFIG_OMAP_SMARTREFLEX_CLASS3)	+= smartreflex-class3.o
> > diff --git a/arch/arm/mach-omap2/opp44xx.h b/arch/arm/mach-omap2/opp44xx.h
> > new file mode 100644
> > index 0000000..2cae9f3
> > --- /dev/null
> > +++ b/arch/arm/mach-omap2/opp44xx.h
> 
> We don't really a new OMAP4-specific header for this.  Let's just rename
> omap3-opp.h to omap-opp.h and put both init functions there.
> 
> I'll update the pm-opp branch accordingly.

s/pm-opp/pm-cpufreq/

Actually, what I did was drop the header all together and just add the
definition to pm.c.

Kevin

RE: [PATCH 08/10] OMAP4: Smartreflex framework extensions

[Shilimkar, Santosh]

> -----Original Message-----
> From: linux-omap-owner@vger.kernel.org [mailto:linux-omap-
> owner@vger.kernel.org] On Behalf Of Kevin Hilman
> Sent: Thursday, August 26, 2010 4:42 AM
> To: Gopinath, Thara
> Cc: linux-omap@vger.kernel.org; paul@pwsan.com; Sripathy, Vishwanath;
> Sawant, Anand; Cousson, Benoit
> Subject: Re: [PATCH 08/10] OMAP4: Smartreflex framework extensions
> 
> Thara Gopinath <thara@ti.com> writes:
> 
> > This patch extends the smartreflex framework to support
> > OMAP4. The changes are minor like compiling smartreflex Kconfig
> > option for OMAP4 also, and a couple of OMAP4 checks in
> > the smartreflex framework.
> >
> > The change in sr_device.c where new logic has to be introduced
> > for reading the efuse registers are due to two reasons.
> > 	a. Currently in mainline OMAP4 control base offset is actually
> > 	from the mux/padconf module start. Hence a omap_ctrl_read will
> > 	not read from the correct offset for the efuse registers.
> > 	This is currently being fixed through modfications in the
> > 	control layer but till that is finalised, we will have to do
> > 	a ioremap of the general control module  base and do a
> > 	__raw_read to retrieve the efuse values.
> 
> Is this the series posted by Santosh?
> 
>    [PATCH 0/4] omap4: Control module series
> 
Yep. This series should address the SR control module
issue

Regards,
Santosh