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* [PATCH] drm/i915/cnl: Map VBT DDC Pin to BSpec DDC Pin.
@ 2017-10-19 15:45 Rodrigo Vivi
  2017-10-19 16:02 ` Rodrigo Vivi
                   ` (8 more replies)
  0 siblings, 9 replies; 17+ messages in thread
From: Rodrigo Vivi @ 2017-10-19 15:45 UTC (permalink / raw)
  To: intel-gfx; +Cc: Jani Nikula, Paulo Zanoni, Rodrigo Vivi

Starting on CNL we now need to map VBT DDC Pin to
BSPec DDC Pin values. Not a direct translation anymore.

According to VBT
Block 2 (General Bytes Definition)
DDC Bus

+----------+-----------+--------------------+
| DDI Type | VBT Value | Bspec Mapped Value |
+----------+-----------+--------------------+
| DDI-B    | 0x1       | 0x1                |
| DDI-C    | 0x2       | 0x2                |
| DDI-D    | 0x3       | 0x4                |
| DDI-F    | 0x4       | 0x3                |
+----------+-----------+--------------------+

Cc: Jani Nikula <jani.nikula@intel.com>
Cc: Paulo Zanoni <paulo.r.zanoni@intel.com>
Cc: Anusha Srivatsa <anusha.srivatsa@intel.com>
Cc: Clinton Taylor <clinton.a.taylor@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
---
 drivers/gpu/drm/i915/intel_bios.c | 32 ++++++++++++++++++++++----------
 1 file changed, 22 insertions(+), 10 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_bios.c b/drivers/gpu/drm/i915/intel_bios.c
index dc4fad30bf4f..e0e59cd52766 100644
--- a/drivers/gpu/drm/i915/intel_bios.c
+++ b/drivers/gpu/drm/i915/intel_bios.c
@@ -1071,6 +1071,24 @@ static void sanitize_aux_ch(struct drm_i915_private *dev_priv,
 	}
 }
 
+#define DDC_BUS_DDI_B	0x1
+#define DDC_BUS_DDI_C	0x2
+#define DDC_BUS_DDI_D	0x3
+#define DDC_BUS_DDI_F	0x4
+
+static u8 cnl_ddc_pin_map(u8 ddc_pin)
+{
+	switch (ddc_pin) {
+	case DDC_BUS_DDI_B: return 0x1;
+	case DDC_BUS_DDI_C: return 0x2;
+	case DDC_BUS_DDI_D: return 0x4;
+	case DDC_BUS_DDI_F: return 0x3;
+	default:
+		MISSING_CASE(ddc_pin);
+		return ddc_pin;
+	}
+}
+
 static void parse_ddi_port(struct drm_i915_private *dev_priv, enum port port,
 			   u8 bdb_version)
 {
@@ -1164,16 +1182,10 @@ static void parse_ddi_port(struct drm_i915_private *dev_priv, enum port port,
 		DRM_DEBUG_KMS("Port %c is internal DP\n", port_name(port));
 
 	if (is_dvi) {
-		info->alternate_ddc_pin = ddc_pin;
-
-		/*
-		 * All VBTs that we got so far for B Stepping has this
-		 * information wrong for Port D. So, let's just ignore for now.
-		 */
-		if (IS_CNL_REVID(dev_priv, CNL_REVID_B0, CNL_REVID_B0) &&
-		    port == PORT_D) {
-			info->alternate_ddc_pin = 0;
-		}
+		if (IS_CANNONLAKE(dev_priv))
+			info->alternate_ddc_pin = cnl_ddc_pin_map(ddc_pin);
+		else
+			info->alternate_ddc_pin = ddc_pin;
 
 		sanitize_ddc_pin(dev_priv, port);
 	}
-- 
2.13.5

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply related	[flat|nested] 17+ messages in thread
* [PATCH] drm/i915/cnl: Map VBT DDC Pin to BSpec DDC Pin.
  2017-10-19 15:45 [PATCH] drm/i915/cnl: Map VBT DDC Pin to BSpec DDC Pin Rodrigo Vivi
@ 2017-10-19 16:02 ` Rodrigo Vivi
  2017-10-19 16:02 ` Ville Syrjälä
                   ` (7 subsequent siblings)
  8 siblings, 0 replies; 17+ messages in thread
From: Rodrigo Vivi @ 2017-10-19 16:02 UTC (permalink / raw)
  To: intel-gfx; +Cc: Jani Nikula, Paulo Zanoni, Rodrigo Vivi

Starting on CNL we now need to map VBT DDC Pin to
BSPec DDC Pin values. Not a direct translation anymore.

According to VBT
Block 2 (General Bytes Definition)
DDC Bus

+----------+-----------+--------------------+
| DDI Type | VBT Value | Bspec Mapped Value |
+----------+-----------+--------------------+
| DDI-B    | 0x1       | 0x1                |
| DDI-C    | 0x2       | 0x2                |
| DDI-D    | 0x3       | 0x4                |
| DDI-F    | 0x4       | 0x3                |
+----------+-----------+--------------------+

v2: Move defines to a better place.
    This is actually CNL_PCH not CNL only.

Cc: Jani Nikula <jani.nikula@intel.com>
Cc: Paulo Zanoni <paulo.r.zanoni@intel.com>
Cc: Anusha Srivatsa <anusha.srivatsa@intel.com>
Cc: Clinton Taylor <clinton.a.taylor@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
---
 drivers/gpu/drm/i915/intel_bios.c     | 27 +++++++++++++++++----------
 drivers/gpu/drm/i915/intel_vbt_defs.h |  6 ++++++
 2 files changed, 23 insertions(+), 10 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_bios.c b/drivers/gpu/drm/i915/intel_bios.c
index dc4fad30bf4f..49e333826c2c 100644
--- a/drivers/gpu/drm/i915/intel_bios.c
+++ b/drivers/gpu/drm/i915/intel_bios.c
@@ -1071,6 +1071,19 @@ static void sanitize_aux_ch(struct drm_i915_private *dev_priv,
 	}
 }
 
+static u8 cnp_ddc_pin_map(u8 ddc_pin)
+{
+	switch (ddc_pin) {
+	case DDC_BUS_DDI_B: return 0x1;
+	case DDC_BUS_DDI_C: return 0x2;
+	case DDC_BUS_DDI_D: return 0x4;
+	case DDC_BUS_DDI_F: return 0x3;
+	default:
+		MISSING_CASE(ddc_pin);
+		return ddc_pin;
+	}
+}
+
 static void parse_ddi_port(struct drm_i915_private *dev_priv, enum port port,
 			   u8 bdb_version)
 {
@@ -1164,16 +1177,10 @@ static void parse_ddi_port(struct drm_i915_private *dev_priv, enum port port,
 		DRM_DEBUG_KMS("Port %c is internal DP\n", port_name(port));
 
 	if (is_dvi) {
-		info->alternate_ddc_pin = ddc_pin;
-
-		/*
-		 * All VBTs that we got so far for B Stepping has this
-		 * information wrong for Port D. So, let's just ignore for now.
-		 */
-		if (IS_CNL_REVID(dev_priv, CNL_REVID_B0, CNL_REVID_B0) &&
-		    port == PORT_D) {
-			info->alternate_ddc_pin = 0;
-		}
+		if (HAS_PCH_CNP(dev_priv))
+			info->alternate_ddc_pin = cnp_ddc_pin_map(ddc_pin);
+		else
+			info->alternate_ddc_pin = ddc_pin;
 
 		sanitize_ddc_pin(dev_priv, port);
 	}
diff --git a/drivers/gpu/drm/i915/intel_vbt_defs.h b/drivers/gpu/drm/i915/intel_vbt_defs.h
index 7e2a96712d07..e2e9fc601a9e 100644
--- a/drivers/gpu/drm/i915/intel_vbt_defs.h
+++ b/drivers/gpu/drm/i915/intel_vbt_defs.h
@@ -308,6 +308,12 @@ struct bdb_general_features {
 
 #define LEGACY_CHILD_DEVICE_CONFIG_SIZE		33
 
+/* ddc_pin DDI Type 155+ */
+#define DDC_BUS_DDI_B	0x1
+#define DDC_BUS_DDI_C	0x2
+#define DDC_BUS_DDI_D	0x3
+#define DDC_BUS_DDI_F	0x4
+
 /*
  * The child device config, aka the display device data structure, provides a
  * description of a port and its configuration on the platform.
-- 
2.13.5

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply related	[flat|nested] 17+ messages in thread
* Re: [PATCH] drm/i915/cnl: Map VBT DDC Pin to BSpec DDC Pin.
  2017-10-19 15:45 [PATCH] drm/i915/cnl: Map VBT DDC Pin to BSpec DDC Pin Rodrigo Vivi
  2017-10-19 16:02 ` Rodrigo Vivi
@ 2017-10-19 16:02 ` Ville Syrjälä
  2017-10-19 21:11   ` Rodrigo Vivi
  2017-10-19 16:12 ` ✓ Fi.CI.BAT: success for " Patchwork
                   ` (6 subsequent siblings)
  8 siblings, 1 reply; 17+ messages in thread
From: Ville Syrjälä @ 2017-10-19 16:02 UTC (permalink / raw)
  To: Rodrigo Vivi; +Cc: Jani Nikula, intel-gfx, Paulo Zanoni

On Thu, Oct 19, 2017 at 08:45:21AM -0700, Rodrigo Vivi wrote:
> Starting on CNL we now need to map VBT DDC Pin to
> BSPec DDC Pin values. Not a direct translation anymore.
> 
> According to VBT
> Block 2 (General Bytes Definition)
> DDC Bus
> 
> +----------+-----------+--------------------+
> | DDI Type | VBT Value | Bspec Mapped Value |
> +----------+-----------+--------------------+
> | DDI-B    | 0x1       | 0x1                |
> | DDI-C    | 0x2       | 0x2                |
> | DDI-D    | 0x3       | 0x4                |
> | DDI-F    | 0x4       | 0x3                |
> +----------+-----------+--------------------+
> 
> Cc: Jani Nikula <jani.nikula@intel.com>
> Cc: Paulo Zanoni <paulo.r.zanoni@intel.com>
> Cc: Anusha Srivatsa <anusha.srivatsa@intel.com>
> Cc: Clinton Taylor <clinton.a.taylor@intel.com>
> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
> ---
>  drivers/gpu/drm/i915/intel_bios.c | 32 ++++++++++++++++++++++----------
>  1 file changed, 22 insertions(+), 10 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_bios.c b/drivers/gpu/drm/i915/intel_bios.c
> index dc4fad30bf4f..e0e59cd52766 100644
> --- a/drivers/gpu/drm/i915/intel_bios.c
> +++ b/drivers/gpu/drm/i915/intel_bios.c
> @@ -1071,6 +1071,24 @@ static void sanitize_aux_ch(struct drm_i915_private *dev_priv,
>  	}
>  }
>  
> +#define DDC_BUS_DDI_B	0x1
> +#define DDC_BUS_DDI_C	0x2
> +#define DDC_BUS_DDI_D	0x3
> +#define DDC_BUS_DDI_F	0x4

enum perhaps?

> +
> +static u8 cnl_ddc_pin_map(u8 ddc_pin)
> +{
> +	switch (ddc_pin) {
> +	case DDC_BUS_DDI_B: return 0x1;
> +	case DDC_BUS_DDI_C: return 0x2;
> +	case DDC_BUS_DDI_D: return 0x4;
> +	case DDC_BUS_DDI_F: return 0x3;

s/magic number/GMBUS_PIN_whatever/ ?

Also looks like this thing could be represented as an array instead,
even for *future* platforms.

> +	default:
> +		MISSING_CASE(ddc_pin);
> +		return ddc_pin;
> +	}
> +}
> +
>  static void parse_ddi_port(struct drm_i915_private *dev_priv, enum port port,
>  			   u8 bdb_version)
>  {
> @@ -1164,16 +1182,10 @@ static void parse_ddi_port(struct drm_i915_private *dev_priv, enum port port,
>  		DRM_DEBUG_KMS("Port %c is internal DP\n", port_name(port));
>  
>  	if (is_dvi) {
> -		info->alternate_ddc_pin = ddc_pin;
> -
> -		/*
> -		 * All VBTs that we got so far for B Stepping has this
> -		 * information wrong for Port D. So, let's just ignore for now.
> -		 */
> -		if (IS_CNL_REVID(dev_priv, CNL_REVID_B0, CNL_REVID_B0) &&
> -		    port == PORT_D) {
> -			info->alternate_ddc_pin = 0;
> -		}
> +		if (IS_CANNONLAKE(dev_priv))
> +			info->alternate_ddc_pin = cnl_ddc_pin_map(ddc_pin);
> +		else
> +			info->alternate_ddc_pin = ddc_pin;
>  
>  		sanitize_ddc_pin(dev_priv, port);
>  	}
> -- 
> 2.13.5
> 
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx

-- 
Ville Syrjälä
Intel OTC
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 17+ messages in thread
* ✓ Fi.CI.BAT: success for drm/i915/cnl: Map VBT DDC Pin to BSpec DDC Pin.
  2017-10-19 15:45 [PATCH] drm/i915/cnl: Map VBT DDC Pin to BSpec DDC Pin Rodrigo Vivi
  2017-10-19 16:02 ` Rodrigo Vivi
  2017-10-19 16:02 ` Ville Syrjälä
@ 2017-10-19 16:12 ` Patchwork
  2017-10-19 16:34 ` ✓ Fi.CI.BAT: success for drm/i915/cnl: Map VBT DDC Pin to BSpec DDC Pin. (rev2) Patchwork
                   ` (5 subsequent siblings)
  8 siblings, 0 replies; 17+ messages in thread
From: Patchwork @ 2017-10-19 16:12 UTC (permalink / raw)
  To: Rodrigo Vivi; +Cc: intel-gfx

== Series Details ==

Series: drm/i915/cnl: Map VBT DDC Pin to BSpec DDC Pin.
URL   : https://patchwork.freedesktop.org/series/32305/
State : success

== Summary ==

Series 32305v1 drm/i915/cnl: Map VBT DDC Pin to BSpec DDC Pin.
https://patchwork.freedesktop.org/api/1.0/series/32305/revisions/1/mbox/

Test chamelium:
        Subgroup dp-crc-fast:
                pass       -> FAIL       (fi-kbl-7500u) fdo#102514
Test kms_busy:
        Subgroup basic-flip-b:
                fail       -> PASS       (fi-gdg-551) fdo#102654
Test kms_cursor_legacy:
        Subgroup basic-busy-flip-before-cursor-legacy:
                fail       -> PASS       (fi-gdg-551) fdo#102618
        Subgroup basic-flip-after-cursor-varying-size:
                incomplete -> PASS       (fi-skl-6260u)

fdo#102514 https://bugs.freedesktop.org/show_bug.cgi?id=102514
fdo#102654 https://bugs.freedesktop.org/show_bug.cgi?id=102654
fdo#102618 https://bugs.freedesktop.org/show_bug.cgi?id=102618

fi-bdw-5557u     total:289  pass:268  dwarn:0   dfail:0   fail:0   skip:21  time:439s
fi-bdw-gvtdvm    total:289  pass:265  dwarn:0   dfail:0   fail:0   skip:24  time:453s
fi-blb-e6850     total:289  pass:223  dwarn:1   dfail:0   fail:0   skip:65  time:373s
fi-bsw-n3050     total:289  pass:243  dwarn:0   dfail:0   fail:0   skip:46  time:529s
fi-bwr-2160      total:289  pass:183  dwarn:0   dfail:0   fail:0   skip:106 time:265s
fi-bxt-dsi       total:289  pass:259  dwarn:0   dfail:0   fail:0   skip:30  time:495s
fi-bxt-j4205     total:289  pass:260  dwarn:0   dfail:0   fail:0   skip:29  time:490s
fi-byt-j1900     total:289  pass:253  dwarn:1   dfail:0   fail:0   skip:35  time:489s
fi-byt-n2820     total:289  pass:249  dwarn:1   dfail:0   fail:0   skip:39  time:475s
fi-cfl-s         total:289  pass:253  dwarn:4   dfail:0   fail:0   skip:32  time:561s
fi-elk-e7500     total:289  pass:229  dwarn:0   dfail:0   fail:0   skip:60  time:413s
fi-gdg-551       total:289  pass:178  dwarn:1   dfail:0   fail:1   skip:109 time:250s
fi-glk-1         total:289  pass:261  dwarn:0   dfail:0   fail:0   skip:28  time:583s
fi-hsw-4770      total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  time:448s
fi-hsw-4770r     total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  time:428s
fi-ilk-650       total:289  pass:228  dwarn:0   dfail:0   fail:0   skip:61  time:431s
fi-ivb-3520m     total:289  pass:260  dwarn:0   dfail:0   fail:0   skip:29  time:497s
fi-ivb-3770      total:289  pass:260  dwarn:0   dfail:0   fail:0   skip:29  time:455s
fi-kbl-7500u     total:289  pass:263  dwarn:1   dfail:0   fail:1   skip:24  time:475s
fi-kbl-7560u     total:289  pass:270  dwarn:0   dfail:0   fail:0   skip:19  time:575s
fi-kbl-7567u     total:289  pass:269  dwarn:0   dfail:0   fail:0   skip:20  time:471s
fi-kbl-r         total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  time:582s
fi-pnv-d510      total:289  pass:222  dwarn:1   dfail:0   fail:0   skip:66  time:544s
fi-skl-6260u     total:289  pass:269  dwarn:0   dfail:0   fail:0   skip:20  time:449s
fi-skl-6700hq    total:289  pass:263  dwarn:0   dfail:0   fail:0   skip:26  time:644s
fi-skl-6700k     total:289  pass:265  dwarn:0   dfail:0   fail:0   skip:24  time:522s
fi-skl-6770hq    total:289  pass:269  dwarn:0   dfail:0   fail:0   skip:20  time:501s
fi-skl-gvtdvm    total:289  pass:266  dwarn:0   dfail:0   fail:0   skip:23  time:455s
fi-snb-2520m     total:289  pass:250  dwarn:0   dfail:0   fail:0   skip:39  time:561s
fi-snb-2600      total:289  pass:249  dwarn:0   dfail:0   fail:0   skip:40  time:418s

9024f1a2827aa921560ee3f985a5b418ef296435 drm-tip: 2017y-10m-19d-12h-57m-03s UTC integration manifest
fa6f2c6e84c5 drm/i915/cnl: Map VBT DDC Pin to BSpec DDC Pin.

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_6106/
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 17+ messages in thread
* ✓ Fi.CI.BAT: success for drm/i915/cnl: Map VBT DDC Pin to BSpec DDC Pin. (rev2)
  2017-10-19 15:45 [PATCH] drm/i915/cnl: Map VBT DDC Pin to BSpec DDC Pin Rodrigo Vivi
                   ` (2 preceding siblings ...)
  2017-10-19 16:12 ` ✓ Fi.CI.BAT: success for " Patchwork
@ 2017-10-19 16:34 ` Patchwork
  2017-10-19 17:23 ` ✓ Fi.CI.IGT: " Patchwork
                   ` (4 subsequent siblings)
  8 siblings, 0 replies; 17+ messages in thread
From: Patchwork @ 2017-10-19 16:34 UTC (permalink / raw)
  To: Rodrigo Vivi; +Cc: intel-gfx

== Series Details ==

Series: drm/i915/cnl: Map VBT DDC Pin to BSpec DDC Pin. (rev2)
URL   : https://patchwork.freedesktop.org/series/32305/
State : success

== Summary ==

Series 32305v2 drm/i915/cnl: Map VBT DDC Pin to BSpec DDC Pin.
https://patchwork.freedesktop.org/api/1.0/series/32305/revisions/2/mbox/

Test kms_busy:
        Subgroup basic-flip-b:
                fail       -> PASS       (fi-gdg-551) fdo#102654
Test kms_cursor_legacy:
        Subgroup basic-busy-flip-before-cursor-legacy:
                fail       -> PASS       (fi-gdg-551) fdo#102618
        Subgroup basic-flip-after-cursor-varying-size:
                incomplete -> PASS       (fi-skl-6260u)
Test drv_module_reload:
        Subgroup basic-reload-inject:
                dmesg-warn -> INCOMPLETE (fi-cfl-s) fdo#103206

fdo#102654 https://bugs.freedesktop.org/show_bug.cgi?id=102654
fdo#102618 https://bugs.freedesktop.org/show_bug.cgi?id=102618
fdo#103206 https://bugs.freedesktop.org/show_bug.cgi?id=103206

fi-bdw-5557u     total:289  pass:268  dwarn:0   dfail:0   fail:0   skip:21  time:446s
fi-bdw-gvtdvm    total:289  pass:265  dwarn:0   dfail:0   fail:0   skip:24  time:448s
fi-blb-e6850     total:289  pass:223  dwarn:1   dfail:0   fail:0   skip:65  time:381s
fi-bsw-n3050     total:289  pass:243  dwarn:0   dfail:0   fail:0   skip:46  time:519s
fi-bwr-2160      total:289  pass:183  dwarn:0   dfail:0   fail:0   skip:106 time:263s
fi-bxt-dsi       total:289  pass:259  dwarn:0   dfail:0   fail:0   skip:30  time:500s
fi-bxt-j4205     total:289  pass:260  dwarn:0   dfail:0   fail:0   skip:29  time:496s
fi-byt-j1900     total:289  pass:253  dwarn:1   dfail:0   fail:0   skip:35  time:494s
fi-byt-n2820     total:289  pass:249  dwarn:1   dfail:0   fail:0   skip:39  time:472s
fi-cfl-s         total:288  pass:253  dwarn:3   dfail:0   fail:0   skip:31 
fi-elk-e7500     total:289  pass:229  dwarn:0   dfail:0   fail:0   skip:60  time:417s
fi-gdg-551       total:289  pass:178  dwarn:1   dfail:0   fail:1   skip:109 time:249s
fi-glk-1         total:289  pass:261  dwarn:0   dfail:0   fail:0   skip:28  time:583s
fi-hsw-4770      total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  time:444s
fi-hsw-4770r     total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  time:429s
fi-ilk-650       total:289  pass:228  dwarn:0   dfail:0   fail:0   skip:61  time:434s
fi-ivb-3520m     total:289  pass:260  dwarn:0   dfail:0   fail:0   skip:29  time:487s
fi-ivb-3770      total:289  pass:260  dwarn:0   dfail:0   fail:0   skip:29  time:456s
fi-kbl-7500u     total:289  pass:264  dwarn:1   dfail:0   fail:0   skip:24  time:490s
fi-kbl-7560u     total:289  pass:270  dwarn:0   dfail:0   fail:0   skip:19  time:570s
fi-kbl-7567u     total:289  pass:269  dwarn:0   dfail:0   fail:0   skip:20  time:475s
fi-kbl-r         total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  time:577s
fi-pnv-d510      total:289  pass:222  dwarn:1   dfail:0   fail:0   skip:66  time:541s
fi-skl-6260u     total:289  pass:269  dwarn:0   dfail:0   fail:0   skip:20  time:453s
fi-skl-6700hq    total:289  pass:263  dwarn:0   dfail:0   fail:0   skip:26  time:647s
fi-skl-6700k     total:289  pass:265  dwarn:0   dfail:0   fail:0   skip:24  time:516s
fi-skl-6770hq    total:289  pass:269  dwarn:0   dfail:0   fail:0   skip:20  time:499s
fi-skl-gvtdvm    total:289  pass:266  dwarn:0   dfail:0   fail:0   skip:23  time:457s
fi-snb-2520m     total:289  pass:250  dwarn:0   dfail:0   fail:0   skip:39  time:568s
fi-snb-2600      total:289  pass:249  dwarn:0   dfail:0   fail:0   skip:40  time:419s

9024f1a2827aa921560ee3f985a5b418ef296435 drm-tip: 2017y-10m-19d-12h-57m-03s UTC integration manifest
9bfbafa247c0 drm/i915/cnl: Map VBT DDC Pin to BSpec DDC Pin.

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_6107/
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 17+ messages in thread
* ✓ Fi.CI.IGT: success for drm/i915/cnl: Map VBT DDC Pin to BSpec DDC Pin. (rev2)
  2017-10-19 15:45 [PATCH] drm/i915/cnl: Map VBT DDC Pin to BSpec DDC Pin Rodrigo Vivi
                   ` (3 preceding siblings ...)
  2017-10-19 16:34 ` ✓ Fi.CI.BAT: success for drm/i915/cnl: Map VBT DDC Pin to BSpec DDC Pin. (rev2) Patchwork
@ 2017-10-19 17:23 ` Patchwork
  2017-10-19 21:32 ` ✓ Fi.CI.BAT: success for drm/i915/cnl: Map VBT DDC Pin to BSpec DDC Pin. (rev3) Patchwork
                   ` (3 subsequent siblings)
  8 siblings, 0 replies; 17+ messages in thread
From: Patchwork @ 2017-10-19 17:23 UTC (permalink / raw)
  To: Rodrigo Vivi; +Cc: intel-gfx

== Series Details ==

Series: drm/i915/cnl: Map VBT DDC Pin to BSpec DDC Pin. (rev2)
URL   : https://patchwork.freedesktop.org/series/32305/
State : success

== Summary ==

Test kms_busy:
        Subgroup extended-modeset-hang-newfb-with-reset-render-B:
                pass       -> DMESG-WARN (shard-hsw) fdo#103038

fdo#103038 https://bugs.freedesktop.org/show_bug.cgi?id=103038

shard-hsw        total:2540 pass:1428 dwarn:3   dfail:0   fail:8   skip:1101 time:9230s

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_6107/shards.html
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 17+ messages in thread
* [PATCH] drm/i915/cnl: Map VBT DDC Pin to BSpec DDC Pin.
  2017-10-19 16:02 ` Ville Syrjälä
@ 2017-10-19 21:11   ` Rodrigo Vivi
  2017-10-20  9:11     ` Jani Nikula
  0 siblings, 1 reply; 17+ messages in thread
From: Rodrigo Vivi @ 2017-10-19 21:11 UTC (permalink / raw)
  To: intel-gfx; +Cc: Paulo Zanoni, Jani Nikula, Rodrigo Vivi

Starting on CNL we now need to map VBT DDC Pin to
BSPec DDC Pin values. Not a direct translation anymore.

According to VBT
Block 2 (General Bytes Definition)
DDC Bus

+----------+-----------+--------------------+
| DDI Type | VBT Value | Bspec Mapped Value |
+----------+-----------+--------------------+
| DDI-B    | 0x1       | 0x1                |
| DDI-C    | 0x2       | 0x2                |
| DDI-D    | 0x3       | 0x4                |
| DDI-F    | 0x4       | 0x3                |
+----------+-----------+--------------------+

v2: Move defines to a better place.
    This is actually CNL_PCH not CNL only.
v3: Accepting Ville's suggestions: enums and array to
    to make this future proof.

Cc: Jani Nikula <jani.nikula@intel.com>
Cc: Paulo Zanoni <paulo.r.zanoni@intel.com>
Cc: Anusha Srivatsa <anusha.srivatsa@intel.com>
Cc: Clinton Taylor <clinton.a.taylor@intel.com>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
---
 drivers/gpu/drm/i915/intel_bios.c     | 26 ++++++++++++++++----------
 drivers/gpu/drm/i915/intel_vbt_defs.h | 15 +++++++++++++++
 2 files changed, 31 insertions(+), 10 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_bios.c b/drivers/gpu/drm/i915/intel_bios.c
index dc4fad30bf4f..79638308664c 100644
--- a/drivers/gpu/drm/i915/intel_bios.c
+++ b/drivers/gpu/drm/i915/intel_bios.c
@@ -1071,6 +1071,21 @@ static void sanitize_aux_ch(struct drm_i915_private *dev_priv,
 	}
 }
 
+static const enum bspec_gmbus_pin cnp_ddc_pin_map[] = {
+	[DDC_BUS_DDI_B] = GMBUS_PIN_1,
+	[DDC_BUS_DDI_C] = GMBUS_PIN_2,
+	[DDC_BUS_DDI_D] = GMBUS_PIN_4,
+	[DDC_BUS_DDI_F] = GMBUS_PIN_3,
+};
+
+static u8 get_ddc_pin(struct drm_i915_private *dev_priv, u8 vbt_pin)
+{
+	if (HAS_PCH_CNP(dev_priv))
+		return cnp_ddc_pin_map[vbt_pin];
+
+	return vbt_pin;
+}
+
 static void parse_ddi_port(struct drm_i915_private *dev_priv, enum port port,
 			   u8 bdb_version)
 {
@@ -1164,16 +1179,7 @@ static void parse_ddi_port(struct drm_i915_private *dev_priv, enum port port,
 		DRM_DEBUG_KMS("Port %c is internal DP\n", port_name(port));
 
 	if (is_dvi) {
-		info->alternate_ddc_pin = ddc_pin;
-
-		/*
-		 * All VBTs that we got so far for B Stepping has this
-		 * information wrong for Port D. So, let's just ignore for now.
-		 */
-		if (IS_CNL_REVID(dev_priv, CNL_REVID_B0, CNL_REVID_B0) &&
-		    port == PORT_D) {
-			info->alternate_ddc_pin = 0;
-		}
+		info->alternate_ddc_pin = get_ddc_pin(dev_priv, ddc_pin);
 
 		sanitize_ddc_pin(dev_priv, port);
 	}
diff --git a/drivers/gpu/drm/i915/intel_vbt_defs.h b/drivers/gpu/drm/i915/intel_vbt_defs.h
index 7e2a96712d07..dfc9f7a43668 100644
--- a/drivers/gpu/drm/i915/intel_vbt_defs.h
+++ b/drivers/gpu/drm/i915/intel_vbt_defs.h
@@ -308,6 +308,21 @@ struct bdb_general_features {
 
 #define LEGACY_CHILD_DEVICE_CONFIG_SIZE		33
 
+/* DDC Bus DDI Type 155+ */
+enum vbt_gmbus_ddi {
+	DDC_BUS_DDI_B = 0x1,
+	DDC_BUS_DDI_C,
+	DDC_BUS_DDI_D,
+	DDC_BUS_DDI_F,
+};
+
+enum bspec_gmbus_pin {
+	GMBUS_PIN_1 = 0x1,
+	GMBUS_PIN_2,
+	GMBUS_PIN_3,
+	GMBUS_PIN_4,
+};
+
 /*
  * The child device config, aka the display device data structure, provides a
  * description of a port and its configuration on the platform.
-- 
2.13.5

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply related	[flat|nested] 17+ messages in thread
* ✓ Fi.CI.BAT: success for drm/i915/cnl: Map VBT DDC Pin to BSpec DDC Pin. (rev3)
  2017-10-19 15:45 [PATCH] drm/i915/cnl: Map VBT DDC Pin to BSpec DDC Pin Rodrigo Vivi
                   ` (4 preceding siblings ...)
  2017-10-19 17:23 ` ✓ Fi.CI.IGT: " Patchwork
@ 2017-10-19 21:32 ` Patchwork
  2017-10-19 22:29 ` ✓ Fi.CI.IGT: " Patchwork
                   ` (2 subsequent siblings)
  8 siblings, 0 replies; 17+ messages in thread
From: Patchwork @ 2017-10-19 21:32 UTC (permalink / raw)
  To: Rodrigo Vivi; +Cc: intel-gfx

== Series Details ==

Series: drm/i915/cnl: Map VBT DDC Pin to BSpec DDC Pin. (rev3)
URL   : https://patchwork.freedesktop.org/series/32305/
State : success

== Summary ==

Series 32305v3 drm/i915/cnl: Map VBT DDC Pin to BSpec DDC Pin.
https://patchwork.freedesktop.org/api/1.0/series/32305/revisions/3/mbox/

Test gem_sync:
        Subgroup basic-store-all:
                pass       -> FAIL       (fi-ivb-3520m) fdo#100007
Test kms_flip:
        Subgroup basic-flip-vs-wf_vblank:
                incomplete -> PASS       (fi-skl-6700hq)
Test kms_pipe_crc_basic:
        Subgroup suspend-read-crc-pipe-b:
                pass       -> DMESG-WARN (fi-byt-n2820) fdo#101705

fdo#100007 https://bugs.freedesktop.org/show_bug.cgi?id=100007
fdo#101705 https://bugs.freedesktop.org/show_bug.cgi?id=101705

fi-bdw-5557u     total:289  pass:268  dwarn:0   dfail:0   fail:0   skip:21  time:443s
fi-bdw-gvtdvm    total:289  pass:265  dwarn:0   dfail:0   fail:0   skip:24  time:449s
fi-blb-e6850     total:289  pass:223  dwarn:1   dfail:0   fail:0   skip:65  time:375s
fi-bsw-n3050     total:289  pass:243  dwarn:0   dfail:0   fail:0   skip:46  time:545s
fi-bwr-2160      total:289  pass:183  dwarn:0   dfail:0   fail:0   skip:106 time:265s
fi-bxt-dsi       total:289  pass:259  dwarn:0   dfail:0   fail:0   skip:30  time:503s
fi-bxt-j4205     total:289  pass:260  dwarn:0   dfail:0   fail:0   skip:29  time:498s
fi-byt-j1900     total:289  pass:253  dwarn:1   dfail:0   fail:0   skip:35  time:496s
fi-byt-n2820     total:289  pass:249  dwarn:1   dfail:0   fail:0   skip:39  time:480s
fi-cfl-s         total:289  pass:253  dwarn:4   dfail:0   fail:0   skip:32  time:552s
fi-elk-e7500     total:289  pass:229  dwarn:0   dfail:0   fail:0   skip:60  time:424s
fi-gdg-551       total:289  pass:178  dwarn:1   dfail:0   fail:1   skip:109 time:258s
fi-glk-1         total:289  pass:261  dwarn:0   dfail:0   fail:0   skip:28  time:586s
fi-hsw-4770      total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  time:456s
fi-hsw-4770r     total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  time:432s
fi-ilk-650       total:289  pass:228  dwarn:0   dfail:0   fail:0   skip:61  time:434s
fi-ivb-3520m     total:289  pass:259  dwarn:0   dfail:0   fail:1   skip:29  time:491s
fi-ivb-3770      total:289  pass:260  dwarn:0   dfail:0   fail:0   skip:29  time:463s
fi-kbl-7500u     total:289  pass:264  dwarn:1   dfail:0   fail:0   skip:24  time:495s
fi-kbl-7560u     total:289  pass:270  dwarn:0   dfail:0   fail:0   skip:19  time:574s
fi-kbl-7567u     total:289  pass:269  dwarn:0   dfail:0   fail:0   skip:20  time:478s
fi-kbl-r         total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  time:582s
fi-pnv-d510      total:289  pass:222  dwarn:1   dfail:0   fail:0   skip:66  time:564s
fi-skl-6260u     total:289  pass:269  dwarn:0   dfail:0   fail:0   skip:20  time:453s
fi-skl-6700hq    total:289  pass:263  dwarn:0   dfail:0   fail:0   skip:26  time:645s
fi-skl-6700k     total:289  pass:265  dwarn:0   dfail:0   fail:0   skip:24  time:518s
fi-skl-6770hq    total:289  pass:269  dwarn:0   dfail:0   fail:0   skip:20  time:503s
fi-skl-gvtdvm    total:289  pass:266  dwarn:0   dfail:0   fail:0   skip:23  time:459s
fi-snb-2520m     total:289  pass:250  dwarn:0   dfail:0   fail:0   skip:39  time:571s
fi-snb-2600      total:289  pass:249  dwarn:0   dfail:0   fail:0   skip:40  time:419s

87b113da0ae43b97650ddcec6c05ef69469e2107 drm-tip: 2017y-10m-19d-18h-14m-41s UTC integration manifest
d432e1914713 drm/i915/cnl: Map VBT DDC Pin to BSpec DDC Pin.

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_6115/
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 17+ messages in thread
* ✓ Fi.CI.IGT: success for drm/i915/cnl: Map VBT DDC Pin to BSpec DDC Pin. (rev3)
  2017-10-19 15:45 [PATCH] drm/i915/cnl: Map VBT DDC Pin to BSpec DDC Pin Rodrigo Vivi
                   ` (5 preceding siblings ...)
  2017-10-19 21:32 ` ✓ Fi.CI.BAT: success for drm/i915/cnl: Map VBT DDC Pin to BSpec DDC Pin. (rev3) Patchwork
@ 2017-10-19 22:29 ` Patchwork
  2017-10-20 18:07 ` ✓ Fi.CI.BAT: success for drm/i915/cnl: Map VBT DDC Pin to BSpec DDC Pin. (rev4) Patchwork
  2017-10-20 20:04 ` ✓ Fi.CI.IGT: " Patchwork
  8 siblings, 0 replies; 17+ messages in thread
From: Patchwork @ 2017-10-19 22:29 UTC (permalink / raw)
  To: Rodrigo Vivi; +Cc: intel-gfx

== Series Details ==

Series: drm/i915/cnl: Map VBT DDC Pin to BSpec DDC Pin. (rev3)
URL   : https://patchwork.freedesktop.org/series/32305/
State : success

== Summary ==

Test kms_force_connector_basic:
        Subgroup force-load-detect:
                skip       -> PASS       (shard-hsw)
Test drv_module_reload:
        Subgroup basic-reload-inject:
                pass       -> DMESG-WARN (shard-hsw) fdo#102707
Test kms_flip:
        Subgroup modeset-vs-vblank-race:
                pass       -> DMESG-FAIL (shard-hsw) fdo#103060

fdo#102707 https://bugs.freedesktop.org/show_bug.cgi?id=102707
fdo#103060 https://bugs.freedesktop.org/show_bug.cgi?id=103060

shard-hsw        total:2540 pass:1429 dwarn:2   dfail:1   fail:8   skip:1100 time:9206s

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_6115/shards.html
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 17+ messages in thread
* Re: [PATCH] drm/i915/cnl: Map VBT DDC Pin to BSpec DDC Pin.
  2017-10-19 21:11   ` Rodrigo Vivi
@ 2017-10-20  9:11     ` Jani Nikula
  2017-10-20 11:25       ` Ville Syrjälä
  0 siblings, 1 reply; 17+ messages in thread
From: Jani Nikula @ 2017-10-20  9:11 UTC (permalink / raw)
  To: intel-gfx; +Cc: Paulo Zanoni, Rodrigo Vivi

On Thu, 19 Oct 2017, Rodrigo Vivi <rodrigo.vivi@intel.com> wrote:
> Starting on CNL we now need to map VBT DDC Pin to
> BSPec DDC Pin values. Not a direct translation anymore.
>
> According to VBT
> Block 2 (General Bytes Definition)
> DDC Bus
>
> +----------+-----------+--------------------+
> | DDI Type | VBT Value | Bspec Mapped Value |
> +----------+-----------+--------------------+
> | DDI-B    | 0x1       | 0x1                |
> | DDI-C    | 0x2       | 0x2                |
> | DDI-D    | 0x3       | 0x4                |
> | DDI-F    | 0x4       | 0x3                |
> +----------+-----------+--------------------+
>
> v2: Move defines to a better place.
>     This is actually CNL_PCH not CNL only.
> v3: Accepting Ville's suggestions: enums and array to
>     to make this future proof.
>
> Cc: Jani Nikula <jani.nikula@intel.com>
> Cc: Paulo Zanoni <paulo.r.zanoni@intel.com>
> Cc: Anusha Srivatsa <anusha.srivatsa@intel.com>
> Cc: Clinton Taylor <clinton.a.taylor@intel.com>
> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
> ---
>  drivers/gpu/drm/i915/intel_bios.c     | 26 ++++++++++++++++----------
>  drivers/gpu/drm/i915/intel_vbt_defs.h | 15 +++++++++++++++
>  2 files changed, 31 insertions(+), 10 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_bios.c b/drivers/gpu/drm/i915/intel_bios.c
> index dc4fad30bf4f..79638308664c 100644
> --- a/drivers/gpu/drm/i915/intel_bios.c
> +++ b/drivers/gpu/drm/i915/intel_bios.c
> @@ -1071,6 +1071,21 @@ static void sanitize_aux_ch(struct drm_i915_private *dev_priv,
>  	}
>  }
>  
> +static const enum bspec_gmbus_pin cnp_ddc_pin_map[] = {
> +	[DDC_BUS_DDI_B] = GMBUS_PIN_1,
> +	[DDC_BUS_DDI_C] = GMBUS_PIN_2,
> +	[DDC_BUS_DDI_D] = GMBUS_PIN_4,
> +	[DDC_BUS_DDI_F] = GMBUS_PIN_3,

I think the two last lines deserve comments like /* sic */ or something.

> +};
> +
> +static u8 get_ddc_pin(struct drm_i915_private *dev_priv, u8 vbt_pin)

Nitpick, You're passing in a pin and you get a pin? How about
"map_ddc_pin"? Like your array name suggests?

> +{
> +	if (HAS_PCH_CNP(dev_priv))
> +		return cnp_ddc_pin_map[vbt_pin];
> +
> +	return vbt_pin;
> +}
> +
>  static void parse_ddi_port(struct drm_i915_private *dev_priv, enum port port,
>  			   u8 bdb_version)
>  {
> @@ -1164,16 +1179,7 @@ static void parse_ddi_port(struct drm_i915_private *dev_priv, enum port port,
>  		DRM_DEBUG_KMS("Port %c is internal DP\n", port_name(port));
>  
>  	if (is_dvi) {
> -		info->alternate_ddc_pin = ddc_pin;
> -
> -		/*
> -		 * All VBTs that we got so far for B Stepping has this
> -		 * information wrong for Port D. So, let's just ignore for now.
> -		 */
> -		if (IS_CNL_REVID(dev_priv, CNL_REVID_B0, CNL_REVID_B0) &&
> -		    port == PORT_D) {
> -			info->alternate_ddc_pin = 0;
> -		}
> +		info->alternate_ddc_pin = get_ddc_pin(dev_priv, ddc_pin);
>  
>  		sanitize_ddc_pin(dev_priv, port);
>  	}
> diff --git a/drivers/gpu/drm/i915/intel_vbt_defs.h b/drivers/gpu/drm/i915/intel_vbt_defs.h
> index 7e2a96712d07..dfc9f7a43668 100644
> --- a/drivers/gpu/drm/i915/intel_vbt_defs.h
> +++ b/drivers/gpu/drm/i915/intel_vbt_defs.h
> @@ -308,6 +308,21 @@ struct bdb_general_features {
>  
>  #define LEGACY_CHILD_DEVICE_CONFIG_SIZE		33
>  
> +/* DDC Bus DDI Type 155+ */
> +enum vbt_gmbus_ddi {
> +	DDC_BUS_DDI_B = 0x1,
> +	DDC_BUS_DDI_C,
> +	DDC_BUS_DDI_D,
> +	DDC_BUS_DDI_F,
> +};
> +
> +enum bspec_gmbus_pin {
> +	GMBUS_PIN_1 = 0x1,
> +	GMBUS_PIN_2,
> +	GMBUS_PIN_3,
> +	GMBUS_PIN_4,

You already have these defined in i915_reg.h. The naming isn't pretty,
but the above doesn't make much sense either.

> +};
> +
>  /*
>   * The child device config, aka the display device data structure, provides a
>   * description of a port and its configuration on the platform.

-- 
Jani Nikula, Intel Open Source Technology Center
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 17+ messages in thread
* Re: [PATCH] drm/i915/cnl: Map VBT DDC Pin to BSpec DDC Pin.
  2017-10-20  9:11     ` Jani Nikula
@ 2017-10-20 11:25       ` Ville Syrjälä
  2017-10-20 11:29         ` Jani Nikula
  0 siblings, 1 reply; 17+ messages in thread
From: Ville Syrjälä @ 2017-10-20 11:25 UTC (permalink / raw)
  To: Jani Nikula; +Cc: intel-gfx, Paulo Zanoni, Rodrigo Vivi

On Fri, Oct 20, 2017 at 12:11:29PM +0300, Jani Nikula wrote:
> On Thu, 19 Oct 2017, Rodrigo Vivi <rodrigo.vivi@intel.com> wrote:
> > Starting on CNL we now need to map VBT DDC Pin to
> > BSPec DDC Pin values. Not a direct translation anymore.
> >
> > According to VBT
> > Block 2 (General Bytes Definition)
> > DDC Bus
> >
> > +----------+-----------+--------------------+
> > | DDI Type | VBT Value | Bspec Mapped Value |
> > +----------+-----------+--------------------+
> > | DDI-B    | 0x1       | 0x1                |
> > | DDI-C    | 0x2       | 0x2                |
> > | DDI-D    | 0x3       | 0x4                |
> > | DDI-F    | 0x4       | 0x3                |
> > +----------+-----------+--------------------+
> >
> > v2: Move defines to a better place.
> >     This is actually CNL_PCH not CNL only.
> > v3: Accepting Ville's suggestions: enums and array to
> >     to make this future proof.
> >
> > Cc: Jani Nikula <jani.nikula@intel.com>
> > Cc: Paulo Zanoni <paulo.r.zanoni@intel.com>
> > Cc: Anusha Srivatsa <anusha.srivatsa@intel.com>
> > Cc: Clinton Taylor <clinton.a.taylor@intel.com>
> > Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
> > ---
> >  drivers/gpu/drm/i915/intel_bios.c     | 26 ++++++++++++++++----------
> >  drivers/gpu/drm/i915/intel_vbt_defs.h | 15 +++++++++++++++
> >  2 files changed, 31 insertions(+), 10 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/intel_bios.c b/drivers/gpu/drm/i915/intel_bios.c
> > index dc4fad30bf4f..79638308664c 100644
> > --- a/drivers/gpu/drm/i915/intel_bios.c
> > +++ b/drivers/gpu/drm/i915/intel_bios.c
> > @@ -1071,6 +1071,21 @@ static void sanitize_aux_ch(struct drm_i915_private *dev_priv,
> >  	}
> >  }
> >  
> > +static const enum bspec_gmbus_pin cnp_ddc_pin_map[] = {
> > +	[DDC_BUS_DDI_B] = GMBUS_PIN_1,
> > +	[DDC_BUS_DDI_C] = GMBUS_PIN_2,
> > +	[DDC_BUS_DDI_D] = GMBUS_PIN_4,
> > +	[DDC_BUS_DDI_F] = GMBUS_PIN_3,
> 
> I think the two last lines deserve comments like /* sic */ or something.
> 
> > +};
> > +
> > +static u8 get_ddc_pin(struct drm_i915_private *dev_priv, u8 vbt_pin)
> 
> Nitpick, You're passing in a pin and you get a pin? How about
> "map_ddc_pin"? Like your array name suggests?
> 
> > +{
> > +	if (HAS_PCH_CNP(dev_priv))
> > +		return cnp_ddc_pin_map[vbt_pin];

Do we need an ARRAY_SIZE() check? I didn't actually check how many bits
we have in the VBT for this.

> > +
> > +	return vbt_pin;
> > +}
> > +
> >  static void parse_ddi_port(struct drm_i915_private *dev_priv, enum port port,
> >  			   u8 bdb_version)
> >  {
> > @@ -1164,16 +1179,7 @@ static void parse_ddi_port(struct drm_i915_private *dev_priv, enum port port,
> >  		DRM_DEBUG_KMS("Port %c is internal DP\n", port_name(port));
> >  
> >  	if (is_dvi) {
> > -		info->alternate_ddc_pin = ddc_pin;
> > -
> > -		/*
> > -		 * All VBTs that we got so far for B Stepping has this
> > -		 * information wrong for Port D. So, let's just ignore for now.
> > -		 */
> > -		if (IS_CNL_REVID(dev_priv, CNL_REVID_B0, CNL_REVID_B0) &&
> > -		    port == PORT_D) {
> > -			info->alternate_ddc_pin = 0;
> > -		}
> > +		info->alternate_ddc_pin = get_ddc_pin(dev_priv, ddc_pin);
> >  
> >  		sanitize_ddc_pin(dev_priv, port);
> >  	}
> > diff --git a/drivers/gpu/drm/i915/intel_vbt_defs.h b/drivers/gpu/drm/i915/intel_vbt_defs.h
> > index 7e2a96712d07..dfc9f7a43668 100644
> > --- a/drivers/gpu/drm/i915/intel_vbt_defs.h
> > +++ b/drivers/gpu/drm/i915/intel_vbt_defs.h
> > @@ -308,6 +308,21 @@ struct bdb_general_features {
> >  
> >  #define LEGACY_CHILD_DEVICE_CONFIG_SIZE		33
> >  
> > +/* DDC Bus DDI Type 155+ */
> > +enum vbt_gmbus_ddi {
> > +	DDC_BUS_DDI_B = 0x1,
> > +	DDC_BUS_DDI_C,
> > +	DDC_BUS_DDI_D,
> > +	DDC_BUS_DDI_F,
> > +};
> > +
> > +enum bspec_gmbus_pin {
> > +	GMBUS_PIN_1 = 0x1,
> > +	GMBUS_PIN_2,
> > +	GMBUS_PIN_3,
> > +	GMBUS_PIN_4,
> 
> You already have these defined in i915_reg.h. The naming isn't pretty,
> but the above doesn't make much sense either.

+1

> 
> > +};
> > +
> >  /*
> >   * The child device config, aka the display device data structure, provides a
> >   * description of a port and its configuration on the platform.
> 
> -- 
> Jani Nikula, Intel Open Source Technology Center

-- 
Ville Syrjälä
Intel OTC
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 17+ messages in thread
* Re: [PATCH] drm/i915/cnl: Map VBT DDC Pin to BSpec DDC Pin.
  2017-10-20 11:25       ` Ville Syrjälä
@ 2017-10-20 11:29         ` Jani Nikula
  2017-10-20 17:26           ` Rodrigo Vivi
  0 siblings, 1 reply; 17+ messages in thread
From: Jani Nikula @ 2017-10-20 11:29 UTC (permalink / raw)
  To: Ville Syrjälä; +Cc: intel-gfx, Paulo Zanoni, Rodrigo Vivi

On Fri, 20 Oct 2017, Ville Syrjälä <ville.syrjala@linux.intel.com> wrote:
> On Fri, Oct 20, 2017 at 12:11:29PM +0300, Jani Nikula wrote:
>> On Thu, 19 Oct 2017, Rodrigo Vivi <rodrigo.vivi@intel.com> wrote:
>> > Starting on CNL we now need to map VBT DDC Pin to
>> > BSPec DDC Pin values. Not a direct translation anymore.
>> >
>> > According to VBT
>> > Block 2 (General Bytes Definition)
>> > DDC Bus
>> >
>> > +----------+-----------+--------------------+
>> > | DDI Type | VBT Value | Bspec Mapped Value |
>> > +----------+-----------+--------------------+
>> > | DDI-B    | 0x1       | 0x1                |
>> > | DDI-C    | 0x2       | 0x2                |
>> > | DDI-D    | 0x3       | 0x4                |
>> > | DDI-F    | 0x4       | 0x3                |
>> > +----------+-----------+--------------------+
>> >
>> > v2: Move defines to a better place.
>> >     This is actually CNL_PCH not CNL only.
>> > v3: Accepting Ville's suggestions: enums and array to
>> >     to make this future proof.
>> >
>> > Cc: Jani Nikula <jani.nikula@intel.com>
>> > Cc: Paulo Zanoni <paulo.r.zanoni@intel.com>
>> > Cc: Anusha Srivatsa <anusha.srivatsa@intel.com>
>> > Cc: Clinton Taylor <clinton.a.taylor@intel.com>
>> > Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
>> > Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
>> > ---
>> >  drivers/gpu/drm/i915/intel_bios.c     | 26 ++++++++++++++++----------
>> >  drivers/gpu/drm/i915/intel_vbt_defs.h | 15 +++++++++++++++
>> >  2 files changed, 31 insertions(+), 10 deletions(-)
>> >
>> > diff --git a/drivers/gpu/drm/i915/intel_bios.c b/drivers/gpu/drm/i915/intel_bios.c
>> > index dc4fad30bf4f..79638308664c 100644
>> > --- a/drivers/gpu/drm/i915/intel_bios.c
>> > +++ b/drivers/gpu/drm/i915/intel_bios.c
>> > @@ -1071,6 +1071,21 @@ static void sanitize_aux_ch(struct drm_i915_private *dev_priv,
>> >  	}
>> >  }
>> >  
>> > +static const enum bspec_gmbus_pin cnp_ddc_pin_map[] = {
>> > +	[DDC_BUS_DDI_B] = GMBUS_PIN_1,
>> > +	[DDC_BUS_DDI_C] = GMBUS_PIN_2,
>> > +	[DDC_BUS_DDI_D] = GMBUS_PIN_4,
>> > +	[DDC_BUS_DDI_F] = GMBUS_PIN_3,
>> 
>> I think the two last lines deserve comments like /* sic */ or something.
>> 
>> > +};
>> > +
>> > +static u8 get_ddc_pin(struct drm_i915_private *dev_priv, u8 vbt_pin)
>> 
>> Nitpick, You're passing in a pin and you get a pin? How about
>> "map_ddc_pin"? Like your array name suggests?
>> 
>> > +{
>> > +	if (HAS_PCH_CNP(dev_priv))
>> > +		return cnp_ddc_pin_map[vbt_pin];
>
> Do we need an ARRAY_SIZE() check? I didn't actually check how many bits
> we have in the VBT for this.

Oh yes, it's u8.

BR,
Jani.


>
>> > +
>> > +	return vbt_pin;
>> > +}
>> > +
>> >  static void parse_ddi_port(struct drm_i915_private *dev_priv, enum port port,
>> >  			   u8 bdb_version)
>> >  {
>> > @@ -1164,16 +1179,7 @@ static void parse_ddi_port(struct drm_i915_private *dev_priv, enum port port,
>> >  		DRM_DEBUG_KMS("Port %c is internal DP\n", port_name(port));
>> >  
>> >  	if (is_dvi) {
>> > -		info->alternate_ddc_pin = ddc_pin;
>> > -
>> > -		/*
>> > -		 * All VBTs that we got so far for B Stepping has this
>> > -		 * information wrong for Port D. So, let's just ignore for now.
>> > -		 */
>> > -		if (IS_CNL_REVID(dev_priv, CNL_REVID_B0, CNL_REVID_B0) &&
>> > -		    port == PORT_D) {
>> > -			info->alternate_ddc_pin = 0;
>> > -		}
>> > +		info->alternate_ddc_pin = get_ddc_pin(dev_priv, ddc_pin);
>> >  
>> >  		sanitize_ddc_pin(dev_priv, port);
>> >  	}
>> > diff --git a/drivers/gpu/drm/i915/intel_vbt_defs.h b/drivers/gpu/drm/i915/intel_vbt_defs.h
>> > index 7e2a96712d07..dfc9f7a43668 100644
>> > --- a/drivers/gpu/drm/i915/intel_vbt_defs.h
>> > +++ b/drivers/gpu/drm/i915/intel_vbt_defs.h
>> > @@ -308,6 +308,21 @@ struct bdb_general_features {
>> >  
>> >  #define LEGACY_CHILD_DEVICE_CONFIG_SIZE		33
>> >  
>> > +/* DDC Bus DDI Type 155+ */
>> > +enum vbt_gmbus_ddi {
>> > +	DDC_BUS_DDI_B = 0x1,
>> > +	DDC_BUS_DDI_C,
>> > +	DDC_BUS_DDI_D,
>> > +	DDC_BUS_DDI_F,
>> > +};
>> > +
>> > +enum bspec_gmbus_pin {
>> > +	GMBUS_PIN_1 = 0x1,
>> > +	GMBUS_PIN_2,
>> > +	GMBUS_PIN_3,
>> > +	GMBUS_PIN_4,
>> 
>> You already have these defined in i915_reg.h. The naming isn't pretty,
>> but the above doesn't make much sense either.
>
> +1
>
>> 
>> > +};
>> > +
>> >  /*
>> >   * The child device config, aka the display device data structure, provides a
>> >   * description of a port and its configuration on the platform.
>> 
>> -- 
>> Jani Nikula, Intel Open Source Technology Center

-- 
Jani Nikula, Intel Open Source Technology Center
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 17+ messages in thread
* [PATCH] drm/i915/cnl: Map VBT DDC Pin to BSpec DDC Pin.
  2017-10-20 11:29         ` Jani Nikula
@ 2017-10-20 17:26           ` Rodrigo Vivi
  2017-10-20 17:40             ` Ville Syrjälä
  0 siblings, 1 reply; 17+ messages in thread
From: Rodrigo Vivi @ 2017-10-20 17:26 UTC (permalink / raw)
  To: intel-gfx; +Cc: Paulo Zanoni, Jani Nikula, Rodrigo Vivi

Starting on CNL we now need to map VBT DDC Pin to
BSPec DDC Pin values. Not a direct translation anymore.

According to VBT
Block 2 (General Bytes Definition)
DDC Bus

+----------+-----------+--------------------+
| DDI Type | VBT Value | Bspec Mapped Value |
+----------+-----------+--------------------+
| DDI-B    | 0x1       | 0x1                |
| DDI-C    | 0x2       | 0x2                |
| DDI-D    | 0x3       | 0x4                |
| DDI-F    | 0x4       | 0x3                |
+----------+-----------+--------------------+

v2: Move defines to a better place.
    This is actually CNL_PCH not CNL only.
v3: Accepting Ville's suggestions: enums and array to
    to make this future proof.
v4: Protect the array access as Ville suggested.
    Also accepting all Jani's suggestions:
    	      - use already defined gmbus pin definitions.
	      - use map_ddc_pin for disambiguation.
	      - Add /* sic */ comment on inverted values
	      	so people can easily see it it nos a mistake
		we have the map 3 -> 4 and 4 -> 3 :/

Cc: Jani Nikula <jani.nikula@intel.com>
Cc: Paulo Zanoni <paulo.r.zanoni@intel.com>
Cc: Anusha Srivatsa <anusha.srivatsa@intel.com>
Cc: Clinton Taylor <clinton.a.taylor@intel.com>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
---
 drivers/gpu/drm/i915/intel_bios.c     | 27 +++++++++++++++++----------
 drivers/gpu/drm/i915/intel_vbt_defs.h |  8 ++++++++
 2 files changed, 25 insertions(+), 10 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_bios.c b/drivers/gpu/drm/i915/intel_bios.c
index e809a9c347d3..a95cf07bd8e1 100644
--- a/drivers/gpu/drm/i915/intel_bios.c
+++ b/drivers/gpu/drm/i915/intel_bios.c
@@ -1071,6 +1071,22 @@ static void sanitize_aux_ch(struct drm_i915_private *dev_priv,
 	}
 }
 
+static const u8 cnp_ddc_pin_map[] = {
+	[DDC_BUS_DDI_B] = GMBUS_PIN_1_BXT,
+	[DDC_BUS_DDI_C] = GMBUS_PIN_2_BXT,
+	[DDC_BUS_DDI_D] = GMBUS_PIN_4_CNP, /* sic */
+	[DDC_BUS_DDI_F] = GMBUS_PIN_3_BXT, /* sic */
+};
+
+static u8 map_ddc_pin(struct drm_i915_private *dev_priv, u8 vbt_pin)
+{
+	if (HAS_PCH_CNP(dev_priv) &&
+	    vbt_pin > 0 && vbt_pin < ARRAY_SIZE(cnp_ddc_pin_map))
+		return cnp_ddc_pin_map[vbt_pin];
+
+	return vbt_pin;
+}
+
 static void parse_ddi_port(struct drm_i915_private *dev_priv, enum port port,
 			   u8 bdb_version)
 {
@@ -1163,16 +1179,7 @@ static void parse_ddi_port(struct drm_i915_private *dev_priv, enum port port,
 		DRM_DEBUG_KMS("Port %c is internal DP\n", port_name(port));
 
 	if (is_dvi) {
-		info->alternate_ddc_pin = ddc_pin;
-
-		/*
-		 * All VBTs that we got so far for B Stepping has this
-		 * information wrong for Port D. So, let's just ignore for now.
-		 */
-		if (IS_CNL_REVID(dev_priv, CNL_REVID_B0, CNL_REVID_B0) &&
-		    port == PORT_D) {
-			info->alternate_ddc_pin = 0;
-		}
+		info->alternate_ddc_pin = map_ddc_pin(dev_priv, ddc_pin);
 
 		sanitize_ddc_pin(dev_priv, port);
 	}
diff --git a/drivers/gpu/drm/i915/intel_vbt_defs.h b/drivers/gpu/drm/i915/intel_vbt_defs.h
index 404569c9fdfc..f225c288a121 100644
--- a/drivers/gpu/drm/i915/intel_vbt_defs.h
+++ b/drivers/gpu/drm/i915/intel_vbt_defs.h
@@ -306,6 +306,14 @@ struct bdb_general_features {
 
 #define LEGACY_CHILD_DEVICE_CONFIG_SIZE		33
 
+/* DDC Bus DDI Type 155+ */
+enum vbt_gmbus_ddi {
+	DDC_BUS_DDI_B = 0x1,
+	DDC_BUS_DDI_C,
+	DDC_BUS_DDI_D,
+	DDC_BUS_DDI_F,
+};
+
 /*
  * The child device config, aka the display device data structure, provides a
  * description of a port and its configuration on the platform.
-- 
2.13.5

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply related	[flat|nested] 17+ messages in thread
* Re: [PATCH] drm/i915/cnl: Map VBT DDC Pin to BSpec DDC Pin.
  2017-10-20 17:26           ` Rodrigo Vivi
@ 2017-10-20 17:40             ` Ville Syrjälä
  2017-10-20 23:24               ` Rodrigo Vivi
  0 siblings, 1 reply; 17+ messages in thread
From: Ville Syrjälä @ 2017-10-20 17:40 UTC (permalink / raw)
  To: Rodrigo Vivi; +Cc: Jani Nikula, intel-gfx, Paulo Zanoni

On Fri, Oct 20, 2017 at 10:26:41AM -0700, Rodrigo Vivi wrote:
> Starting on CNL we now need to map VBT DDC Pin to
> BSPec DDC Pin values. Not a direct translation anymore.
> 
> According to VBT
> Block 2 (General Bytes Definition)
> DDC Bus
> 
> +----------+-----------+--------------------+
> | DDI Type | VBT Value | Bspec Mapped Value |
> +----------+-----------+--------------------+
> | DDI-B    | 0x1       | 0x1                |
> | DDI-C    | 0x2       | 0x2                |
> | DDI-D    | 0x3       | 0x4                |
> | DDI-F    | 0x4       | 0x3                |
> +----------+-----------+--------------------+
> 
> v2: Move defines to a better place.
>     This is actually CNL_PCH not CNL only.
> v3: Accepting Ville's suggestions: enums and array to
>     to make this future proof.
> v4: Protect the array access as Ville suggested.
>     Also accepting all Jani's suggestions:
>     	      - use already defined gmbus pin definitions.
> 	      - use map_ddc_pin for disambiguation.
> 	      - Add /* sic */ comment on inverted values
> 	      	so people can easily see it it nos a mistake
> 		we have the map 3 -> 4 and 4 -> 3 :/
> 
> Cc: Jani Nikula <jani.nikula@intel.com>
> Cc: Paulo Zanoni <paulo.r.zanoni@intel.com>
> Cc: Anusha Srivatsa <anusha.srivatsa@intel.com>
> Cc: Clinton Taylor <clinton.a.taylor@intel.com>
> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
> ---
>  drivers/gpu/drm/i915/intel_bios.c     | 27 +++++++++++++++++----------
>  drivers/gpu/drm/i915/intel_vbt_defs.h |  8 ++++++++
>  2 files changed, 25 insertions(+), 10 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_bios.c b/drivers/gpu/drm/i915/intel_bios.c
> index e809a9c347d3..a95cf07bd8e1 100644
> --- a/drivers/gpu/drm/i915/intel_bios.c
> +++ b/drivers/gpu/drm/i915/intel_bios.c
> @@ -1071,6 +1071,22 @@ static void sanitize_aux_ch(struct drm_i915_private *dev_priv,
>  	}
>  }
>  
> +static const u8 cnp_ddc_pin_map[] = {
> +	[DDC_BUS_DDI_B] = GMBUS_PIN_1_BXT,
> +	[DDC_BUS_DDI_C] = GMBUS_PIN_2_BXT,
> +	[DDC_BUS_DDI_D] = GMBUS_PIN_4_CNP, /* sic */
> +	[DDC_BUS_DDI_F] = GMBUS_PIN_3_BXT, /* sic */
> +};
> +
> +static u8 map_ddc_pin(struct drm_i915_private *dev_priv, u8 vbt_pin)
> +{
> +	if (HAS_PCH_CNP(dev_priv) &&
> +	    vbt_pin > 0 && vbt_pin < ARRAY_SIZE(cnp_ddc_pin_map))
> +		return cnp_ddc_pin_map[vbt_pin];

Not quite sure what we should do with invalid pins. But I guess this
makes as much sense as anything.

Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>

> +
> +	return vbt_pin;
> +}
> +
>  static void parse_ddi_port(struct drm_i915_private *dev_priv, enum port port,
>  			   u8 bdb_version)
>  {
> @@ -1163,16 +1179,7 @@ static void parse_ddi_port(struct drm_i915_private *dev_priv, enum port port,
>  		DRM_DEBUG_KMS("Port %c is internal DP\n", port_name(port));
>  
>  	if (is_dvi) {
> -		info->alternate_ddc_pin = ddc_pin;
> -
> -		/*
> -		 * All VBTs that we got so far for B Stepping has this
> -		 * information wrong for Port D. So, let's just ignore for now.
> -		 */
> -		if (IS_CNL_REVID(dev_priv, CNL_REVID_B0, CNL_REVID_B0) &&
> -		    port == PORT_D) {
> -			info->alternate_ddc_pin = 0;
> -		}
> +		info->alternate_ddc_pin = map_ddc_pin(dev_priv, ddc_pin);
>  
>  		sanitize_ddc_pin(dev_priv, port);
>  	}
> diff --git a/drivers/gpu/drm/i915/intel_vbt_defs.h b/drivers/gpu/drm/i915/intel_vbt_defs.h
> index 404569c9fdfc..f225c288a121 100644
> --- a/drivers/gpu/drm/i915/intel_vbt_defs.h
> +++ b/drivers/gpu/drm/i915/intel_vbt_defs.h
> @@ -306,6 +306,14 @@ struct bdb_general_features {
>  
>  #define LEGACY_CHILD_DEVICE_CONFIG_SIZE		33
>  
> +/* DDC Bus DDI Type 155+ */
> +enum vbt_gmbus_ddi {
> +	DDC_BUS_DDI_B = 0x1,
> +	DDC_BUS_DDI_C,
> +	DDC_BUS_DDI_D,
> +	DDC_BUS_DDI_F,
> +};
> +
>  /*
>   * The child device config, aka the display device data structure, provides a
>   * description of a port and its configuration on the platform.
> -- 
> 2.13.5

-- 
Ville Syrjälä
Intel OTC
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 17+ messages in thread
* ✓ Fi.CI.BAT: success for drm/i915/cnl: Map VBT DDC Pin to BSpec DDC Pin. (rev4)
  2017-10-19 15:45 [PATCH] drm/i915/cnl: Map VBT DDC Pin to BSpec DDC Pin Rodrigo Vivi
                   ` (6 preceding siblings ...)
  2017-10-19 22:29 ` ✓ Fi.CI.IGT: " Patchwork
@ 2017-10-20 18:07 ` Patchwork
  2017-10-20 20:04 ` ✓ Fi.CI.IGT: " Patchwork
  8 siblings, 0 replies; 17+ messages in thread
From: Patchwork @ 2017-10-20 18:07 UTC (permalink / raw)
  To: Rodrigo Vivi; +Cc: intel-gfx

== Series Details ==

Series: drm/i915/cnl: Map VBT DDC Pin to BSpec DDC Pin. (rev4)
URL   : https://patchwork.freedesktop.org/series/32305/
State : success

== Summary ==

Series 32305v4 drm/i915/cnl: Map VBT DDC Pin to BSpec DDC Pin.
https://patchwork.freedesktop.org/api/1.0/series/32305/revisions/4/mbox/

Test kms_frontbuffer_tracking:
        Subgroup basic:
                dmesg-warn -> PASS       (fi-bdw-5557u) fdo#102473
Test kms_pipe_crc_basic:
        Subgroup hang-read-crc-pipe-b:
                incomplete -> PASS       (fi-skl-6700hq)

fdo#102473 https://bugs.freedesktop.org/show_bug.cgi?id=102473

fi-bdw-5557u     total:289  pass:268  dwarn:0   dfail:0   fail:0   skip:21  time:440s
fi-bdw-gvtdvm    total:289  pass:265  dwarn:0   dfail:0   fail:0   skip:24  time:447s
fi-blb-e6850     total:289  pass:223  dwarn:1   dfail:0   fail:0   skip:65  time:370s
fi-bsw-n3050     total:289  pass:243  dwarn:0   dfail:0   fail:0   skip:46  time:524s
fi-bwr-2160      total:289  pass:183  dwarn:0   dfail:0   fail:0   skip:106 time:262s
fi-bxt-dsi       total:289  pass:259  dwarn:0   dfail:0   fail:0   skip:30  time:501s
fi-bxt-j4205     total:289  pass:260  dwarn:0   dfail:0   fail:0   skip:29  time:505s
fi-byt-j1900     total:289  pass:253  dwarn:1   dfail:0   fail:0   skip:35  time:492s
fi-cfl-s         total:289  pass:253  dwarn:4   dfail:0   fail:0   skip:32  time:543s
fi-elk-e7500     total:289  pass:229  dwarn:0   dfail:0   fail:0   skip:60  time:415s
fi-gdg-551       total:289  pass:178  dwarn:1   dfail:0   fail:1   skip:109 time:247s
fi-glk-1         total:289  pass:261  dwarn:0   dfail:0   fail:0   skip:28  time:577s
fi-hsw-4770      total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  time:449s
fi-hsw-4770r     total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  time:427s
fi-ilk-650       total:289  pass:228  dwarn:0   dfail:0   fail:0   skip:61  time:438s
fi-ivb-3520m     total:289  pass:260  dwarn:0   dfail:0   fail:0   skip:29  time:498s
fi-ivb-3770      total:289  pass:260  dwarn:0   dfail:0   fail:0   skip:29  time:459s
fi-kbl-7500u     total:289  pass:264  dwarn:1   dfail:0   fail:0   skip:24  time:493s
fi-kbl-7560u     total:289  pass:270  dwarn:0   dfail:0   fail:0   skip:19  time:574s
fi-kbl-7567u     total:289  pass:269  dwarn:0   dfail:0   fail:0   skip:20  time:474s
fi-kbl-r         total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  time:584s
fi-pnv-d510      total:289  pass:222  dwarn:1   dfail:0   fail:0   skip:66  time:541s
fi-skl-6260u     total:289  pass:269  dwarn:0   dfail:0   fail:0   skip:20  time:446s
fi-skl-6700hq    total:289  pass:263  dwarn:0   dfail:0   fail:0   skip:26  time:640s
fi-skl-6700k     total:289  pass:265  dwarn:0   dfail:0   fail:0   skip:24  time:520s
fi-skl-6770hq    total:289  pass:269  dwarn:0   dfail:0   fail:0   skip:20  time:498s
fi-skl-gvtdvm    total:289  pass:266  dwarn:0   dfail:0   fail:0   skip:23  time:454s
fi-snb-2520m     total:289  pass:250  dwarn:0   dfail:0   fail:0   skip:39  time:558s
fi-snb-2600      total:289  pass:249  dwarn:0   dfail:0   fail:0   skip:40  time:415s
fi-byt-n2820 failed to connect after reboot

e9b02ebe67a3f104fff3ab668cbdaad8d551c08a drm-tip: 2017y-10m-20d-17h-05m-26s UTC integration manifest
6765f7d41571 drm/i915/cnl: Map VBT DDC Pin to BSpec DDC Pin.

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_6128/
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^ permalink raw reply	[flat|nested] 17+ messages in thread
* ✓ Fi.CI.IGT: success for drm/i915/cnl: Map VBT DDC Pin to BSpec DDC Pin. (rev4)
  2017-10-19 15:45 [PATCH] drm/i915/cnl: Map VBT DDC Pin to BSpec DDC Pin Rodrigo Vivi
                   ` (7 preceding siblings ...)
  2017-10-20 18:07 ` ✓ Fi.CI.BAT: success for drm/i915/cnl: Map VBT DDC Pin to BSpec DDC Pin. (rev4) Patchwork
@ 2017-10-20 20:04 ` Patchwork
  8 siblings, 0 replies; 17+ messages in thread
From: Patchwork @ 2017-10-20 20:04 UTC (permalink / raw)
  To: Rodrigo Vivi; +Cc: intel-gfx

== Series Details ==

Series: drm/i915/cnl: Map VBT DDC Pin to BSpec DDC Pin. (rev4)
URL   : https://patchwork.freedesktop.org/series/32305/
State : success

== Summary ==

Test kms_busy:
        Subgroup extended-modeset-hang-oldfb-with-reset-render-A:
                pass       -> DMESG-WARN (shard-hsw) fdo#102249
Test kms_setmode:
        Subgroup basic:
                pass       -> FAIL       (shard-hsw) fdo#99912
Test kms_flip:
        Subgroup modeset-vs-vblank-race-interruptible:
                pass       -> FAIL       (shard-hsw) fdo#103060

fdo#102249 https://bugs.freedesktop.org/show_bug.cgi?id=102249
fdo#99912 https://bugs.freedesktop.org/show_bug.cgi?id=99912
fdo#103060 https://bugs.freedesktop.org/show_bug.cgi?id=103060

shard-hsw        total:2540 pass:1427 dwarn:2   dfail:0   fail:10  skip:1101 time:9239s

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_6128/shards.html
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^ permalink raw reply	[flat|nested] 17+ messages in thread
* Re: [PATCH] drm/i915/cnl: Map VBT DDC Pin to BSpec DDC Pin.
  2017-10-20 17:40             ` Ville Syrjälä
@ 2017-10-20 23:24               ` Rodrigo Vivi
  0 siblings, 0 replies; 17+ messages in thread
From: Rodrigo Vivi @ 2017-10-20 23:24 UTC (permalink / raw)
  To: Ville Syrjälä; +Cc: Jani Nikula, intel-gfx, Paulo Zanoni

On Fri, Oct 20, 2017 at 05:40:10PM +0000, Ville Syrjälä wrote:
> On Fri, Oct 20, 2017 at 10:26:41AM -0700, Rodrigo Vivi wrote:
> > Starting on CNL we now need to map VBT DDC Pin to
> > BSPec DDC Pin values. Not a direct translation anymore.
> > 
> > According to VBT
> > Block 2 (General Bytes Definition)
> > DDC Bus
> > 
> > +----------+-----------+--------------------+
> > | DDI Type | VBT Value | Bspec Mapped Value |
> > +----------+-----------+--------------------+
> > | DDI-B    | 0x1       | 0x1                |
> > | DDI-C    | 0x2       | 0x2                |
> > | DDI-D    | 0x3       | 0x4                |
> > | DDI-F    | 0x4       | 0x3                |
> > +----------+-----------+--------------------+
> > 
> > v2: Move defines to a better place.
> >     This is actually CNL_PCH not CNL only.
> > v3: Accepting Ville's suggestions: enums and array to
> >     to make this future proof.
> > v4: Protect the array access as Ville suggested.
> >     Also accepting all Jani's suggestions:
> >     	      - use already defined gmbus pin definitions.
> > 	      - use map_ddc_pin for disambiguation.
> > 	      - Add /* sic */ comment on inverted values
> > 	      	so people can easily see it it nos a mistake
> > 		we have the map 3 -> 4 and 4 -> 3 :/
> > 
> > Cc: Jani Nikula <jani.nikula@intel.com>
> > Cc: Paulo Zanoni <paulo.r.zanoni@intel.com>
> > Cc: Anusha Srivatsa <anusha.srivatsa@intel.com>
> > Cc: Clinton Taylor <clinton.a.taylor@intel.com>
> > Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
> > ---
> >  drivers/gpu/drm/i915/intel_bios.c     | 27 +++++++++++++++++----------
> >  drivers/gpu/drm/i915/intel_vbt_defs.h |  8 ++++++++
> >  2 files changed, 25 insertions(+), 10 deletions(-)
> > 
> > diff --git a/drivers/gpu/drm/i915/intel_bios.c b/drivers/gpu/drm/i915/intel_bios.c
> > index e809a9c347d3..a95cf07bd8e1 100644
> > --- a/drivers/gpu/drm/i915/intel_bios.c
> > +++ b/drivers/gpu/drm/i915/intel_bios.c
> > @@ -1071,6 +1071,22 @@ static void sanitize_aux_ch(struct drm_i915_private *dev_priv,
> >  	}
> >  }
> >  
> > +static const u8 cnp_ddc_pin_map[] = {
> > +	[DDC_BUS_DDI_B] = GMBUS_PIN_1_BXT,
> > +	[DDC_BUS_DDI_C] = GMBUS_PIN_2_BXT,
> > +	[DDC_BUS_DDI_D] = GMBUS_PIN_4_CNP, /* sic */
> > +	[DDC_BUS_DDI_F] = GMBUS_PIN_3_BXT, /* sic */
> > +};
> > +
> > +static u8 map_ddc_pin(struct drm_i915_private *dev_priv, u8 vbt_pin)
> > +{
> > +	if (HAS_PCH_CNP(dev_priv) &&
> > +	    vbt_pin > 0 && vbt_pin < ARRAY_SIZE(cnp_ddc_pin_map))
> > +		return cnp_ddc_pin_map[vbt_pin];
> 
> Not quite sure what we should do with invalid pins. But I guess this
> makes as much sense as anything.
> 
> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>

Thanks a lot for all ideas.

merged to dinq.

> 
> > +
> > +	return vbt_pin;
> > +}
> > +
> >  static void parse_ddi_port(struct drm_i915_private *dev_priv, enum port port,
> >  			   u8 bdb_version)
> >  {
> > @@ -1163,16 +1179,7 @@ static void parse_ddi_port(struct drm_i915_private *dev_priv, enum port port,
> >  		DRM_DEBUG_KMS("Port %c is internal DP\n", port_name(port));
> >  
> >  	if (is_dvi) {
> > -		info->alternate_ddc_pin = ddc_pin;
> > -
> > -		/*
> > -		 * All VBTs that we got so far for B Stepping has this
> > -		 * information wrong for Port D. So, let's just ignore for now.
> > -		 */
> > -		if (IS_CNL_REVID(dev_priv, CNL_REVID_B0, CNL_REVID_B0) &&
> > -		    port == PORT_D) {
> > -			info->alternate_ddc_pin = 0;
> > -		}
> > +		info->alternate_ddc_pin = map_ddc_pin(dev_priv, ddc_pin);
> >  
> >  		sanitize_ddc_pin(dev_priv, port);
> >  	}
> > diff --git a/drivers/gpu/drm/i915/intel_vbt_defs.h b/drivers/gpu/drm/i915/intel_vbt_defs.h
> > index 404569c9fdfc..f225c288a121 100644
> > --- a/drivers/gpu/drm/i915/intel_vbt_defs.h
> > +++ b/drivers/gpu/drm/i915/intel_vbt_defs.h
> > @@ -306,6 +306,14 @@ struct bdb_general_features {
> >  
> >  #define LEGACY_CHILD_DEVICE_CONFIG_SIZE		33
> >  
> > +/* DDC Bus DDI Type 155+ */
> > +enum vbt_gmbus_ddi {
> > +	DDC_BUS_DDI_B = 0x1,
> > +	DDC_BUS_DDI_C,
> > +	DDC_BUS_DDI_D,
> > +	DDC_BUS_DDI_F,
> > +};
> > +
> >  /*
> >   * The child device config, aka the display device data structure, provides a
> >   * description of a port and its configuration on the platform.
> > -- 
> > 2.13.5
> 
> -- 
> Ville Syrjälä
> Intel OTC
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^ permalink raw reply	[flat|nested] 17+ messages in thread
end of thread, other threads:[~2017-10-20 23:24 UTC | newest]

Thread overview: 17+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2017-10-19 15:45 [PATCH] drm/i915/cnl: Map VBT DDC Pin to BSpec DDC Pin Rodrigo Vivi
2017-10-19 16:02 ` Rodrigo Vivi
2017-10-19 16:02 ` Ville Syrjälä
2017-10-19 21:11   ` Rodrigo Vivi
2017-10-20  9:11     ` Jani Nikula
2017-10-20 11:25       ` Ville Syrjälä
2017-10-20 11:29         ` Jani Nikula
2017-10-20 17:26           ` Rodrigo Vivi
2017-10-20 17:40             ` Ville Syrjälä
2017-10-20 23:24               ` Rodrigo Vivi
2017-10-19 16:12 ` ✓ Fi.CI.BAT: success for " Patchwork
2017-10-19 16:34 ` ✓ Fi.CI.BAT: success for drm/i915/cnl: Map VBT DDC Pin to BSpec DDC Pin. (rev2) Patchwork
2017-10-19 17:23 ` ✓ Fi.CI.IGT: " Patchwork
2017-10-19 21:32 ` ✓ Fi.CI.BAT: success for drm/i915/cnl: Map VBT DDC Pin to BSpec DDC Pin. (rev3) Patchwork
2017-10-19 22:29 ` ✓ Fi.CI.IGT: " Patchwork
2017-10-20 18:07 ` ✓ Fi.CI.BAT: success for drm/i915/cnl: Map VBT DDC Pin to BSpec DDC Pin. (rev4) Patchwork
2017-10-20 20:04 ` ✓ Fi.CI.IGT: " Patchwork

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