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From: Jessica Clarke <jrtc27@jrtc27.com>
To: Samuel Holland <samuel@sholland.org>
Cc: Daniel Lezcano <daniel.lezcano@linaro.org>,
	Thomas Gleixner <tglx@linutronix.de>,
	Albert Ou <aou@eecs.berkeley.edu>,
	Atish Patra <atishp@atishpatra.org>,
	Dmitriy Cherkasov <dmitriy@oss-tech.org>,
	Palmer Dabbelt <palmer@dabbelt.com>,
	Paul Walmsley <paul.walmsley@sifive.com>,
	linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org
Subject: Re: [PATCH] clocksource/drivers/riscv: Events are stopped during CPU suspend
Date: Mon, 9 May 2022 03:56:43 +0100	[thread overview]
Message-ID: <878D1D3C-E8F1-4B37-93F1-B3560E3F271E@jrtc27.com> (raw)
In-Reply-To: <20220509012121.40031-1-samuel@sholland.org>

On 9 May 2022, at 02:21, Samuel Holland <samuel@sholland.org> wrote:
> 
> Some implementations of the SBI time extension depend on hart-local
> state (for example, CSRs) that are lost or hardware that is powered
> down when a CPU is suspended. To be safe, the clockevents driver
> cannot assume that timer IRQs will be received during CPU suspend.
> 
> Fixes: 62b019436814 ("clocksource: new RISC-V SBI timer driver")

Surely that’s not right? A commit from 2018 can’t have been expected to
predict the future, I would expect this to be one of the patches adding
suspend to RISC-V which came years later.

Jess

> Signed-off-by: Samuel Holland <samuel@sholland.org>
> ---
> 
> drivers/clocksource/timer-riscv.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/drivers/clocksource/timer-riscv.c b/drivers/clocksource/timer-riscv.c
> index 1767f8bf2013..593d5a957b69 100644
> --- a/drivers/clocksource/timer-riscv.c
> +++ b/drivers/clocksource/timer-riscv.c
> @@ -34,7 +34,7 @@ static int riscv_clock_next_event(unsigned long delta,
> static unsigned int riscv_clock_event_irq;
> static DEFINE_PER_CPU(struct clock_event_device, riscv_clock_event) = {
> 	.name			= "riscv_timer_clockevent",
> -	.features		= CLOCK_EVT_FEAT_ONESHOT,
> +	.features		= CLOCK_EVT_FEAT_ONESHOT | CLOCK_EVT_FEAT_C3STOP,
> 	.rating			= 100,
> 	.set_next_event		= riscv_clock_next_event,
> };
> -- 
> 2.35.1
> 
> 
> _______________________________________________
> linux-riscv mailing list
> linux-riscv@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-riscv


_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv

WARNING: multiple messages have this Message-ID (diff)
From: Jessica Clarke <jrtc27@jrtc27.com>
To: Samuel Holland <samuel@sholland.org>
Cc: Daniel Lezcano <daniel.lezcano@linaro.org>,
	Thomas Gleixner <tglx@linutronix.de>,
	Albert Ou <aou@eecs.berkeley.edu>,
	Atish Patra <atishp@atishpatra.org>,
	Dmitriy Cherkasov <dmitriy@oss-tech.org>,
	Palmer Dabbelt <palmer@dabbelt.com>,
	Paul Walmsley <paul.walmsley@sifive.com>,
	linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org
Subject: Re: [PATCH] clocksource/drivers/riscv: Events are stopped during CPU suspend
Date: Mon, 9 May 2022 03:56:43 +0100	[thread overview]
Message-ID: <878D1D3C-E8F1-4B37-93F1-B3560E3F271E@jrtc27.com> (raw)
In-Reply-To: <20220509012121.40031-1-samuel@sholland.org>

On 9 May 2022, at 02:21, Samuel Holland <samuel@sholland.org> wrote:
> 
> Some implementations of the SBI time extension depend on hart-local
> state (for example, CSRs) that are lost or hardware that is powered
> down when a CPU is suspended. To be safe, the clockevents driver
> cannot assume that timer IRQs will be received during CPU suspend.
> 
> Fixes: 62b019436814 ("clocksource: new RISC-V SBI timer driver")

Surely that’s not right? A commit from 2018 can’t have been expected to
predict the future, I would expect this to be one of the patches adding
suspend to RISC-V which came years later.

Jess

> Signed-off-by: Samuel Holland <samuel@sholland.org>
> ---
> 
> drivers/clocksource/timer-riscv.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/drivers/clocksource/timer-riscv.c b/drivers/clocksource/timer-riscv.c
> index 1767f8bf2013..593d5a957b69 100644
> --- a/drivers/clocksource/timer-riscv.c
> +++ b/drivers/clocksource/timer-riscv.c
> @@ -34,7 +34,7 @@ static int riscv_clock_next_event(unsigned long delta,
> static unsigned int riscv_clock_event_irq;
> static DEFINE_PER_CPU(struct clock_event_device, riscv_clock_event) = {
> 	.name			= "riscv_timer_clockevent",
> -	.features		= CLOCK_EVT_FEAT_ONESHOT,
> +	.features		= CLOCK_EVT_FEAT_ONESHOT | CLOCK_EVT_FEAT_C3STOP,
> 	.rating			= 100,
> 	.set_next_event		= riscv_clock_next_event,
> };
> -- 
> 2.35.1
> 
> 
> _______________________________________________
> linux-riscv mailing list
> linux-riscv@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-riscv


  reply	other threads:[~2022-05-09  2:57 UTC|newest]

Thread overview: 25+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-05-09  1:21 [PATCH] clocksource/drivers/riscv: Events are stopped during CPU suspend Samuel Holland
2022-05-09  1:21 ` Samuel Holland
2022-05-09  2:56 ` Jessica Clarke [this message]
2022-05-09  2:56   ` Jessica Clarke
2022-05-09  3:51 ` Anup Patel
2022-05-09  3:51   ` Anup Patel
2022-05-09 11:44 ` Daniel Lezcano
2022-05-09 11:44   ` Daniel Lezcano
2022-05-27  8:36 ` [tip: timers/core] " tip-bot2 for Samuel Holland
2022-09-29 21:50 ` [PATCH] " Conor Dooley
2022-09-29 21:50   ` Conor Dooley
2022-10-09 23:45   ` Palmer Dabbelt
2022-10-09 23:45     ` Palmer Dabbelt
2022-10-24  5:01     ` Samuel Holland
2022-10-24  5:01       ` Samuel Holland
2022-10-24  7:04       ` Conor Dooley
2022-10-24  7:04         ` Conor Dooley
2022-10-24  8:04       ` Anup Patel
2022-10-24  8:04         ` Anup Patel
2022-10-27 23:07         ` Palmer Dabbelt
2022-10-27 23:07           ` Palmer Dabbelt
2022-10-27 23:41           ` Samuel Holland
2022-10-27 23:41             ` Samuel Holland
2022-10-28  0:30             ` Conor Dooley
2022-10-28  0:30               ` Conor Dooley

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