* [PATCH v2 0/4] arm64: dts: renesas: Add V3H2 Condor-I board support
@ 2022-08-23 1:26 Kuninori Morimoto
2022-08-23 1:26 ` [PATCH v2 1/4] arm64: dts: renesas: add condor-common.dtsi Kuninori Morimoto
` (3 more replies)
0 siblings, 4 replies; 12+ messages in thread
From: Kuninori Morimoto @ 2022-08-23 1:26 UTC (permalink / raw)
To: Geert Uytterhoeven
Cc: linux-renesas-soc, Andrey Dolnikov, Valentine Barshak, Koji Matsuoka
Hi Geert
This is v2 of V3H2 Condor-I board support.
It adds condor-common.dtsi for Condor / Condor-I.
It also adds new r8a77980a.dtsi file, it is no change from r8a77980.dtsi for now.
Kuninori Morimoto (4):
arm64: dts: renesas: add condor-common.dtsi
arm64: dts: renesas: add r8a77980a.dtsi
arm64: dts: renesas: Add V3H2 Condor-I board support
dt-bindings: arm: renesas: Document Renesas R-Car Gen3 V3H2 Condor-I board
.../devicetree/bindings/arm/renesas.yaml | 9 +
arch/arm64/boot/dts/renesas/Makefile | 1 +
.../arm64/boot/dts/renesas/condor-common.dtsi | 542 ++++++++++++++++++
.../boot/dts/renesas/r8a77980-condor.dts | 534 +----------------
.../boot/dts/renesas/r8a77980a-condor-i.dts | 17 +
arch/arm64/boot/dts/renesas/r8a77980a.dtsi | 7 +
6 files changed, 577 insertions(+), 533 deletions(-)
create mode 100644 arch/arm64/boot/dts/renesas/condor-common.dtsi
create mode 100644 arch/arm64/boot/dts/renesas/r8a77980a-condor-i.dts
create mode 100644 arch/arm64/boot/dts/renesas/r8a77980a.dtsi
--
2.25.1
^ permalink raw reply [flat|nested] 12+ messages in thread
* [PATCH v2 1/4] arm64: dts: renesas: add condor-common.dtsi
2022-08-23 1:26 [PATCH v2 0/4] arm64: dts: renesas: Add V3H2 Condor-I board support Kuninori Morimoto
@ 2022-08-23 1:26 ` Kuninori Morimoto
2022-08-26 11:44 ` Geert Uytterhoeven
2022-08-23 1:26 ` [PATCH v2 2/4] arm64: dts: renesas: add r8a77980a.dtsi Kuninori Morimoto
` (2 subsequent siblings)
3 siblings, 1 reply; 12+ messages in thread
From: Kuninori Morimoto @ 2022-08-23 1:26 UTC (permalink / raw)
To: Geert Uytterhoeven
Cc: linux-renesas-soc, Andrey Dolnikov, Valentine Barshak, Koji Matsuoka
From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
We have V3H Condor board, and will have V3H2 Condor-I board.
This patch adds condor-common.dtsi to share the common settings
between these boards.
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
---
.../arm64/boot/dts/renesas/condor-common.dtsi | 542 ++++++++++++++++++
.../boot/dts/renesas/r8a77980-condor.dts | 534 +----------------
2 files changed, 543 insertions(+), 533 deletions(-)
create mode 100644 arch/arm64/boot/dts/renesas/condor-common.dtsi
diff --git a/arch/arm64/boot/dts/renesas/condor-common.dtsi b/arch/arm64/boot/dts/renesas/condor-common.dtsi
new file mode 100644
index 000000000000..ed982eeed2f2
--- /dev/null
+++ b/arch/arm64/boot/dts/renesas/condor-common.dtsi
@@ -0,0 +1,542 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Device Tree Source for the Condor board with R-Car V3H
+ *
+ * Copyright (C) 2022 Renesas Electronics Corp.
+ * Copyright (C) 2018 Cogent Embedded, Inc.
+ */
+#include <dt-bindings/gpio/gpio.h>
+
+/ {
+ aliases {
+ serial0 = &scif0;
+ ethernet0 = &gether;
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+
+ d1_8v: regulator-2 {
+ compatible = "regulator-fixed";
+ regulator-name = "D1.8V";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ d3_3v: regulator-0 {
+ compatible = "regulator-fixed";
+ regulator-name = "D3.3V";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ hdmi-out {
+ compatible = "hdmi-connector";
+ type = "a";
+
+ port {
+ hdmi_con: endpoint {
+ remote-endpoint = <&adv7511_out>;
+ };
+ };
+ };
+
+ lvds-decoder {
+ compatible = "thine,thc63lvd1024";
+ vcc-supply = <&d3_3v>;
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+ thc63lvd1024_in: endpoint {
+ remote-endpoint = <&lvds0_out>;
+ };
+ };
+
+ port@2 {
+ reg = <2>;
+ thc63lvd1024_out: endpoint {
+ remote-endpoint = <&adv7511_in>;
+ };
+ };
+ };
+ };
+
+ memory@48000000 {
+ device_type = "memory";
+ /* first 128MB is reserved for secure area. */
+ reg = <0 0x48000000 0 0x78000000>;
+ };
+
+ vddq_vin01: regulator-1 {
+ compatible = "regulator-fixed";
+ regulator-name = "VDDQ_VIN01";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ x1_clk: x1-clock {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <148500000>;
+ };
+};
+
+&canfd {
+ pinctrl-0 = <&canfd0_pins>;
+ pinctrl-names = "default";
+ status = "okay";
+
+ channel0 {
+ status = "okay";
+ };
+};
+
+&csi40 {
+ status = "okay";
+
+ ports {
+ port@0 {
+ csi40_in: endpoint {
+ clock-lanes = <0>;
+ data-lanes = <1 2 3 4>;
+ remote-endpoint = <&max9286_out0>;
+ };
+ };
+ };
+};
+
+&csi41 {
+ status = "okay";
+
+ ports {
+ port@0 {
+ csi41_in: endpoint {
+ clock-lanes = <0>;
+ data-lanes = <1 2 3 4>;
+ remote-endpoint = <&max9286_out1>;
+ };
+ };
+ };
+};
+
+&du {
+ clocks = <&cpg CPG_MOD 724>,
+ <&x1_clk>;
+ clock-names = "du.0", "dclkin.0";
+ status = "okay";
+};
+
+&extal_clk {
+ clock-frequency = <16666666>;
+};
+
+&extalr_clk {
+ clock-frequency = <32768>;
+};
+
+&gether {
+ pinctrl-0 = <&gether_pins>;
+ pinctrl-names = "default";
+
+ phy-mode = "rgmii-id";
+ phy-handle = <&phy0>;
+ renesas,no-ether-link;
+ status = "okay";
+
+ phy0: ethernet-phy@0 {
+ compatible = "ethernet-phy-id0022.1622",
+ "ethernet-phy-ieee802.3-c22";
+ rxc-skew-ps = <1500>;
+ reg = <0>;
+ interrupt-parent = <&gpio4>;
+ interrupts = <23 IRQ_TYPE_LEVEL_LOW>;
+ reset-gpios = <&gpio4 22 GPIO_ACTIVE_LOW>;
+ };
+};
+
+&i2c0 {
+ pinctrl-0 = <&i2c0_pins>;
+ pinctrl-names = "default";
+
+ status = "okay";
+ clock-frequency = <400000>;
+
+ io_expander0: gpio@20 {
+ compatible = "onnn,pca9654";
+ reg = <0x20>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ io_expander1: gpio@21 {
+ compatible = "onnn,pca9654";
+ reg = <0x21>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ hdmi@39 {
+ compatible = "adi,adv7511w";
+ reg = <0x39>;
+ interrupt-parent = <&gpio1>;
+ interrupts = <20 IRQ_TYPE_LEVEL_LOW>;
+ avdd-supply = <&d1_8v>;
+ dvdd-supply = <&d1_8v>;
+ pvdd-supply = <&d1_8v>;
+ bgvdd-supply = <&d1_8v>;
+ dvdd-3v-supply = <&d3_3v>;
+
+ adi,input-depth = <8>;
+ adi,input-colorspace = "rgb";
+ adi,input-clock = "1x";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+ adv7511_in: endpoint {
+ remote-endpoint = <&thc63lvd1024_out>;
+ };
+ };
+
+ port@1 {
+ reg = <1>;
+ adv7511_out: endpoint {
+ remote-endpoint = <&hdmi_con>;
+ };
+ };
+ };
+ };
+};
+
+&i2c1 {
+ pinctrl-0 = <&i2c1_pins>;
+ pinctrl-names = "default";
+
+ status = "okay";
+ clock-frequency = <400000>;
+
+ gmsl0: gmsl-deserializer@48 {
+ compatible = "maxim,max9286";
+ reg = <0x48>;
+
+ maxim,gpio-poc = <0 GPIO_ACTIVE_LOW>;
+ enable-gpios = <&io_expander0 0 GPIO_ACTIVE_HIGH>;
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+ };
+
+ port@1 {
+ reg = <1>;
+ };
+
+ port@2 {
+ reg = <2>;
+ };
+
+ port@3 {
+ reg = <3>;
+ };
+
+ port@4 {
+ reg = <4>;
+ max9286_out0: endpoint {
+ clock-lanes = <0>;
+ data-lanes = <1 2 3 4>;
+ remote-endpoint = <&csi40_in>;
+ };
+ };
+ };
+
+ i2c-mux {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ i2c@0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0>;
+
+ status = "disabled";
+ };
+
+ i2c@1 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <1>;
+
+ status = "disabled";
+ };
+
+ i2c@2 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <2>;
+
+ status = "disabled";
+ };
+
+ i2c@3 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <3>;
+
+ status = "disabled";
+ };
+ };
+ };
+
+ gmsl1: gmsl-deserializer@4a {
+ compatible = "maxim,max9286";
+ reg = <0x4a>;
+
+ maxim,gpio-poc = <0 GPIO_ACTIVE_LOW>;
+ enable-gpios = <&io_expander1 0 GPIO_ACTIVE_HIGH>;
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+ };
+
+ port@1 {
+ reg = <1>;
+ };
+
+ port@2 {
+ reg = <2>;
+ };
+
+ port@3 {
+ reg = <3>;
+ };
+
+ port@4 {
+ reg = <4>;
+ max9286_out1: endpoint {
+ clock-lanes = <0>;
+ data-lanes = <1 2 3 4>;
+ remote-endpoint = <&csi41_in>;
+ };
+ };
+ };
+
+ i2c-mux {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ i2c@0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0>;
+
+ status = "disabled";
+ };
+
+ i2c@1 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <1>;
+
+ status = "disabled";
+ };
+
+ i2c@2 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <2>;
+
+ status = "disabled";
+ };
+
+ i2c@3 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <3>;
+
+ status = "disabled";
+ };
+ };
+ };
+};
+
+&lvds0 {
+ status = "okay";
+
+ ports {
+ port@1 {
+ lvds0_out: endpoint {
+ remote-endpoint = <&thc63lvd1024_in>;
+ };
+ };
+ };
+};
+
+&mmc0 {
+ pinctrl-0 = <&mmc_pins>;
+ pinctrl-1 = <&mmc_pins>;
+ pinctrl-names = "default", "state_uhs";
+
+ vmmc-supply = <&d3_3v>;
+ vqmmc-supply = <&vddq_vin01>;
+ mmc-hs200-1_8v;
+ bus-width = <8>;
+ no-sd;
+ no-sdio;
+ non-removable;
+ status = "okay";
+};
+
+&pciec {
+ status = "okay";
+};
+
+&pcie_bus_clk {
+ clock-frequency = <100000000>;
+};
+
+&pcie_phy {
+ status = "okay";
+};
+
+&pfc {
+ canfd0_pins: canfd0 {
+ groups = "canfd0_data_a";
+ function = "canfd0";
+ };
+
+ gether_pins: gether {
+ groups = "gether_mdio_a", "gether_rgmii",
+ "gether_txcrefclk", "gether_txcrefclk_mega";
+ function = "gether";
+ };
+
+ i2c0_pins: i2c0 {
+ groups = "i2c0";
+ function = "i2c0";
+ };
+
+ i2c1_pins: i2c1 {
+ groups = "i2c1";
+ function = "i2c1";
+ };
+
+ mmc_pins: mmc {
+ groups = "mmc_data8", "mmc_ctrl", "mmc_ds";
+ function = "mmc";
+ power-source = <1800>;
+ };
+
+ qspi0_pins: qspi0 {
+ groups = "qspi0_ctrl", "qspi0_data4";
+ function = "qspi0";
+ };
+
+ scif0_pins: scif0 {
+ groups = "scif0_data";
+ function = "scif0";
+ };
+
+ scif_clk_pins: scif_clk {
+ groups = "scif_clk_b";
+ function = "scif_clk";
+ };
+};
+
+&rpc {
+ pinctrl-0 = <&qspi0_pins>;
+ pinctrl-names = "default";
+
+ status = "okay";
+
+ flash@0 {
+ compatible = "spansion,s25fs512s", "jedec,spi-nor";
+ reg = <0>;
+ spi-max-frequency = <50000000>;
+ spi-rx-bus-width = <4>;
+
+ partitions {
+ compatible = "fixed-partitions";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ bootparam@0 {
+ reg = <0x00000000 0x040000>;
+ read-only;
+ };
+ cr7@40000 {
+ reg = <0x00040000 0x080000>;
+ read-only;
+ };
+ cert_header_sa3@c0000 {
+ reg = <0x000c0000 0x080000>;
+ read-only;
+ };
+ bl2@140000 {
+ reg = <0x00140000 0x040000>;
+ read-only;
+ };
+ cert_header_sa6@180000 {
+ reg = <0x00180000 0x040000>;
+ read-only;
+ };
+ bl31@1c0000 {
+ reg = <0x001c0000 0x460000>;
+ read-only;
+ };
+ uboot@640000 {
+ reg = <0x00640000 0x0c0000>;
+ read-only;
+ };
+ uboot-env@700000 {
+ reg = <0x00700000 0x040000>;
+ read-only;
+ };
+ dtb@740000 {
+ reg = <0x00740000 0x080000>;
+ };
+ kernel@7c0000 {
+ reg = <0x007c0000 0x1400000>;
+ };
+ user@1bc0000 {
+ reg = <0x01bc0000 0x2440000>;
+ };
+ };
+ };
+};
+
+&rwdt {
+ timeout-sec = <60>;
+ status = "okay";
+};
+
+&scif0 {
+ pinctrl-0 = <&scif0_pins>, <&scif_clk_pins>;
+ pinctrl-names = "default";
+
+ status = "okay";
+};
+
+&scif_clk {
+ clock-frequency = <14745600>;
+};
diff --git a/arch/arm64/boot/dts/renesas/r8a77980-condor.dts b/arch/arm64/boot/dts/renesas/r8a77980-condor.dts
index 43ed033eb512..1d326552e2fa 100644
--- a/arch/arm64/boot/dts/renesas/r8a77980-condor.dts
+++ b/arch/arm64/boot/dts/renesas/r8a77980-condor.dts
@@ -8,541 +8,9 @@
/dts-v1/;
#include "r8a77980.dtsi"
-#include <dt-bindings/gpio/gpio.h>
+#include "condor-common.dtsi"
/ {
model = "Renesas Condor board based on r8a77980";
compatible = "renesas,condor", "renesas,r8a77980";
-
- aliases {
- serial0 = &scif0;
- ethernet0 = &gether;
- };
-
- chosen {
- stdout-path = "serial0:115200n8";
- };
-
- d1_8v: regulator-2 {
- compatible = "regulator-fixed";
- regulator-name = "D1.8V";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- regulator-boot-on;
- regulator-always-on;
- };
-
- d3_3v: regulator-0 {
- compatible = "regulator-fixed";
- regulator-name = "D3.3V";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- regulator-boot-on;
- regulator-always-on;
- };
-
- hdmi-out {
- compatible = "hdmi-connector";
- type = "a";
-
- port {
- hdmi_con: endpoint {
- remote-endpoint = <&adv7511_out>;
- };
- };
- };
-
- lvds-decoder {
- compatible = "thine,thc63lvd1024";
- vcc-supply = <&d3_3v>;
-
- ports {
- #address-cells = <1>;
- #size-cells = <0>;
-
- port@0 {
- reg = <0>;
- thc63lvd1024_in: endpoint {
- remote-endpoint = <&lvds0_out>;
- };
- };
-
- port@2 {
- reg = <2>;
- thc63lvd1024_out: endpoint {
- remote-endpoint = <&adv7511_in>;
- };
- };
- };
- };
-
- memory@48000000 {
- device_type = "memory";
- /* first 128MB is reserved for secure area. */
- reg = <0 0x48000000 0 0x78000000>;
- };
-
- vddq_vin01: regulator-1 {
- compatible = "regulator-fixed";
- regulator-name = "VDDQ_VIN01";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- regulator-boot-on;
- regulator-always-on;
- };
-
- x1_clk: x1-clock {
- compatible = "fixed-clock";
- #clock-cells = <0>;
- clock-frequency = <148500000>;
- };
-};
-
-&canfd {
- pinctrl-0 = <&canfd0_pins>;
- pinctrl-names = "default";
- status = "okay";
-
- channel0 {
- status = "okay";
- };
-};
-
-&csi40 {
- status = "okay";
-
- ports {
- port@0 {
- csi40_in: endpoint {
- clock-lanes = <0>;
- data-lanes = <1 2 3 4>;
- remote-endpoint = <&max9286_out0>;
- };
- };
- };
-};
-
-&csi41 {
- status = "okay";
-
- ports {
- port@0 {
- csi41_in: endpoint {
- clock-lanes = <0>;
- data-lanes = <1 2 3 4>;
- remote-endpoint = <&max9286_out1>;
- };
- };
- };
-};
-
-&du {
- clocks = <&cpg CPG_MOD 724>,
- <&x1_clk>;
- clock-names = "du.0", "dclkin.0";
- status = "okay";
-};
-
-&extal_clk {
- clock-frequency = <16666666>;
-};
-
-&extalr_clk {
- clock-frequency = <32768>;
-};
-
-&gether {
- pinctrl-0 = <&gether_pins>;
- pinctrl-names = "default";
-
- phy-mode = "rgmii-id";
- phy-handle = <&phy0>;
- renesas,no-ether-link;
- status = "okay";
-
- phy0: ethernet-phy@0 {
- compatible = "ethernet-phy-id0022.1622",
- "ethernet-phy-ieee802.3-c22";
- rxc-skew-ps = <1500>;
- reg = <0>;
- interrupt-parent = <&gpio4>;
- interrupts = <23 IRQ_TYPE_LEVEL_LOW>;
- reset-gpios = <&gpio4 22 GPIO_ACTIVE_LOW>;
- };
-};
-
-&i2c0 {
- pinctrl-0 = <&i2c0_pins>;
- pinctrl-names = "default";
-
- status = "okay";
- clock-frequency = <400000>;
-
- io_expander0: gpio@20 {
- compatible = "onnn,pca9654";
- reg = <0x20>;
- gpio-controller;
- #gpio-cells = <2>;
- };
-
- io_expander1: gpio@21 {
- compatible = "onnn,pca9654";
- reg = <0x21>;
- gpio-controller;
- #gpio-cells = <2>;
- };
-
- hdmi@39 {
- compatible = "adi,adv7511w";
- reg = <0x39>;
- interrupt-parent = <&gpio1>;
- interrupts = <20 IRQ_TYPE_LEVEL_LOW>;
- avdd-supply = <&d1_8v>;
- dvdd-supply = <&d1_8v>;
- pvdd-supply = <&d1_8v>;
- bgvdd-supply = <&d1_8v>;
- dvdd-3v-supply = <&d3_3v>;
-
- adi,input-depth = <8>;
- adi,input-colorspace = "rgb";
- adi,input-clock = "1x";
-
- ports {
- #address-cells = <1>;
- #size-cells = <0>;
-
- port@0 {
- reg = <0>;
- adv7511_in: endpoint {
- remote-endpoint = <&thc63lvd1024_out>;
- };
- };
-
- port@1 {
- reg = <1>;
- adv7511_out: endpoint {
- remote-endpoint = <&hdmi_con>;
- };
- };
- };
- };
-};
-
-&i2c1 {
- pinctrl-0 = <&i2c1_pins>;
- pinctrl-names = "default";
-
- status = "okay";
- clock-frequency = <400000>;
-
- gmsl0: gmsl-deserializer@48 {
- compatible = "maxim,max9286";
- reg = <0x48>;
-
- maxim,gpio-poc = <0 GPIO_ACTIVE_LOW>;
- enable-gpios = <&io_expander0 0 GPIO_ACTIVE_HIGH>;
-
- ports {
- #address-cells = <1>;
- #size-cells = <0>;
-
- port@0 {
- reg = <0>;
- };
-
- port@1 {
- reg = <1>;
- };
-
- port@2 {
- reg = <2>;
- };
-
- port@3 {
- reg = <3>;
- };
-
- port@4 {
- reg = <4>;
- max9286_out0: endpoint {
- clock-lanes = <0>;
- data-lanes = <1 2 3 4>;
- remote-endpoint = <&csi40_in>;
- };
- };
- };
-
- i2c-mux {
- #address-cells = <1>;
- #size-cells = <0>;
-
- i2c@0 {
- #address-cells = <1>;
- #size-cells = <0>;
- reg = <0>;
-
- status = "disabled";
- };
-
- i2c@1 {
- #address-cells = <1>;
- #size-cells = <0>;
- reg = <1>;
-
- status = "disabled";
- };
-
- i2c@2 {
- #address-cells = <1>;
- #size-cells = <0>;
- reg = <2>;
-
- status = "disabled";
- };
-
- i2c@3 {
- #address-cells = <1>;
- #size-cells = <0>;
- reg = <3>;
-
- status = "disabled";
- };
- };
- };
-
- gmsl1: gmsl-deserializer@4a {
- compatible = "maxim,max9286";
- reg = <0x4a>;
-
- maxim,gpio-poc = <0 GPIO_ACTIVE_LOW>;
- enable-gpios = <&io_expander1 0 GPIO_ACTIVE_HIGH>;
-
- ports {
- #address-cells = <1>;
- #size-cells = <0>;
-
- port@0 {
- reg = <0>;
- };
-
- port@1 {
- reg = <1>;
- };
-
- port@2 {
- reg = <2>;
- };
-
- port@3 {
- reg = <3>;
- };
-
- port@4 {
- reg = <4>;
- max9286_out1: endpoint {
- clock-lanes = <0>;
- data-lanes = <1 2 3 4>;
- remote-endpoint = <&csi41_in>;
- };
- };
- };
-
- i2c-mux {
- #address-cells = <1>;
- #size-cells = <0>;
-
- i2c@0 {
- #address-cells = <1>;
- #size-cells = <0>;
- reg = <0>;
-
- status = "disabled";
- };
-
- i2c@1 {
- #address-cells = <1>;
- #size-cells = <0>;
- reg = <1>;
-
- status = "disabled";
- };
-
- i2c@2 {
- #address-cells = <1>;
- #size-cells = <0>;
- reg = <2>;
-
- status = "disabled";
- };
-
- i2c@3 {
- #address-cells = <1>;
- #size-cells = <0>;
- reg = <3>;
-
- status = "disabled";
- };
- };
- };
-};
-
-&lvds0 {
- status = "okay";
-
- ports {
- port@1 {
- lvds0_out: endpoint {
- remote-endpoint = <&thc63lvd1024_in>;
- };
- };
- };
-};
-
-&mmc0 {
- pinctrl-0 = <&mmc_pins>;
- pinctrl-1 = <&mmc_pins>;
- pinctrl-names = "default", "state_uhs";
-
- vmmc-supply = <&d3_3v>;
- vqmmc-supply = <&vddq_vin01>;
- mmc-hs200-1_8v;
- bus-width = <8>;
- no-sd;
- no-sdio;
- non-removable;
- status = "okay";
-};
-
-&pciec {
- status = "okay";
-};
-
-&pcie_bus_clk {
- clock-frequency = <100000000>;
-};
-
-&pcie_phy {
- status = "okay";
-};
-
-&pfc {
- canfd0_pins: canfd0 {
- groups = "canfd0_data_a";
- function = "canfd0";
- };
-
- gether_pins: gether {
- groups = "gether_mdio_a", "gether_rgmii",
- "gether_txcrefclk", "gether_txcrefclk_mega";
- function = "gether";
- };
-
- i2c0_pins: i2c0 {
- groups = "i2c0";
- function = "i2c0";
- };
-
- i2c1_pins: i2c1 {
- groups = "i2c1";
- function = "i2c1";
- };
-
- mmc_pins: mmc {
- groups = "mmc_data8", "mmc_ctrl", "mmc_ds";
- function = "mmc";
- power-source = <1800>;
- };
-
- qspi0_pins: qspi0 {
- groups = "qspi0_ctrl", "qspi0_data4";
- function = "qspi0";
- };
-
- scif0_pins: scif0 {
- groups = "scif0_data";
- function = "scif0";
- };
-
- scif_clk_pins: scif_clk {
- groups = "scif_clk_b";
- function = "scif_clk";
- };
-};
-
-&rpc {
- pinctrl-0 = <&qspi0_pins>;
- pinctrl-names = "default";
-
- status = "okay";
-
- flash@0 {
- compatible = "spansion,s25fs512s", "jedec,spi-nor";
- reg = <0>;
- spi-max-frequency = <50000000>;
- spi-rx-bus-width = <4>;
-
- partitions {
- compatible = "fixed-partitions";
- #address-cells = <1>;
- #size-cells = <1>;
-
- bootparam@0 {
- reg = <0x00000000 0x040000>;
- read-only;
- };
- cr7@40000 {
- reg = <0x00040000 0x080000>;
- read-only;
- };
- cert_header_sa3@c0000 {
- reg = <0x000c0000 0x080000>;
- read-only;
- };
- bl2@140000 {
- reg = <0x00140000 0x040000>;
- read-only;
- };
- cert_header_sa6@180000 {
- reg = <0x00180000 0x040000>;
- read-only;
- };
- bl31@1c0000 {
- reg = <0x001c0000 0x460000>;
- read-only;
- };
- uboot@640000 {
- reg = <0x00640000 0x0c0000>;
- read-only;
- };
- uboot-env@700000 {
- reg = <0x00700000 0x040000>;
- read-only;
- };
- dtb@740000 {
- reg = <0x00740000 0x080000>;
- };
- kernel@7c0000 {
- reg = <0x007c0000 0x1400000>;
- };
- user@1bc0000 {
- reg = <0x01bc0000 0x2440000>;
- };
- };
- };
-};
-
-&rwdt {
- timeout-sec = <60>;
- status = "okay";
-};
-
-&scif0 {
- pinctrl-0 = <&scif0_pins>, <&scif_clk_pins>;
- pinctrl-names = "default";
-
- status = "okay";
-};
-
-&scif_clk {
- clock-frequency = <14745600>;
};
--
2.25.1
^ permalink raw reply related [flat|nested] 12+ messages in thread
* [PATCH v2 2/4] arm64: dts: renesas: add r8a77980a.dtsi
2022-08-23 1:26 [PATCH v2 0/4] arm64: dts: renesas: Add V3H2 Condor-I board support Kuninori Morimoto
2022-08-23 1:26 ` [PATCH v2 1/4] arm64: dts: renesas: add condor-common.dtsi Kuninori Morimoto
@ 2022-08-23 1:26 ` Kuninori Morimoto
2022-08-26 11:45 ` Geert Uytterhoeven
2022-08-23 1:26 ` [PATCH v2 3/4] arm64: dts: renesas: Add V3H2 Condor-I board support Kuninori Morimoto
2022-08-23 1:26 ` [PATCH v2 4/4] dt-bindings: arm: renesas: Document Renesas R-Car Gen3 V3H2 Condor-I board Kuninori Morimoto
3 siblings, 1 reply; 12+ messages in thread
From: Kuninori Morimoto @ 2022-08-23 1:26 UTC (permalink / raw)
To: Geert Uytterhoeven
Cc: linux-renesas-soc, Andrey Dolnikov, Valentine Barshak, Koji Matsuoka
From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
This patch adds r8a77980A V3H2 (= r8a77980 ES2) basic SoC
support. It is using r8a77980 (= V3H) setting as-is for now.
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
---
arch/arm64/boot/dts/renesas/r8a77980a.dtsi | 7 +++++++
1 file changed, 7 insertions(+)
create mode 100644 arch/arm64/boot/dts/renesas/r8a77980a.dtsi
diff --git a/arch/arm64/boot/dts/renesas/r8a77980a.dtsi b/arch/arm64/boot/dts/renesas/r8a77980a.dtsi
new file mode 100644
index 000000000000..ba49f50b964c
--- /dev/null
+++ b/arch/arm64/boot/dts/renesas/r8a77980a.dtsi
@@ -0,0 +1,7 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Device Tree Source for the R-Car V3H2 (R8A77980A) SoC
+ *
+ * Copyright (C) 2022 Renesas Electronics Corp.
+ */
+#include "r8a77980.dtsi"
--
2.25.1
^ permalink raw reply related [flat|nested] 12+ messages in thread
* [PATCH v2 3/4] arm64: dts: renesas: Add V3H2 Condor-I board support
2022-08-23 1:26 [PATCH v2 0/4] arm64: dts: renesas: Add V3H2 Condor-I board support Kuninori Morimoto
2022-08-23 1:26 ` [PATCH v2 1/4] arm64: dts: renesas: add condor-common.dtsi Kuninori Morimoto
2022-08-23 1:26 ` [PATCH v2 2/4] arm64: dts: renesas: add r8a77980a.dtsi Kuninori Morimoto
@ 2022-08-23 1:26 ` Kuninori Morimoto
2022-08-26 11:48 ` Geert Uytterhoeven
2022-08-23 1:26 ` [PATCH v2 4/4] dt-bindings: arm: renesas: Document Renesas R-Car Gen3 V3H2 Condor-I board Kuninori Morimoto
3 siblings, 1 reply; 12+ messages in thread
From: Kuninori Morimoto @ 2022-08-23 1:26 UTC (permalink / raw)
To: Geert Uytterhoeven
Cc: linux-renesas-soc, Andrey Dolnikov, Valentine Barshak, Koji Matsuoka
From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
This patch adds r8a77980A V3H2 (= r8a77980 ES2) Condor-I board
basic support.
Signed-off-by: Andrey Dolnikov <andrey.dolnikov@cogentembedded.com>
Signed-off-by: Valentine Barshak <valentine.barshak@cogentembedded.com>
Signed-off-by: Koji Matsuoka <koji.matsuoka.xm@renesas.com>
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
---
arch/arm64/boot/dts/renesas/Makefile | 1 +
.../boot/dts/renesas/r8a77980a-condor-i.dts | 17 +++++++++++++++++
2 files changed, 18 insertions(+)
create mode 100644 arch/arm64/boot/dts/renesas/r8a77980a-condor-i.dts
diff --git a/arch/arm64/boot/dts/renesas/Makefile b/arch/arm64/boot/dts/renesas/Makefile
index 7a647860ef35..0699b51c1247 100644
--- a/arch/arm64/boot/dts/renesas/Makefile
+++ b/arch/arm64/boot/dts/renesas/Makefile
@@ -56,6 +56,7 @@ dtb-$(CONFIG_ARCH_R8A77970) += r8a77970-v3msk.dtb
dtb-$(CONFIG_ARCH_R8A77980) += r8a77980-condor.dtb
dtb-$(CONFIG_ARCH_R8A77980) += r8a77980-v3hsk.dtb
+dtb-$(CONFIG_ARCH_R8A77980) += r8a77980a-condor-i.dtb
dtb-$(CONFIG_ARCH_R8A77990) += r8a77990-ebisu.dtb
diff --git a/arch/arm64/boot/dts/renesas/r8a77980a-condor-i.dts b/arch/arm64/boot/dts/renesas/r8a77980a-condor-i.dts
new file mode 100644
index 000000000000..4c572d916ab7
--- /dev/null
+++ b/arch/arm64/boot/dts/renesas/r8a77980a-condor-i.dts
@@ -0,0 +1,17 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Device Tree Source for the Condor-I board on r8a77980A (ES2.0)
+ *
+ * Copyright (C) 2022 Renesas Electronics Corp.
+ */
+
+/dts-v1/;
+#include "r8a77980a.dtsi"
+#include "condor-common.dtsi"
+
+/ {
+ model = "Renesas Condor-I board based on r8a77980A (ES2.0)";
+
+ compatible = "renesas,condor-i", "renesas,condor",
+ "renesas,r8a77980a", "renesas,r8a77980";
+};
--
2.25.1
^ permalink raw reply related [flat|nested] 12+ messages in thread
* [PATCH v2 4/4] dt-bindings: arm: renesas: Document Renesas R-Car Gen3 V3H2 Condor-I board
2022-08-23 1:26 [PATCH v2 0/4] arm64: dts: renesas: Add V3H2 Condor-I board support Kuninori Morimoto
` (2 preceding siblings ...)
2022-08-23 1:26 ` [PATCH v2 3/4] arm64: dts: renesas: Add V3H2 Condor-I board support Kuninori Morimoto
@ 2022-08-23 1:26 ` Kuninori Morimoto
2022-08-26 11:30 ` Geert Uytterhoeven
3 siblings, 1 reply; 12+ messages in thread
From: Kuninori Morimoto @ 2022-08-23 1:26 UTC (permalink / raw)
To: Geert Uytterhoeven
Cc: linux-renesas-soc, Andrey Dolnikov, Valentine Barshak, Koji Matsuoka
From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
This patch adds new R-Car Gen3 V3H2 Condor-I board.
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
---
Documentation/devicetree/bindings/arm/renesas.yaml | 9 +++++++++
1 file changed, 9 insertions(+)
diff --git a/Documentation/devicetree/bindings/arm/renesas.yaml b/Documentation/devicetree/bindings/arm/renesas.yaml
index ff80152f092f..0e029bbd5bcb 100644
--- a/Documentation/devicetree/bindings/arm/renesas.yaml
+++ b/Documentation/devicetree/bindings/arm/renesas.yaml
@@ -291,6 +291,15 @@ properties:
- renesas,v3hsk # V3HSK (Y-ASK-RCAR-V3H-WS10)
- const: renesas,r8a77980
+ - description: R-Car V3H2 (R8A77980A)
+ items:
+ - enum:
+ - renesas,condor-i # Condor-I (RTP0RC77980SEBS012SA01)
+ - enum:
+ - renesas,condor # Condor
+ - const: renesas,r8a77980a
+ - const: renesas,r8a77980
+
- description: R-Car E3 (R8A77990)
items:
- enum:
--
2.25.1
^ permalink raw reply related [flat|nested] 12+ messages in thread
* Re: [PATCH v2 4/4] dt-bindings: arm: renesas: Document Renesas R-Car Gen3 V3H2 Condor-I board
2022-08-23 1:26 ` [PATCH v2 4/4] dt-bindings: arm: renesas: Document Renesas R-Car Gen3 V3H2 Condor-I board Kuninori Morimoto
@ 2022-08-26 11:30 ` Geert Uytterhoeven
0 siblings, 0 replies; 12+ messages in thread
From: Geert Uytterhoeven @ 2022-08-26 11:30 UTC (permalink / raw)
To: Kuninori Morimoto
Cc: Linux-Renesas, Andrey Dolnikov, Valentine Barshak, Koji Matsuoka
Hi Morimoto-san,
On Tue, Aug 23, 2022 at 3:27 AM Kuninori Morimoto
<kuninori.morimoto.gx@renesas.com> wrote:
> From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
>
> This patch adds new R-Car Gen3 V3H2 Condor-I board.
>
> Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Thanks for your patch!
> --- a/Documentation/devicetree/bindings/arm/renesas.yaml
> +++ b/Documentation/devicetree/bindings/arm/renesas.yaml
> @@ -291,6 +291,15 @@ properties:
> - renesas,v3hsk # V3HSK (Y-ASK-RCAR-V3H-WS10)
> - const: renesas,r8a77980
>
> + - description: R-Car V3H2 (R8A77980A)
> + items:
> + - enum:
> + - renesas,condor-i # Condor-I (RTP0RC77980SEBS012SA01)
> + - enum:
> + - renesas,condor # Condor
Given the changes in the PMIC and CAN transceiver department, I think
it would be prudent to drop the compatibility with "renesas,condor".
For similar reasons, the Salvator-XS board also doesn't declare
compatibility with "renesas,salvator-x".
> + - const: renesas,r8a77980a
> + - const: renesas,r8a77980
> +
> - description: R-Car E3 (R8A77990)
> items:
> - enum:
The rest LGTM.
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH v2 1/4] arm64: dts: renesas: add condor-common.dtsi
2022-08-23 1:26 ` [PATCH v2 1/4] arm64: dts: renesas: add condor-common.dtsi Kuninori Morimoto
@ 2022-08-26 11:44 ` Geert Uytterhoeven
0 siblings, 0 replies; 12+ messages in thread
From: Geert Uytterhoeven @ 2022-08-26 11:44 UTC (permalink / raw)
To: Kuninori Morimoto
Cc: Linux-Renesas, Andrey Dolnikov, Valentine Barshak, Koji Matsuoka
Hi Morimoto-san,
On Tue, Aug 23, 2022 at 3:26 AM Kuninori Morimoto
<kuninori.morimoto.gx@renesas.com> wrote:
> From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
>
> We have V3H Condor board, and will have V3H2 Condor-I board.
> This patch adds condor-common.dtsi to share the common settings
> between these boards.
>
> Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Thanks for your patch!
> --- /dev/null
> +++ b/arch/arm64/boot/dts/renesas/condor-common.dtsi
> @@ -0,0 +1,542 @@
> +// SPDX-License-Identifier: GPL-2.0
> +/*
> + * Device Tree Source for the Condor board with R-Car V3H
> + *
> + * Copyright (C) 2022 Renesas Electronics Corp.
Perhaps "2018-2022"?
Or just keep the original "2018", as nothing substantial has changed.
> + * Copyright (C) 2018 Cogent Embedded, Inc.
> + */
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH v2 2/4] arm64: dts: renesas: add r8a77980a.dtsi
2022-08-23 1:26 ` [PATCH v2 2/4] arm64: dts: renesas: add r8a77980a.dtsi Kuninori Morimoto
@ 2022-08-26 11:45 ` Geert Uytterhoeven
2022-08-29 2:19 ` Kuninori Morimoto
0 siblings, 1 reply; 12+ messages in thread
From: Geert Uytterhoeven @ 2022-08-26 11:45 UTC (permalink / raw)
To: Kuninori Morimoto
Cc: Linux-Renesas, Andrey Dolnikov, Valentine Barshak, Koji Matsuoka
Hi Morimoto-san,
On Tue, Aug 23, 2022 at 3:26 AM Kuninori Morimoto
<kuninori.morimoto.gx@renesas.com> wrote:
> From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
>
> This patch adds r8a77980A V3H2 (= r8a77980 ES2) basic SoC
> support. It is using r8a77980 (= V3H) setting as-is for now.
>
> Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Thanks for your patch!
> --- /dev/null
> +++ b/arch/arm64/boot/dts/renesas/r8a77980a.dtsi
> @@ -0,0 +1,7 @@
> +// SPDX-License-Identifier: GPL-2.0
> +/*
> + * Device Tree Source for the R-Car V3H2 (R8A77980A) SoC
> + *
> + * Copyright (C) 2022 Renesas Electronics Corp.
> + */
> +#include "r8a77980.dtsi"
Please override the root compatible value to
"renesas,r8a77980a", "renesas,r8a77980", to match the bindings.
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH v2 3/4] arm64: dts: renesas: Add V3H2 Condor-I board support
2022-08-23 1:26 ` [PATCH v2 3/4] arm64: dts: renesas: Add V3H2 Condor-I board support Kuninori Morimoto
@ 2022-08-26 11:48 ` Geert Uytterhoeven
0 siblings, 0 replies; 12+ messages in thread
From: Geert Uytterhoeven @ 2022-08-26 11:48 UTC (permalink / raw)
To: Kuninori Morimoto
Cc: Linux-Renesas, Andrey Dolnikov, Valentine Barshak, Koji Matsuoka
Hi Morimoto-san,
On Tue, Aug 23, 2022 at 3:26 AM Kuninori Morimoto
<kuninori.morimoto.gx@renesas.com> wrote:
> From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
>
> This patch adds r8a77980A V3H2 (= r8a77980 ES2) Condor-I board
> basic support.
>
> Signed-off-by: Andrey Dolnikov <andrey.dolnikov@cogentembedded.com>
> Signed-off-by: Valentine Barshak <valentine.barshak@cogentembedded.com>
> Signed-off-by: Koji Matsuoka <koji.matsuoka.xm@renesas.com>
> Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Thanks for your patch!
> --- /dev/null
> +++ b/arch/arm64/boot/dts/renesas/r8a77980a-condor-i.dts
> @@ -0,0 +1,17 @@
> +// SPDX-License-Identifier: GPL-2.0
> +/*
> + * Device Tree Source for the Condor-I board on r8a77980A (ES2.0)
> + *
> + * Copyright (C) 2022 Renesas Electronics Corp.
> + */
> +
> +/dts-v1/;
> +#include "r8a77980a.dtsi"
> +#include "condor-common.dtsi"
> +
> +/ {
> + model = "Renesas Condor-I board based on r8a77980A (ES2.0)";
> +
No need for a blank line.
> + compatible = "renesas,condor-i", "renesas,condor",
> + "renesas,r8a77980a", "renesas,r8a77980";
Please drop compatibility with "renesas,condor", as per my comment on
"[PATCH v2 4/4] dt-bindings: arm: renesas: Document Renesas R-Car Gen3
V3H2 Condor-I board".
> +};
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH v2 2/4] arm64: dts: renesas: add r8a77980a.dtsi
2022-08-26 11:45 ` Geert Uytterhoeven
@ 2022-08-29 2:19 ` Kuninori Morimoto
2022-08-29 6:33 ` Geert Uytterhoeven
0 siblings, 1 reply; 12+ messages in thread
From: Kuninori Morimoto @ 2022-08-29 2:19 UTC (permalink / raw)
To: Geert Uytterhoeven
Cc: Linux-Renesas, Andrey Dolnikov, Valentine Barshak, Koji Matsuoka
Hi Geert
Thank you for your feedback
> > --- /dev/null
> > +++ b/arch/arm64/boot/dts/renesas/r8a77980a.dtsi
> > @@ -0,0 +1,7 @@
> > +// SPDX-License-Identifier: GPL-2.0
> > +/*
> > + * Device Tree Source for the R-Car V3H2 (R8A77980A) SoC
> > + *
> > + * Copyright (C) 2022 Renesas Electronics Corp.
> > + */
> > +#include "r8a77980.dtsi"
>
> Please override the root compatible value to
> "renesas,r8a77980a", "renesas,r8a77980", to match the bindings.
Sorry I don't understand about this comment.
Is it for where/what or which patch ?
Thank you for your help !!
Best regards
---
Kuninori Morimoto
^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH v2 2/4] arm64: dts: renesas: add r8a77980a.dtsi
2022-08-29 2:19 ` Kuninori Morimoto
@ 2022-08-29 6:33 ` Geert Uytterhoeven
2022-08-29 23:06 ` Kuninori Morimoto
0 siblings, 1 reply; 12+ messages in thread
From: Geert Uytterhoeven @ 2022-08-29 6:33 UTC (permalink / raw)
To: Kuninori Morimoto
Cc: Linux-Renesas, Andrey Dolnikov, Valentine Barshak, Koji Matsuoka
Hi Morimoto-san,
On Mon, Aug 29, 2022 at 4:19 AM Kuninori Morimoto
<kuninori.morimoto.gx@renesas.com> wrote:
> > > --- /dev/null
> > > +++ b/arch/arm64/boot/dts/renesas/r8a77980a.dtsi
> > > @@ -0,0 +1,7 @@
> > > +// SPDX-License-Identifier: GPL-2.0
> > > +/*
> > > + * Device Tree Source for the R-Car V3H2 (R8A77980A) SoC
> > > + *
> > > + * Copyright (C) 2022 Renesas Electronics Corp.
> > > + */
> > > +#include "r8a77980.dtsi"
> >
> > Please override the root compatible value to
> > "renesas,r8a77980a", "renesas,r8a77980", to match the bindings.
>
> Sorry I don't understand about this comment.
> Is it for where/what or which patch ?
I mean to add the following to this patch:
/ {
compatible = "renesas,r8a77980a", "renesas,r8a77980";
};
(like we do in all other SoC-specific .dtsi files that include another
SoC-specific .dtsi file, e.g. arch/arm64/boot/dts/renesas/r8a779m0.dtsi).
Thanks!
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH v2 2/4] arm64: dts: renesas: add r8a77980a.dtsi
2022-08-29 6:33 ` Geert Uytterhoeven
@ 2022-08-29 23:06 ` Kuninori Morimoto
0 siblings, 0 replies; 12+ messages in thread
From: Kuninori Morimoto @ 2022-08-29 23:06 UTC (permalink / raw)
To: Geert Uytterhoeven
Cc: Linux-Renesas, Andrey Dolnikov, Valentine Barshak, Koji Matsuoka
Hi Geert
> > > Please override the root compatible value to
> > > "renesas,r8a77980a", "renesas,r8a77980", to match the bindings.
> >
> > Sorry I don't understand about this comment.
> > Is it for where/what or which patch ?
>
> I mean to add the following to this patch:
>
> / {
> compatible = "renesas,r8a77980a", "renesas,r8a77980";
> };
>
> (like we do in all other SoC-specific .dtsi files that include another
> SoC-specific .dtsi file, e.g. arch/arm64/boot/dts/renesas/r8a779m0.dtsi).
Oh, I see !
Thank you for your help !!
Best regards
---
Kuninori Morimoto
^ permalink raw reply [flat|nested] 12+ messages in thread
end of thread, other threads:[~2022-08-29 23:06 UTC | newest]
Thread overview: 12+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2022-08-23 1:26 [PATCH v2 0/4] arm64: dts: renesas: Add V3H2 Condor-I board support Kuninori Morimoto
2022-08-23 1:26 ` [PATCH v2 1/4] arm64: dts: renesas: add condor-common.dtsi Kuninori Morimoto
2022-08-26 11:44 ` Geert Uytterhoeven
2022-08-23 1:26 ` [PATCH v2 2/4] arm64: dts: renesas: add r8a77980a.dtsi Kuninori Morimoto
2022-08-26 11:45 ` Geert Uytterhoeven
2022-08-29 2:19 ` Kuninori Morimoto
2022-08-29 6:33 ` Geert Uytterhoeven
2022-08-29 23:06 ` Kuninori Morimoto
2022-08-23 1:26 ` [PATCH v2 3/4] arm64: dts: renesas: Add V3H2 Condor-I board support Kuninori Morimoto
2022-08-26 11:48 ` Geert Uytterhoeven
2022-08-23 1:26 ` [PATCH v2 4/4] dt-bindings: arm: renesas: Document Renesas R-Car Gen3 V3H2 Condor-I board Kuninori Morimoto
2022-08-26 11:30 ` Geert Uytterhoeven
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