* [PATCH 0/8] OMAP3: Adding Smartreflex and Voltage driver support
@ 2010-05-29 16:32 Thara Gopinath
2010-05-29 16:32 ` [PATCH 1/8] OMAP3: PM: Adding voltage driver support for OMAP3 Thara Gopinath
` (2 more replies)
0 siblings, 3 replies; 19+ messages in thread
From: Thara Gopinath @ 2010-05-29 16:32 UTC (permalink / raw)
To: linux-omap
Cc: khilman, paul, b-cousson, vishwanath.bs, sawant, Thara Gopinath
This patch series introduces smartreflex and voltage driver support
for OMAP3430 and OMAP3630. SmartReflex modules do adaptive voltage
control for real-time voltage adjustments.
Originally all the functionalities introduced in this patch
were present in arch/arm/mach-omap2/smartreflex.c file in Kevin's
pm tree. This patch series does a major rewrite of this file
and introduces a separate voltage driver. Major contributors
to the original driver are
Eduardo Valentin (1):
OMAP3: PM: SmartReflex: Fix scheduled while atomic problem
Kalle Jokiniemi (1):
OMAP3: PM: SmartReflex driver integration
Kevin Hilman (2):
temp: SR: IO_ADDRESS conversion
OMAP: SR: OPP interfaces removed from OMAP PM layer
Nishanth Menon (1):
omap3: pm: sr: replace get_opp with freq_to_opp
Paul Walmsley (2):
OMAP SR: use opp_find_opp_by_opp_id()
OMAP SR: use OPP API for OPP ID, remove direct access
Phil Carmody (2):
OMAP3: PM: Don't do unnecessary searches in omap_sr_vdd*_autocomp_store
OMAP3: PM: Early exit on invalid parameters
Rajendra Nayak (9):
OMAP3: SR: Fix init voltage on OPP change
OMAP3: SR: Update VDD1/2 voltages at boot
OMAP3: SR: Use sysclk for SR CLKLENGTH calc
OMAP3: SR: Reset voltage level on SR disable
OMAP3: SR: Replace printk's with pr_* calls
OMAP3: SR: Remove redundant defines
OMAP3: SR: Fix SR driver to check for omap-pm return values
OMAP3: PM: Put optimal SMPS stabilization delay
OMAP3: SR: Wait for VP idle before a VP disable
Roger Quadros (4):
OMAP3: PM: Fix Smartreflex when used with PM_NOOP layer
OMAP3: PM: Make Smartreflex driver independent of SRF
OMAP3: PM: Do not Enable SmartReflex if OPP tables not defined
OMAP3: PM: Smartreflex: Fix VDD2 OPP determining logic
Romit Dasgupta (1):
omap: pm: SR: use enum for OPP types
Teerth Reddy (1):
OMAP3: SR: Replace SR_PASS/FAIL,SR_TRUE/FALSE
Tero Kristo (1):
Smartreflex: Avoid unnecessary spam
This patch series is based against origin/opp branch off
Kevin's pm tree which in turn is based off lo-master.
This series will apply against lo-master also but will
break compilation due to lack of opp framework support
on lo-master.
This patch series has been tested on OMAP3430 SDP,
OMAP3630 SDP and ZOOM3 with the following menuconfig
options enabled.
System type -> TI OMAP Implementations -> Smartreflex Support
System type -> TI OMAP Implementations ->
Class 3 mode of Smartreflex Implementation
Device Drivers -> Multifunction device drivers ->
Support power resources on TWL4030 family chips
Thara Gopinath (8):
OMAP3: PM: Adding voltage driver support for OMAP3
OMAP3: PM: Adding smartreflex driver support.
OMAP3: PM: Adding smartreflex device file.
OMAP3: PM: Adding smartreflex hwmod data
OMAP3: PM: Adding smartreflex class3 driver
OMAP3: PM: Adding T2 enabling of smartreflex support
OMAP: PM: Allowing an early init of pm debugfs driver.
OMAP3: PM: Adding debug support to Voltage and Smartreflex drivers
arch/arm/mach-omap2/Makefile | 5 +-
arch/arm/mach-omap2/board-3430sdp.c | 2 +
arch/arm/mach-omap2/board-3630sdp.c | 2 +
arch/arm/mach-omap2/board-zoom3.c | 2 +
arch/arm/mach-omap2/omap_hwmod_3xxx_data.c | 209 +++++-
arch/arm/mach-omap2/pm-debug.c | 18 +-
arch/arm/mach-omap2/smartreflex-class3.c | 62 ++
arch/arm/mach-omap2/smartreflex-class3.h | 23 +
arch/arm/mach-omap2/smartreflex.c | 969 ++++++++++++++++++++
arch/arm/mach-omap2/sr_device.c | 177 ++++
arch/arm/mach-omap2/voltage.c | 1199 +++++++++++++++++++++++++
arch/arm/mach-omap2/voltage.h | 126 +++
arch/arm/plat-omap/Kconfig | 41 +
arch/arm/plat-omap/include/plat/control.h | 27 +
arch/arm/plat-omap/include/plat/smartreflex.h | 273 ++++++
drivers/mfd/twl-core.c | 7 +-
drivers/mfd/twl4030-power.c | 29 +
include/linux/i2c/twl.h | 1 +
18 files changed, 3166 insertions(+), 6 deletions(-)
create mode 100644 arch/arm/mach-omap2/smartreflex-class3.c
create mode 100644 arch/arm/mach-omap2/smartreflex-class3.h
create mode 100644 arch/arm/mach-omap2/smartreflex.c
create mode 100644 arch/arm/mach-omap2/sr_device.c
create mode 100644 arch/arm/mach-omap2/voltage.c
create mode 100644 arch/arm/mach-omap2/voltage.h
create mode 100644 arch/arm/plat-omap/include/plat/smartreflex.h
^ permalink raw reply [flat|nested] 19+ messages in thread* [PATCH 1/8] OMAP3: PM: Adding voltage driver support for OMAP3 2010-05-29 16:32 [PATCH 0/8] OMAP3: Adding Smartreflex and Voltage driver support Thara Gopinath @ 2010-05-29 16:32 ` Thara Gopinath 2010-05-29 16:32 ` [PATCH 2/8] OMAP3: PM: Adding smartreflex driver support Thara Gopinath ` (2 more replies) 2010-06-02 23:52 ` [PATCH 0/8] OMAP3: Adding Smartreflex and Voltage driver support Kevin Hilman 2010-06-24 23:25 ` Kevin Hilman 2 siblings, 3 replies; 19+ messages in thread From: Thara Gopinath @ 2010-05-29 16:32 UTC (permalink / raw) To: linux-omap Cc: khilman, paul, b-cousson, vishwanath.bs, sawant, Thara Gopinath This patch adds voltage driver support for OMAP3. The driver allows configuring the voltage controller and voltage processors during init and exports APIs to enable/disable voltage processors, scale voltage and reset voltage. The driver also maintains the global voltage table on a per VDD basis which contains the various voltages supported by the VDD along with per voltage dependent data like smartreflex n-target value, errminlimit and voltage processor errorgain. The driver allows scaling of VDD voltages either through "vc bypass method" or through "vp forceupdate method" the choice being configurable through the board file. This patch contains code originally in linux omap pm branch smartreflex driver. Major contributors to this driver are Lesly A M, Rajendra Nayak, Kalle Jokiniemi, Paul Walmsley, Nishant Menon, Kevin Hilman. Signed-off-by: Thara Gopinath <thara@ti.com> --- arch/arm/mach-omap2/Makefile | 3 +- arch/arm/mach-omap2/voltage.c | 1059 +++++++++++++++++++++++++++++++++++++++++ arch/arm/mach-omap2/voltage.h | 123 +++++ 3 files changed, 1184 insertions(+), 1 deletions(-) create mode 100644 arch/arm/mach-omap2/voltage.c create mode 100644 arch/arm/mach-omap2/voltage.h diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile index e975b43..e4c660d 100644 --- a/arch/arm/mach-omap2/Makefile +++ b/arch/arm/mach-omap2/Makefile @@ -46,7 +46,8 @@ obj-$(CONFIG_ARCH_OMAP2) += sdrc2xxx.o ifeq ($(CONFIG_PM),y) obj-$(CONFIG_ARCH_OMAP2) += pm24xx.o obj-$(CONFIG_ARCH_OMAP2) += sleep24xx.o -obj-$(CONFIG_ARCH_OMAP3) += pm34xx.o sleep34xx.o cpuidle34xx.o +obj-$(CONFIG_ARCH_OMAP3) += pm34xx.o sleep34xx.o cpuidle34xx.o \ + voltage.o obj-$(CONFIG_PM_DEBUG) += pm-debug.o AFLAGS_sleep24xx.o :=-Wa,-march=armv6 diff --git a/arch/arm/mach-omap2/voltage.c b/arch/arm/mach-omap2/voltage.c new file mode 100644 index 0000000..657e322 --- /dev/null +++ b/arch/arm/mach-omap2/voltage.c @@ -0,0 +1,1059 @@ +/* + * OMAP3/OMAP4 Voltage Management Routines + * + * Author: Thara Gopinath <thara@ti.com> + * + * Copyright (C) 2007 Texas Instruments, Inc. + * Rajendra Nayak <rnayak@ti.com> + * Lesly A M <x0080970@ti.com> + * + * Copyright (C) 2008 Nokia Corporation + * Kalle Jokiniemi + * + * Copyright (C) 2010 Texas Instruments, Inc. + * Thara Gopinath <thara@ti.com> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#include <linux/pm.h> +#include <linux/delay.h> +#include <linux/io.h> +#include <linux/clk.h> +#include <linux/err.h> + +#include <plat/omap-pm.h> +#include <plat/omap34xx.h> +#include <plat/opp.h> +#include <plat/opp_twl_tps.h> +#include <plat/clock.h> +#include <plat/common.h> + +#include "prm-regbits-34xx.h" +#include "voltage.h" + +#define VP_IDLE_TIMEOUT 200 +#define VP_TRANXDONE_TIMEOUT 300 + +/* PRM voltage module */ +u32 volt_mod; + +/* Voltage processor register offsets */ +struct vp_reg_offs { + u8 vpconfig_reg; + u8 vstepmin_reg; + u8 vstepmax_reg; + u8 vlimitto_reg; + u8 status_reg; + u8 voltage_reg; +}; + +/* Voltage Processor bit field values, shifts and masks */ +struct vp_reg_val { + /* VPx_VPCONFIG */ + u32 vpconfig_erroroffset; + u16 vpconfig_errorgain; + u32 vpconfig_errorgain_mask; + u8 vpconfig_errorgain_shift; + u32 vpconfig_initvoltage_mask; + u8 vpconfig_initvoltage_shift; + u32 vpconfig_timeouten; + u32 vpconfig_initvdd; + u32 vpconfig_forceupdate; + u32 vpconfig_vpenable; + /* VPx_VSTEPMIN */ + u8 vstepmin_stepmin; + u16 vstepmin_smpswaittimemin; + u8 vstepmin_stepmin_shift; + u8 vstepmin_smpswaittimemin_shift; + /* VPx_VSTEPMAX */ + u8 vstepmax_stepmax; + u16 vstepmax_smpswaittimemax; + u8 vstepmax_stepmax_shift; + u8 vstepmax_smpswaittimemax_shift; + /* VPx_VLIMITTO */ + u16 vlimitto_vddmin; + u16 vlimitto_vddmax; + u16 vlimitto_timeout; + u16 vlimitto_vddmin_shift; + u16 vlimitto_vddmax_shift; + u16 vlimitto_timeout_shift; + /* PRM_IRQSTATUS*/ + u32 tranxdone_status; +}; + +/** + * omap_vdd_info - Per Voltage Domain info + * + * @volt_data : voltage table having the distinct voltages supported + * by the domain and other associated per voltage data. + * @vp_offs : structure containing the offsets for various + * vp registers + * @vp_reg : the register values, shifts, masks for various + * vp registers + * @volt_clk : the clock associated with the vdd. + * @opp_type : the type of OPP associated with this vdd. + * @volt_data_count : Number of distinct voltages supported by this vdd. + * @nominal_volt : Nominal voltaged for this vdd. + * cmdval_reg : Voltage controller cmdval register. + * @vdd_sr_reg : The smartreflex register associated with this VDD. + */ +struct omap_vdd_info{ + struct omap_volt_data *volt_data; + struct vp_reg_offs vp_offs; + struct vp_reg_val vp_reg; + struct clk *volt_clk; + int opp_type; + int volt_data_count; + unsigned long nominal_volt; + u8 cmdval_reg; + u8 vdd_sr_reg; +}; +static struct omap_vdd_info *vdd_info; +/* + * Number of scalable voltage domains. + */ +static int no_scalable_vdd; + +/* OMAP3 VP register offsets and other definitions */ +struct __init vp_reg_offs omap3_vp_offs[] = { + /* VP1 */ + { + .vpconfig_reg = OMAP3_PRM_VP1_CONFIG_OFFSET, + .vstepmin_reg = OMAP3_PRM_VP1_VSTEPMIN_OFFSET, + .vstepmax_reg = OMAP3_PRM_VP1_VSTEPMAX_OFFSET, + .vlimitto_reg = OMAP3_PRM_VP1_VLIMITTO_OFFSET, + .status_reg = OMAP3_PRM_VP1_STATUS_OFFSET, + .voltage_reg = OMAP3_PRM_VP1_VOLTAGE_OFFSET, + }, + /* VP2 */ + { .vpconfig_reg = OMAP3_PRM_VP2_CONFIG_OFFSET, + .vstepmin_reg = OMAP3_PRM_VP2_VSTEPMIN_OFFSET, + .vstepmax_reg = OMAP3_PRM_VP2_VSTEPMAX_OFFSET, + .vlimitto_reg = OMAP3_PRM_VP2_VLIMITTO_OFFSET, + .status_reg = OMAP3_PRM_VP2_STATUS_OFFSET, + .voltage_reg = OMAP3_PRM_VP2_VOLTAGE_OFFSET, + }, +}; + +#define OMAP3_NO_SCALABLE_VDD ARRAY_SIZE(omap3_vp_offs) +static struct omap_vdd_info omap3_vdd_info[OMAP3_NO_SCALABLE_VDD]; + +/* TODO: OMAP4 register offsets */ + +/* + * Default voltage controller settings. + */ +static struct omap_volt_vc_data vc_config = { + .clksetup = 0xff, + .voltsetup_time1 = 0xfff, + .voltsetup_time2 = 0xfff, + .voltoffset = 0xff, + .voltsetup2 = 0xff, + .vdd0_on = 0x30, /* 1.2v */ + .vdd0_onlp = 0x20, /* 1.0v */ + .vdd0_ret = 0x1e, /* 0.975v */ + .vdd0_off = 0x00, /* 0.6v */ + .vdd1_on = 0x2c, /* 1.15v */ + .vdd1_onlp = 0x20, /* 1.0v */ + .vdd1_ret = 0x1e, /* .975v */ + .vdd1_off = 0x00, /* 0.6v */ +}; + +/* + * Default PMIC Data + */ +static struct omap_volt_pmic_info volt_pmic_info = { + .slew_rate = 4000, + .step_size = 12500, +}; + +/* + * Structures containing OMAP3430/OMAP3630 voltage supported and various + * data associated with it per voltage domain basis. Smartreflex Ntarget + * values are left as 0 as they have to be populated by smartreflex + * driver after reading the efuse. + */ + +/* VDD1 */ +static struct omap_volt_data omap34xx_vdd1_volt_data[] = { + {.volt_nominal = 975000, .sr_errminlimit = 0xF4, .vp_errgain = 0x0C}, + {.volt_nominal = 1075000, .sr_errminlimit = 0xF4, .vp_errgain = 0x0C}, + {.volt_nominal = 1200000, .sr_errminlimit = 0xF9, .vp_errgain = 0x18}, + {.volt_nominal = 1270000, .sr_errminlimit = 0xF9, .vp_errgain = 0x18}, + {.volt_nominal = 1350000, .sr_errminlimit = 0xF9, .vp_errgain = 0x18}, +}; + +static struct omap_volt_data omap36xx_vdd1_volt_data[] = { + {.volt_nominal = 930000, .sr_errminlimit = 0xF4, .vp_errgain = 0x0C}, + {.volt_nominal = 1100000, .sr_errminlimit = 0xF9, .vp_errgain = 0x16}, + {.volt_nominal = 1260000, .sr_errminlimit = 0xFA, .vp_errgain = 0x23}, + {.volt_nominal = 1350000, .sr_errminlimit = 0xFA, .vp_errgain = 0x27}, +}; + +/* VDD2 */ +static struct omap_volt_data omap34xx_vdd2_volt_data[] = { + {.volt_nominal = 975000, .sr_errminlimit = 0xF4, .vp_errgain = 0x0C}, + {.volt_nominal = 1050000, .sr_errminlimit = 0xF4, .vp_errgain = 0x0C}, + {.volt_nominal = 1150000, .sr_errminlimit = 0xF9, .vp_errgain = 0x18}, +}; + +static struct omap_volt_data omap36xx_vdd2_volt_data[] = { + {.volt_nominal = 930000, .sr_errminlimit = 0xF4, .vp_errgain = 0x0C}, + {.volt_nominal = 1137500, .sr_errminlimit = 0xF9, .vp_errgain = 0x16}, +}; + + +/* By default VPFORCEUPDATE is the chosen method of voltage scaling */ +static bool voltscale_vpforceupdate = true; + +static inline u32 voltage_read_reg(u8 offset) +{ + return prm_read_mod_reg(volt_mod, offset); +} + +static inline void voltage_write_reg(u8 offset, u32 value) +{ + prm_write_mod_reg(value, volt_mod, offset); +} + +static int check_voltage_domain(int vdd) +{ + if (cpu_is_omap34xx()) { + if ((vdd == VDD1) || (vdd == VDD2)) + return 0; + } + return -EINVAL; +} + +static void vp_latch_vsel(int vp_id) +{ + u32 vpconfig; + unsigned long uvdc; + char vsel; + + uvdc = get_curr_voltage(vp_id); + if (!uvdc) { + pr_warning("%s: unable to find current voltage for VDD %d\n", + __func__, vp_id); + return; + } + vsel = omap_twl_uv_to_vsel(uvdc); + vpconfig = voltage_read_reg(vdd_info[vp_id].vp_offs.vpconfig_reg); + vpconfig &= ~(vdd_info[vp_id].vp_reg.vpconfig_initvoltage_mask | + vdd_info[vp_id].vp_reg.vpconfig_initvdd); + vpconfig |= vsel << vdd_info[vp_id].vp_reg.vpconfig_initvoltage_shift; + + voltage_write_reg(vdd_info[vp_id].vp_offs.vpconfig_reg, vpconfig); + + /* Trigger initVDD value copy to voltage processor */ + voltage_write_reg(vdd_info[vp_id].vp_offs.vpconfig_reg, + (vpconfig | vdd_info[vp_id].vp_reg.vpconfig_initvdd)); + + /* Clear initVDD copy trigger bit */ + voltage_write_reg(vdd_info[vp_id].vp_offs.vpconfig_reg, vpconfig); +} + +/* OMAP3 specific voltage init functions */ +/* + * Intializes the voltage controller registers with the PMIC and board + * specific parameters and voltage setup times for OMAP3. If the board + * file does not populate the voltage controller parameters through + * omap3_pm_init_vc, default values specified in vc_config is used. + */ +static void __init omap3_init_voltagecontroller(void) +{ + voltage_write_reg(OMAP3_PRM_VC_SMPS_SA_OFFSET, + (OMAP3_SRI2C_SLAVE_ADDR << + OMAP3430_PRM_VC_SMPS_SA_SA1_SHIFT) | + (OMAP3_SRI2C_SLAVE_ADDR << + OMAP3430_PRM_VC_SMPS_SA_SA0_SHIFT)); + voltage_write_reg(OMAP3_PRM_VC_SMPS_VOL_RA_OFFSET, + (OMAP3_VDD2_SR_CONTROL_REG << OMAP3430_VOLRA1_SHIFT) | + (OMAP3_VDD1_SR_CONTROL_REG << OMAP3430_VOLRA0_SHIFT)); + voltage_write_reg(OMAP3_PRM_VC_CMD_VAL_0_OFFSET, + (vc_config.vdd0_on << OMAP3430_VC_CMD_ON_SHIFT) | + (vc_config.vdd0_onlp << OMAP3430_VC_CMD_ONLP_SHIFT) | + (vc_config.vdd0_ret << OMAP3430_VC_CMD_RET_SHIFT) | + (vc_config.vdd0_off << OMAP3430_VC_CMD_OFF_SHIFT)); + voltage_write_reg(OMAP3_PRM_VC_CMD_VAL_1_OFFSET, + (vc_config.vdd1_on << OMAP3430_VC_CMD_ON_SHIFT) | + (vc_config.vdd1_onlp << OMAP3430_VC_CMD_ONLP_SHIFT) | + (vc_config.vdd1_ret << OMAP3430_VC_CMD_RET_SHIFT) | + (vc_config.vdd1_off << OMAP3430_VC_CMD_OFF_SHIFT)); + voltage_write_reg(OMAP3_PRM_VC_CH_CONF_OFFSET, + OMAP3430_CMD1 | OMAP3430_RAV1); + voltage_write_reg(OMAP3_PRM_VC_I2C_CFG_OFFSET, + OMAP3430_MCODE_SHIFT | OMAP3430_HSEN); + /* Write setup times */ + voltage_write_reg(OMAP3_PRM_CLKSETUP_OFFSET, vc_config.clksetup); + voltage_write_reg(OMAP3_PRM_VOLTSETUP1_OFFSET, + (vc_config.voltsetup_time2 << + OMAP3430_SETUP_TIME2_SHIFT) | + (vc_config.voltsetup_time1 << + OMAP3430_SETUP_TIME1_SHIFT)); + voltage_write_reg(OMAP3_PRM_VOLTOFFSET_OFFSET, vc_config.voltoffset); + voltage_write_reg(OMAP3_PRM_VOLTSETUP2_OFFSET, vc_config.voltsetup2); +} + +/* Sets up all the VDD related info for OMAP3 */ +static void __init omap3_vdd_data_configure(int vdd) +{ + unsigned long curr_volt; + struct omap_volt_data *volt_data; + struct clk *sys_ck; + u32 sys_clk_speed, timeout_val, waittime; + + vdd_info[vdd].vp_offs = omap3_vp_offs[vdd]; + if (vdd == VDD1) { + if (cpu_is_omap3630()) { + vdd_info[vdd].vp_reg.vlimitto_vddmin = + OMAP3630_VP1_VLIMITTO_VDDMIN; + vdd_info[vdd].vp_reg.vlimitto_vddmax = + OMAP3630_VP1_VLIMITTO_VDDMAX; + vdd_info[vdd].volt_data = omap36xx_vdd1_volt_data; + vdd_info[vdd].volt_data_count = + ARRAY_SIZE(omap36xx_vdd1_volt_data); + } else { + vdd_info[vdd].vp_reg.vlimitto_vddmin = + OMAP3430_VP1_VLIMITTO_VDDMIN; + vdd_info[vdd].vp_reg.vlimitto_vddmax = + OMAP3430_VP1_VLIMITTO_VDDMAX; + vdd_info[vdd].volt_data = omap34xx_vdd1_volt_data; + vdd_info[vdd].volt_data_count = + ARRAY_SIZE(omap34xx_vdd1_volt_data); + } + vdd_info[vdd].volt_clk = clk_get(NULL, "dpll1_ck"); + WARN(IS_ERR(vdd_info[vdd].volt_clk), + "unable to get clock for VDD%d\n", vdd + 1); + vdd_info[vdd].opp_type = OPP_MPU; + vdd_info[vdd].vp_reg.tranxdone_status = + OMAP3430_VP1_TRANXDONE_ST; + vdd_info[vdd].cmdval_reg = OMAP3_PRM_VC_CMD_VAL_0_OFFSET; + vdd_info[vdd].vdd_sr_reg = OMAP3_VDD1_SR_CONTROL_REG; + } else if (vdd == VDD2) { + if (cpu_is_omap3630()) { + vdd_info[vdd].vp_reg.vlimitto_vddmin = + OMAP3630_VP2_VLIMITTO_VDDMIN; + vdd_info[vdd].vp_reg.vlimitto_vddmax = + OMAP3630_VP2_VLIMITTO_VDDMAX; + vdd_info[vdd].volt_data = omap36xx_vdd2_volt_data; + vdd_info[vdd].volt_data_count = + ARRAY_SIZE(omap36xx_vdd2_volt_data); + } else { + vdd_info[vdd].vp_reg.vlimitto_vddmin = + OMAP3430_VP2_VLIMITTO_VDDMIN; + vdd_info[vdd].vp_reg.vlimitto_vddmax = + OMAP3430_VP2_VLIMITTO_VDDMAX; + vdd_info[vdd].volt_data = omap34xx_vdd2_volt_data; + vdd_info[vdd].volt_data_count = + ARRAY_SIZE(omap34xx_vdd2_volt_data); + } + vdd_info[vdd].volt_clk = clk_get(NULL, "l3_ick"); + WARN(IS_ERR(vdd_info[vdd].volt_clk), + "unable to get clock for VDD%d\n", vdd + 1); + vdd_info[vdd].opp_type = OPP_L3; + vdd_info[vdd].vp_reg.tranxdone_status = + OMAP3430_VP2_TRANXDONE_ST; + vdd_info[vdd].cmdval_reg = OMAP3_PRM_VC_CMD_VAL_1_OFFSET; + vdd_info[vdd].vdd_sr_reg = OMAP3_VDD2_SR_CONTROL_REG; + } else { + pr_warning("%s: Vdd%d does not exisit in OMAP3\n", + __func__, vdd + 1); + return; + } + + curr_volt = get_curr_voltage(vdd); + if (!curr_volt) { + pr_warning("%s: unable to find current voltage for VDD%d\n", + __func__, vdd + 1); + return; + } + + volt_data = omap_get_volt_data(vdd, curr_volt); + if (IS_ERR(volt_data)) { + pr_warning("%s: Unable to get voltage table for VDD%d at init", + __func__, vdd + 1); + return; + } + /* + * Sys clk rate is require to calculate vp timeout value and + * smpswaittimemin and smpswaittimemax. + */ + sys_ck = clk_get(NULL, "sys_ck"); + if (IS_ERR(sys_ck)) { + pr_warning("%s: Could not get the sys clk to calculate" + "various VP%d params\n", __func__, vdd + 1); + return; + } + sys_clk_speed = clk_get_rate(sys_ck); + clk_put(sys_ck); + /* Divide to avoid overflow */ + sys_clk_speed /= 1000; + + /* Nominal/Reset voltage of the VDD */ + vdd_info[vdd].nominal_volt = 1200000; + + /* VPCONFIG bit fields */ + vdd_info[vdd].vp_reg.vpconfig_erroroffset = + (OMAP3_VP_CONFIG_ERROROFFSET << + OMAP3430_ERROROFFSET_SHIFT); + vdd_info[vdd].vp_reg.vpconfig_errorgain = volt_data->vp_errgain; + vdd_info[vdd].vp_reg.vpconfig_errorgain_mask = OMAP3430_ERRORGAIN_MASK; + vdd_info[vdd].vp_reg.vpconfig_errorgain_shift = + OMAP3430_ERRORGAIN_SHIFT; + vdd_info[vdd].vp_reg.vpconfig_initvoltage_shift = + OMAP3430_INITVOLTAGE_SHIFT; + vdd_info[vdd].vp_reg.vpconfig_initvoltage_mask = + OMAP3430_INITVOLTAGE_MASK; + vdd_info[vdd].vp_reg.vpconfig_timeouten = OMAP3430_TIMEOUTEN; + vdd_info[vdd].vp_reg.vpconfig_initvdd = OMAP3430_INITVDD; + vdd_info[vdd].vp_reg.vpconfig_forceupdate = OMAP3430_FORCEUPDATE; + vdd_info[vdd].vp_reg.vpconfig_vpenable = OMAP3430_VPENABLE; + + /* VSTEPMIN VSTEPMAX bit fields */ + waittime = ((volt_pmic_info.step_size / volt_pmic_info.slew_rate) * + sys_clk_speed) / 1000; + vdd_info[vdd].vp_reg.vstepmin_smpswaittimemin = waittime; + vdd_info[vdd].vp_reg.vstepmax_smpswaittimemax = waittime; + vdd_info[vdd].vp_reg.vstepmin_stepmin = OMAP3_VP_VSTEPMIN_VSTEPMIN; + vdd_info[vdd].vp_reg.vstepmax_stepmax = OMAP3_VP_VSTEPMAX_VSTEPMAX; + vdd_info[vdd].vp_reg.vstepmin_smpswaittimemin_shift = + OMAP3430_SMPSWAITTIMEMIN_SHIFT; + vdd_info[vdd].vp_reg.vstepmax_smpswaittimemax_shift = + OMAP3430_SMPSWAITTIMEMAX_SHIFT; + vdd_info[vdd].vp_reg.vstepmin_stepmin_shift = OMAP3430_VSTEPMIN_SHIFT; + vdd_info[vdd].vp_reg.vstepmax_stepmax_shift = OMAP3430_VSTEPMAX_SHIFT; + + /* VLIMITTO bit fields */ + timeout_val = (sys_clk_speed * OMAP3_VP_VLIMITTO_TIMEOUT_US) / 1000; + vdd_info[vdd].vp_reg.vlimitto_timeout = timeout_val; + vdd_info[vdd].vp_reg.vlimitto_vddmin_shift = OMAP3430_VDDMIN_SHIFT; + vdd_info[vdd].vp_reg.vlimitto_vddmax_shift = OMAP3430_VDDMAX_SHIFT; + vdd_info[vdd].vp_reg.vlimitto_timeout_shift = OMAP3430_TIMEOUT_SHIFT; +} + +/* Generic voltage init functions */ +static void __init init_voltageprocesor(int vp_id) +{ + u32 vpconfig; + + vpconfig = vdd_info[vp_id].vp_reg.vpconfig_erroroffset | + (vdd_info[vp_id].vp_reg.vpconfig_errorgain << + vdd_info[vp_id].vp_reg.vpconfig_errorgain_shift) | + vdd_info[vp_id].vp_reg.vpconfig_timeouten; + + voltage_write_reg(vdd_info[vp_id].vp_offs.vpconfig_reg, vpconfig); + + voltage_write_reg(vdd_info[vp_id].vp_offs.vstepmin_reg, + (vdd_info[vp_id].vp_reg.vstepmin_smpswaittimemin << + vdd_info[vp_id].vp_reg.vstepmin_smpswaittimemin_shift) | + (vdd_info[vp_id].vp_reg.vstepmin_stepmin << + vdd_info[vp_id].vp_reg.vstepmin_stepmin_shift)); + + voltage_write_reg(vdd_info[vp_id].vp_offs.vstepmax_reg, + (vdd_info[vp_id].vp_reg.vstepmax_smpswaittimemax << + vdd_info[vp_id].vp_reg.vstepmax_smpswaittimemax_shift) | + (vdd_info[vp_id].vp_reg.vstepmax_stepmax << + vdd_info[vp_id].vp_reg.vstepmax_stepmax_shift)); + + voltage_write_reg(vdd_info[vp_id].vp_offs.vlimitto_reg, + (vdd_info[vp_id].vp_reg.vlimitto_vddmax << + vdd_info[vp_id].vp_reg.vlimitto_vddmax_shift) | + (vdd_info[vp_id].vp_reg.vlimitto_vddmin << + vdd_info[vp_id].vp_reg.vlimitto_vddmin_shift) | + (vdd_info[vp_id].vp_reg.vlimitto_timeout << + vdd_info[vp_id].vp_reg.vlimitto_timeout_shift)); + + /* Set the init voltage */ + vp_latch_vsel(vp_id); + + vpconfig = voltage_read_reg(vdd_info[vp_id].vp_offs.vpconfig_reg); + /* Force update of voltage */ + voltage_write_reg(vdd_info[vp_id].vp_offs.vpconfig_reg, + (vpconfig | + vdd_info[vp_id].vp_reg.vpconfig_forceupdate)); + /* Clear force bit */ + voltage_write_reg(vdd_info[vp_id].vp_offs.vpconfig_reg, vpconfig); +} + +static void __init vdd_data_configure(int vdd) +{ + if (cpu_is_omap34xx()) + omap3_vdd_data_configure(vdd); +} +static void __init init_voltagecontroller(void) +{ + if (cpu_is_omap34xx()) + omap3_init_voltagecontroller(); +} + +/* + * vc_bypass_scale_voltage - VC bypass method of voltage scaling + */ +static int vc_bypass_scale_voltage(u32 vdd, unsigned long target_volt) +{ + struct omap_volt_data *volt_data; + u32 vc_bypass_value, vc_cmdval, vc_valid, vc_bypass_val_reg_offs; + u32 vp_errgain_val, vc_cmd_on_mask; + u32 loop_cnt = 0, retries_cnt = 0; + u32 smps_steps = 0, smps_delay = 0; + u8 vc_data_shift, vc_slaveaddr_shift, vc_regaddr_shift; + u8 vc_cmd_on_shift; + u8 target_vsel, current_vsel, sr_i2c_slave_addr; + + if (cpu_is_omap34xx()) { + vc_cmd_on_shift = OMAP3430_VC_CMD_ON_SHIFT; + vc_cmd_on_mask = OMAP3430_VC_CMD_ON_MASK; + vc_data_shift = OMAP3430_DATA_SHIFT; + vc_slaveaddr_shift = OMAP3430_SLAVEADDR_SHIFT; + vc_regaddr_shift = OMAP3430_REGADDR_SHIFT; + vc_valid = OMAP3430_VALID; + vc_bypass_val_reg_offs = OMAP3_PRM_VC_BYPASS_VAL_OFFSET; + sr_i2c_slave_addr = OMAP3_SRI2C_SLAVE_ADDR; + } + + /* Get volt_data corresponding to target_volt */ + volt_data = omap_get_volt_data(vdd, target_volt); + if (IS_ERR(volt_data)) { + /* + * If a match is not found but the target voltage is + * is the nominal vdd voltage allow scaling + */ + if (target_volt != vdd_info[vdd].nominal_volt) { + pr_warning("%s: Unable to get voltage table for VDD%d" + "during voltage scaling. Some really Wrong!", + __func__, vdd + 1); + return -ENODATA; + } + volt_data = NULL; + } + + target_vsel = omap_twl_uv_to_vsel(target_volt); + current_vsel = voltage_read_reg(vdd_info[vdd].vp_offs.voltage_reg); + smps_steps = abs(target_vsel - current_vsel); + + /* Setting the ON voltage to the new target voltage */ + vc_cmdval = voltage_read_reg(vdd_info[vdd].cmdval_reg); + vc_cmdval &= ~vc_cmd_on_mask; + vc_cmdval |= (target_vsel << vc_cmd_on_shift); + voltage_write_reg(vdd_info[vdd].cmdval_reg, vc_cmdval); + + /* Setting vp errorgain based on the voltage */ + if (volt_data) { + vp_errgain_val = voltage_read_reg(vdd_info[vdd]. + vp_offs.vpconfig_reg); + vdd_info[vdd].vp_reg.vpconfig_errorgain = + volt_data->vp_errgain; + vp_errgain_val &= ~vdd_info[vdd].vp_reg.vpconfig_errorgain_mask; + vp_errgain_val |= vdd_info[vdd].vp_reg.vpconfig_errorgain << + vdd_info[vdd].vp_reg.vpconfig_errorgain_shift; + voltage_write_reg(vdd_info[vdd].vp_offs.vpconfig_reg, + vp_errgain_val); + } + + vc_bypass_value = (target_vsel << vc_data_shift) | + (vdd_info[vdd].vdd_sr_reg << vc_regaddr_shift) | + (sr_i2c_slave_addr << vc_slaveaddr_shift); + + voltage_write_reg(vc_bypass_val_reg_offs, vc_bypass_value); + + voltage_write_reg(vc_bypass_val_reg_offs, vc_bypass_value | vc_valid); + vc_bypass_value = voltage_read_reg(vc_bypass_val_reg_offs); + + while ((vc_bypass_value & vc_valid) != 0x0) { + loop_cnt++; + if (retries_cnt > 10) { + pr_warning("%s: Loop count exceeded in check SR I2C" + "write during voltgae scaling\n", __func__); + return -ETIMEDOUT; + } + if (loop_cnt > 50) { + retries_cnt++; + loop_cnt = 0; + udelay(10); + } + vc_bypass_value = voltage_read_reg(vc_bypass_val_reg_offs); + } + + /* SMPS slew rate / step size. 2us added as buffer. */ + smps_delay = ((smps_steps * volt_pmic_info.step_size) / + volt_pmic_info.slew_rate) + 2; + udelay(smps_delay); + return 0; +} + +/* VP force update method of voltage scaling */ +static int vp_forceupdate_scale_voltage(u32 vdd, unsigned long target_volt) +{ + struct omap_volt_data *volt_data; + u32 vc_cmd_on_mask, vc_cmdval, vpconfig; + u32 smps_steps = 0, smps_delay = 0; + int timeout = 0; + u8 target_vsel, current_vsel; + u8 vc_cmd_on_shift; + u8 prm_irqst_reg_offs, ocp_mod; + + if (cpu_is_omap34xx()) { + vc_cmd_on_shift = OMAP3430_VC_CMD_ON_SHIFT; + vc_cmd_on_mask = OMAP3430_VC_CMD_ON_MASK; + prm_irqst_reg_offs = OMAP3_PRM_IRQSTATUS_MPU_OFFSET; + ocp_mod = OCP_MOD; + } + + /* Get volt_data corresponding to the target_volt */ + volt_data = omap_get_volt_data(vdd, target_volt); + if (IS_ERR(volt_data)) { + /* + * If a match is not found but the target voltage is + * is the nominal vdd voltage allow scaling + */ + if (target_volt != vdd_info[vdd].nominal_volt) { + pr_warning("%s: Unable to get voltage table for VDD%d" + "during voltage scaling. Some really Wrong!", + __func__, vdd + 1); + return -ENODATA; + } + volt_data = NULL; + } + + target_vsel = omap_twl_uv_to_vsel(target_volt); + current_vsel = voltage_read_reg(vdd_info[vdd].vp_offs.voltage_reg); + smps_steps = abs(target_vsel - current_vsel); + + /* Setting the ON voltage to the new target voltage */ + vc_cmdval = voltage_read_reg(vdd_info[vdd].cmdval_reg); + vc_cmdval &= ~vc_cmd_on_mask; + vc_cmdval |= (target_vsel << vc_cmd_on_shift); + voltage_write_reg(vdd_info[vdd].cmdval_reg, vc_cmdval); + + /* Getting vp errorgain based on the voltage */ + if (volt_data) + vdd_info[vdd].vp_reg.vpconfig_errorgain = + volt_data->vp_errgain; + /* + * Clear all pending TransactionDone interrupt/status. Typical latency + * is <3us + */ + while (timeout++ < VP_TRANXDONE_TIMEOUT) { + prm_write_mod_reg(vdd_info[vdd].vp_reg.tranxdone_status, + ocp_mod, prm_irqst_reg_offs); + if (!(prm_read_mod_reg(ocp_mod, prm_irqst_reg_offs) & + vdd_info[vdd].vp_reg.tranxdone_status)) + break; + udelay(1); + } + + if (timeout >= VP_TRANXDONE_TIMEOUT) { + pr_warning("%s: VP%d TRANXDONE timeout exceeded." + "Voltage change aborted", __func__, vdd + 1); + return -ETIMEDOUT; + } + /* Configure for VP-Force Update */ + vpconfig = voltage_read_reg(vdd_info[vdd].vp_offs.vpconfig_reg); + vpconfig &= ~(vdd_info[vdd].vp_reg.vpconfig_initvdd | + vdd_info[vdd].vp_reg.vpconfig_forceupdate | + vdd_info[vdd].vp_reg.vpconfig_initvoltage_mask | + vdd_info[vdd].vp_reg.vpconfig_errorgain_mask); + vpconfig |= ((target_vsel << + vdd_info[vdd].vp_reg.vpconfig_initvoltage_shift) | + (vdd_info[vdd].vp_reg.vpconfig_errorgain << + vdd_info[vdd].vp_reg.vpconfig_errorgain_shift)); + voltage_write_reg(vdd_info[vdd].vp_offs.vpconfig_reg, vpconfig); + + /* Trigger initVDD value copy to voltage processor */ + vpconfig |= vdd_info[vdd].vp_reg.vpconfig_initvdd; + voltage_write_reg(vdd_info[vdd].vp_offs.vpconfig_reg, vpconfig); + + /* Force update of voltage */ + vpconfig |= vdd_info[vdd].vp_reg.vpconfig_forceupdate; + voltage_write_reg(vdd_info[vdd].vp_offs.vpconfig_reg, vpconfig); + + timeout = 0; + /* + * Wait for TransactionDone. Typical latency is <200us. + * Depends on SMPSWAITTIMEMIN/MAX and voltage change + */ + omap_test_timeout((prm_read_mod_reg(ocp_mod, prm_irqst_reg_offs) & + vdd_info[vdd].vp_reg.tranxdone_status), + VP_TRANXDONE_TIMEOUT, timeout); + + if (timeout >= VP_TRANXDONE_TIMEOUT) + pr_err("%s: VP%d TRANXDONE timeout exceeded." + "TRANXDONE never got set after the voltage update\n", + __func__, vdd + 1); + /* + * Wait for voltage to settle with SW wait-loop. + * SMPS slew rate / step size. 2us added as buffer. + */ + smps_delay = ((smps_steps * volt_pmic_info.step_size) / + volt_pmic_info.slew_rate) + 2; + udelay(smps_delay); + + /* + * Disable TransactionDone interrupt , clear all status, clear + * control registers + */ + timeout = 0; + while (timeout++ < VP_TRANXDONE_TIMEOUT) { + prm_write_mod_reg(vdd_info[vdd].vp_reg.tranxdone_status, + ocp_mod, prm_irqst_reg_offs); + if (!(prm_read_mod_reg(ocp_mod, prm_irqst_reg_offs) & + vdd_info[vdd].vp_reg.tranxdone_status)) + break; + udelay(1); + } + if (timeout >= VP_TRANXDONE_TIMEOUT) + pr_warning("%s: VP%d TRANXDONE timeout exceeded while trying" + "to clear the TRANXDONE status\n", __func__, vdd + 1); + + vpconfig = voltage_read_reg(vdd_info[vdd].vp_offs.vpconfig_reg); + /* Clear initVDD copy trigger bit */ + vpconfig &= ~vdd_info[vdd].vp_reg.vpconfig_initvdd;; + voltage_write_reg(vdd_info[vdd].vp_offs.vpconfig_reg, vpconfig); + /* Clear force bit */ + vpconfig &= ~vdd_info[vdd].vp_reg.vpconfig_forceupdate; + voltage_write_reg(vdd_info[vdd].vp_offs.vpconfig_reg, vpconfig); + + return 0; +} + +/* Public functions */ +/** + * get_curr_vdd_voltage : Gets the current non-auto-compensated voltage + * @vdd : the VDD for which current voltage info is needed + * + * API to get the current non-auto-compensated voltage for a VDD. + * Returns 0 in case of error else returns the current voltage for the VDD. + */ +unsigned long get_curr_voltage(int vdd) +{ + struct omap_opp *opp; + unsigned long freq; + + if (check_voltage_domain(vdd)) { + pr_warning("%s: VDD %d does not exist!\n", __func__, vdd); + return 0; + } + + freq = vdd_info[vdd].volt_clk->rate; + opp = opp_find_freq_ceil(vdd_info[vdd].opp_type, &freq); + if (IS_ERR(opp)) { + pr_warning("%s: Unable to find OPP for VDD%d freq%ld\n", + __func__, vdd + 1, freq); + return 0; + } + + /* + * Use higher freq voltage even if an exact match is not available + * we are probably masking a clock framework bug, so warn + */ + if (unlikely(freq != vdd_info[vdd].volt_clk->rate)) + pr_warning("%s: Available freq %ld != dpll freq %ld.\n", + __func__, freq, vdd_info[vdd].volt_clk->rate); + + return opp_get_voltage(opp); +} + +/** + * omap_voltageprocessor_get_curr_volt : API to get the current vp voltage. + * @vp_id: VP id. + * + * This API returns the current voltage for the specified voltage processor + */ +unsigned long omap_voltageprocessor_get_curr_volt(int vp_id) +{ + u8 curr_vsel; + + curr_vsel = voltage_read_reg(vdd_info[vp_id].vp_offs.voltage_reg); + return omap_twl_vsel_to_uv(curr_vsel); +} + +/** + * omap_voltageprocessor_enable : API to enable a particular VP + * @vp_id : The id of the VP to be enable. + * + * This API enables a particular voltage processor. Needed by the smartreflex + * class drivers. + */ +void omap_voltageprocessor_enable(int vp_id) +{ + u32 vpconfig; + + if (check_voltage_domain(vp_id)) { + pr_warning("%s: VDD %d does not exist!\n", + __func__, vp_id + 1); + return; + } + + /* If VP is already enabled, do nothing. Return */ + if (voltage_read_reg(vdd_info[vp_id].vp_offs.vpconfig_reg) & + vdd_info[vp_id].vp_reg.vpconfig_vpenable) + return; + /* + * This latching is required only if VC bypass method is used for + * voltage scaling during dvfs. + */ + if (!voltscale_vpforceupdate) + vp_latch_vsel(vp_id); + + vpconfig = voltage_read_reg(vdd_info[vp_id].vp_offs.vpconfig_reg); + /* Enable VP */ + voltage_write_reg(vdd_info[vp_id].vp_offs.vpconfig_reg, + vpconfig | + vdd_info[vp_id].vp_reg.vpconfig_vpenable); +} + +/** + * omap_voltageprocessor_disable : API to disable a particular VP + * @vp_id : The id of the VP to be disable. + * + * This API disables a particular voltage processor. Needed by the smartreflex + * class drivers. + */ +void omap_voltageprocessor_disable(int vp_id) +{ + u32 vpconfig; + int timeout; + + if (check_voltage_domain(vp_id)) { + pr_warning("%s: VDD %d does not exist!\n", + __func__, vp_id + 1); + return; + } + + /* If VP is already disabled, do nothing. Return */ + if (!(voltage_read_reg(vdd_info[vp_id].vp_offs.vpconfig_reg) & + vdd_info[vp_id].vp_reg.vpconfig_vpenable)) + return; + + /* Disable VP */ + vpconfig = voltage_read_reg(vdd_info[vp_id].vp_offs.vpconfig_reg); + vpconfig &= ~vdd_info[vp_id].vp_reg.vpconfig_vpenable; + voltage_write_reg(vdd_info[vp_id].vp_offs.vpconfig_reg, vpconfig); + + /* + * Wait for VP idle Typical latency is <2us. Maximum latency is ~100us + */ + omap_test_timeout((voltage_read_reg + (vdd_info[vp_id].vp_offs.status_reg)), + VP_IDLE_TIMEOUT, timeout); + + if (timeout >= VP_IDLE_TIMEOUT) + pr_warning("%s: VP%d idle timedout\n", __func__, vp_id + 1); + return; +} + +/** + * omap_voltage_scale : API to scale voltage of a particular voltage domain. + * @vdd : the voltage domain whose voltage is to be scaled + * @target_vsel : The target voltage of the voltage domain + * @current_vsel : the current voltage of the voltage domain. + * + * This API should be called by the kernel to do the voltage scaling + * for a particular voltage domain during dvfs or any other situation. + */ +int omap_voltage_scale(int vdd, unsigned long target_volt) +{ + int ret = check_voltage_domain(vdd); + if (ret) { + pr_warning("%s: VDD %d does not exist!\n", __func__, vdd + 1); + return ret; + } + + if (voltscale_vpforceupdate) + return vp_forceupdate_scale_voltage(vdd, target_volt); + else + return vc_bypass_scale_voltage(vdd, target_volt); +} + + + +/** + * omap_reset_voltage : Resets the voltage of a particular voltage domain + * to that of the current OPP. + * @vdd : the voltage domain whose voltage is to be reset. + * + * This API finds out the correct voltage the voltage domain is supposed + * to be at and resets the voltage to that level. Should be used expecially + * while disabling any voltage compensation modules. + */ +void omap_reset_voltage(int vdd) +{ + unsigned long target_uvdc; + + if (check_voltage_domain(vdd)) { + pr_warning("%s: VDD %d does not exist!\n", __func__, vdd + 1); + return; + } + + target_uvdc = get_curr_voltage(vdd); + if (!target_uvdc) { + pr_err("%s: unable to find current voltage for VDD %d\n", + __func__, vdd + 1); + return; + } + omap_voltage_scale(vdd, target_uvdc); +} + +/** + * omap_change_voltscale_method : API to change the voltage scaling method. + * @voltscale_method : the method to be used for voltage scaling. + * + * This API can be used by the board files to change the method of voltage + * scaling between vpforceupdate and vcbypass. The parameter values are + * defined in voltage.h + */ +void omap_change_voltscale_method(int voltscale_method) +{ + switch (voltscale_method) { + case VOLTSCALE_VPFORCEUPDATE: + voltscale_vpforceupdate = true; + return; + case VOLTSCALE_VCBYPASS: + voltscale_vpforceupdate = false; + return; + default: + pr_warning("%s: Trying to change the method of voltage scaling" + "to an unsupported one!\n", __func__); + } +} + +/** + * omap3_pm_init_vc - polpulates vc_config with values specified in board file + * @setup_vc - the structure with various vc parameters + * + * Updates vc_config with the voltage setup times and other parameters as + * specified in setup_vc. vc_config is later used in init_voltagecontroller + * to initialize the voltage controller registers. Board files should call + * this function with the correct volatge settings corresponding + * the particular PMIC and chip. + */ +void __init omap_voltage_init_vc(struct omap_volt_vc_data *setup_vc) +{ + if (!setup_vc) + return; + + vc_config.clksetup = setup_vc->clksetup; + vc_config.voltsetup_time1 = setup_vc->voltsetup_time1; + vc_config.voltsetup_time2 = setup_vc->voltsetup_time2; + vc_config.voltoffset = setup_vc->voltoffset; + vc_config.voltsetup2 = setup_vc->voltsetup2; + vc_config.vdd0_on = setup_vc->vdd0_on; + vc_config.vdd0_onlp = setup_vc->vdd0_onlp; + vc_config.vdd0_ret = setup_vc->vdd0_ret; + vc_config.vdd0_off = setup_vc->vdd0_off; + vc_config.vdd1_on = setup_vc->vdd1_on; + vc_config.vdd1_onlp = setup_vc->vdd1_onlp; + vc_config.vdd1_ret = setup_vc->vdd1_ret; + vc_config.vdd1_off = setup_vc->vdd1_off; +} + +/** + * omap_get_voltage_table : API to get the voltage table associated with a + * particular voltage domain. + * + * @vdd : the voltage domain id for which the voltage table is required + * @volt_data : the voltage table for the particular vdd which is to be + * populated by this API + * This API populates the voltage table associated with a VDD into the + * passed parameter pointer. Returns the count of distinct voltages + * supported by this vdd. + * + */ +int omap_get_voltage_table(int vdd, struct omap_volt_data **volt_data) +{ + if (!vdd_info) { + pr_err("%s: Voltage driver init not yet happened.Faulting!\n", + __func__); + return 0; + } + *volt_data = vdd_info[vdd].volt_data; + return vdd_info[vdd].volt_data_count; +} + +/** + * omap_get_volt_data : API to get the voltage table entry for a particular + * voltage + * @vdd : the voltage domain id for whose voltage table has to be searched + * @volt : the voltage to be searched in the voltage table + * + * This API searches through the voltage table for the required voltage + * domain and tries to find a matching entry for the passed voltage volt. + * If a matching entry is found volt_data is populated with that entry. + * This API searches only through the non-compensated voltages int the + * voltage table. + * Returns pointer to the voltage table entry corresponding to volt on + * sucess. Returns -ENODATA if no voltage table exisits for the passed voltage + * domain or if there is no matching entry. + */ +struct omap_volt_data *omap_get_volt_data(int vdd, unsigned long volt) +{ + int i, ret; + + ret = check_voltage_domain(vdd); + if (ret) { + pr_warning("%s: VDD %d does not exist!\n", __func__, vdd + 1); + return ERR_PTR(ret); + } + + if (!vdd_info[vdd].volt_data) { + pr_warning("%s: voltage table does not exist for VDD %d\n", + __func__, vdd + 1); + return ERR_PTR(-ENODATA); + } + + for (i = 0; i < vdd_info[vdd].volt_data_count; i++) { + if (vdd_info[vdd].volt_data[i].volt_nominal == volt) + return &vdd_info[vdd].volt_data[i]; + } + + pr_notice("%s: Unable to match the current voltage with the voltage" + "table for VDD %d\n", __func__, vdd + 1); + + return ERR_PTR(-ENODATA); +} + +/** + * omap_voltage_register_pmic : API to register PMIC specific data + * @pmic_info : the structure containing pmic info + * + * This API is to be called by the borad file to specify the pmic specific + * info as present in omap_volt_pmic_info structure. A default pmic info + * table is maintained in the driver volt_pmic_info. If the board file do + * not override the default table using this API, the default values wiil + * be used in the driver. + */ +void omap_voltage_register_pmic(struct omap_volt_pmic_info *pmic_info) +{ + volt_pmic_info.slew_rate = pmic_info->slew_rate; + volt_pmic_info.step_size = pmic_info->step_size; +} + +/** + * omap_voltage_init : Volatage init API which does VP and VC init. + */ +static int __init omap_voltage_init(void) +{ + int i; + + if (!cpu_is_omap34xx()) { + pr_warning("%s: voltage driver support not added\n", __func__); + return 0; + } + + if (cpu_is_omap34xx()) { + volt_mod = OMAP3430_GR_MOD; + vdd_info = omap3_vdd_info; + no_scalable_vdd = OMAP3_NO_SCALABLE_VDD; + } + init_voltagecontroller(); + for (i = 0; i < no_scalable_vdd; i++) { + vdd_data_configure(i); + init_voltageprocesor(i); + } + return 0; +} +arch_initcall(omap_voltage_init); diff --git a/arch/arm/mach-omap2/voltage.h b/arch/arm/mach-omap2/voltage.h new file mode 100644 index 0000000..f2796b2 --- /dev/null +++ b/arch/arm/mach-omap2/voltage.h @@ -0,0 +1,123 @@ +/* + * OMAP Voltage Management Routines + * + * Author: Thara Gopinath <thara@ti.com> + * + * Copyright (C) 2009 Texas Instruments, Inc. + * Thara Gopinath <thara@ti.com> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#ifndef __ARCH_ARM_MACH_OMAP2_VOLTAGE_H +#define __ARCH_ARM_MACH_OMAP2_VOLTAGE_H + +/* VoltageDomain instances */ +#define VDD1 0 +#define VDD2 1 + +#define VOLTSCALE_VPFORCEUPDATE 1 +#define VOLTSCALE_VCBYPASS 2 + +/* Voltage SR Parameters for OMAP3*/ +#define OMAP3_SRI2C_SLAVE_ADDR 0x12 +#define OMAP3_VDD1_SR_CONTROL_REG 0x00 +#define OMAP3_VDD2_SR_CONTROL_REG 0x01 + +/* + * Omap3 VP register specific values. Maybe these need to come from + * board file or PMIC data structure + */ +#define OMAP3_VP_CONFIG_ERROROFFSET 0x00 +#define OMAP3_VP_VSTEPMIN_SMPSWAITTIMEMIN 0x3C +#define OMAP3_VP_VSTEPMIN_VSTEPMIN 0x1 +#define OMAP3_VP_VSTEPMAX_SMPSWAITTIMEMAX 0x3C +#define OMAP3_VP_VSTEPMAX_VSTEPMAX 0x04 +#define OMAP3_VP_VLIMITTO_TIMEOUT_US 0x200 + +/* + * Omap3430 specific VP register values. Maybe these need to come from + * board file or PMIC data structure + */ +#define OMAP3430_VP1_VLIMITTO_VDDMIN 0x14 +#define OMAP3430_VP1_VLIMITTO_VDDMAX 0x42 +#define OMAP3430_VP2_VLIMITTO_VDDMAX 0x2C +#define OMAP3430_VP2_VLIMITTO_VDDMIN 0x18 + +/* + * Omap3630 specific VP register values. Maybe these need to come from + * board file or PMIC data structure + */ +#define OMAP3630_VP1_VLIMITTO_VDDMIN 0x18 +#define OMAP3630_VP1_VLIMITTO_VDDMAX 0x3C +#define OMAP3630_VP2_VLIMITTO_VDDMIN 0x18 +#define OMAP3630_VP2_VLIMITTO_VDDMAX 0x30 + +/* TODO OMAP4 VP register values if the same file is used for OMAP4*/ + +/** + * omap_volt_data - Omap voltage specific data. + * + * @voltage_nominal : The possible voltage value in uV + * @sr_nvalue : Smartreflex N target value at voltage <voltage> + * @sr_errminlimit : Error min limit value for smartreflex. This value + * differs at differnet opp and thus is linked + * with voltage. + * @vp_errorgain : Error gain value for the voltage processor. This + * field also differs according to the voltage/opp. + */ +struct omap_volt_data { + u32 volt_nominal; + u32 sr_nvalue; + u8 sr_errminlimit; + u8 vp_errgain; +}; + +/** + * omap_volt_pmic_info - PMIC specific data required by the voltage driver. + * + * @slew_rate : PMIC slew rate (in uv/us) + * @step_size : PMIC voltage step size (in uv) + */ +struct omap_volt_pmic_info { + int slew_rate; + int step_size; +}; + +/* Various voltage controller related info */ +struct omap_volt_vc_data { + u16 clksetup; + u16 voltsetup_time1; + u16 voltsetup_time2; + u16 voltoffset; + u16 voltsetup2; +/* PRM_VC_CMD_VAL_0 specific bits */ + u16 vdd0_on; + u16 vdd0_onlp; + u16 vdd0_ret; + u16 vdd0_off; +/* PRM_VC_CMD_VAL_1 specific bits */ + u16 vdd1_on; + u16 vdd1_onlp; + u16 vdd1_ret; + u16 vdd1_off; +}; + +unsigned long omap_voltageprocessor_get_curr_volt(int vp_id); +void omap_voltageprocessor_enable(int vp_id); +void omap_voltageprocessor_disable(int vp_id); +int omap_voltage_scale(int vdd, unsigned long target_volt); +void omap_reset_voltage(int vdd); +int omap_get_voltage_table(int vdd, struct omap_volt_data **volt_data); +struct omap_volt_data *omap_get_volt_data(int vdd, unsigned long volt); +void omap_voltage_register_pmic(struct omap_volt_pmic_info *pmic_info); +unsigned long get_curr_voltage(int vdd); +#ifdef CONFIG_PM +void omap_voltage_init_vc(struct omap_volt_vc_data *setup_vc); +#else +static inline void omap_voltage_init_vc(struct omap_volt_vc_data *setup_vc) {} +#endif + +#endif -- 1.7.0.rc1.33.g07cf0f ^ permalink raw reply related [flat|nested] 19+ messages in thread
* [PATCH 2/8] OMAP3: PM: Adding smartreflex driver support. 2010-05-29 16:32 ` [PATCH 1/8] OMAP3: PM: Adding voltage driver support for OMAP3 Thara Gopinath @ 2010-05-29 16:32 ` Thara Gopinath 2010-05-29 16:32 ` [PATCH 3/8] OMAP3: PM: Adding smartreflex device file Thara Gopinath 2010-06-23 20:13 ` [PATCH 2/8] OMAP3: PM: Adding smartreflex driver support Kevin Hilman 2010-06-23 18:42 ` [PATCH 1/8] OMAP3: PM: Adding voltage driver support for OMAP3 Kevin Hilman 2010-06-23 18:57 ` Kevin Hilman 2 siblings, 2 replies; 19+ messages in thread From: Thara Gopinath @ 2010-05-29 16:32 UTC (permalink / raw) To: linux-omap Cc: khilman, paul, b-cousson, vishwanath.bs, sawant, Thara Gopinath SmartReflex modules do adaptive voltage control for real-time voltage adjustments. With Smartreflex the power supply voltage can be adapted to the silicon performance(manufacturing process, temperature induced performance, age induced performance etc). There are differnet classes of smartreflex implementation. Class-0: Manufacturing Test Calibration Class-1: Boot-Time Software Calibration Class-2: Continuous Software Calibration Class-3: Continuous Hardware Calibration Class-4: Fully Integrated Power Management OMAP3 has two smartreflex modules one associated with VDD1 and the other associated with VDD2. This patch adds support for smartreflex driver. The driver is designed for Class-1 , Class-2 and Class-3 support and is a platform driver. Smartreflex driver can be enabled through a Kconfig option "SmartReflex support" under "System type"->"TI OMAP implementations" menu. Smartreflex autocompensation feature can be enabled runtime through a debug fs option. To enable smartreflex autocompensation feature echo 1 > /debugfs/pm_debug/Smartreflex/SR<X>/autocomp To disable smartreflex autocompensation feature echo 0 > /debugfs/pm_debug/Smartreflex/SR<X>/autocomp This patch contains code originally in linux omap pm branch. Major contributors to this driver are Lesly A M, Rajendra Nayak, Kalle Jokiniemi, Paul Walmsley, Nishant Menon, Kevin Hilman. Signed-off-by: Thara Gopinath <thara@ti.com> --- arch/arm/mach-omap2/Makefile | 1 + arch/arm/mach-omap2/pm-debug.c | 3 +- arch/arm/mach-omap2/smartreflex.c | 934 +++++++++++++++++++++++++ arch/arm/plat-omap/Kconfig | 32 + arch/arm/plat-omap/include/plat/smartreflex.h | 275 ++++++++ 5 files changed, 1244 insertions(+), 1 deletions(-) create mode 100644 arch/arm/mach-omap2/smartreflex.c create mode 100644 arch/arm/plat-omap/include/plat/smartreflex.h diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile index e4c660d..9ff9869 100644 --- a/arch/arm/mach-omap2/Makefile +++ b/arch/arm/mach-omap2/Makefile @@ -49,6 +49,7 @@ obj-$(CONFIG_ARCH_OMAP2) += sleep24xx.o obj-$(CONFIG_ARCH_OMAP3) += pm34xx.o sleep34xx.o cpuidle34xx.o \ voltage.o obj-$(CONFIG_PM_DEBUG) += pm-debug.o +obj-$(CONFIG_OMAP_SMARTREFLEX) += smartreflex.o AFLAGS_sleep24xx.o :=-Wa,-march=armv6 AFLAGS_sleep34xx.o :=-Wa,-march=armv7-a diff --git a/arch/arm/mach-omap2/pm-debug.c b/arch/arm/mach-omap2/pm-debug.c index 6cac981..4280006 100644 --- a/arch/arm/mach-omap2/pm-debug.c +++ b/arch/arm/mach-omap2/pm-debug.c @@ -162,7 +162,7 @@ void omap2_pm_dump(int mode, int resume, unsigned int us) static void pm_dbg_regset_store(u32 *ptr); -struct dentry *pm_dbg_dir; +struct dentry *pm_dbg_dir, *pm_dbg_main_dir; static int pm_dbg_init_done; @@ -606,6 +606,7 @@ static int __init pm_dbg_init(void) &sleep_while_idle, &pm_dbg_option_fops); (void) debugfs_create_file("wakeup_timer_seconds", S_IRUGO | S_IWUGO, d, &wakeup_timer_seconds, &pm_dbg_option_fops); + pm_dbg_main_dir = d; pm_dbg_init_done = 1; return 0; diff --git a/arch/arm/mach-omap2/smartreflex.c b/arch/arm/mach-omap2/smartreflex.c new file mode 100644 index 0000000..74b7c0c --- /dev/null +++ b/arch/arm/mach-omap2/smartreflex.c @@ -0,0 +1,934 @@ +/* + * OMAP SmartReflex Voltage Control + * + * Author: Thara Gopinath <thara@ti.com> + * + * Copyright (C) 2010 Texas Instruments, Inc. + * Thara Gopinath <thara@ti.com> + * + * Copyright (C) 2008 Nokia Corporation + * Kalle Jokiniemi + * + * Copyright (C) 2007 Texas Instruments, Inc. + * Lesly A M <x0080970@ti.com> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#include <linux/init.h> +#include <linux/interrupt.h> +#include <linux/module.h> +#include <linux/err.h> +#include <linux/clk.h> +#include <linux/kobject.h> +#include <linux/i2c/twl.h> +#include <linux/io.h> +#include <linux/list.h> +#include <linux/debugfs.h> +#include <linux/delay.h> +#include <linux/slab.h> + +#include <plat/omap_hwmod.h> +#include <plat/omap_device.h> +#include <plat/common.h> +#include <plat/smartreflex.h> + +#include "voltage.h" + +#define SMARTREFLEX_NAME_LEN 16 +#define SR_DISABLE_TIMEOUT 200 + +#ifdef CONFIG_PM_DEBUG +struct dentry *sr_dbg_dir; +#endif + +struct omap_sr { + int srid; + int is_sr_enable; + int is_autocomp_active; + int sr_ip_type; + u32 clk_length; + u32 err_weight; + u32 err_minlimit; + u32 err_maxlimit; + u32 accum_data; + u32 senn_avgweight; + u32 senp_avgweight; + unsigned int irq; + void __iomem *base; + struct platform_device *pdev; + struct list_head node; +}; + +/* sr_list contains all the instances of smartreflex module */ +static LIST_HEAD(sr_list); + +static struct omap_smartreflex_class_data *sr_class; +static struct omap_smartreflex_pmic_data *sr_pmic_data; + +static inline void sr_write_reg(struct omap_sr *sr, unsigned offset, u32 value) +{ + __raw_writel(value, (sr->base + offset)); +} + +static inline void sr_modify_reg(struct omap_sr *sr, unsigned offset, u32 mask, + u32 value) +{ + u32 reg_val; + u32 errconfig_offs, errconfig_mask; + + reg_val = __raw_readl(sr->base + offset); + reg_val &= ~mask; + /* + * Smartreflex error config register is special as it contains + * certain status bits which if written a 1 into means a clear + * of those bits. So in order to make sure no accidental write of + * 1 happens to those status bits, do a clear of them in the read + * value. Now if there is an actual reguest to write to these bits + * they will be set in the nex step. + */ + if (sr->sr_ip_type == SR_TYPE_V1) { + errconfig_offs = ERRCONFIG_V1; + errconfig_mask = ERRCONFIG_STATUS_V1_MASK; + } else if (sr->sr_ip_type == SR_TYPE_V2) { + errconfig_offs = ERRCONFIG_V2; + errconfig_mask = ERRCONFIG_VPBOUNDINTST_V2; + } + if (offset == errconfig_offs) + reg_val &= ~errconfig_mask; + + reg_val |= value; + + __raw_writel(reg_val, (sr->base + offset)); +} + +static inline u32 sr_read_reg(struct omap_sr *sr, unsigned offset) +{ + return __raw_readl(sr->base + offset); +} + +static struct omap_sr *_sr_lookup(int srid) +{ + struct omap_sr *sr_info, *temp_sr_info; + + sr_info = NULL; + list_for_each_entry(temp_sr_info, &sr_list, node) { + if (srid == temp_sr_info->srid) { + sr_info = temp_sr_info; + break; + } + } + return sr_info; +} + +static irqreturn_t sr_omap_isr(int irq, void *data) +{ + struct omap_sr *sr_info = (struct omap_sr *)data; + u32 status = 0; + + if (sr_info->sr_ip_type == SR_TYPE_V1) { + /* Read the status bits */ + status = sr_read_reg(sr_info, ERRCONFIG_V1); + /* Clear them by writing back */ + sr_write_reg(sr_info, ERRCONFIG_V1, status); + } else if (sr_info->sr_ip_type == SR_TYPE_V2) { + /* Read the status bits */ + sr_read_reg(sr_info, IRQSTATUS); + /* Clear them by writing back */ + sr_write_reg(sr_info, IRQSTATUS, status); + } + + /* Call the class driver notify function if registered*/ + if (sr_class->class_type == SR_CLASS2 && sr_class->notify) + sr_class->notify(sr_info->srid, status); + + return IRQ_HANDLED; +} + +static void sr_set_clk_length(struct omap_sr *sr) +{ + struct clk *sys_ck; + u32 sys_clk_speed; + + sys_ck = clk_get(NULL, "sys_ck"); + sys_clk_speed = clk_get_rate(sys_ck); + clk_put(sys_ck); + + switch (sys_clk_speed) { + case 12000000: + sr->clk_length = SRCLKLENGTH_12MHZ_SYSCLK; + break; + case 13000000: + sr->clk_length = SRCLKLENGTH_13MHZ_SYSCLK; + break; + case 19200000: + sr->clk_length = SRCLKLENGTH_19MHZ_SYSCLK; + break; + case 26000000: + sr->clk_length = SRCLKLENGTH_26MHZ_SYSCLK; + break; + case 38400000: + sr->clk_length = SRCLKLENGTH_38MHZ_SYSCLK; + break; + default: + dev_err(&sr->pdev->dev, "%s: Invalid sysclk value: %d\n", + __func__, sys_clk_speed); + break; + } +} + +static void sr_set_regfields(struct omap_sr *sr) +{ + /* + * For time being these values are defined in smartreflex.h + * and populated during init. May be they can be moved to board + * file or pmic specific data structure. In that case these structure + * fields will have to be populated using the pdata or pmic structure. + */ + if (cpu_is_omap34xx()) { + sr->err_weight = OMAP3430_SR_ERRWEIGHT; + sr->err_maxlimit = OMAP3430_SR_ERRMAXLIMIT; + sr->accum_data = OMAP3430_SR_ACCUMDATA; + if (sr->srid == VDD1) { + sr->senn_avgweight = OMAP3430_SR1_SENNAVGWEIGHT; + sr->senp_avgweight = OMAP3430_SR1_SENPAVGWEIGHT; + } else { + sr->senn_avgweight = OMAP3430_SR2_SENNAVGWEIGHT; + sr->senp_avgweight = OMAP3430_SR2_SENPAVGWEIGHT; + } + } + /* TODO: 3630 and Omap4 specific bit field values */ +} + +static void sr_start_vddautocomp(struct omap_sr *sr) +{ + if (!sr_class || !(sr_class->enable) || !(sr_class->configure)) { + dev_warn(&sr->pdev->dev, + "%s: smartreflex class driver not registered\n", + __func__); + return; + } + + sr->is_autocomp_active = 1; + if (sr_class->enable(sr->srid)) + sr->is_autocomp_active = 0; +} + +static void sr_stop_vddautocomp(struct omap_sr *sr) +{ + if (!sr_class || !(sr_class->disable)) { + dev_warn(&sr->pdev->dev, + "%s: smartreflex class driver not registered\n", + __func__); + return; + } + + if (sr->is_autocomp_active == 1) { + sr_class->disable(sr->srid, 1); + sr->is_autocomp_active = 0; + } +} + +/* + * This function handles the intializations which have to be done + * only when both sr device and class driver regiter has + * completed. This will be attempted to be called from both sr class + * driver register and sr device intializtion API's. Only one call + * will ultimately succeed. + * + * Currenly this function registers interrrupt handler for a particular SR + * if smartreflex class driver is already registered and has + * requested for interrupts and the SR interrupt line in present. + */ +static int sr_late_init(struct omap_sr *sr_info) +{ + char name[SMARTREFLEX_NAME_LEN + 1]; + struct omap_sr_data *pdata = sr_info->pdev->dev.platform_data; + int ret = 0; + + if (sr_class->class_type == SR_CLASS2 && + sr_class->notify_flags && sr_info->irq) { + + sprintf(name, "sr%d", sr_info->srid); + ret = request_irq(sr_info->irq, sr_omap_isr, + IRQF_DISABLED, name, (void *)sr_info); + if (ret) { + struct resource *mem; + + iounmap(sr_info->base); + mem = platform_get_resource(sr_info->pdev, + IORESOURCE_MEM, 0); + release_mem_region(mem->start, resource_size(mem)); + list_del(&sr_info->node); + kfree(sr_info); + + dev_err(&sr_info->pdev->dev, "%s: ERROR in registering" + "interrupt handler. Smartreflex will" + "not function as desired\n", __func__); + return ret; + } + } + + if (pdata->enable_on_init) + sr_start_vddautocomp(sr_info); + + return ret; +} + +static void sr_v1_disable(struct omap_sr *sr) +{ + int timeout = 0; + + /* Enable MCUDisableAcknowledge interrupt */ + sr_modify_reg(sr, ERRCONFIG_V1, + ERRCONFIG_MCUDISACKINTEN, ERRCONFIG_MCUDISACKINTEN); + + /* SRCONFIG - disable SR */ + sr_modify_reg(sr, SRCONFIG, SRCONFIG_SRENABLE, 0x0); + + /* Disable all other SR interrupts and clear the status */ + sr_modify_reg(sr, ERRCONFIG_V1, + (ERRCONFIG_MCUACCUMINTEN | ERRCONFIG_MCUVALIDINTEN | + ERRCONFIG_MCUBOUNDINTEN | ERRCONFIG_VPBOUNDINTEN_V1), + (ERRCONFIG_MCUACCUMINTST | ERRCONFIG_MCUVALIDINTST | + ERRCONFIG_MCUBOUNDINTST | + ERRCONFIG_VPBOUNDINTST_V1)); + + /* + * Wait for SR to be disabled. + * wait until ERRCONFIG.MCUDISACKINTST = 1. Typical latency is 1us. + */ + omap_test_timeout((sr_read_reg(sr, ERRCONFIG_V1) & + ERRCONFIG_MCUDISACKINTST), SR_DISABLE_TIMEOUT, + timeout); + + if (timeout >= SR_DISABLE_TIMEOUT) + dev_warn(&sr->pdev->dev, "%s: Smartreflex disable timedout\n", + __func__); + + /* Disable MCUDisableAcknowledge interrupt & clear pending interrupt */ + sr_modify_reg(sr, ERRCONFIG_V1, ERRCONFIG_MCUDISACKINTEN, + ERRCONFIG_MCUDISACKINTST); +} + +static void sr_v2_disable(struct omap_sr *sr) +{ + int timeout = 0; + + /* Enable MCUDisableAcknowledge interrupt */ + sr_write_reg(sr, IRQENABLE_SET, IRQENABLE_MCUDISABLEACKINT); + + /* SRCONFIG - disable SR */ + sr_modify_reg(sr, SRCONFIG, SRCONFIG_SRENABLE, 0x0); + + /* Disable all other SR interrupts and clear the status */ + sr_modify_reg(sr, ERRCONFIG_V2, ERRCONFIG_VPBOUNDINTEN_V2, + ERRCONFIG_VPBOUNDINTST_V2); + sr_write_reg(sr, IRQENABLE_CLR, (IRQENABLE_MCUACCUMINT | + IRQENABLE_MCUVALIDINT | + IRQENABLE_MCUBOUNDSINT)); + sr_write_reg(sr, IRQSTATUS, (IRQSTATUS_MCUACCUMINT | + IRQSTATUS_MCVALIDINT | + IRQSTATUS_MCBOUNDSINT)); + + /* + * Wait for SR to be disabled. + * wait until IRQSTATUS.MCUDISACKINTST = 1. Typical latency is 1us. + */ + omap_test_timeout((sr_read_reg(sr, IRQSTATUS) & + IRQSTATUS_MCUDISABLEACKINT), SR_DISABLE_TIMEOUT, + timeout); + + if (timeout >= SR_DISABLE_TIMEOUT) + dev_warn(&sr->pdev->dev, "%s: Smartreflex disable timedout\n", + __func__); + + /* Disable MCUDisableAcknowledge interrupt & clear pending interrupt */ + sr_write_reg(sr, IRQENABLE_CLR, IRQENABLE_MCUDISABLEACKINT); + sr_write_reg(sr, IRQSTATUS, IRQSTATUS_MCUDISABLEACKINT); +} + +/* Public Functions */ + +/** + * sr_configure_errgen : Configures the smrtreflex to perform AVS using the + * error generator module. + * @srid - The id of the sr module to be configured. + * + * This API is to be called from the smartreflex class driver to + * configure the error generator module inside the smartreflex module. + * SR settings if using the ERROR module inside Smartreflex. + * SR CLASS 3 by default uses only the ERROR module where as + * SR CLASS 2 can choose between ERROR module and MINMAXAVG + * module. Returns 0 on success and error value in case of failure. + */ +int sr_configure_errgen(int srid) +{ + u32 sr_config, sr_errconfig, errconfig_offs, vpboundint_en; + u32 vpboundint_st, senp_en , senn_en; + u8 senp_shift, senn_shift; + struct omap_sr *sr = _sr_lookup(srid); + struct omap_sr_data *pdata = sr->pdev->dev.platform_data; + + if (!sr) { + pr_warning("%s: omap_sr struct for SR%d not found\n", + __func__, srid + 1); + return -EINVAL; + } + + if (!sr->clk_length) + sr_set_clk_length(sr); + senp_en = pdata->senp_mod; + senn_en = pdata->senn_mod; + sr_config = (sr->clk_length << SRCONFIG_SRCLKLENGTH_SHIFT) | + SRCONFIG_SENENABLE | SRCONFIG_ERRGEN_EN; + if (sr->sr_ip_type == SR_TYPE_V1) { + sr_config |= SRCONFIG_DELAYCTRL; + senn_shift = SRCONFIG_SENNENABLE_V1_SHIFT; + senp_shift = SRCONFIG_SENPENABLE_V1_SHIFT; + errconfig_offs = ERRCONFIG_V1; + vpboundint_en = ERRCONFIG_VPBOUNDINTEN_V1; + vpboundint_st = ERRCONFIG_VPBOUNDINTST_V1; + } else if (sr->sr_ip_type == SR_TYPE_V2) { + senn_shift = SRCONFIG_SENNENABLE_V2_SHIFT; + senp_shift = SRCONFIG_SENPENABLE_V2_SHIFT; + errconfig_offs = ERRCONFIG_V2; + vpboundint_en = ERRCONFIG_VPBOUNDINTEN_V2; + vpboundint_st = ERRCONFIG_VPBOUNDINTST_V2; + } else { + dev_err(&sr->pdev->dev, "%s: Trying to Configure smartreflex" + "module without specifying the ip\n", __func__); + return -EINVAL; + } + sr_config |= ((senn_en << senn_shift) | (senp_en << senp_shift)); + sr_write_reg(sr, SRCONFIG, sr_config); + sr_errconfig = (sr->err_weight << ERRCONFIG_ERRWEIGHT_SHIFT) | + (sr->err_maxlimit << ERRCONFIG_ERRMAXLIMIT_SHIFT) | + (sr->err_minlimit << ERRCONFIG_ERRMINLIMIT_SHIFT); + sr_modify_reg(sr, errconfig_offs, (SR_ERRWEIGHT_MASK | + SR_ERRMAXLIMIT_MASK | SR_ERRMINLIMIT_MASK), + sr_errconfig); + /* Enabling the interrupts if the ERROR module is used */ + sr_modify_reg(sr, errconfig_offs, + vpboundint_en, (vpboundint_en | vpboundint_st)); + return 0; +} + +/** + * sr_configure_minmax : Configures the smrtreflex to perform AVS using the + * minmaxavg module. + * @srid - The id of the sr module to be configured. + * + * This API is to be called from the smartreflex class driver to + * configure the minmaxavg module inside the smartreflex module. + * SR settings if using the ERROR module inside Smartreflex. + * SR CLASS 3 by default uses only the ERROR module where as + * SR CLASS 2 can choose between ERROR module and MINMAXAVG + * module. Returns 0 on success and error value in case of failure. + */ +int sr_configure_minmax(int srid) +{ + u32 sr_config, sr_avgwt; + u32 senp_en , senn_en; + u8 senp_shift, senn_shift; + struct omap_sr *sr = _sr_lookup(srid); + struct omap_sr_data *pdata = sr->pdev->dev.platform_data; + + if (!sr) { + pr_warning("%s: omap_sr struct for SR%d not found\n", + __func__, srid + 1); + return -EINVAL; + } + + if (!sr->clk_length) + sr_set_clk_length(sr); + + senp_en = pdata->senp_mod; + senn_en = pdata->senn_mod; + sr_config = (sr->clk_length << SRCONFIG_SRCLKLENGTH_SHIFT) | + SRCONFIG_SENENABLE | + (sr->accum_data << SRCONFIG_ACCUMDATA_SHIFT); + if (sr->sr_ip_type == SR_TYPE_V1) { + sr_config |= SRCONFIG_DELAYCTRL; + senn_shift = SRCONFIG_SENNENABLE_V1_SHIFT; + senp_shift = SRCONFIG_SENPENABLE_V1_SHIFT; + } else if (sr->sr_ip_type == SR_TYPE_V2) { + senn_shift = SRCONFIG_SENNENABLE_V2_SHIFT; + senp_shift = SRCONFIG_SENPENABLE_V2_SHIFT; + } else { + dev_err(&sr->pdev->dev, "%s: Trying to Configure smartreflex" + "module without specifying the ip\n", __func__); + return -EINVAL; + } + sr_config |= ((senn_en << senn_shift) | (senp_en << senp_shift)); + sr_write_reg(sr, SRCONFIG, sr_config); + sr_avgwt = (sr->senp_avgweight << AVGWEIGHT_SENPAVGWEIGHT_SHIFT) | + (sr->senn_avgweight << AVGWEIGHT_SENNAVGWEIGHT_SHIFT); + sr_write_reg(sr, AVGWEIGHT, sr_avgwt); + /* + * Enabling the interrupts if MINMAXAVG module is used. + * TODO: check if all the interrupts are mandatory + */ + if (sr->sr_ip_type == SR_TYPE_V1) { + sr_modify_reg(sr, ERRCONFIG_V1, + (ERRCONFIG_MCUACCUMINTEN | ERRCONFIG_MCUVALIDINTEN | + ERRCONFIG_MCUBOUNDINTEN), + (ERRCONFIG_MCUACCUMINTEN | ERRCONFIG_MCUACCUMINTST | + ERRCONFIG_MCUVALIDINTEN | ERRCONFIG_MCUVALIDINTST | + ERRCONFIG_MCUBOUNDINTEN | ERRCONFIG_MCUBOUNDINTST)); + } else if (sr->sr_ip_type == SR_TYPE_V2) { + sr_write_reg(sr, IRQSTATUS, + IRQSTATUS_MCUACCUMINT | IRQSTATUS_MCVALIDINT | + IRQSTATUS_MCBOUNDSINT | IRQSTATUS_MCUDISABLEACKINT); + sr_write_reg(sr, IRQENABLE_SET, + IRQENABLE_MCUACCUMINT | IRQENABLE_MCUVALIDINT | + IRQENABLE_MCUBOUNDSINT | IRQENABLE_MCUDISABLEACKINT); + } + return 0; +} + +/** + * sr_enable : Enables the smartreflex module. + * @srid - The id of the sr module to be enabled. + * @volt - The voltage at which the Voltage domain associated with + * the smartreflex module is operating at. This is required only to program + * the correct Ntarget value. + * + * This API is to be called from the smartreflex class driver to + * enable a smartreflex module. Returns 0 on success. Returns error + * value if the voltage passed is wrong or if ntarget value is wrong. + */ +int sr_enable(int srid, unsigned long volt) +{ + u32 nvalue_reciprocal; + struct omap_volt_data *volt_data; + struct omap_sr *sr = _sr_lookup(srid); + int ret; + + if (!sr) { + pr_warning("%s: omap_sr struct for SR%d not found\n", + __func__, srid + 1); + return -EINVAL; + } + + volt_data = omap_get_volt_data(sr->srid, volt); + + if (IS_ERR(volt_data)) { + dev_warn(&sr->pdev->dev, "%s: Unable to get voltage table" + " for nominal voltage %ld\n", __func__, volt); + return -ENODATA; + } + + nvalue_reciprocal = volt_data->sr_nvalue; + + if (!nvalue_reciprocal) { + dev_warn(&sr->pdev->dev, "%s: NVALUE = 0 at voltage %ld\n", + __func__, volt); + return -ENODATA; + } + + /* errminlimit is opp dependent and hence linked to voltage */ + sr->err_minlimit = volt_data->sr_errminlimit; + + /* Enable the clocks */ + if (!sr->is_sr_enable) { + struct omap_sr_data *pdata = + sr->pdev->dev.platform_data; + if (pdata->device_enable) { + ret = pdata->device_enable(sr->pdev); + if (ret) + return ret; + } else { + dev_warn(&sr->pdev->dev, "%s: Not able to turn on SR" + "clocks during enable. So returning\n", + __func__); + return -EPERM; + } + sr->is_sr_enable = 1; + } + + /* Check if SR is already enabled. If yes do nothing */ + if (sr_read_reg(sr, SRCONFIG) & SRCONFIG_SRENABLE) + return 0; + + /* Configure SR */ + ret = sr_class->configure(sr->srid); + if (ret) + return ret; + + sr_write_reg(sr, NVALUERECIPROCAL, nvalue_reciprocal); + /* SRCONFIG - enable SR */ + sr_modify_reg(sr, SRCONFIG, SRCONFIG_SRENABLE, SRCONFIG_SRENABLE); + return 0; +} + +/** + * sr_disable : Disables the smartreflex module. + * @srid - The id of the sr module to be disabled. + * + * This API is to be called from the smartreflex class driver to + * disable a smartreflex module. + */ +void sr_disable(int srid) +{ + struct omap_sr *sr = _sr_lookup(srid); + struct omap_sr_data *pdata; + + if (!sr) { + pr_warning("%s: omap_sr struct for SR%d not found\n", + __func__, srid + 1); + return; + } + + /* Check if SR clocks are already disabled. If yes do nothing */ + if (!sr->is_sr_enable) + return; + + /* Check if SR is already disabled. If yes just disable the clocks */ + if (!(sr_read_reg(sr, SRCONFIG) & SRCONFIG_SRENABLE)) + goto disable_clocks; + + if (sr->sr_ip_type == SR_TYPE_V1) + sr_v1_disable(sr); + else if (sr->sr_ip_type == SR_TYPE_V2) + sr_v2_disable(sr); + +disable_clocks: + pdata = sr->pdev->dev.platform_data; + if (pdata->device_idle) { + pdata->device_idle(sr->pdev); + } else { + dev_warn(&sr->pdev->dev, "%s: Unable to turn off clocks" + "during SR disable\n", __func__); + return; + } + sr->is_sr_enable = 0; +} + +/** + * omap_smartreflex_enable : API to enable SR clocks and to call into the + * registered smartreflex class enable API. + * @srid - The id of the sr module to be enabled. + * + * This API is to be called from the kernel in order to enable + * a particular smartreflex module. This API will do the initial + * configurations to turn on the smartreflex module and in turn call + * into the registered smartreflex class enable API. + */ +void omap_smartreflex_enable(int srid) +{ + struct omap_sr *sr = _sr_lookup(srid); + + if (!sr) { + pr_warning("%s: omap_sr struct for SR%d not found\n", + __func__, srid + 1); + return; + } + + if (!sr->is_autocomp_active) + return; + + if (!sr_class || !(sr_class->enable) || !(sr_class->configure)) { + dev_warn(&sr->pdev->dev, "%s: smartreflex class driver not" + "registered\n", __func__); + return; + } + sr_class->enable(srid); +} + +/** + * omap_smartreflex_disable : API to disable SR without resetting the voltage + * processor voltage + * @srid - The id of the sr module to be disabled. + * + * This API is to be called from the kernel in order to disable + * a particular smartreflex module. This API will in turn call + * into the registered smartreflex class disable API. This API will tell + * the smartreflex class disable not to reset the VP voltage after + * disabling smartreflex. + */ +void omap_smartreflex_disable(int srid) +{ + struct omap_sr *sr = _sr_lookup(srid); + + if (!sr) { + pr_warning("%s: omap_sr struct for SR%d not found\n", + __func__, srid + 1); + return; + } + + if (!sr->is_autocomp_active) + return; + + if (!sr_class || !(sr_class->disable)) { + dev_warn(&sr->pdev->dev, "%s: smartreflex class driver not" + "registered\n", __func__); + return; + } + + sr_class->disable(srid, 0); +} +/** + * omap_smartreflex_disable_reset_volt : API to disable SR and reset the + * voltage processor voltage + * @srid - The id of the sr module to be disabled. + * + * This API is to be called from the kernel in order to disable + * a particular smartreflex module. This API will in turn call + * into the registered smartreflex class disable API. This API will tell + * the smartreflex class disable to reset the VP voltage after + * disabling smartreflex. + */ +void omap_smartreflex_disable_reset_volt(int srid) +{ + struct omap_sr *sr = _sr_lookup(srid); + + if (!sr) { + pr_warning("%s: omap_sr struct for SR%d not found\n", + __func__, srid + 1); + return; + } + + if (!sr->is_autocomp_active) + return; + + if (!sr_class || !(sr_class->disable)) { + dev_warn(&sr->pdev->dev, "%s: smartreflex class driver not" + "registered\n", __func__); + return; + } + + sr_class->disable(srid, 1); +} + +/** + * omap_sr_register_class : API to register a smartreflex class parameters. + * @class_data - The structure containing various sr class specific data. + * + * This API is to be called by the smartreflex class driver to register itself + * with the smartreflex driver during init. Returns 0 on success else the + * error value. + */ +int omap_sr_register_class(struct omap_smartreflex_class_data *class_data) +{ + struct omap_sr *sr_info; + + if (!class_data) { + pr_warning("%s:, Smartreflex class data passed is NULL\n", + __func__); + return -EINVAL; + } + + if (sr_class) { + pr_warning("%s: Smartreflex class driver already registered\n", + __func__); + return -EBUSY; + } + + sr_class = class_data; + + /* + * Call into late init to do intializations that require + * both sr driver and sr class driver to be initiallized. + */ + list_for_each_entry(sr_info, &sr_list, node) + sr_late_init(sr_info); + return 0; +} + +/** + * omap_sr_register_pmic : API to register pmic specific info. + * @pmic_data - The structure containing pmic specific data. + * + * This API is to be called from the PMIC specific code to register with + * smartreflex driver pmic specific info. Currently the only info required + * is the smartreflex init on the PMIC side. + */ +void omap_sr_register_pmic(struct omap_smartreflex_pmic_data *pmic_data) +{ + if (!pmic_data) { + pr_warning("%s: Trying to register NULL PMIC data structure" + "with smartreflex\n", __func__); + return; + } + sr_pmic_data = pmic_data; +} + +#ifdef CONFIG_PM_DEBUG +/* PM Debug Fs enteries to enable disable smartreflex. */ +static int omap_sr_autocomp_show(void *data, u64 *val) +{ + struct omap_sr *sr_info = (struct omap_sr *) data; + + if (!sr_info) { + pr_warning("%s: omap_sr struct for SR not found\n", __func__); + return -EINVAL; + } + *val = sr_info->is_autocomp_active; + return 0; +} + +static int omap_sr_autocomp_store(void *data, u64 val) +{ + struct omap_sr *sr_info = (struct omap_sr *) data; + + if (!sr_info) { + pr_warning("%s: omap_sr struct for SR not found\n", __func__); + return -EINVAL; + } + if (!val) + sr_stop_vddautocomp(sr_info); + else + sr_start_vddautocomp(sr_info); + return 0; +} + +DEFINE_SIMPLE_ATTRIBUTE(pm_sr_fops, omap_sr_autocomp_show, + omap_sr_autocomp_store, "%llu\n"); +#endif + +static int __init omap_smartreflex_probe(struct platform_device *pdev) +{ + struct omap_sr *sr_info = kzalloc(sizeof(struct omap_sr), GFP_KERNEL); + struct omap_device *odev = to_omap_device(pdev); + struct resource *mem, *irq; + int ret = 0; +#ifdef CONFIG_PM_DEBUG + char name[4]; + struct dentry *dbg_dir; +#endif + + if (!sr_info) { + dev_err(&pdev->dev, "%s: unable to allocate sr_info\n", + __func__); + return -ENOMEM; + } + + mem = platform_get_resource(pdev, IORESOURCE_MEM, 0); + if (!mem) { + dev_err(&pdev->dev, "%s: no mem resource\n", __func__); + ret = -ENODEV; + goto err_free_devinfo; + } + irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0); + + sr_info->pdev = pdev; + sr_info->srid = pdev->id; + sr_info->is_autocomp_active = 0; + sr_info->clk_length = 0; + sr_info->sr_ip_type = odev->hwmods[0]->class->rev; + sr_info->base = ioremap(mem->start, resource_size(mem)); + if (!sr_info->base) { + dev_err(&pdev->dev, "%s: ioremap fail\n", __func__); + ret = -ENOMEM; + goto err_release_region; + } + if (irq) + sr_info->irq = irq->start; + sr_set_clk_length(sr_info); + sr_set_regfields(sr_info); + + list_add(&sr_info->node, &sr_list); + /* + * Call into late init to do intializations that require + * both sr driver and sr class driver to be initiallized. + */ + if (sr_class) { + ret = sr_late_init(sr_info); + if (ret) { + pr_warning("%s: Error in SR late init\n", __func__); + return ret; + } + } + +#ifdef CONFIG_PM_DEBUG + /* Create the debug fs enteries */ + sprintf(name, "SR%d", sr_info->srid + 1); + dbg_dir = debugfs_create_dir(name, sr_dbg_dir); + (void) debugfs_create_file("autocomp", S_IRUGO | S_IWUGO, dbg_dir, + (void *)sr_info, &pm_sr_fops); +#endif + + dev_info(&pdev->dev, "%s: SmartReflex driver initialized\n", __func__); + return ret; + +err_release_region: + release_mem_region(mem->start, resource_size(mem)); +err_free_devinfo: + kfree(sr_info); + + return ret; +} + +static int __devexit omap_smartreflex_remove(struct platform_device *pdev) +{ + struct omap_sr *sr_info = _sr_lookup(pdev->id + 1); + struct resource *mem; + + if (!sr_info) { + pr_warning("%s: omap_sr struct for SR%d not found\n", + __func__, pdev->id + 1); + return -EINVAL; + } + + /* Disable Autocompensation if enabled before removing the module */ + if (sr_info->is_autocomp_active == 1) + sr_stop_vddautocomp(sr_info); + + list_del(&sr_info->node); + iounmap(sr_info->base); + kfree(sr_info); + mem = platform_get_resource(pdev, IORESOURCE_MEM, 0); + release_mem_region(mem->start, resource_size(mem)); + return 0; +} + +static struct platform_driver smartreflex_driver = { + .remove = omap_smartreflex_remove, + .driver = { + .name = "smartreflex", + }, +}; + +static int __init sr_init(void) +{ + int ret = 0; + + /* + * sr_init is a late init. If by then a pmic specific API is not + * registered there is something really wrong + */ + if (sr_pmic_data && sr_pmic_data->sr_pmic_init) { + sr_pmic_data->sr_pmic_init(); + } else { + pr_err("%s: PMIC hook to init smartreflex not" + "registered\n", __func__); + return -EFAULT; + } + +#ifdef CONFIG_PM_DEBUG + sr_dbg_dir = debugfs_create_dir("Smartreflex", pm_dbg_main_dir); +#endif + ret = platform_driver_probe(&smartreflex_driver, + omap_smartreflex_probe); + if (ret) { + pr_err("%s: platform driver register failed for SR\n", + __func__); + return ret; + } + return 0; +} + +void __exit sr_exit(void) +{ + platform_driver_unregister(&smartreflex_driver); +} +late_initcall(sr_init); +module_exit(sr_exit); + +MODULE_DESCRIPTION("OMAP SMARTREFLEX DRIVER"); +MODULE_LICENSE("GPL"); +MODULE_ALIAS("platform:" DRIVER_NAME); +MODULE_AUTHOR("Texas Instruments Inc"); diff --git a/arch/arm/plat-omap/Kconfig b/arch/arm/plat-omap/Kconfig index 6da796e..34f265e 100644 --- a/arch/arm/plat-omap/Kconfig +++ b/arch/arm/plat-omap/Kconfig @@ -53,6 +53,38 @@ config OMAP_DEBUG_LEDS depends on OMAP_DEBUG_DEVICES default y if LEDS || LEDS_OMAP_DEBUG +config OMAP_SMARTREFLEX + bool "SmartReflex support" + depends on ARCH_OMAP3 && PM + help + Say Y if you want to enable SmartReflex. + + SmartReflex can perform continuous dynamic voltage + scaling around the nominal operating point voltage + according to silicon characteristics and operating + conditions. Enabling SmartReflex reduces power + consumption. + + Please note, that by default SmartReflex is only + initialized. To enable the automatic voltage + compensation for VDD1 and VDD2, user must write 1 to + /debug/pm_debug/Smartreflex/SR<X>/autocomp, + where X is 1 or 2 for OMAP3 + +config OMAP_SMARTREFLEX_TESTING + bool "Smartreflex testing support" + depends on OMAP_SMARTREFLEX + default n + help + Say Y if you want to enable SmartReflex testing with SW hardcoded + NVALUES intead of E-fuse NVALUES set in factory silicon testing. + + In some devices the E-fuse values have not been set, even though + SmartReflex modules are included. Using these hardcoded values set + in software, one can test the SmartReflex features without E-fuse. + + WARNING: Enabling this option may cause your device to hang! + config OMAP_RESET_CLOCKS bool "Reset unused clocks during boot" depends on ARCH_OMAP diff --git a/arch/arm/plat-omap/include/plat/smartreflex.h b/arch/arm/plat-omap/include/plat/smartreflex.h new file mode 100644 index 0000000..2225f27 --- /dev/null +++ b/arch/arm/plat-omap/include/plat/smartreflex.h @@ -0,0 +1,275 @@ +/* + * OMAP Smartreflex Defines and Routines + * + * Author: Thara Gopinath <thara@ti.com> + * + * Copyright (C) 2010 Texas Instruments, Inc. + * Thara Gopinath <thara@ti.com> + * + * Copyright (C) 2008 Nokia Corporation + * Kalle Jokiniemi + * + * Copyright (C) 2007 Texas Instruments, Inc. + * Lesly A M <x0080970@ti.com> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#ifndef __ASM_ARM_OMAP_SMARTREFLEX_H +#define __ASM_ARM_OMAP_SMARTREFLEX_H + +#include <linux/platform_device.h> + +extern struct dentry *pm_dbg_main_dir; + +/* + * Different Smartreflex IPs version. The v1 is the 65nm version used in + * OMAP3430. The v2 is the update for the 45nm version of the IP + * used in OMAP3630 and OMAP4430 + */ +#define SR_TYPE_V1 1 +#define SR_TYPE_V2 2 + +/* SMART REFLEX REG ADDRESS OFFSET */ +#define SRCONFIG 0x00 +#define SRSTATUS 0x04 +#define SENVAL 0x08 +#define SENMIN 0x0C +#define SENMAX 0x10 +#define SENAVG 0x14 +#define AVGWEIGHT 0x18 +#define NVALUERECIPROCAL 0x1C +#define SENERROR_V1 0x20 +#define ERRCONFIG_V1 0x24 +#define IRQ_EOI 0x20 +#define IRQSTATUS_RAW 0x24 +#define IRQSTATUS 0x28 +#define IRQENABLE_SET 0x2C +#define IRQENABLE_CLR 0x30 +#define SENERROR_V2 0x34 +#define ERRCONFIG_V2 0x38 + +/* Bit/Shift Positions */ + +/* SRCONFIG */ +#define SRCONFIG_ACCUMDATA_SHIFT 22 +#define SRCONFIG_SRCLKLENGTH_SHIFT 12 +#define SRCONFIG_SENNENABLE_V1_SHIFT 5 +#define SRCONFIG_SENPENABLE_V1_SHIFT 3 +#define SRCONFIG_SENNENABLE_V2_SHIFT 1 +#define SRCONFIG_SENPENABLE_V2_SHIFT 0 +#define SRCONFIG_CLKCTRL_SHIFT 0 + +#define SRCONFIG_ACCUMDATA_MASK (0x3FF << 22) + +#define SRCONFIG_SRENABLE BIT(11) +#define SRCONFIG_SENENABLE BIT(10) +#define SRCONFIG_ERRGEN_EN BIT(9) +#define SRCONFIG_MINMAXAVG_EN BIT(8) +#define SRCONFIG_DELAYCTRL BIT(2) + +/* AVGWEIGHT */ +#define AVGWEIGHT_SENPAVGWEIGHT_SHIFT 2 +#define AVGWEIGHT_SENNAVGWEIGHT_SHIFT 0 + +/* NVALUERECIPROCAL */ +#define NVALUERECIPROCAL_SENPGAIN_SHIFT 20 +#define NVALUERECIPROCAL_SENNGAIN_SHIFT 16 +#define NVALUERECIPROCAL_RNSENP_SHIFT 8 +#define NVALUERECIPROCAL_RNSENN_SHIFT 0 + +/* ERRCONFIG */ +#define ERRCONFIG_ERRWEIGHT_SHIFT 16 +#define ERRCONFIG_ERRMAXLIMIT_SHIFT 8 +#define ERRCONFIG_ERRMINLIMIT_SHIFT 0 + +#define SR_ERRWEIGHT_MASK (0x07 << 16) +#define SR_ERRMAXLIMIT_MASK (0xFF << 8) +#define SR_ERRMINLIMIT_MASK (0xFF << 0) + +#define ERRCONFIG_VPBOUNDINTEN_V1 BIT(31) +#define ERRCONFIG_VPBOUNDINTST_V1 BIT(30) +#define ERRCONFIG_MCUACCUMINTEN BIT(29) +#define ERRCONFIG_MCUACCUMINTST BIT(28) +#define ERRCONFIG_MCUVALIDINTEN BIT(27) +#define ERRCONFIG_MCUVALIDINTST BIT(26) +#define ERRCONFIG_MCUBOUNDINTEN BIT(25) +#define ERRCONFIG_MCUBOUNDINTST BIT(24) +#define ERRCONFIG_MCUDISACKINTEN BIT(23) +#define ERRCONFIG_VPBOUNDINTST_V2 BIT(23) +#define ERRCONFIG_MCUDISACKINTST BIT(22) +#define ERRCONFIG_VPBOUNDINTEN_V2 BIT(22) + +#define ERRCONFIG_STATUS_V1_MASK (ERRCONFIG_VPBOUNDINTST_V1 | \ + ERRCONFIG_MCUACCUMINTST | \ + ERRCONFIG_MCUVALIDINTST | \ + ERRCONFIG_MCUBOUNDINTST | \ + ERRCONFIG_MCUDISACKINTST) +/* IRQSTATUS */ +#define IRQSTATUS_MCUACCUMINT BIT(3) +#define IRQSTATUS_MCVALIDINT BIT(2) +#define IRQSTATUS_MCBOUNDSINT BIT(1) +#define IRQSTATUS_MCUDISABLEACKINT BIT(0) + +/* IRQENABLE_SET and IRQENABLE_CLEAR */ +#define IRQENABLE_MCUACCUMINT BIT(3) +#define IRQENABLE_MCUVALIDINT BIT(2) +#define IRQENABLE_MCUBOUNDSINT BIT(1) +#define IRQENABLE_MCUDISABLEACKINT BIT(0) + +/* Common Bit values */ + +#define SRCLKLENGTH_12MHZ_SYSCLK 0x3C +#define SRCLKLENGTH_13MHZ_SYSCLK 0x41 +#define SRCLKLENGTH_19MHZ_SYSCLK 0x60 +#define SRCLKLENGTH_26MHZ_SYSCLK 0x82 +#define SRCLKLENGTH_38MHZ_SYSCLK 0xC0 + +/* + * 3430 specific values. Maybe these should be passed from board file or + * pmic structures. + */ +#define OMAP3430_SR_ACCUMDATA 0x1F4 + +#define OMAP3430_SR1_SENPAVGWEIGHT 0x03 +#define OMAP3430_SR1_SENNAVGWEIGHT 0x03 + +#define OMAP3430_SR2_SENPAVGWEIGHT 0x01 +#define OMAP3430_SR2_SENNAVGWEIGHT 0x01 + +#define OMAP3430_SR_ERRWEIGHT 0x04 +#define OMAP3430_SR_ERRMAXLIMIT 0x02 + +/* TODO:3630/OMAP4 values if it has to come from this file */ + +#ifdef CONFIG_OMAP_SMARTREFLEX_TESTING +#define SR_TESTING_NVALUES 1 +#else +#define SR_TESTING_NVALUES 0 +#endif + +/** + * omap_smartreflex_dev_data - Smartreflex device specific data + * + * @volts_supported : Number of distinct voltages possible for the VDD + * associated with this smartreflex module. + * @efuse_sr_control : The regisrter offset of control_fuse_sr efuse + * register from which sennenable and senpenable values + * are obtained. + * @sennenable_shift : The shift in the control_fuse_sr register for + * obtaining the sennenable value for this smartreflex + * module. + * @senpenable_shift : The shift in the control_fuse_sr register for + * obtaining the senpenable value for this smartreflex + * module. + * @efuse_nvalues_offs : Array of efuse offsets from which ntarget values can + * be retrieved. Number of efuse offsets in this arrray + * is equal to the volts_supported value ie one efuse + * register per supported voltage. + * @test_sennenable : SENNENABLE test value + * @test_senpenable : SENPENABLE test value. + * @test_nvalues : Array of test ntarget values. + */ +struct omap_sr_dev_data { + int volts_supported; + u32 efuse_sr_control; + u32 sennenable_shift; + u32 senpenable_shift; + u32 *efuse_nvalues_offs; + u32 test_sennenable; + u32 test_senpenable; + u32 *test_nvalues; + struct omap_volt_data *volt_data; +}; + +/** + * omap_smartreflex_pmic_data : Strucutre to be populated by pmic code to pass + * pmic specific info to smartreflex driver + * + * @sr_pmic_init - API to initialize smartreflex on the PMIC side. + */ +struct omap_smartreflex_pmic_data { + void (*sr_pmic_init) (void); +}; + +#ifdef CONFIG_OMAP_SMARTREFLEX +/* + * The smart reflex driver supports CLASS1 CLASS2 and CLASS3 SR. + * The smartreflex class driver should pass the class type. + * Should be used to populate the class_type field of the + * omap_smartreflex_class_data structure. + */ +#define SR_CLASS1 0x1 +#define SR_CLASS2 0x2 +#define SR_CLASS3 0x3 + +/** + * omap_smartreflex_class_data : Structure to be populated by + * Smartreflex class driver with corresponding class enable disable API's + * + * @enable - API to enable a particular class smaartreflex. + * @disable - API to disable a particular class smartreflex. + * @configure - API to configure a particular class smartreflex. + * @notify - API to notify the class driver about an event in SR. Not needed + * for class3. + * @notify_flags - specify the events to be notified to the class driver + * @class_type - specify which smartreflex class. Can be used by the SR driver + * to take any class based decisions. + */ +struct omap_smartreflex_class_data { + int (*enable)(int sr_id); + int (*disable)(int sr_id, int is_volt_reset); + int (*configure)(int sr_id); + int (*notify)(int sr_id, u32 status); + u8 notify_flags; + u8 class_type; +}; + +/** + * omap_smartreflex_data - Smartreflex platform data + * + * @senp_mod : SENPENABLE value for the sr + * @senn_mod : SENNENABLE value for sr + * @sr_nvalue : array of n target values for sr + * @enable_on_init : whether this sr module needs to enabled at + * boot up or not. + */ +struct omap_sr_data { + u32 senp_mod; + u32 senn_mod; + bool enable_on_init; + int (*device_enable)(struct platform_device *pdev); + int (*device_shutdown)(struct platform_device *pdev); + int (*device_idle)(struct platform_device *pdev); +}; + +/* + * Smartreflex module enable/disable interface. + * NOTE: if smartreflex is not enabled from sysfs, these functions will not + * do anything. + */ +void omap_smartreflex_enable(int srid); +void omap_smartreflex_disable(int srid); +void omap_smartreflex_disable_reset_volt(int srid); + +/* Smartreflex driver hooks to be called from Smartreflex class driver */ +int sr_enable(int srid, unsigned long volt); +void sr_disable(int srid); +int sr_configure_errgen(int srid); +int sr_configure_minmax(int srid); + +/* API to register the smartreflex class driver with the smartreflex driver */ +int omap_sr_register_class(struct omap_smartreflex_class_data *class_data); + +/* API to register the pmic specific data with the smartreflex driver. */ +void omap_sr_register_pmic(struct omap_smartreflex_pmic_data *pmic_data); +#else +static inline void omap_smartreflex_enable(int srid) {} +static inline void omap_smartreflex_disable(int srid) {} +static inline void omap_smartreflex_disable_reset_volt(int srid) {} +static inline void omap_sr_register_pmic + (struct omap_smartreflex_pmic_data *pmic_data) {} +#endif +#endif -- 1.7.0.rc1.33.g07cf0f ^ permalink raw reply related [flat|nested] 19+ messages in thread
* [PATCH 3/8] OMAP3: PM: Adding smartreflex device file. 2010-05-29 16:32 ` [PATCH 2/8] OMAP3: PM: Adding smartreflex driver support Thara Gopinath @ 2010-05-29 16:32 ` Thara Gopinath 2010-05-29 16:32 ` [PATCH 4/8] OMAP3: PM: Adding smartreflex hwmod data Thara Gopinath 2010-06-23 20:13 ` [PATCH 2/8] OMAP3: PM: Adding smartreflex driver support Kevin Hilman 1 sibling, 1 reply; 19+ messages in thread From: Thara Gopinath @ 2010-05-29 16:32 UTC (permalink / raw) To: linux-omap Cc: khilman, paul, b-cousson, vishwanath.bs, sawant, Thara Gopinath This patch adds support for device registration of various smartreflex module present in the system. This patch introduces the platform data for smartreflex devices which include the efused and test n-target vaules, module enable/disable pointers and a parameter to indicate whether smartreflex autocompensation needs to be enabled on init or not. Currently auocompensation is enabled on init by default for OMAP3430 ES3.1 chip. Signed-off-by: Thara Gopinath <thara@ti.com> --- arch/arm/mach-omap2/Makefile | 2 +- arch/arm/mach-omap2/sr_device.c | 177 +++++++++++++++++++++++++++++++++++++++ 2 files changed, 178 insertions(+), 1 deletions(-) create mode 100644 arch/arm/mach-omap2/sr_device.c diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile index 9ff9869..ab3772a 100644 --- a/arch/arm/mach-omap2/Makefile +++ b/arch/arm/mach-omap2/Makefile @@ -49,7 +49,7 @@ obj-$(CONFIG_ARCH_OMAP2) += sleep24xx.o obj-$(CONFIG_ARCH_OMAP3) += pm34xx.o sleep34xx.o cpuidle34xx.o \ voltage.o obj-$(CONFIG_PM_DEBUG) += pm-debug.o -obj-$(CONFIG_OMAP_SMARTREFLEX) += smartreflex.o +obj-$(CONFIG_OMAP_SMARTREFLEX) += sr_device.o smartreflex.o AFLAGS_sleep24xx.o :=-Wa,-march=armv6 AFLAGS_sleep34xx.o :=-Wa,-march=armv7-a diff --git a/arch/arm/mach-omap2/sr_device.c b/arch/arm/mach-omap2/sr_device.c new file mode 100644 index 0000000..5ca0253 --- /dev/null +++ b/arch/arm/mach-omap2/sr_device.c @@ -0,0 +1,177 @@ +/* + * OMAP3/OMAP4 smartreflex device file + * + * Author: Thara Gopinath <thara@ti.com> + * + * Based originally on code from smartreflex.c + * Copyright (C) 2010 Texas Instruments, Inc. + * Thara Gopinath <thara@ti.com> + * + * Copyright (C) 2008 Nokia Corporation + * Kalle Jokiniemi + * + * Copyright (C) 2007 Texas Instruments, Inc. + * Lesly A M <x0080970@ti.com> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#include <linux/err.h> +#include <linux/slab.h> + +#include <plat/control.h> +#include <plat/omap_hwmod.h> +#include <plat/omap_device.h> +#include <plat/opp.h> +#include <plat/smartreflex.h> + +#include "voltage.h" + +struct omap_device_pm_latency omap_sr_latency[] = { + { + .deactivate_func = omap_device_idle_hwmods, + .activate_func = omap_device_enable_hwmods, + .flags = OMAP_DEVICE_LATENCY_AUTO_ADJUST + }, +}; + +/* Read EFUSE values from control registers for OMAP3430 */ +static void __init sr_read_efuse(struct omap_sr_dev_data *dev_data, + struct omap_sr_data *sr_data) +{ + int i; + + if (!dev_data || !dev_data->volts_supported || !dev_data->volt_data || + !dev_data->efuse_nvalues_offs) { + pr_warning("%s: Bad parameters! dev_data = %x," + "dev_data->volts_supported = %x," + "dev_data->volt_data = %x," + "dev_data->efuse_nvalues_offs = %x\n", __func__, + (unsigned int)dev_data, dev_data->volts_supported, + (unsigned int)dev_data->volt_data, + (unsigned int)dev_data->efuse_nvalues_offs); + return; + } + + /* + * From OMAP3630 onwards there are no efuse registers for senn_mod + * and senp_mod. They have to be 0x1 by default. + */ + if (!dev_data->efuse_sr_control) { + sr_data->senn_mod = 0x1; + sr_data->senp_mod = 0x1; + } else { + sr_data->senn_mod = + ((omap_ctrl_readl(dev_data->efuse_sr_control) & + (0x3 << dev_data->sennenable_shift)) >> + dev_data->sennenable_shift); + sr_data->senp_mod = + ((omap_ctrl_readl(dev_data->efuse_sr_control) & + (0x3 << dev_data->senpenable_shift)) >> + dev_data->senpenable_shift); + } + + for (i = 0; i < dev_data->volts_supported; i++) + dev_data->volt_data[i].sr_nvalue = omap_ctrl_readl( + dev_data->efuse_nvalues_offs[i]); +} + +/* + * Hard coded nvalues for testing purposes for OMAP3430, + * may cause device to hang! + */ +static void __init sr_set_testing_nvalues(struct omap_sr_dev_data *dev_data, + struct omap_sr_data *sr_data) +{ + int i; + + if (!dev_data || !dev_data->volts_supported || + !dev_data->volt_data || !dev_data->test_nvalues) { + pr_warning("%s: Bad parameters! dev_data = %x," + "dev_data->volts_supported = %x," + "dev_data->volt_data = %x," + "dev_data->test_nvalues = %x\n", __func__, + (unsigned int)dev_data, dev_data->volts_supported, + (unsigned int)dev_data->volt_data, + (unsigned int)dev_data->test_nvalues); + return; + } + + sr_data->senn_mod = dev_data->test_sennenable; + sr_data->senp_mod = dev_data->test_senpenable; + for (i = 0; i < dev_data->volts_supported; i++) + dev_data->volt_data[i].sr_nvalue = dev_data->test_nvalues[i]; +} + +static void __init sr_set_nvalues(struct omap_sr_dev_data *dev_data, + struct omap_sr_data *sr_data) +{ + if (SR_TESTING_NVALUES) + sr_set_testing_nvalues(dev_data, sr_data); + else + sr_read_efuse(dev_data, sr_data); +} + +static int sr_dev_init(struct omap_hwmod *oh, void *user) +{ + struct omap_sr_data *sr_data; + struct omap_sr_dev_data *sr_dev_data; + struct omap_device *od; + char *name = "smartreflex"; + static int i; + + sr_data = kzalloc(sizeof(struct omap_sr_data), GFP_KERNEL); + if (!sr_data) { + pr_err("%s: Unable to allocate memory for %s sr_data.Error!\n", + __func__, oh->name); + return -ENOMEM; + } + + sr_dev_data = (struct omap_sr_dev_data *)oh->dev_attr; + /* + * OMAP3430 ES3.1 chips by default come with Efuse burnt + * with parameters required for full functionality of + * smartreflex AVS feature like ntarget values , sennenable + * and senpenable. So enable the SR AVS feature during boot up + * itself if it is a OMAP3430 ES3.1 chip. + */ + if (cpu_is_omap343x()) { + if (omap_rev() == OMAP3430_REV_ES3_1) + sr_data->enable_on_init = true; + else + sr_data->enable_on_init = false; + } else { + sr_data->enable_on_init = false; + } + sr_data->device_enable = omap_device_enable; + sr_data->device_shutdown = omap_device_shutdown; + sr_data->device_idle = omap_device_idle; + sr_dev_data->volts_supported = omap_get_voltage_table(i, + &sr_dev_data->volt_data); + if (!sr_dev_data->volts_supported) { + pr_warning("%s: No Voltage table registerd fo VDD%d.Something \ + really wrong\n\n", __func__, i + 1); + i++; + kfree(sr_data); + return 0; + } + sr_set_nvalues(sr_dev_data, sr_data); + od = omap_device_build(name, i, oh, sr_data, sizeof(*sr_data), + omap_sr_latency, + ARRAY_SIZE(omap_sr_latency), 0); + if (IS_ERR(od)) { + pr_warning("%s: Could not build omap_device for %s: %s.\n\n", + __func__, name, oh->name); + kfree(sr_data); + } + i++; + return 0; +} + +static int __init omap_devinit_smartreflex(void) +{ + return omap_hwmod_for_each_by_class("smartreflex", sr_dev_init, NULL); +} +subsys_initcall(omap_devinit_smartreflex); -- 1.7.0.rc1.33.g07cf0f ^ permalink raw reply related [flat|nested] 19+ messages in thread
* [PATCH 4/8] OMAP3: PM: Adding smartreflex hwmod data 2010-05-29 16:32 ` [PATCH 3/8] OMAP3: PM: Adding smartreflex device file Thara Gopinath @ 2010-05-29 16:32 ` Thara Gopinath 2010-05-29 16:32 ` [PATCH 5/8] OMAP3: PM: Adding smartreflex class3 driver Thara Gopinath 2010-06-18 20:46 ` [PATCH 4/8] OMAP3: PM: Adding smartreflex hwmod data Kevin Hilman 0 siblings, 2 replies; 19+ messages in thread From: Thara Gopinath @ 2010-05-29 16:32 UTC (permalink / raw) To: linux-omap Cc: khilman, paul, b-cousson, vishwanath.bs, sawant, Thara Gopinath This patch adds the smartreflex hwmod data for OMAP3430 and OMAP3630. A dev_attr is also added to the hwmod structure for each smartreflex module which contains SoC specific info like the efuse offsets, test n-values etc. Signed-off-by: Thara Gopinath <thara@ti.com> --- arch/arm/mach-omap2/omap_hwmod_3xxx_data.c | 209 +++++++++++++++++++++++++++- arch/arm/plat-omap/include/plat/control.h | 27 ++++ 2 files changed, 235 insertions(+), 1 deletions(-) diff --git a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c index ed60840..43ffc8d 100644 --- a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c @@ -17,9 +17,10 @@ #include <mach/irqs.h> #include <plat/cpu.h> #include <plat/dma.h> +#include <plat/control.h> +#include <plat/smartreflex.h> #include "omap_hwmod_common_data.h" - #include "prm-regbits-34xx.h" /* @@ -35,6 +36,8 @@ static struct omap_hwmod omap3xxx_mpu_hwmod; static struct omap_hwmod omap3xxx_l3_hwmod; static struct omap_hwmod omap3xxx_l4_core_hwmod; static struct omap_hwmod omap3xxx_l4_per_hwmod; +static struct omap_hwmod omap34xx_sr1_hwmod; +static struct omap_hwmod omap34xx_sr2_hwmod; /* L3 -> L4_CORE interface */ static struct omap_hwmod_ocp_if omap3xxx_l3__l4_core = { @@ -88,9 +91,47 @@ static struct omap_hwmod_ocp_if omap3xxx_l4_core__l4_wkup = { .user = OCP_USER_MPU | OCP_USER_SDMA, }; +/* L4 CORE -> SR1 interface */ +static struct omap_hwmod_addr_space omap3_sr1_addr_space[] = { + { + .pa_start = OMAP34XX_SR1_BASE, + .pa_end = OMAP34XX_SR1_BASE + SZ_1K - 1, + .flags = ADDR_TYPE_RT, + }, +}; + +static struct omap_hwmod_ocp_if omap3_l4_core__sr1 = { + .master = &omap3xxx_l4_core_hwmod, + .slave = &omap34xx_sr1_hwmod, + .clk = "sr_l4_ick", + .addr = omap3_sr1_addr_space, + .addr_cnt = ARRAY_SIZE(omap3_sr1_addr_space), + .user = OCP_USER_MPU, +}; + +/* L4 CORE -> SR1 interface */ +static struct omap_hwmod_addr_space omap3_sr2_addr_space[] = { + { + .pa_start = OMAP34XX_SR2_BASE, + .pa_end = OMAP34XX_SR2_BASE + SZ_1K - 1, + .flags = ADDR_TYPE_RT, + }, +}; + +static struct omap_hwmod_ocp_if omap3_l4_core__sr2 = { + .master = &omap3xxx_l4_core_hwmod, + .slave = &omap34xx_sr2_hwmod, + .clk = "sr_l4_ick", + .addr = omap3_sr2_addr_space, + .addr_cnt = ARRAY_SIZE(omap3_sr2_addr_space), + .user = OCP_USER_MPU, +}; + /* Slave interfaces on the L4_CORE interconnect */ static struct omap_hwmod_ocp_if *omap3xxx_l4_core_slaves[] = { &omap3xxx_l3__l4_core, + &omap3_l4_core__sr1, + &omap3_l4_core__sr2, }; /* Master interfaces on the L4_CORE interconnect */ @@ -164,12 +205,178 @@ static struct omap_hwmod omap3xxx_mpu_hwmod = { .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430), }; +/* SR common */ +static struct omap_hwmod_sysc_fields omap34xx_sr_sysc_fields = { + .clkact_shift = 20, +}; + +static struct omap_hwmod_class_sysconfig omap34xx_sr_sysc = { + .sysc_offs = 0x24, + .sysc_flags = (SYSC_HAS_CLOCKACTIVITY | SYSC_NO_CACHE), + .clockact = CLOCKACT_TEST_ICLK, + .sysc_fields = &omap34xx_sr_sysc_fields, +}; + +static struct omap_hwmod_class omap34xx_smartreflex_hwmod_class = { + .name = "smartreflex", + .sysc = &omap34xx_sr_sysc, + .rev = 1, +}; + +static struct omap_hwmod_sysc_fields omap36xx_sr_sysc_fields = { + .sidle_shift = 24, + .enwkup_shift = 26 +}; + +static struct omap_hwmod_class_sysconfig omap36xx_sr_sysc = { + .sysc_offs = 0x38, + .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART), + .sysc_flags = (SYSC_HAS_SIDLEMODE | SYSC_HAS_ENAWAKEUP | + SYSC_NO_CACHE), + .sysc_fields = &omap36xx_sr_sysc_fields, +}; + +static struct omap_hwmod_class omap36xx_smartreflex_hwmod_class = { + .name = "smartreflex", + .sysc = &omap36xx_sr_sysc, + .rev = 2, +}; + +/* SR1 */ +static struct omap_hwmod_ocp_if *omap3_sr1_slaves[] = { + &omap3_l4_core__sr1, +}; + +static u32 omap34xx_sr1_efuse_offs[] = { + OMAP343X_CONTROL_FUSE_OPP1_VDD1, OMAP343X_CONTROL_FUSE_OPP2_VDD1, + OMAP343X_CONTROL_FUSE_OPP3_VDD1, OMAP343X_CONTROL_FUSE_OPP4_VDD1, + OMAP343X_CONTROL_FUSE_OPP5_VDD1, +}; + +static u32 omap34xx_sr1_test_nvalues[] = { + 0x9A90E6, 0xAABE9A, 0xBBF5C5, 0xBBB292, 0xBBF5C5, +}; + +static struct omap_sr_dev_data omap34xx_sr1_dev_attr = { + .efuse_sr_control = OMAP343X_CONTROL_FUSE_SR, + .sennenable_shift = OMAP343X_SR1_SENNENABLE_SHIFT, + .senpenable_shift = OMAP343X_SR1_SENPENABLE_SHIFT, + .efuse_nvalues_offs = omap34xx_sr1_efuse_offs, + .test_sennenable = 0x3, + .test_senpenable = 0x3, + .test_nvalues = omap34xx_sr1_test_nvalues, +}; + +static struct omap_hwmod omap34xx_sr1_hwmod = { + .name = "sr1_hwmod", + .class = &omap34xx_smartreflex_hwmod_class, + .main_clk = "sr1_fck", + .slaves = omap3_sr1_slaves, + .slaves_cnt = ARRAY_SIZE(omap3_sr1_slaves), + .dev_attr = &omap34xx_sr1_dev_attr, + .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430ES2 | + CHIP_IS_OMAP3430ES3_0 | + CHIP_IS_OMAP3430ES3_1), + .flags = HWMOD_SET_DEFAULT_CLOCKACT, +}; + +static u32 omap36xx_sr1_efuse_offs[] = { + OMAP3630_CONTROL_FUSE_OPP50_VDD1, OMAP3630_CONTROL_FUSE_OPP100_VDD1, + OMAP3630_CONTROL_FUSE_OPP120_VDD1, OMAP3630_CONTROL_FUSE_OPP1G_VDD1, +}; + +static u32 omap36xx_sr1_test_nvalues[] = { + 0x898beb, 0x999b83, 0xaac5a8, 0xaab197, +}; + +static struct omap_sr_dev_data omap36xx_sr1_dev_attr = { + .efuse_nvalues_offs = omap36xx_sr1_efuse_offs, + .test_sennenable = 0x1, + .test_senpenable = 0x1, + .test_nvalues = omap36xx_sr1_test_nvalues, +}; + +static struct omap_hwmod omap36xx_sr1_hwmod = { + .name = "sr1_hwmod", + .class = &omap36xx_smartreflex_hwmod_class, + .main_clk = "sr1_fck", + .slaves = omap3_sr1_slaves, + .slaves_cnt = ARRAY_SIZE(omap3_sr1_slaves), + .dev_attr = &omap36xx_sr1_dev_attr, + .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3630ES1), +}; + +/* SR2 */ +static struct omap_hwmod_ocp_if *omap3_sr2_slaves[] = { + &omap3_l4_core__sr2, +}; + +static u32 omap34xx_sr2_efuse_offs[] = { + OMAP343X_CONTROL_FUSE_OPP1_VDD2, OMAP343X_CONTROL_FUSE_OPP2_VDD2, + OMAP343X_CONTROL_FUSE_OPP3_VDD2, +}; + +static u32 omap34xx_sr2_test_nvalues[] = { + 0x0, 0xAAC098, 0xAB89D9 +}; + +static struct omap_sr_dev_data omap34xx_sr2_dev_attr = { + .efuse_sr_control = OMAP343X_CONTROL_FUSE_SR, + .sennenable_shift = OMAP343X_SR2_SENNENABLE_SHIFT, + .senpenable_shift = OMAP343X_SR2_SENPENABLE_SHIFT, + .efuse_nvalues_offs = omap34xx_sr2_efuse_offs, + .test_sennenable = 0x3, + .test_senpenable = 0x3, + .test_nvalues = omap34xx_sr2_test_nvalues, +}; + +static struct omap_hwmod omap34xx_sr2_hwmod = { + .name = "sr2_hwmod", + .class = &omap34xx_smartreflex_hwmod_class, + .main_clk = "sr2_fck", + .slaves = omap3_sr2_slaves, + .slaves_cnt = ARRAY_SIZE(omap3_sr2_slaves), + .dev_attr = &omap34xx_sr2_dev_attr, + .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430ES2 | + CHIP_IS_OMAP3430ES3_0 | + CHIP_IS_OMAP3430ES3_1), + .flags = HWMOD_SET_DEFAULT_CLOCKACT, +}; + +static u32 omap36xx_sr2_efuse_offs[] = { + OMAP3630_CONTROL_FUSE_OPP50_VDD2, OMAP3630_CONTROL_FUSE_OPP100_VDD2, +}; + +static u32 omap36xx_sr2_test_nvalues[] = { + 0x898beb, 0x9a8cee, +}; + +static struct omap_sr_dev_data omap36xx_sr2_dev_attr = { + .efuse_nvalues_offs = omap36xx_sr2_efuse_offs, + .test_sennenable = 0x1, + .test_senpenable = 0x1, + .test_nvalues = omap36xx_sr2_test_nvalues, +}; + +static struct omap_hwmod omap36xx_sr2_hwmod = { + .name = "sr2_hwmod", + .class = &omap36xx_smartreflex_hwmod_class, + .main_clk = "sr2_fck", + .slaves = omap3_sr2_slaves, + .slaves_cnt = ARRAY_SIZE(omap3_sr2_slaves), + .dev_attr = &omap36xx_sr2_dev_attr, + .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3630ES1), +}; static __initdata struct omap_hwmod *omap3xxx_hwmods[] = { &omap3xxx_l3_hwmod, &omap3xxx_l4_core_hwmod, &omap3xxx_l4_per_hwmod, &omap3xxx_l4_wkup_hwmod, &omap3xxx_mpu_hwmod, + &omap34xx_sr1_hwmod, + &omap34xx_sr2_hwmod, + &omap36xx_sr1_hwmod, + &omap36xx_sr2_hwmod, NULL, }; diff --git a/arch/arm/plat-omap/include/plat/control.h b/arch/arm/plat-omap/include/plat/control.h index a56deee..6c179ae 100644 --- a/arch/arm/plat-omap/include/plat/control.h +++ b/arch/arm/plat-omap/include/plat/control.h @@ -144,6 +144,15 @@ #define OMAP343X_CONTROL_TEST_KEY_11 (OMAP2_CONTROL_GENERAL + 0x00f4) #define OMAP343X_CONTROL_TEST_KEY_12 (OMAP2_CONTROL_GENERAL + 0x00f8) #define OMAP343X_CONTROL_TEST_KEY_13 (OMAP2_CONTROL_GENERAL + 0x00fc) +#define OMAP343X_CONTROL_FUSE_OPP1_VDD1 (OMAP2_CONTROL_GENERAL + 0x0110) +#define OMAP343X_CONTROL_FUSE_OPP2_VDD1 (OMAP2_CONTROL_GENERAL + 0x0114) +#define OMAP343X_CONTROL_FUSE_OPP3_VDD1 (OMAP2_CONTROL_GENERAL + 0x0118) +#define OMAP343X_CONTROL_FUSE_OPP4_VDD1 (OMAP2_CONTROL_GENERAL + 0x011c) +#define OMAP343X_CONTROL_FUSE_OPP5_VDD1 (OMAP2_CONTROL_GENERAL + 0x0120) +#define OMAP343X_CONTROL_FUSE_OPP1_VDD2 (OMAP2_CONTROL_GENERAL + 0x0124) +#define OMAP343X_CONTROL_FUSE_OPP2_VDD2 (OMAP2_CONTROL_GENERAL + 0x0128) +#define OMAP343X_CONTROL_FUSE_OPP3_VDD2 (OMAP2_CONTROL_GENERAL + 0x012c) +#define OMAP343X_CONTROL_FUSE_SR (OMAP2_CONTROL_GENERAL + 0x0130) #define OMAP343X_CONTROL_IVA2_BOOTADDR (OMAP2_CONTROL_GENERAL + 0x0190) #define OMAP343X_CONTROL_IVA2_BOOTMOD (OMAP2_CONTROL_GENERAL + 0x0194) #define OMAP343X_CONTROL_DEBOBS(i) (OMAP2_CONTROL_GENERAL + 0x01B0 \ @@ -160,6 +169,14 @@ #define OMAP343X_CONTROL_SRAMLDO5 (OMAP2_CONTROL_GENERAL + 0x02C0) #define OMAP343X_CONTROL_CSI (OMAP2_CONTROL_GENERAL + 0x02C4) +/* OMAP3630 only CONTROL_GENERAL register offsets */ +#define OMAP3630_CONTROL_FUSE_OPP1G_VDD1 (OMAP2_CONTROL_GENERAL + 0x0110) +#define OMAP3630_CONTROL_FUSE_OPP50_VDD1 (OMAP2_CONTROL_GENERAL + 0x0114) +#define OMAP3630_CONTROL_FUSE_OPP100_VDD1 (OMAP2_CONTROL_GENERAL + 0x0118) +#define OMAP3630_CONTROL_FUSE_OPP120_VDD1 (OMAP2_CONTROL_GENERAL + 0x0120) +#define OMAP3630_CONTROL_FUSE_OPP50_VDD2 (OMAP2_CONTROL_GENERAL + 0x0128) +#define OMAP3630_CONTROL_FUSE_OPP100_VDD2 (OMAP2_CONTROL_GENERAL + 0x012C) + /* AM35XX only CONTROL_GENERAL register offsets */ #define AM35XX_CONTROL_MSUSPENDMUX_6 (OMAP2_CONTROL_GENERAL + 0x0038) #define AM35XX_CONTROL_DEVCONF2 (OMAP2_CONTROL_GENERAL + 0x0310) @@ -240,6 +257,16 @@ #define OMAP2_SYSBOOT_1_MASK (1 << 1) #define OMAP2_SYSBOOT_0_MASK (1 << 0) +/* CONTROL_FUSE_SR bits */ +#define OMAP343X_SR2_SENNENABLE_MASK (0x3 << 10) +#define OMAP343X_SR2_SENNENABLE_SHIFT 10 +#define OMAP343X_SR2_SENPENABLE_MASK (0x3 << 8) +#define OMAP343X_SR2_SENPENABLE_SHIFT 8 +#define OMAP343X_SR1_SENNENABLE_MASK (0x3 << 2) +#define OMAP343X_SR1_SENNENABLE_SHIFT 2 +#define OMAP343X_SR1_SENPENABLE_MASK (0x3 << 0) +#define OMAP343X_SR1_SENPENABLE_SHIFT 0 + /* CONTROL_PBIAS_LITE bits */ #define OMAP343X_PBIASLITESUPPLY_HIGH1 (1 << 15) #define OMAP343X_PBIASLITEVMODEERROR1 (1 << 11) -- 1.7.0.rc1.33.g07cf0f ^ permalink raw reply related [flat|nested] 19+ messages in thread
* [PATCH 5/8] OMAP3: PM: Adding smartreflex class3 driver 2010-05-29 16:32 ` [PATCH 4/8] OMAP3: PM: Adding smartreflex hwmod data Thara Gopinath @ 2010-05-29 16:32 ` Thara Gopinath 2010-05-29 16:32 ` [PATCH 6/8] OMAP3: PM: Adding T2 enabling of smartreflex support Thara Gopinath 2010-06-18 20:46 ` [PATCH 4/8] OMAP3: PM: Adding smartreflex hwmod data Kevin Hilman 1 sibling, 1 reply; 19+ messages in thread From: Thara Gopinath @ 2010-05-29 16:32 UTC (permalink / raw) To: linux-omap Cc: khilman, paul, b-cousson, vishwanath.bs, sawant, Thara Gopinath Smartreflex Class3 implementation continuously monitors silicon performance and instructs the Voltage Processors to increase or decrease the voltage. This patch adds smartreflex class 3 driver. This driver hooks up with the generic smartreflex driver smartreflex.c to abstract out class specific implementations out of the generic driver. Signed-off-by: Thara Gopinath <thara@ti.com> --- arch/arm/mach-omap2/Makefile | 1 + arch/arm/mach-omap2/board-3430sdp.c | 2 + arch/arm/mach-omap2/board-3630sdp.c | 2 + arch/arm/mach-omap2/board-zoom3.c | 2 + arch/arm/mach-omap2/smartreflex-class3.c | 62 ++++++++++++++++++++++++++++++ arch/arm/mach-omap2/smartreflex-class3.h | 23 +++++++++++ arch/arm/plat-omap/Kconfig | 9 ++++ 7 files changed, 101 insertions(+), 0 deletions(-) create mode 100644 arch/arm/mach-omap2/smartreflex-class3.c create mode 100644 arch/arm/mach-omap2/smartreflex-class3.h diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile index ab3772a..116cffb 100644 --- a/arch/arm/mach-omap2/Makefile +++ b/arch/arm/mach-omap2/Makefile @@ -50,6 +50,7 @@ obj-$(CONFIG_ARCH_OMAP3) += pm34xx.o sleep34xx.o cpuidle34xx.o \ voltage.o obj-$(CONFIG_PM_DEBUG) += pm-debug.o obj-$(CONFIG_OMAP_SMARTREFLEX) += sr_device.o smartreflex.o +obj-$(CONFIG_OMAP_SMARTREFLEX_CLASS3) += smartreflex-class3.o AFLAGS_sleep24xx.o :=-Wa,-march=armv6 AFLAGS_sleep34xx.o :=-Wa,-march=armv7-a diff --git a/arch/arm/mach-omap2/board-3430sdp.c b/arch/arm/mach-omap2/board-3430sdp.c index da5cea5..ba650a5 100644 --- a/arch/arm/mach-omap2/board-3430sdp.c +++ b/arch/arm/mach-omap2/board-3430sdp.c @@ -48,6 +48,7 @@ #include "hsmmc.h" #include "pm.h" #include "omap3-opp.h" +#include "smartreflex-class3.h" #define CONFIG_DISABLE_HFCLK 1 @@ -804,6 +805,7 @@ static void __init omap_3430sdp_init(void) sdp3430_display_init(); enable_board_wakeup_source(); usb_ehci_init(&ehci_pdata); + sr_class3_init(); } static void __init omap_3430sdp_map_io(void) diff --git a/arch/arm/mach-omap2/board-3630sdp.c b/arch/arm/mach-omap2/board-3630sdp.c index b7c44eb..00aef0d 100644 --- a/arch/arm/mach-omap2/board-3630sdp.c +++ b/arch/arm/mach-omap2/board-3630sdp.c @@ -27,6 +27,7 @@ #include "sdram-hynix-h8mbx00u0mer-0em.h" #include "pm.h" #include "omap3-opp.h" +#include "smartreflex-class3.h" #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE) @@ -107,6 +108,7 @@ static void __init omap_sdp_init(void) board_smc91x_init(); enable_board_wakeup_source(); usb_ehci_init(&ehci_pdata); + sr_class3_init(); } MACHINE_START(OMAP_3630SDP, "OMAP 3630SDP board") diff --git a/arch/arm/mach-omap2/board-zoom3.c b/arch/arm/mach-omap2/board-zoom3.c index 25ce6d6..99ade1c 100644 --- a/arch/arm/mach-omap2/board-zoom3.c +++ b/arch/arm/mach-omap2/board-zoom3.c @@ -26,6 +26,7 @@ #include "sdram-hynix-h8mbx00u0mer-0em.h" #include "pm.h" #include "omap3-opp.h" +#include "smartreflex-class3.h" static void __init omap_zoom_map_io(void) { @@ -76,6 +77,7 @@ static void __init omap_zoom_init(void) omap_mux_init_gpio(64, OMAP_PIN_OUTPUT); usb_ehci_init(&ehci_pdata); + sr_class3_init(); } MACHINE_START(OMAP_ZOOM3, "OMAP Zoom3 board") diff --git a/arch/arm/mach-omap2/smartreflex-class3.c b/arch/arm/mach-omap2/smartreflex-class3.c new file mode 100644 index 0000000..f3b766f --- /dev/null +++ b/arch/arm/mach-omap2/smartreflex-class3.c @@ -0,0 +1,62 @@ +/* + * Smart reflex Class 3 specific implementations + * + * Author: Thara Gopinath <thara@ti.com> + * + * Copyright (C) 2010 Texas Instruments, Inc. + * Thara Gopinath <thara@ti.com> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#include <plat/smartreflex.h> + +#include "smartreflex-class3.h" +#include "voltage.h" + +static int sr_class3_enable(int id) +{ + unsigned long volt = 0; + + volt = get_curr_voltage(id); + if (!volt) { + pr_warning("%s: Current voltage unknown.Cannot enable SR%d\n", + __func__, id); + return -ENODATA; + } + + omap_voltageprocessor_enable(id); + return sr_enable(id, volt); +} + +static int sr_class3_disable(int id, int is_volt_reset) +{ + omap_voltageprocessor_disable(id); + sr_disable(id); + if (is_volt_reset) + omap_reset_voltage(id); + + return 0; +} + +static int sr_class3_configure(int id) +{ + return sr_configure_errgen(id); +} + +/* SR class3 structure */ +struct omap_smartreflex_class_data class3_data = { + .enable = sr_class3_enable, + .disable = sr_class3_disable, + .configure = sr_class3_configure, + .class_type = SR_CLASS3, +}; + +/* Smartreflex CLASS3 init API to be called from board file */ +int __init sr_class3_init(void) +{ + pr_info("SmartReflex CLASS3 initialized\n"); + return omap_sr_register_class(&class3_data); +} diff --git a/arch/arm/mach-omap2/smartreflex-class3.h b/arch/arm/mach-omap2/smartreflex-class3.h new file mode 100644 index 0000000..4d86037 --- /dev/null +++ b/arch/arm/mach-omap2/smartreflex-class3.h @@ -0,0 +1,23 @@ +/* + * Smartreflex Class 3 Routines + * + * Author: Thara Gopinath <thara@ti.com> + * + * Copyright (C) 2010 Texas Instruments, Inc. + * Thara Gopinath <thara@ti.com> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#ifndef __ARCH_ARM_MACH_OMAP2_SMARTREFLEXCLASS3_H +#define __ARCH_ARM_MACH_OMAP2_SMARTREFLEXCLASS3_H + +#ifdef CONFIG_OMAP_SMARTREFLEX_CLASS3 +int sr_class3_init(void); +#else +static int sr_class3_init(void) { return 0; } +#endif + +#endif diff --git a/arch/arm/plat-omap/Kconfig b/arch/arm/plat-omap/Kconfig index 34f265e..33256d8 100644 --- a/arch/arm/plat-omap/Kconfig +++ b/arch/arm/plat-omap/Kconfig @@ -85,6 +85,15 @@ config OMAP_SMARTREFLEX_TESTING WARNING: Enabling this option may cause your device to hang! +config OMAP_SMARTREFLEX_CLASS3 + bool "Class 3 mode of Smartreflex Implementation" + depends on OMAP_SMARTREFLEX && TWL4030_CORE + help + Say Y to enable Class 3 implementation of Smartreflex + + Class 3 implementation of Smartreflex employs continuous hardware + voltage caliberation. + config OMAP_RESET_CLOCKS bool "Reset unused clocks during boot" depends on ARCH_OMAP -- 1.7.0.rc1.33.g07cf0f ^ permalink raw reply related [flat|nested] 19+ messages in thread
* [PATCH 6/8] OMAP3: PM: Adding T2 enabling of smartreflex support 2010-05-29 16:32 ` [PATCH 5/8] OMAP3: PM: Adding smartreflex class3 driver Thara Gopinath @ 2010-05-29 16:32 ` Thara Gopinath 2010-05-29 16:32 ` [PATCH 7/8] OMAP: PM: Allowing an early init of pm debugfs driver Thara Gopinath 0 siblings, 1 reply; 19+ messages in thread From: Thara Gopinath @ 2010-05-29 16:32 UTC (permalink / raw) To: linux-omap Cc: khilman, paul, b-cousson, vishwanath.bs, sawant, Thara Gopinath This patch adds support in the twl4030 driver to hook up the API enabling smartreflex support on PMIC side with the smartreflex driver. Without this the OMAP smartreflex modules will not function. Signed-off-by: Thara Gopinath <thara@ti.com> --- drivers/mfd/twl-core.c | 7 +++++-- drivers/mfd/twl4030-power.c | 29 +++++++++++++++++++++++++++++ include/linux/i2c/twl.h | 1 + 3 files changed, 35 insertions(+), 2 deletions(-) diff --git a/drivers/mfd/twl-core.c b/drivers/mfd/twl-core.c index 562cd49..fc14bd6 100644 --- a/drivers/mfd/twl-core.c +++ b/drivers/mfd/twl-core.c @@ -1009,8 +1009,11 @@ twl_probe(struct i2c_client *client, const struct i2c_device_id *id) clocks_init(&client->dev, pdata->clock); /* load power event scripts */ - if (twl_has_power() && pdata->power) - twl4030_power_init(pdata->power); + if (twl_has_power()) { + twl4030_power_sr_init(); + if (pdata->power) + twl4030_power_init(pdata->power); + } /* Maybe init the T2 Interrupt subsystem */ if (client->irq diff --git a/drivers/mfd/twl4030-power.c b/drivers/mfd/twl4030-power.c index 7efa878..0e4d215 100644 --- a/drivers/mfd/twl4030-power.c +++ b/drivers/mfd/twl4030-power.c @@ -31,6 +31,8 @@ #include <asm/mach-types.h> +#include <plat/smartreflex.h> + static u8 twl4030_start_script_address = 0x2b; #define PWR_P1_SW_EVENTS 0x10 @@ -63,6 +65,10 @@ static u8 twl4030_start_script_address = 0x2b; #define R_MEMORY_ADDRESS PHY_TO_OFF_PM_MASTER(0x59) #define R_MEMORY_DATA PHY_TO_OFF_PM_MASTER(0x5a) +/* Smartreflex Control */ +#define R_DCDC_GLOBAL_CFG PHY_TO_OFF_PM_RECEIVER(0x61) +#define CFG_ENABLE_SRFLX 0x08 + #define R_PROTECT_KEY 0x0E #define R_KEY_1 0xC0 #define R_KEY_2 0x0C @@ -511,6 +517,29 @@ int twl4030_remove_script(u8 flags) return err; } +/* API to enable smrtreflex on Triton side */ +static void twl4030_smartreflex_init(void) +{ + int ret = 0; + u8 read_val; + + ret = twl_i2c_read_u8(TWL4030_MODULE_PM_RECEIVER, &read_val, + R_DCDC_GLOBAL_CFG); + read_val |= CFG_ENABLE_SRFLX; + ret |= twl_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER, read_val, + R_DCDC_GLOBAL_CFG); +} + +struct omap_smartreflex_pmic_data twl4030_sr_data = { + .sr_pmic_init = twl4030_smartreflex_init, +}; + +void __init twl4030_power_sr_init() +{ + /* Register the SR init API with the Smartreflex driver */ + omap_sr_register_pmic(&twl4030_sr_data); +} + void __init twl4030_power_init(struct twl4030_power_data *twl4030_scripts) { int err = 0; diff --git a/include/linux/i2c/twl.h b/include/linux/i2c/twl.h index fb6784e..3dc83fb 100644 --- a/include/linux/i2c/twl.h +++ b/include/linux/i2c/twl.h @@ -550,6 +550,7 @@ struct twl4030_power_data { }; extern void twl4030_power_init(struct twl4030_power_data *triton2_scripts); +extern void twl4030_power_sr_init(void); extern int twl4030_remove_script(u8 flags); struct twl4030_codec_audio_data { -- 1.7.0.rc1.33.g07cf0f ^ permalink raw reply related [flat|nested] 19+ messages in thread
* [PATCH 7/8] OMAP: PM: Allowing an early init of pm debugfs driver. 2010-05-29 16:32 ` [PATCH 6/8] OMAP3: PM: Adding T2 enabling of smartreflex support Thara Gopinath @ 2010-05-29 16:32 ` Thara Gopinath 2010-05-29 16:32 ` [PATCH 8/8] OMAP3: PM: Adding debug support to Voltage and Smartreflex drivers Thara Gopinath 2010-06-25 22:55 ` [PATCH 7/8] OMAP: PM: Allowing an early init of pm debugfs driver Kevin Hilman 0 siblings, 2 replies; 19+ messages in thread From: Thara Gopinath @ 2010-05-29 16:32 UTC (permalink / raw) To: linux-omap Cc: khilman, paul, b-cousson, vishwanath.bs, sawant, Thara Gopinath This patch changes the pm_db_init from arch initcall to a postcore initcall. With arch initcall, it is impossible for pm driver that gets initialized prior to this driver to use one of the pm debug fs entries during its init. Making it a postcore initcall ensures that this drver gets initialized early on before any pm drivers. Signed-off-by: Thara Gopinath <thara@ti.com> --- arch/arm/mach-omap2/pm-debug.c | 2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/arch/arm/mach-omap2/pm-debug.c b/arch/arm/mach-omap2/pm-debug.c index 4280006..b239c16 100644 --- a/arch/arm/mach-omap2/pm-debug.c +++ b/arch/arm/mach-omap2/pm-debug.c @@ -611,6 +611,6 @@ static int __init pm_dbg_init(void) return 0; } -arch_initcall(pm_dbg_init); +postcore_initcall(pm_dbg_init); #endif -- 1.7.0.rc1.33.g07cf0f ^ permalink raw reply related [flat|nested] 19+ messages in thread
* [PATCH 8/8] OMAP3: PM: Adding debug support to Voltage and Smartreflex drivers 2010-05-29 16:32 ` [PATCH 7/8] OMAP: PM: Allowing an early init of pm debugfs driver Thara Gopinath @ 2010-05-29 16:32 ` Thara Gopinath 2010-06-18 21:47 ` Kevin Hilman 2010-06-25 22:55 ` [PATCH 7/8] OMAP: PM: Allowing an early init of pm debugfs driver Kevin Hilman 1 sibling, 1 reply; 19+ messages in thread From: Thara Gopinath @ 2010-05-29 16:32 UTC (permalink / raw) To: linux-omap Cc: khilman, paul, b-cousson, vishwanath.bs, sawant, Thara Gopinath This patch adds debug support to the voltage and smartreflex drivers. This means a whole bunch of voltage processor and smartreflex parameters are now visible through the pm debugfs. By default only a read of these parameters are permitted. If you need to write into them then echo 1 > /pm_debug/enable_sr_vp_debug The voltage parameters can be viewed at /pm_debug/Voltage/VDD<X>/<parameter> and the smartreflex parameters can be viewed at /pm_debug/Smartreflex/SR<X>/<parameter> where <X> is 1 or 2 for OMAP3. Signed-off-by: Thara Gopinath <thara@ti.com> --- arch/arm/mach-omap2/pm-debug.c | 13 ++ arch/arm/mach-omap2/smartreflex.c | 39 ++++++- arch/arm/mach-omap2/voltage.c | 148 ++++++++++++++++++++++++- arch/arm/mach-omap2/voltage.h | 3 + arch/arm/plat-omap/include/plat/smartreflex.h | 2 - 5 files changed, 197 insertions(+), 8 deletions(-) diff --git a/arch/arm/mach-omap2/pm-debug.c b/arch/arm/mach-omap2/pm-debug.c index b239c16..fbba94b 100644 --- a/arch/arm/mach-omap2/pm-debug.c +++ b/arch/arm/mach-omap2/pm-debug.c @@ -35,6 +35,7 @@ #include "prm.h" #include "cm.h" #include "pm.h" +#include "voltage.h" int omap2_pm_debug; @@ -552,6 +553,16 @@ static int option_set(void *data, u64 val) if (option == &enable_off_mode) omap3_pm_off_mode_enable(val); + if (option == &enable_sr_vp_debug && val) + pr_notice("Beware that enabling this option will allow user " + "to override the system defined vp and sr parameters " + "All the updated parameters will take effect next " + "time smartreflex is enabled. Also this option " + "disables the automatic vp errorgain and sr errormin " + "limit changes as per the voltage. Users will have " + "to explicitly write values into the debug fs " + "entries corresponding to these if they want to see " + "them changing according to the VDD voltage\n"); return 0; } @@ -606,6 +617,8 @@ static int __init pm_dbg_init(void) &sleep_while_idle, &pm_dbg_option_fops); (void) debugfs_create_file("wakeup_timer_seconds", S_IRUGO | S_IWUGO, d, &wakeup_timer_seconds, &pm_dbg_option_fops); + (void) debugfs_create_file("enable_sr_vp_debug", S_IRUGO | S_IWUGO, d, + &enable_sr_vp_debug, &pm_dbg_option_fops); pm_dbg_main_dir = d; pm_dbg_init_done = 1; diff --git a/arch/arm/mach-omap2/smartreflex.c b/arch/arm/mach-omap2/smartreflex.c index 74b7c0c..57fc9b2 100644 --- a/arch/arm/mach-omap2/smartreflex.c +++ b/arch/arm/mach-omap2/smartreflex.c @@ -529,8 +529,13 @@ int sr_enable(int srid, unsigned long volt) return -ENODATA; } - /* errminlimit is opp dependent and hence linked to voltage */ - sr->err_minlimit = volt_data->sr_errminlimit; + /* + * errminlimit is opp dependent and hence linked to voltage + * if the debug option is enabled, the user might have over ridden + * this parameter so do not get it from voltage table + */ + if (!enable_sr_vp_debug) + sr->err_minlimit = volt_data->sr_errminlimit; /* Enable the clocks */ if (!sr->is_sr_enable) { @@ -785,8 +790,31 @@ static int omap_sr_autocomp_store(void *data, u64 val) return 0; } +static int omap_sr_params_show(void *data, u64 *val) +{ + u32 *param = data; + + *val = *param; + return 0; +} + +static int omap_sr_params_store(void *data, u64 val) +{ + if (enable_sr_vp_debug) { + u32 *option = data; + *option = val; + } else { + pr_notice("DEBUG option not enabled!\n \ + echo 1 > pm_debug/enable_sr_vp_debug - to enable\n"); + } + return 0; +} + DEFINE_SIMPLE_ATTRIBUTE(pm_sr_fops, omap_sr_autocomp_show, omap_sr_autocomp_store, "%llu\n"); + +DEFINE_SIMPLE_ATTRIBUTE(sr_params_fops, omap_sr_params_show, + omap_sr_params_store, "%llu\n"); #endif static int __init omap_smartreflex_probe(struct platform_device *pdev) @@ -849,6 +877,13 @@ static int __init omap_smartreflex_probe(struct platform_device *pdev) dbg_dir = debugfs_create_dir(name, sr_dbg_dir); (void) debugfs_create_file("autocomp", S_IRUGO | S_IWUGO, dbg_dir, (void *)sr_info, &pm_sr_fops); + (void) debugfs_create_file("errweight", S_IRUGO | S_IWUGO, dbg_dir, + &sr_info->err_weight, &sr_params_fops); + (void) debugfs_create_file("errmaxlimit", S_IRUGO | S_IWUGO, dbg_dir, + &sr_info->err_maxlimit, &sr_params_fops); + (void) debugfs_create_file("errminlimit", S_IRUGO | S_IWUGO, dbg_dir, + &sr_info->err_minlimit, &sr_params_fops); + #endif dev_info(&pdev->dev, "%s: SmartReflex driver initialized\n", __func__); diff --git a/arch/arm/mach-omap2/voltage.c b/arch/arm/mach-omap2/voltage.c index 657e322..e3d641d 100644 --- a/arch/arm/mach-omap2/voltage.c +++ b/arch/arm/mach-omap2/voltage.c @@ -23,6 +23,7 @@ #include <linux/io.h> #include <linux/clk.h> #include <linux/err.h> +#include <linux/debugfs.h> #include <plat/omap-pm.h> #include <plat/omap34xx.h> @@ -37,6 +38,13 @@ #define VP_IDLE_TIMEOUT 200 #define VP_TRANXDONE_TIMEOUT 300 +#ifdef CONFIG_PM_DEBUG +struct dentry *voltage_dir; +#endif + +/* VP SR debug support */ +u32 enable_sr_vp_debug; + /* PRM voltage module */ u32 volt_mod; @@ -107,6 +115,7 @@ struct omap_vdd_info{ struct clk *volt_clk; int opp_type; int volt_data_count; + int id; unsigned long nominal_volt; u8 cmdval_reg; u8 vdd_sr_reg; @@ -228,6 +237,54 @@ static int check_voltage_domain(int vdd) return -EINVAL; } +/* Voltage debugfs support */ +#ifdef CONFIG_PM_DEBUG +static int vp_debug_get(void *data, u64 *val) +{ + u16 *option = data; + + *val = *option; + return 0; +} + +static int vp_debug_set(void *data, u64 val) +{ + if (enable_sr_vp_debug) { + u32 *option = data; + *option = val; + } else { + pr_notice("DEBUG option not enabled!\n \ + echo 1 > pm_debug/enable_sr_vp_debug - to enable\n"); + } + return 0; +} + +static int vp_volt_debug_get(void *data, u64 *val) +{ + struct omap_vdd_info *info = (struct omap_vdd_info *) data; + u8 vsel; + + vsel = voltage_read_reg(info->vp_offs.voltage_reg); + pr_notice("curr_vsel = %x\n", vsel); + *val = vsel * 12500 + 600000; + + return 0; +} + +static int nom_volt_debug_get(void *data, u64 *val) +{ + struct omap_vdd_info *info = (struct omap_vdd_info *) data; + + *val = get_curr_voltage(info->id); + return 0; +} + +DEFINE_SIMPLE_ATTRIBUTE(vp_debug_fops, vp_debug_get, vp_debug_set, "%llu\n"); +DEFINE_SIMPLE_ATTRIBUTE(vp_volt_debug_fops, vp_volt_debug_get, NULL, "%llu\n"); +DEFINE_SIMPLE_ATTRIBUTE(nom_volt_debug_fops, nom_volt_debug_get, NULL, + "%llu\n"); +#endif + static void vp_latch_vsel(int vp_id) { u32 vpconfig; @@ -481,8 +538,49 @@ static void __init init_voltageprocesor(int vp_id) static void __init vdd_data_configure(int vdd) { +#ifdef CONFIG_PM_DEBUG + struct dentry *vdd_debug; + char name[5]; +#endif + vdd_info[vdd].id = vdd; if (cpu_is_omap34xx()) omap3_vdd_data_configure(vdd); + +#ifdef CONFIG_PM_DEBUG + sprintf(name, "VDD%d", vdd + 1); + vdd_debug = debugfs_create_dir(name, voltage_dir); + (void) debugfs_create_file("vp_errorgain", S_IRUGO | S_IWUGO, + vdd_debug, + &(vdd_info[vdd].vp_reg.vpconfig_errorgain), + &vp_debug_fops); + (void) debugfs_create_file("vp_smpswaittimemin", S_IRUGO | S_IWUGO, + vdd_debug, &(vdd_info[vdd].vp_reg. + vstepmin_smpswaittimemin), + &vp_debug_fops); + (void) debugfs_create_file("vp_stepmin", S_IRUGO | S_IWUGO, vdd_debug, + &(vdd_info[vdd].vp_reg.vstepmin_stepmin), + &vp_debug_fops); + (void) debugfs_create_file("vp_smpswaittimemax", S_IRUGO | S_IWUGO, + vdd_debug, &(vdd_info[vdd].vp_reg. + vstepmax_smpswaittimemax), + &vp_debug_fops); + (void) debugfs_create_file("vp_stepmax", S_IRUGO | S_IWUGO, vdd_debug, + &(vdd_info[vdd].vp_reg.vstepmax_stepmax), + &vp_debug_fops); + (void) debugfs_create_file("vp_vddmax", S_IRUGO | S_IWUGO, vdd_debug, + &(vdd_info[vdd].vp_reg.vlimitto_vddmax), + &vp_debug_fops); + (void) debugfs_create_file("vp_vddmin", S_IRUGO | S_IWUGO, vdd_debug, + &(vdd_info[vdd].vp_reg.vlimitto_vddmin), + &vp_debug_fops); + (void) debugfs_create_file("vp_timeout", S_IRUGO | S_IWUGO, vdd_debug, + &(vdd_info[vdd].vp_reg.vlimitto_timeout), + &vp_debug_fops); + (void) debugfs_create_file("curr_vp_volt", S_IRUGO, vdd_debug, + (void *) &vdd_info[vdd], &vp_volt_debug_fops); + (void) debugfs_create_file("curr_nominal_volt", S_IRUGO, vdd_debug, + (void *) &vdd_info[vdd], &nom_volt_debug_fops); +#endif } static void __init init_voltagecontroller(void) { @@ -541,8 +639,11 @@ static int vc_bypass_scale_voltage(u32 vdd, unsigned long target_volt) vc_cmdval |= (target_vsel << vc_cmd_on_shift); voltage_write_reg(vdd_info[vdd].cmdval_reg, vc_cmdval); - /* Setting vp errorgain based on the voltage */ - if (volt_data) { + /* + * Setting vp errorgain based on the voltage If the debug option is + * enabled allow the override of errorgain from user side + */ + if (!enable_sr_vp_debug && volt_data) { vp_errgain_val = voltage_read_reg(vdd_info[vdd]. vp_offs.vpconfig_reg); vdd_info[vdd].vp_reg.vpconfig_errorgain = @@ -629,8 +730,11 @@ static int vp_forceupdate_scale_voltage(u32 vdd, unsigned long target_volt) vc_cmdval |= (target_vsel << vc_cmd_on_shift); voltage_write_reg(vdd_info[vdd].cmdval_reg, vc_cmdval); - /* Getting vp errorgain based on the voltage */ - if (volt_data) + /* + * Getting vp errorgain based on the voltage If the debug option is + * enabled allow the override of errorgain from user side. + */ + if (!enable_sr_vp_debug && volt_data) vdd_info[vdd].vp_reg.vpconfig_errorgain = volt_data->vp_errgain; /* @@ -799,6 +903,39 @@ void omap_voltageprocessor_enable(int vp_id) if (!voltscale_vpforceupdate) vp_latch_vsel(vp_id); + /* + * If debug is enabled, it is likely that the following parameters + * were set from user space so rewrite them. + */ + if (enable_sr_vp_debug) { + vpconfig = voltage_read_reg( + vdd_info[vp_id].vp_offs.vpconfig_reg); + vpconfig |= (vdd_info[vp_id].vp_reg.vpconfig_errorgain << + vdd_info[vp_id].vp_reg.vpconfig_errorgain_shift); + voltage_write_reg(vdd_info[vp_id].vp_offs.vpconfig_reg, + vpconfig); + + voltage_write_reg(vdd_info[vp_id].vp_offs.vstepmin_reg, + (vdd_info[vp_id].vp_reg.vstepmin_smpswaittimemin << + vdd_info[vp_id].vp_reg.vstepmin_smpswaittimemin_shift) | + (vdd_info[vp_id].vp_reg.vstepmin_stepmin << + vdd_info[vp_id].vp_reg.vstepmin_stepmin_shift)); + + voltage_write_reg(vdd_info[vp_id].vp_offs.vstepmax_reg, + (vdd_info[vp_id].vp_reg.vstepmax_smpswaittimemax << + vdd_info[vp_id].vp_reg.vstepmax_smpswaittimemax_shift) | + (vdd_info[vp_id].vp_reg.vstepmax_stepmax << + vdd_info[vp_id].vp_reg.vstepmax_stepmax_shift)); + + voltage_write_reg(vdd_info[vp_id].vp_offs.vlimitto_reg, + (vdd_info[vp_id].vp_reg.vlimitto_vddmax << + vdd_info[vp_id].vp_reg.vlimitto_vddmax_shift) | + (vdd_info[vp_id].vp_reg.vlimitto_vddmin << + vdd_info[vp_id].vp_reg.vlimitto_vddmin_shift) | + (vdd_info[vp_id].vp_reg.vlimitto_timeout << + vdd_info[vp_id].vp_reg.vlimitto_timeout_shift)); + } + vpconfig = voltage_read_reg(vdd_info[vp_id].vp_offs.vpconfig_reg); /* Enable VP */ voltage_write_reg(vdd_info[vp_id].vp_offs.vpconfig_reg, @@ -1044,6 +1181,9 @@ static int __init omap_voltage_init(void) return 0; } +#ifdef CONFIG_PM_DEBUG + voltage_dir = debugfs_create_dir("Voltage", pm_dbg_main_dir); +#endif if (cpu_is_omap34xx()) { volt_mod = OMAP3430_GR_MOD; vdd_info = omap3_vdd_info; diff --git a/arch/arm/mach-omap2/voltage.h b/arch/arm/mach-omap2/voltage.h index f2796b2..a7be515 100644 --- a/arch/arm/mach-omap2/voltage.h +++ b/arch/arm/mach-omap2/voltage.h @@ -14,6 +14,9 @@ #ifndef __ARCH_ARM_MACH_OMAP2_VOLTAGE_H #define __ARCH_ARM_MACH_OMAP2_VOLTAGE_H +extern u32 enable_sr_vp_debug; +extern struct dentry *pm_dbg_main_dir; + /* VoltageDomain instances */ #define VDD1 0 #define VDD2 1 diff --git a/arch/arm/plat-omap/include/plat/smartreflex.h b/arch/arm/plat-omap/include/plat/smartreflex.h index 2225f27..1105db0 100644 --- a/arch/arm/plat-omap/include/plat/smartreflex.h +++ b/arch/arm/plat-omap/include/plat/smartreflex.h @@ -22,8 +22,6 @@ #include <linux/platform_device.h> -extern struct dentry *pm_dbg_main_dir; - /* * Different Smartreflex IPs version. The v1 is the 65nm version used in * OMAP3430. The v2 is the update for the 45nm version of the IP -- 1.7.0.rc1.33.g07cf0f ^ permalink raw reply related [flat|nested] 19+ messages in thread
* Re: [PATCH 8/8] OMAP3: PM: Adding debug support to Voltage and Smartreflex drivers 2010-05-29 16:32 ` [PATCH 8/8] OMAP3: PM: Adding debug support to Voltage and Smartreflex drivers Thara Gopinath @ 2010-06-18 21:47 ` Kevin Hilman 0 siblings, 0 replies; 19+ messages in thread From: Kevin Hilman @ 2010-06-18 21:47 UTC (permalink / raw) To: Thara Gopinath; +Cc: linux-omap, paul, b-cousson, vishwanath.bs, sawant Thara Gopinath <thara@ti.com> writes: > From: Thara Gopinath <thara@ti.com> > Subject: [PATCH 8/8] OMAP3: PM: Adding debug support to Voltage and Smartreflex drivers > To: linux-omap@vger.kernel.org > Cc: khilman@deeprootsystems.com, paul@pwsan.com, b-cousson@ti.com, > vishwanath.bs@ti.com, sawant@ti.com, Thara Gopinath <thara@ti.com> > Date: Sat, 29 May 2010 22:02:28 +0530 > > This patch adds debug support to the voltage and smartreflex drivers. > This means a whole bunch of voltage processor and smartreflex > parameters are now visible through the pm debugfs. By default > only a read of these parameters are permitted. If you need to > write into them then > echo 1 > /pm_debug/enable_sr_vp_debug > > The voltage parameters can be viewed at > /pm_debug/Voltage/VDD<X>/<parameter> > and the smartreflex parameters can be viewed at > /pm_debug/Smartreflex/SR<X>/<parameter> Minor nit: there's no hard rule for this, but these debugfs files and directories are typically all lower-case. Please continue that convention. Kevin ^ permalink raw reply [flat|nested] 19+ messages in thread
* Re: [PATCH 7/8] OMAP: PM: Allowing an early init of pm debugfs driver. 2010-05-29 16:32 ` [PATCH 7/8] OMAP: PM: Allowing an early init of pm debugfs driver Thara Gopinath 2010-05-29 16:32 ` [PATCH 8/8] OMAP3: PM: Adding debug support to Voltage and Smartreflex drivers Thara Gopinath @ 2010-06-25 22:55 ` Kevin Hilman 1 sibling, 0 replies; 19+ messages in thread From: Kevin Hilman @ 2010-06-25 22:55 UTC (permalink / raw) To: Thara Gopinath; +Cc: linux-omap, paul, b-cousson, vishwanath.bs, sawant Thara Gopinath <thara@ti.com> writes: > This patch changes the pm_db_init from arch initcall to a postcore > initcall. With arch initcall, it is impossible for pm driver that > gets initialized prior to this driver to use one of the > pm debug fs entries during its init. Making it a postcore initcall > ensures that this drver gets initialized early on before any pm > drivers. > > Signed-off-by: Thara Gopinath <thara@ti.com> > --- > arch/arm/mach-omap2/pm-debug.c | 2 +- > 1 files changed, 1 insertions(+), 1 deletions(-) > > diff --git a/arch/arm/mach-omap2/pm-debug.c b/arch/arm/mach-omap2/pm-debug.c > index 4280006..b239c16 100644 > --- a/arch/arm/mach-omap2/pm-debug.c > +++ b/arch/arm/mach-omap2/pm-debug.c > @@ -611,6 +611,6 @@ static int __init pm_dbg_init(void) > > return 0; > } > -arch_initcall(pm_dbg_init); > +postcore_initcall(pm_dbg_init); There's already a 'pm_dbg_init_done' flag in this code being used for that purpose. That should be re-used instead. Kevin ^ permalink raw reply [flat|nested] 19+ messages in thread
* Re: [PATCH 4/8] OMAP3: PM: Adding smartreflex hwmod data 2010-05-29 16:32 ` [PATCH 4/8] OMAP3: PM: Adding smartreflex hwmod data Thara Gopinath 2010-05-29 16:32 ` [PATCH 5/8] OMAP3: PM: Adding smartreflex class3 driver Thara Gopinath @ 2010-06-18 20:46 ` Kevin Hilman 1 sibling, 0 replies; 19+ messages in thread From: Kevin Hilman @ 2010-06-18 20:46 UTC (permalink / raw) To: Thara Gopinath; +Cc: linux-omap, paul, b-cousson, vishwanath.bs, sawant Thara Gopinath <thara@ti.com> writes: > This patch adds the smartreflex hwmod data for OMAP3430 > and OMAP3630. A dev_attr is also added to the hwmod > structure for each smartreflex module which contains > SoC specific info like the efuse offsets, test n-values > etc. > > Signed-off-by: Thara Gopinath <thara@ti.com> [...] > +static struct omap_hwmod_ocp_if omap3_l4_core__sr1 = { > + .master = &omap3xxx_l4_core_hwmod, > + .slave = &omap34xx_sr1_hwmod, > + .clk = "sr_l4_ick", > + .addr = omap3_sr1_addr_space, > + .addr_cnt = ARRAY_SIZE(omap3_sr1_addr_space), > + .user = OCP_USER_MPU, For enable to work, these all nee the .prcm.omap2 sub struct filled out. Kevin ^ permalink raw reply [flat|nested] 19+ messages in thread
* Re: [PATCH 2/8] OMAP3: PM: Adding smartreflex driver support. 2010-05-29 16:32 ` [PATCH 2/8] OMAP3: PM: Adding smartreflex driver support Thara Gopinath 2010-05-29 16:32 ` [PATCH 3/8] OMAP3: PM: Adding smartreflex device file Thara Gopinath @ 2010-06-23 20:13 ` Kevin Hilman 1 sibling, 0 replies; 19+ messages in thread From: Kevin Hilman @ 2010-06-23 20:13 UTC (permalink / raw) To: Thara Gopinath; +Cc: linux-omap, paul, b-cousson, vishwanath.bs, sawant Thara Gopinath <thara@ti.com> writes: > SmartReflex modules do adaptive voltage control for real-time > voltage adjustments. With Smartreflex the power supply voltage > can be adapted to the silicon performance(manufacturing process, > temperature induced performance, age induced performance etc). > > There are differnet classes of smartreflex implementation. > Class-0: Manufacturing Test Calibration > Class-1: Boot-Time Software Calibration > Class-2: Continuous Software Calibration > Class-3: Continuous Hardware Calibration > Class-4: Fully Integrated Power Management > > OMAP3 has two smartreflex modules one associated with VDD1 and the > other associated with VDD2. > This patch adds support for smartreflex driver. The driver is designed > for Class-1 , Class-2 and Class-3 support and is a platform driver. > Smartreflex driver can be enabled through a Kconfig option > "SmartReflex support" under "System type"->"TI OMAP implementations" menu. > > Smartreflex autocompensation feature can be enabled runtime through > a debug fs option. > To enable smartreflex autocompensation feature > echo 1 > /debugfs/pm_debug/Smartreflex/SR<X>/autocomp > To disable smartreflex autocompensation feature > echo 0 > /debugfs/pm_debug/Smartreflex/SR<X>/autocomp > > This patch contains code originally in linux omap pm branch. > Major contributors to this driver are > Lesly A M, Rajendra Nayak, Kalle Jokiniemi, Paul Walmsley, > Nishant Menon, Kevin Hilman. > > Signed-off-by: Thara Gopinath <thara@ti.com> > --- > arch/arm/mach-omap2/Makefile | 1 + > arch/arm/mach-omap2/pm-debug.c | 3 +- > arch/arm/mach-omap2/smartreflex.c | 934 +++++++++++++++++++++++++ [...] > diff --git a/arch/arm/mach-omap2/pm-debug.c b/arch/arm/mach-omap2/pm-debug.c > index 6cac981..4280006 100644 > --- a/arch/arm/mach-omap2/pm-debug.c > +++ b/arch/arm/mach-omap2/pm-debug.c > @@ -162,7 +162,7 @@ void omap2_pm_dump(int mode, int resume, unsigned int us) > > static void pm_dbg_regset_store(u32 *ptr); > > -struct dentry *pm_dbg_dir; > +struct dentry *pm_dbg_dir, *pm_dbg_main_dir; > > static int pm_dbg_init_done; > > @@ -606,6 +606,7 @@ static int __init pm_dbg_init(void) > &sleep_while_idle, &pm_dbg_option_fops); > (void) debugfs_create_file("wakeup_timer_seconds", S_IRUGO | S_IWUGO, d, > &wakeup_timer_seconds, &pm_dbg_option_fops); > + pm_dbg_main_dir = d; > pm_dbg_init_done = 1; > > return 0; Not clear what this change is doing in this patch. I think this belongs with PATCH 8/8. Kevin ^ permalink raw reply [flat|nested] 19+ messages in thread
* Re: [PATCH 1/8] OMAP3: PM: Adding voltage driver support for OMAP3 2010-05-29 16:32 ` [PATCH 1/8] OMAP3: PM: Adding voltage driver support for OMAP3 Thara Gopinath 2010-05-29 16:32 ` [PATCH 2/8] OMAP3: PM: Adding smartreflex driver support Thara Gopinath @ 2010-06-23 18:42 ` Kevin Hilman 2010-06-23 18:57 ` Kevin Hilman 2 siblings, 0 replies; 19+ messages in thread From: Kevin Hilman @ 2010-06-23 18:42 UTC (permalink / raw) To: Thara Gopinath; +Cc: linux-omap, paul, b-cousson, vishwanath.bs, sawant Thara Gopinath <thara@ti.com> writes: > This patch adds voltage driver support for OMAP3. The driver > allows configuring the voltage controller and voltage > processors during init and exports APIs to enable/disable > voltage processors, scale voltage and reset voltage. > The driver also maintains the global voltage table on a per > VDD basis which contains the various voltages supported by the > VDD along with per voltage dependent data like smartreflex > n-target value, errminlimit and voltage processor errorgain. > The driver allows scaling of VDD voltages either through > "vc bypass method" or through "vp forceupdate method" the > choice being configurable through the board file. > > This patch contains code originally in linux omap pm branch > smartreflex driver. Major contributors to this driver are > Lesly A M, Rajendra Nayak, Kalle Jokiniemi, Paul Walmsley, > Nishant Menon, Kevin Hilman. > > Signed-off-by: Thara Gopinath <thara@ti.com> First some general comments: I thought we had agreed that all the internal functions should not need to take a VDD ID, but instead they could be just passed a vdd_info pointer. I would greatly improve readability to see all usage of vdd_info[vdd_id] go away. In the exported functions that take vdd_id as an argument, just do something like struct omap_vdd_info *vdd = vdd_info[vdd_id]; at the beginning, then replace all the instances of vdd_info[vdd_id] with 'vdd->' In the rest of the internal functions, make them take the pointer as the argument instead of the id. Also, we have a bunch of stuff in the current pm-vc branch which allows boards to override settings. Are you planning to address that in this series? or is Lesly going to continue that work? Some other comments below... > --- > arch/arm/mach-omap2/Makefile | 3 +- > arch/arm/mach-omap2/voltage.c | 1059 +++++++++++++++++++++++++++++++++++++++++ > arch/arm/mach-omap2/voltage.h | 123 +++++ > 3 files changed, 1184 insertions(+), 1 deletions(-) > create mode 100644 arch/arm/mach-omap2/voltage.c > create mode 100644 arch/arm/mach-omap2/voltage.h > > diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile > index e975b43..e4c660d 100644 > --- a/arch/arm/mach-omap2/Makefile > +++ b/arch/arm/mach-omap2/Makefile > @@ -46,7 +46,8 @@ obj-$(CONFIG_ARCH_OMAP2) += sdrc2xxx.o > ifeq ($(CONFIG_PM),y) > obj-$(CONFIG_ARCH_OMAP2) += pm24xx.o > obj-$(CONFIG_ARCH_OMAP2) += sleep24xx.o > -obj-$(CONFIG_ARCH_OMAP3) += pm34xx.o sleep34xx.o cpuidle34xx.o > +obj-$(CONFIG_ARCH_OMAP3) += pm34xx.o sleep34xx.o cpuidle34xx.o \ > + voltage.o > obj-$(CONFIG_PM_DEBUG) += pm-debug.o > > AFLAGS_sleep24xx.o :=-Wa,-march=armv6 > diff --git a/arch/arm/mach-omap2/voltage.c b/arch/arm/mach-omap2/voltage.c > new file mode 100644 > index 0000000..657e322 > --- /dev/null > +++ b/arch/arm/mach-omap2/voltage.c > @@ -0,0 +1,1059 @@ > +/* > + * OMAP3/OMAP4 Voltage Management Routines > + * > + * Author: Thara Gopinath <thara@ti.com> > + * > + * Copyright (C) 2007 Texas Instruments, Inc. > + * Rajendra Nayak <rnayak@ti.com> > + * Lesly A M <x0080970@ti.com> > + * > + * Copyright (C) 2008 Nokia Corporation > + * Kalle Jokiniemi > + * > + * Copyright (C) 2010 Texas Instruments, Inc. > + * Thara Gopinath <thara@ti.com> > + * > + * This program is free software; you can redistribute it and/or modify > + * it under the terms of the GNU General Public License version 2 as > + * published by the Free Software Foundation. > + */ > + > +#include <linux/pm.h> > +#include <linux/delay.h> > +#include <linux/io.h> > +#include <linux/clk.h> > +#include <linux/err.h> > + > +#include <plat/omap-pm.h> > +#include <plat/omap34xx.h> > +#include <plat/opp.h> > +#include <plat/opp_twl_tps.h> > +#include <plat/clock.h> > +#include <plat/common.h> > + > +#include "prm-regbits-34xx.h" > +#include "voltage.h" > + > +#define VP_IDLE_TIMEOUT 200 > +#define VP_TRANXDONE_TIMEOUT 300 > + > +/* PRM voltage module */ > +u32 volt_mod; should be static > +/* Voltage processor register offsets */ > +struct vp_reg_offs { > + u8 vpconfig_reg; > + u8 vstepmin_reg; > + u8 vstepmax_reg; > + u8 vlimitto_reg; > + u8 status_reg; > + u8 voltage_reg; > +}; Minor issue, but the _reg suffix is not really needed on all these names. [...] > + > +/* Generic voltage init functions */ > +static void __init init_voltageprocesor(int vp_id) was mystified why I wasn't finding this function when grepping and discovered there should be two 's's in processor in this function name. [...] > diff --git a/arch/arm/mach-omap2/voltage.h b/arch/arm/mach-omap2/voltage.h [...] For the naming, rather than the long names voltagecontroller, voltageprocessor, I'd suggest just using vc and vp. For the external functions, they can have the omap_ prefix. > +unsigned long omap_voltageprocessor_get_curr_volt(int vp_id); > +void omap_voltageprocessor_enable(int vp_id); > +void omap_voltageprocessor_disable(int vp_id); these should be omap_vp_* > +int omap_voltage_scale(int vdd, unsigned long target_volt); > +void omap_reset_voltage(int vdd); omap_voltage_reset() > +int omap_get_voltage_table(int vdd, struct omap_volt_data **volt_data); omap_voltage_get_table() > +struct omap_volt_data *omap_get_volt_data(int vdd, unsigned long volt); omap_voltage_get_data() > +void omap_voltage_register_pmic(struct omap_volt_pmic_info *pmic_info); > +unsigned long get_curr_voltage(int vdd); omap_voltage_get() > +#ifdef CONFIG_PM > +void omap_voltage_init_vc(struct omap_volt_vc_data *setup_vc); > +#else > +static inline void omap_voltage_init_vc(struct omap_volt_vc_data *setup_vc) {} > +#endif > + > +#endif > -- > 1.7.0.rc1.33.g07cf0f Kevin ^ permalink raw reply [flat|nested] 19+ messages in thread
* Re: [PATCH 1/8] OMAP3: PM: Adding voltage driver support for OMAP3 2010-05-29 16:32 ` [PATCH 1/8] OMAP3: PM: Adding voltage driver support for OMAP3 Thara Gopinath 2010-05-29 16:32 ` [PATCH 2/8] OMAP3: PM: Adding smartreflex driver support Thara Gopinath 2010-06-23 18:42 ` [PATCH 1/8] OMAP3: PM: Adding voltage driver support for OMAP3 Kevin Hilman @ 2010-06-23 18:57 ` Kevin Hilman 2 siblings, 0 replies; 19+ messages in thread From: Kevin Hilman @ 2010-06-23 18:57 UTC (permalink / raw) To: Thara Gopinath; +Cc: linux-omap, paul, b-cousson, vishwanath.bs, sawant Thara Gopinath <thara@ti.com> writes: > This patch adds voltage driver support for OMAP3. The driver > allows configuring the voltage controller and voltage > processors during init and exports APIs to enable/disable > voltage processors, scale voltage and reset voltage. > The driver also maintains the global voltage table on a per > VDD basis which contains the various voltages supported by the > VDD along with per voltage dependent data like smartreflex > n-target value, errminlimit and voltage processor errorgain. > The driver allows scaling of VDD voltages either through > "vc bypass method" or through "vp forceupdate method" the > choice being configurable through the board file. > > This patch contains code originally in linux omap pm branch > smartreflex driver. Major contributors to this driver are > Lesly A M, Rajendra Nayak, Kalle Jokiniemi, Paul Walmsley, > Nishant Menon, Kevin Hilman. > > Signed-off-by: Thara Gopinath <thara@ti.com> [...] > +/** > + * get_curr_vdd_voltage : Gets the current non-auto-compensated voltage > + * @vdd : the VDD for which current voltage info is needed > + * > + * API to get the current non-auto-compensated voltage for a VDD. > + * Returns 0 in case of error else returns the current voltage for the VDD. > + */ > +unsigned long get_curr_voltage(int vdd) > +{ > + struct omap_opp *opp; > + unsigned long freq; > + > + if (check_voltage_domain(vdd)) { > + pr_warning("%s: VDD %d does not exist!\n", __func__, vdd); > + return 0; > + } > + > + freq = vdd_info[vdd].volt_clk->rate; > + opp = opp_find_freq_ceil(vdd_info[vdd].opp_type, &freq); > + if (IS_ERR(opp)) { > + pr_warning("%s: Unable to find OPP for VDD%d freq%ld\n", > + __func__, vdd + 1, freq); > + return 0; > + } > + > + /* > + * Use higher freq voltage even if an exact match is not available > + * we are probably masking a clock framework bug, so warn > + */ > + if (unlikely(freq != vdd_info[vdd].volt_clk->rate)) > + pr_warning("%s: Available freq %ld != dpll freq %ld.\n", > + __func__, freq, vdd_info[vdd].volt_clk->rate); > + > + return opp_get_voltage(opp); > +} Rather than having to do an OPP lookup each time based on current clock rate, why not just store the current voltage into vdd_info and update it whenever it changes. This function could then just return that value. Kevin ^ permalink raw reply [flat|nested] 19+ messages in thread
* Re: [PATCH 0/8] OMAP3: Adding Smartreflex and Voltage driver support 2010-05-29 16:32 [PATCH 0/8] OMAP3: Adding Smartreflex and Voltage driver support Thara Gopinath 2010-05-29 16:32 ` [PATCH 1/8] OMAP3: PM: Adding voltage driver support for OMAP3 Thara Gopinath @ 2010-06-02 23:52 ` Kevin Hilman 2010-06-03 23:27 ` Kevin Hilman 2010-06-24 23:25 ` Kevin Hilman 2 siblings, 1 reply; 19+ messages in thread From: Kevin Hilman @ 2010-06-02 23:52 UTC (permalink / raw) To: Thara Gopinath; +Cc: linux-omap, paul, b-cousson, vishwanath.bs, sawant Thara Gopinath <thara@ti.com> writes: > This patch series introduces smartreflex and voltage driver support > for OMAP3430 and OMAP3630. SmartReflex modules do adaptive voltage > control for real-time voltage adjustments. > > Originally all the functionalities introduced in this patch > were present in arch/arm/mach-omap2/smartreflex.c file in Kevin's > pm tree. This patch series does a major rewrite of this file > and introduces a separate voltage driver. Major contributors > to the original driver are This is excellent, thanks for the rebase/reorg/compress. While not yet get getting to a full review of this series, I'd like it to get some broader testing. To that end, I've replaced the pm-sr branch in my pm tree with this series, and rebuilt a new PM branch using it. Note that it is also based on top of a new pm-opp branch which is Nishanth's condensed version which is also upstream bound for the next merge window. I had to do a couple minor fixes to apply against v2.6.35-rc1 (mainly fixing usage of #defines that were renamed to have a _MASK suffix.) It currently boots fine on OMAP3EVM (no efuse values, so no SR) but when I try it on Zoom3, I get repeated errors: Wake up daisy chain activation failed. I haven't fully isolated the root cause yet, but it looks like it might be because omap3_enable_io_chain() seems confused about whether it should be writing PM_WKEN or PM_WKST reg. The patch below (on top of new PM branch) seems to have fixed that problem for Zoom3. Kevin diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c index e531621..207905d 100644 --- a/arch/arm/mach-omap2/pm34xx.c +++ b/arch/arm/mach-omap2/pm34xx.c @@ -115,7 +115,7 @@ static void omap3_enable_io_chain(void) /* Do a readback to assure write has been done */ prm_read_mod_reg(WKUP_MOD, PM_WKEN); - while (!(prm_read_mod_reg(WKUP_MOD, PM_WKST) & + while (!(prm_read_mod_reg(WKUP_MOD, PM_WKEN) & OMAP3430_ST_IO_CHAIN_MASK)) { timeout++; if (timeout > 1000) { @@ -124,7 +124,7 @@ static void omap3_enable_io_chain(void) return; } prm_set_mod_reg_bits(OMAP3430_ST_IO_CHAIN_MASK, - WKUP_MOD, PM_WKST); + WKUP_MOD, PM_WKEN); } } } ^ permalink raw reply related [flat|nested] 19+ messages in thread
* Re: [PATCH 0/8] OMAP3: Adding Smartreflex and Voltage driver support 2010-06-02 23:52 ` [PATCH 0/8] OMAP3: Adding Smartreflex and Voltage driver support Kevin Hilman @ 2010-06-03 23:27 ` Kevin Hilman 0 siblings, 0 replies; 19+ messages in thread From: Kevin Hilman @ 2010-06-03 23:27 UTC (permalink / raw) To: Thara Gopinath; +Cc: linux-omap, paul, b-cousson, vishwanath.bs, sawant Kevin Hilman <khilman@deeprootsystems.com> writes: > Thara Gopinath <thara@ti.com> writes: > >> This patch series introduces smartreflex and voltage driver support >> for OMAP3430 and OMAP3630. SmartReflex modules do adaptive voltage >> control for real-time voltage adjustments. >> >> Originally all the functionalities introduced in this patch >> were present in arch/arm/mach-omap2/smartreflex.c file in Kevin's >> pm tree. This patch series does a major rewrite of this file >> and introduces a separate voltage driver. Major contributors >> to the original driver are > > This is excellent, thanks for the rebase/reorg/compress. > > While not yet get getting to a full review of this series, I'd like it > to get some broader testing. To that end, I've replaced the pm-sr > branch in my pm tree with this series, and rebuilt a new PM branch > using it. > > Note that it is also based on top of a new pm-opp branch which is > Nishanth's condensed version which is also upstream bound for the next > merge window. > > I had to do a couple minor fixes to apply against v2.6.35-rc1 (mainly > fixing usage of #defines that were renamed to have a _MASK suffix.) > > It currently boots fine on OMAP3EVM (no efuse values, so no SR) but > when I try it on Zoom3, I get repeated errors: > > Wake up daisy chain activation failed. > > I haven't fully isolated the root cause yet, but it looks like it > might be because omap3_enable_io_chain() seems confused about whether > it should be writing PM_WKEN or PM_WKST reg. > > The patch below (on top of new PM branch) seems to have fixed that > problem for Zoom3. FYI... I've posted this patch below and it is now in my pm-fixes branch which is part of the PM branch. Kevin > > diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c > index e531621..207905d 100644 > --- a/arch/arm/mach-omap2/pm34xx.c > +++ b/arch/arm/mach-omap2/pm34xx.c > @@ -115,7 +115,7 @@ static void omap3_enable_io_chain(void) > /* Do a readback to assure write has been done */ > prm_read_mod_reg(WKUP_MOD, PM_WKEN); > > - while (!(prm_read_mod_reg(WKUP_MOD, PM_WKST) & > + while (!(prm_read_mod_reg(WKUP_MOD, PM_WKEN) & > OMAP3430_ST_IO_CHAIN_MASK)) { > timeout++; > if (timeout > 1000) { > @@ -124,7 +124,7 @@ static void omap3_enable_io_chain(void) > return; > } > prm_set_mod_reg_bits(OMAP3430_ST_IO_CHAIN_MASK, > - WKUP_MOD, PM_WKST); > + WKUP_MOD, PM_WKEN); > } > } > } ^ permalink raw reply [flat|nested] 19+ messages in thread
* Re: [PATCH 0/8] OMAP3: Adding Smartreflex and Voltage driver support 2010-05-29 16:32 [PATCH 0/8] OMAP3: Adding Smartreflex and Voltage driver support Thara Gopinath 2010-05-29 16:32 ` [PATCH 1/8] OMAP3: PM: Adding voltage driver support for OMAP3 Thara Gopinath 2010-06-02 23:52 ` [PATCH 0/8] OMAP3: Adding Smartreflex and Voltage driver support Kevin Hilman @ 2010-06-24 23:25 ` Kevin Hilman 2010-06-25 8:04 ` Gopinath, Thara 2 siblings, 1 reply; 19+ messages in thread From: Kevin Hilman @ 2010-06-24 23:25 UTC (permalink / raw) To: Thara Gopinath; +Cc: linux-omap, paul, b-cousson, vishwanath.bs, sawant Thara Gopinath <thara@ti.com> writes: > This patch series introduces smartreflex and voltage driver support > for OMAP3430 and OMAP3630. SmartReflex modules do adaptive voltage > control for real-time voltage adjustments. > > Originally all the functionalities introduced in this patch > were present in arch/arm/mach-omap2/smartreflex.c file in Kevin's > pm tree. This patch series does a major rewrite of this file > and introduces a separate voltage driver. Major contributors > to the original driver are I just noticed that one thing missing from this series compared to what was in the previous PM branch is the disable/enable of SR in the idle path, so SR is not getting exercised during idle anymore in the current PM branch. Could you rememdy that please with another patch on top of this series (the new pm-sr branch?) Kevin > Eduardo Valentin (1): > OMAP3: PM: SmartReflex: Fix scheduled while atomic problem > > Kalle Jokiniemi (1): > OMAP3: PM: SmartReflex driver integration > > Kevin Hilman (2): > temp: SR: IO_ADDRESS conversion > OMAP: SR: OPP interfaces removed from OMAP PM layer > > Nishanth Menon (1): > omap3: pm: sr: replace get_opp with freq_to_opp > > Paul Walmsley (2): > OMAP SR: use opp_find_opp_by_opp_id() > OMAP SR: use OPP API for OPP ID, remove direct access > > Phil Carmody (2): > OMAP3: PM: Don't do unnecessary searches in omap_sr_vdd*_autocomp_store > OMAP3: PM: Early exit on invalid parameters > > Rajendra Nayak (9): > OMAP3: SR: Fix init voltage on OPP change > OMAP3: SR: Update VDD1/2 voltages at boot > OMAP3: SR: Use sysclk for SR CLKLENGTH calc > OMAP3: SR: Reset voltage level on SR disable > OMAP3: SR: Replace printk's with pr_* calls > OMAP3: SR: Remove redundant defines > OMAP3: SR: Fix SR driver to check for omap-pm return values > OMAP3: PM: Put optimal SMPS stabilization delay > OMAP3: SR: Wait for VP idle before a VP disable > > Roger Quadros (4): > OMAP3: PM: Fix Smartreflex when used with PM_NOOP layer > OMAP3: PM: Make Smartreflex driver independent of SRF > OMAP3: PM: Do not Enable SmartReflex if OPP tables not defined > OMAP3: PM: Smartreflex: Fix VDD2 OPP determining logic > > Romit Dasgupta (1): > omap: pm: SR: use enum for OPP types > > Teerth Reddy (1): > OMAP3: SR: Replace SR_PASS/FAIL,SR_TRUE/FALSE > > Tero Kristo (1): > Smartreflex: Avoid unnecessary spam > > > This patch series is based against origin/opp branch off > Kevin's pm tree which in turn is based off lo-master. > This series will apply against lo-master also but will > break compilation due to lack of opp framework support > on lo-master. > > This patch series has been tested on OMAP3430 SDP, > OMAP3630 SDP and ZOOM3 with the following menuconfig > options enabled. > System type -> TI OMAP Implementations -> Smartreflex Support > System type -> TI OMAP Implementations -> > Class 3 mode of Smartreflex Implementation > Device Drivers -> Multifunction device drivers -> > Support power resources on TWL4030 family chips > > Thara Gopinath (8): > OMAP3: PM: Adding voltage driver support for OMAP3 > OMAP3: PM: Adding smartreflex driver support. > OMAP3: PM: Adding smartreflex device file. > OMAP3: PM: Adding smartreflex hwmod data > OMAP3: PM: Adding smartreflex class3 driver > OMAP3: PM: Adding T2 enabling of smartreflex support > OMAP: PM: Allowing an early init of pm debugfs driver. > OMAP3: PM: Adding debug support to Voltage and Smartreflex drivers > > arch/arm/mach-omap2/Makefile | 5 +- > arch/arm/mach-omap2/board-3430sdp.c | 2 + > arch/arm/mach-omap2/board-3630sdp.c | 2 + > arch/arm/mach-omap2/board-zoom3.c | 2 + > arch/arm/mach-omap2/omap_hwmod_3xxx_data.c | 209 +++++- > arch/arm/mach-omap2/pm-debug.c | 18 +- > arch/arm/mach-omap2/smartreflex-class3.c | 62 ++ > arch/arm/mach-omap2/smartreflex-class3.h | 23 + > arch/arm/mach-omap2/smartreflex.c | 969 ++++++++++++++++++++ > arch/arm/mach-omap2/sr_device.c | 177 ++++ > arch/arm/mach-omap2/voltage.c | 1199 +++++++++++++++++++++++++ > arch/arm/mach-omap2/voltage.h | 126 +++ > arch/arm/plat-omap/Kconfig | 41 + > arch/arm/plat-omap/include/plat/control.h | 27 + > arch/arm/plat-omap/include/plat/smartreflex.h | 273 ++++++ > drivers/mfd/twl-core.c | 7 +- > drivers/mfd/twl4030-power.c | 29 + > include/linux/i2c/twl.h | 1 + > 18 files changed, 3166 insertions(+), 6 deletions(-) > create mode 100644 arch/arm/mach-omap2/smartreflex-class3.c > create mode 100644 arch/arm/mach-omap2/smartreflex-class3.h > create mode 100644 arch/arm/mach-omap2/smartreflex.c > create mode 100644 arch/arm/mach-omap2/sr_device.c > create mode 100644 arch/arm/mach-omap2/voltage.c > create mode 100644 arch/arm/mach-omap2/voltage.h > create mode 100644 arch/arm/plat-omap/include/plat/smartreflex.h > > -- > To unsubscribe from this list: send the line "unsubscribe linux-omap" in > the body of a message to majordomo@vger.kernel.org > More majordomo info at http://vger.kernel.org/majordomo-info.html ^ permalink raw reply [flat|nested] 19+ messages in thread
* RE: [PATCH 0/8] OMAP3: Adding Smartreflex and Voltage driver support 2010-06-24 23:25 ` Kevin Hilman @ 2010-06-25 8:04 ` Gopinath, Thara 0 siblings, 0 replies; 19+ messages in thread From: Gopinath, Thara @ 2010-06-25 8:04 UTC (permalink / raw) To: Kevin Hilman Cc: linux-omap, paul, Cousson, Benoit, Sripathy, Vishwanath, Sawant, Anand >>-----Original Message----- >>From: Kevin Hilman [mailto:khilman@deeprootsystems.com] >>Sent: Friday, June 25, 2010 4:55 AM >>To: Gopinath, Thara >>Cc: linux-omap@vger.kernel.org; paul@pwsan.com; Cousson, Benoit; Sripathy, Vishwanath; Sawant, Anand >>Subject: Re: [PATCH 0/8] OMAP3: Adding Smartreflex and Voltage driver support >> >>Thara Gopinath <thara@ti.com> writes: >> >>> This patch series introduces smartreflex and voltage driver support >>> for OMAP3430 and OMAP3630. SmartReflex modules do adaptive voltage >>> control for real-time voltage adjustments. >>> >>> Originally all the functionalities introduced in this patch >>> were present in arch/arm/mach-omap2/smartreflex.c file in Kevin's >>> pm tree. This patch series does a major rewrite of this file >>> and introduces a separate voltage driver. Major contributors >>> to the original driver are >> >>I just noticed that one thing missing from this series compared to what >>was in the previous PM branch is the disable/enable of SR in the idle >>path, so SR is not getting exercised during idle anymore in the current >>PM branch. >> >>Could you rememdy that please with another patch on top of this series >>(the new pm-sr branch?) >> >>Kevin Hello Kevin, This was intentional as there is not voltage scaling happening in the idle thread in pm-sr branch. Smartreflex needs to be disabled only if a voltage scaling is done during retention/off. I had submitted a patch for addressing this and removing all voltage refrences in pm34xx.c against origin/pm branch the link to which is below https://patchwork.kernel.org/patch/103086/ Regards Thara ^ permalink raw reply [flat|nested] 19+ messages in thread
end of thread, other threads:[~2010-06-25 22:55 UTC | newest] Thread overview: 19+ messages (download: mbox.gz / follow: Atom feed) -- links below jump to the message on this page -- 2010-05-29 16:32 [PATCH 0/8] OMAP3: Adding Smartreflex and Voltage driver support Thara Gopinath 2010-05-29 16:32 ` [PATCH 1/8] OMAP3: PM: Adding voltage driver support for OMAP3 Thara Gopinath 2010-05-29 16:32 ` [PATCH 2/8] OMAP3: PM: Adding smartreflex driver support Thara Gopinath 2010-05-29 16:32 ` [PATCH 3/8] OMAP3: PM: Adding smartreflex device file Thara Gopinath 2010-05-29 16:32 ` [PATCH 4/8] OMAP3: PM: Adding smartreflex hwmod data Thara Gopinath 2010-05-29 16:32 ` [PATCH 5/8] OMAP3: PM: Adding smartreflex class3 driver Thara Gopinath 2010-05-29 16:32 ` [PATCH 6/8] OMAP3: PM: Adding T2 enabling of smartreflex support Thara Gopinath 2010-05-29 16:32 ` [PATCH 7/8] OMAP: PM: Allowing an early init of pm debugfs driver Thara Gopinath 2010-05-29 16:32 ` [PATCH 8/8] OMAP3: PM: Adding debug support to Voltage and Smartreflex drivers Thara Gopinath 2010-06-18 21:47 ` Kevin Hilman 2010-06-25 22:55 ` [PATCH 7/8] OMAP: PM: Allowing an early init of pm debugfs driver Kevin Hilman 2010-06-18 20:46 ` [PATCH 4/8] OMAP3: PM: Adding smartreflex hwmod data Kevin Hilman 2010-06-23 20:13 ` [PATCH 2/8] OMAP3: PM: Adding smartreflex driver support Kevin Hilman 2010-06-23 18:42 ` [PATCH 1/8] OMAP3: PM: Adding voltage driver support for OMAP3 Kevin Hilman 2010-06-23 18:57 ` Kevin Hilman 2010-06-02 23:52 ` [PATCH 0/8] OMAP3: Adding Smartreflex and Voltage driver support Kevin Hilman 2010-06-03 23:27 ` Kevin Hilman 2010-06-24 23:25 ` Kevin Hilman 2010-06-25 8:04 ` Gopinath, Thara
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